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Performance analysis of III-V materials in a double-gate nano-MOSFET

Conference Paper · January 2008

DOI: 10.1109/IEDM.2007.4418877 · Source: IEEE Xplore

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Performance Analysis of Ill-V Materials in a Double-Gate nano-MOSFET

Kurtis D. Cantley , Yang Liu, Himadri S. Pal, Tony Low, Shaikh S. Ahmed', and Mark S. Lundstrom

School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USATNow with Department of Electrical and Computer Engineering, Southern Illinois University, Carbondale, IL, USA

*

Now with Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX, USAE-mail: kurtis.cantleygutdallas.edu

Abstract Approach

Nanoscale double-gate n-MOSFETs with silicon and Ill-V Our approach begins by defining a benchmark device based(GaAs and InAs) channels are studied using numerical on the 14nm node ofthe ITRS (year 2020). Fig. 1 illustratessimulation. The device structures are based on the ITRS the device structure with the numerical parameters given in14nm node (year 2020), and are simulated using the program Table 1. The nanoMOS program used to simulate the devicenanoMOS, which utilizes the NEGF technique for treating has been modified in several ways. First, it was extended toballistic electron transport in the channel. The effective treat arbitrary materials and channel surface and transportmasses used are obtained by extraction from the full band orientations with an effective mass approach. Also, materialsstructure using the sp3d5s* empirical tight-binding method. with different dielectric constants can be specified underneathThis process returns effective mass values for all valleys the gate and over the source/drain regions. This makes thewhich are far more accurate than bulk values for the ultra- device structure more realistic. Still missing are flaredthin-body MOSFET. The results indicate that for digital source/drain contacts which may be present in real devices.logic applications, Ill-V materials offer little or no However, external series resistance can be added to theperformance advantage over silicon for ballistic devices near intrinsic device simulations assuming there is no electrostaticthe channel length scaling limit. influence (the charge in the intrinsic source/drain regions of

Fig. 1 does not deplete in the on-state). Ballistic transport isIntroduction used because analyses have shown that present-day

MOSFETs operate at 60-70% of the ballistic limit (5), (6).Use of Ill-V materials in nanoscale MOSFETs is being These observations are confirmed on this device using aexplored for possible advantages over silicon in the form of Monte Carlo simulation of silicon (shown in Fig. 9 forincreased on-current, decreased device delay, and reduced comparison to Figs. 10 and 11) (7).power supply voltage. Several theoretical studies relating to LSD LG LSDthe performance potential of Ill-V materials in electronicdevices have been reported in recent years using varioussimulation methods (1), (2). If Ill-V materials can indeed beincorporated into large scale manufacturing, the earliest .possible date would likely be 2016, near the end of the inscurrent ITRS version. In this paper, we simulate the SD 0 SDoperation of benchmark devices based on specifications at the ins

end of the current ITRS version. We use quantum ballisticNEGF simulations with 2-D electrostatics in the program Fig. 1: Device structure used for all nanoMOS simulations. Gate underlapnanoMOS (3), (4). We then compare the performance of U is the lateral distance between the gate edge and the start of thetransistors with Si, GaAs, and InAs channels. In contrast to source/drain, so the total effective channel length is LG+2U The body is

previous work,wecompare devices that are individually undoped except for spillover from the Gaussian profile in the source/drain.previous work, we compare devices that are individually p p _____optimized for each material to maximize on-current at a Parameter Value Table 1: Parameters used in thespecified off-current. More importantly, we extract the VDD 0.7 V nanoMOS simulations. The Gaussianeffective masses from empirical tight-binding calculations tins 3.0 nm doping slope was taken from the ITRS

*will demonstrate, the use of bulk effective t 2.6 nm as 0. I I *(gate length) and the off-because, as we Wlll clemonstrate, tne use ot OUlli eTTeCtlVe tbody current is always adjusted to OlgA/gmmasses in an ultra-thin-body (UTB) structure can produce NSD 1020cm3 using the gate metal work function.large error for Ill-V materials. Using these effective masses, 24 The insulator under the gate is high-kwe reach a different conclusion from previous work (1), (2), ins (3nm HfO2 gives EOT=0.5nm) while

. fo r - - wr £ 39~~~~~~~~~~~~I0 the cafnnina insujlator ovepr thein th1at we see little or no performance ad vantage for Il-v cap_ _ 3.9 thercapprinrgionsuao ovethe2materials over silicon in MOSFETs near the end of the ITRS. LSD 5 nm soredanegnsiSi.

LG5nm

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Previous work has shown that for InSb, the importance of L source/drain barrier as a function of gate voltage.and X valleys is overestimated using bulk effective masses in Conversely, lighter effective mass leads to higher velocitya thin body (8). We expect this to be the case for all Ill-V (Fig. 7). In GaAs, the heavy-mass L valley starts becomingmaterials, so it is necessary to extract the effective masses populated around VG=0.4V, leading to a change in injectionwith another method. We chose the sp3d5s* empirical tight- velocity at that point. In the end, silicon still has the highestbinding method (9), (10), which returns a full 2-D subband on-current (for fixed off-current) of all the materialsstructure for the x-y plane of the quantum well structure (z- considered (Fig. 8). However, a question remains as to howdirection is quantized). By taking slices of this surface in the different effective masses or body thicknesses change theappropriate directions, the longitudinal and transverse resulting current. We thus perform a sensitivity analysis byeffective masses can be extracted and transformed into the varying the body thickness ±10% from 2.6nm, anddevice coordinate system. The confinement mass is found recalculating the current. Fig. 10 shows that even thesevia the energy difference between the bulk valley minima and changes are not sufficient to increase Ill-V current to that ofthe first subband valley minima. Fig. 2 shows the first silicon. Finally, Fig. 11 shows the dramatic effect of externalsubband structure in the X and L directions calculated for a series resistance (RsD=55Q-Mtm) on the drain current. The2.6nm thick body for GaAs and InAs in inversion. When ITRS drive current specification for silicon is 2981[tA/[im,using bulk masses for a GaAs UTB structure, only the X and this condition is nearly met.valleys are occupied, as shown in Fig. 3a. When the effective a) GaAsmasses are obtained from a tight-binding analysis of the UTB 2 Istructure, a significant F valley population is in fact N. =A9.1e2/cm2observed (Fig. 3b). Therefore, analysis of UTB Ill-V 1 5 mnvMOSFETs should never use bulk masses. This effective 1-

mass extraction procedure is not used for silicon because we '/found that bulk values are reasonable down to this body a 1 L Fl Xthickness. Table 2 summarizes effective masses used, after L Fermi Level Xtransformation into the device coordinate system (11), (12). F--- -------------

0.5Results -4 -3 -2 -1 0 1 2 3 4 5 6

kx (/a0)The lateral distance between the gate edge and the start of the b) InAssource/drain, referred to here as "gate underlap," is a critical 3 Idesign parameter (not specified by the ITRS) that we 2.5 N. =9.6e12/cm2optimized for each material using the on-current metric (Fig. inv4). The off-current is adjusted to a constant value using the a) 2gate metal work function at each point. The optimum > 1.5 Lunderlap is found to be U=2.5nm for Si, 3.5nm for GaAs, and a)

7nm for InAs. The large underlap required for InAs occurs L\ Fermi Levelbecause only the F valley is populated, and the extremely 0.5 --------F ------------

light effective mass associated with it leads to strong 0tunneling through the source-channel barrier. When the gate -4 -3 -2 -1 0 1 2 3 4 5 6underlap is small and the source and drain are in close kx (/ao)proximity, the device is difficult to turn off mostly due to Fig. 2: Lowest energy subband structure in a 2.6nm body as given by thesource/drain tunneling, and far less on-current is produced for empirical tight-binding calculation. The result indicates that the F valley isthe fixed off-current. An example of the normalized energy- important even with strong quantum confinement in a) GaAs, and b) InAs.resolved current in the off-state for GaAs is shown in Fig. 5. For both cases, the out-of-plane (confinement) X valley states project onto

the plane, but still lie above the F valley.Most current is due to source-to-drain tunneling. The gatework function must be substantially increased for low Since on-current is not the only important device metric, weunderlaps to achieve desired off-current, but this decreases have also calculated subthreshold swing S, drain-inducedthe on-current. In the large underlap regime, the channel barrier lowering DIBL, device delay x, and effective driveintroduces series resistance and the current is reduced. At current Ieff (13) for each material in its optimized device (notsome point between, there is an optimal trade-off that differs including series resistance effects). The results arewith material. summarized in Table 3. Device delay is calculated using

=AQAC/ATI, where lAQ is from the extra charge induced in theBy examining the simulated optimized devices, we observe device from VG=O to VDD at VD=VDD. We see that with thisthat for III-V materials, the low density of states of the F metric, InAs appears to have a slight edge over Si. However,valley allows less charge to be induced in the channel at high with the effective drive current metric, which is proportionalgate bias. Fig. 6 shows the charge at the top of the to relative speed (14), silicon is faster.

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Table 3: Performance parameters (subthreshold swing, drain-induced barrierlowering, device delay, and effective drive current) for the materials in their

a) GaAs (bulk effective mass) corresponding optimized devices.

$ 100 EHL F |Parameter Si GaAs InAso S(mV/dec) 84 91 87

XX110| DII3LB(mV/V) 115 115 88

°50 -T (ps) 0.042 0.054 0.038O Xi leff (mA/tm) 2.2 1.5 1.7-oXQ~ g gConclusionsC/) lo1°10 11

112

1 13101010m 10A careful study of the performance potential of Ill-V

inv (cm ) MOSFETs indicates that for a device at the end of the ITRS,b) GaAs (TB effective mass) little or no performance advantage can be expected over

iO silicon from either an on-current or device delay perspective.We have also shown that use of bulk effective masses in a

o r1 < UTB double-gate structure leads to large errors. Finally, wehave demonstrated that optimization of device structure is

o 50 crucial for comparing different channel materials. TwoO L points should be restated. First, this study assumed ballisticC

11 transport. Ill-V materials offer higher mobility, which couldCD 10 11 12 give them an advantage if scattering exists. For the short

U) 1010 1 01

1 012 1013 channel lengths assumed here, however, we expect transport

N/) 10m10210 to be nearly ballistic. The second caveat is about bandNv (cm2) structure models. Several different techniques are available,

Fig. 3: Comparison of subband occupation in GaAs a) using bulk effective and it is not clear how they compare quantitatively. It doesmasses and b) using effective masses derived from the tight-binding seem clear, however, that non-parabolic band structuresimulation of the 2.6nm thick body. The difference is significant, and effects will strongly influence the performance of Ill-Villustrates the importance of using the correct effective mass to account for MOSFETs. In conclusion, for operation at the scaling limit,extreme physical confinement and non-parabolicity in the electronic band we find no compelling reason to expect a performancestructure.

advantage from Ill-V MOSFETs.Table 2: Effective mass information used in nanoMOS simulations.Orientations are (wafer)/[transport]. mx, my, and mz are the effective massesas transformed (conserving DOS) into the device coordinate system. The Acknowledgementsvalues are only valid for the 2.6nm thick quantum well.

This work was supported by the MARCO Focus Center onMaterial Valleymx my mzg0 A\E Materials, Structures, and Devices. Computational supportSi (bulk) X1 0.19 0.19 0.916 2 0,

(001)/[110] X2 0.315 0.553 0.19 4 0 was provided by the NSF Network for ComputationalF 0.064 0.064 0.064 1 0 Nanotechnology (NCN).

GaAs (bulk) L 0.142 0.68 0.11 4 0.29(001)/[100] Xi 0.19 0.19 1.9 1 0.48 References

X2 1.9 0.19 0.19 1 0.48X3 0.19 1.9 0.19 1 0.48 (1) A. Pethe et al., IEDMTech. Dig., pp. 605-608,2005.F 0.11 0.11 0.17 1 0 (2) M. De Michielis, D. Essini, and F. Driussi, IEEE Trans. Elec. Dev., 54,

a T)L 0.204 0.511 0.246 4 0.28 pp. 115-123,2007.(001/ 100B X 0.182 0.182 1.493 1 0.48 (3) Z. Ren et al., IEEE Trans. Elec. Dev., 50, pp. 1914-1925,2003.(0)/[ _]Xi

1.723 02216 0.216 1 0.48 (4) nanoMOS. Available at http://nanohub.org.L |X3 |107215 0|216723| 0.216 l 0.48 (5) A. Khakifirooz and D. Antoniadis, IEDM Tech. Dig., pp. 667-670,___________ X3 0.216 1.723 0.216 1 0.48 2006.

F 0.076 0.076 0.133 1 0 (6) M. Lundstrom, K. Cantley, and H. Pal, Proc. MRS, Symp. L, Fall 2006.

InAs (TB) L 0.225 0.688 0.201 4 1.44 (7) QuaMC. Available at http://nanohub.org.(001)/[100] Xi 0.182 0.182 1.103 1 1.91 (8) Z. G. Zhu et al., IEDM Tech. Dig., pp. 807-810, 2006.

X2 1.25 0.201 0.201 1 1.91 (9) T. B. Boykin, G. Klimeck, and F. Oyafuso, Phys. Rev. B, 69,2004.X3 0.201 1.25 0.201 1 1.91 (10) T. B. Boykin, G. Klimeck, R. C. Bowen, and F. Oyafuso, Phys. Rev. B,

66, 2002.(11) F. Stern and W. E. Howard, Phys. Rev., 163, 1967.(12) A. Rahman, M. S. Lundstrom, and A. Ghosh, J. Appi. Phys., 97, 2005.(13) M. H. Na, E. J. Nowak, W. Haensch, and J. Cai, IEDM Tech. Dig., pp.

12 1-124, 2002.(14) K. K. Ng, C. S. Rafferty, and H.-I. Chong, IEDM Tech. Dig., 2001.

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4.5 .X 1011.5 -12

1 ; ,10 ;E GaAs3.5 - - 0 0 InAs

3- ~~~~ ~ ~~0.5 -222 (\~~~~~- 3~ ~ ~ ~ ~ ~ ~~~~~El~~~~~~~~~~~~~~~~~~~~~

2.5--L.2. w 017217- ->

2

-0.5 2-1.5 E asCurrent

0 1 2 3 4 5 6 7 -10 -5 0 5 10 0 0.1 0.20.3 0.4 0.5 0.6 0.7

Gate Underlap (nm) x (nm) VG (V)

Fig. 4: On-current as a function of gate underlap Fig. 5: Energy-resolved current (normalized) Fig. 6: InAs delivers a much lower inversionfor all materials simulated. In each case, off- from nanoMOS for the off-state of GaAs charge at the top ofthe source/drain barrier thancurrent is 0.1IA/um. Optimized underlap U is showing the current is due almost entirely to GaAs or Si.2.5nm for Si, 3.5nm for GaAs, and assumed to source-to-drain tunneling.be 7nm for InAs.

x 107__4__ _5___ _4

4.5 Si 4 ~ i3.5E GaAs -E-GaAs

4

0 InAs 35InAs 33.5 3

-~~~~~- -~~~~~~~~~~~~ 2.5

E 5 2.5 X02.5 < < 2

E 2 E2 1.

1.5 1.5 rV (VV1/

0. e Ballistic0. 5 0.5 ~~~~~~~~~~~~~~~~~~~~/--G-Dissipative

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 0. 1 0.2 0.3 0.4 0.5 0.6 0.7 0 0.1 0.2 0.3 0.4 0.5 0.6VG (V) VG (V) VD (V)

Fig. 7: Injection velocity for the different Fig. 8: Ballistic drain current as a function of Fig. 9: Silicon (ballistic) drain current versusmaterials. InAs has much higher velocity due to gate voltage. Because of the speed of the F drain voltage from Monte Carlo simulation.the small effective mass. The GaAs L valley valley in InAs, its current is comparable to There is some difference (approximately 30%)(heavy effective mass) begins to be populated GaAs, even with much less inversion charge. in the ballistic and dissipative models.around 0.4V and causes a change in velocity.

4.5

4 4-

3.5 -3.5-

3 -3-

E j :'E2.5 ~~~~~~~~~~2.5-

El--- GaAs -El- GaAs0.5 ~~~~~~~InAs 05-InAs

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7VD (V) VD (V)

Fig. 10: Ballistic drain current versus drain voltage. The error bars Fig. ll: Ballistic drain current as a function of drain voltage including aindicate 10%o variation in the body thickness (thin bodies allow higher series resistance of 55Q.-jm. Our results show lower channel resistancecurrents). Silicon is assumed to have no error since we find that the bulk for silicon, implying that III-V materials would likely not operate as wellmasses work well even in the UTB structure. at lower power supply voltages.

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