PART I ELECTRONIC CIRCUITSmist.ac.in/pdfs/LabManuals/ECE/ECPCLabManual.pdfDouble click the transistor and set the part no. as BC107. 2. Next, click the Basic tab and pick and place

Electronic circuits & Pulse Circuits Lab Manual

ECE,MIST

1

PART – I

ELECTRONIC CIRCUITS


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SIMULATION LABORATORY


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EXPERIMENT- 1

COMMON EMITTER AMPLIFIER

AIM: To design and determine the frequency of operation of a common-emitter amplifier using simulation

software Tina Ver. 7 or Ver 9 or PSpice Version 9.1

APPARATUS

Tina or PSpice software.

Personal computer.

COMPONENTS

S. No. Description Part No./Value Quantity

1 Transistors BC107 1

2 Resistors 1 MΩ, 27 KΩ, 4.7 KΩ, 3.9

KΩ, 1 KΩ

5

3 Capacitors 10 μF(3) 3

PROCEDURE

Drawing the circuit schematic

1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place an NPN

transistor on the centre of the page. Double click the transistor and set the part no. as BC107.

2. Next, click the Basic tab and pick and place resistors, capacitors, battery and the signal generator in

convenient locations following the schematic of Fig. 1. (To rid the cursor of the component after placing it

on the editor page, click anywhere on the page else, right click and select “Cancel Mode”). Then, place the

ground symbol from the Basic tab and a Voltage pin from the Meters tab.

3. Double-click the resistors, capacitors and transistors in succession and set the parameter value of each

component in the component dialog box. For transistors ensure that the right part no. is selected. Note: For

megohms, use “M”, for milliohms use “m”, for microfarad use “u” and for nanofarad use “n”. Connect the

components using the Wire symbol in the menu bar, according to the schematic in Fig. 1. Then, place a

single pole single throw (SPST or ON-OFF) switch from the Switches tab. Set the switch in ON position.

4.Double-click the power supply symbol and set to 25V DC. Next, double-click the signal generator symbol

and enter DC = 0V, Signal (select Sinusoidal) AC = 20millivolts by entering 20m and set the frequency to

10kHz by entering 10k.Check the node voltages

The Electric Rules Check (ERC) is performed by clicking Analysis in the menubar and then clicking ERC.

This will show up errors and warning messages if the schematic is not proper. Correct the schematic based

on the summary displayed by the ERC.


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5. Next, record the DC node voltages VCE, across Rc and across Re and current IC by clicking Analysis →DC

Analysis →Table of DC Results.

Frequency Response with the switch S1 in ON position.

6. In PSpice: Click the “Analysis” in the menu bar and then click “Setup” and select “AC Sweep” and set

the starting frequency to 10 Hz and end frequency to 1 GHz and select radio button “Decade” and then close

the box.

Then, click “Analysis: and click “Simulate” and when the Analysis dialog box opens, select “AC”. Select

“Traces” button in the taskbar and click “Delete all traces” and then select “Adding Traces” and then select

dB[ ].

In TINA : Click “Analysis” in the menu bar and then click “AC Analysis” and then “AC Transfer

Characteristic” and set the starting frequency to 10 Hz and end frequency to 1 GHz. Set the Sweep type to

“Logarithmic” and click OK.

A graph of gain in dB vs. Frequency in Hz will be displayed. Sketch the graph obtained on graph paper of

only the response with the switch in ON position.

Click “Analysis” in the menu bar and then click “AC Analysis” and then “Table of AC Results” and note

the voltage of the generator vi, the voltage at the amplifier output vo, and calculate the gain in dB using the

expression 20 log vo/ vi and verify that it tallies with the value in the graph at 10kHz.

7. Sketch the output characteristics and draw the DC load line and mark the quiescent point of operation

indicating IC and IB at this point from the values recorded in the previous step in DC Analysis.

Next, set the switch to OFF position i.e with the bypass capacitor disconnected from across the emitter

resistor and run step 6. Note down the gain (in dB) at 10 KHz.

Additional exercise

Set the switch again to ON position.

From the menu, double click the signal generator and set the input sinusoidal frequency to 10kHz. On the

menu bar click Test & Measurement (T&M) and click “Oscilloscope”.

Click Run and then Auto (bar at the bottom of the virtual oscilloscope, and set connection to AC) and set the

V/div and Time/div till a clean sinusoidal trace appears. Then press the “stop” button to freeze the

oscilloscope trace and using the B button in the Cursor box and with the ON button pressed in the Cursor

box, measure the amplitude of the traces taking care with the V/div mentioned at the top of the screen.

Next, change the amplitude of the signal generator to say, 500mV and again obtain a trace and record your

observations of the trace.


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CIRCUIT DIAGRAM

RESULT

1. The frequency response of the Common-emitter amplifier is measured and the graph plotted.

2. From the graph

i) The gain at 10kHz = ……..dB

ii) The lower cutoff frequency corresponding to a gain 20log

i

o

v

vdB -3dB = ……Hz.

iii) The upper cutoff frequency corresponding to a gain 20log

i

o

v


iv). A sketch of the oscilloscope display of the response of the amplifier at 10 KHz frequency is made.

Function

Generator

10 μF

10μF

10μF

3.9 KΩ

1 KΩ

B

E

C

27 KΩ

4.7 KΩ

VCC (+25V)

CC

CE

CS

vo

vi= 2V

Fig. 1 Common Emitter amplifier

Re

Rc

1kΩ

VF1


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EXPERIMENT- 2

COMMON SOURCE AMPLIFIER

AIM: To design and determine the frequency of operation of a common-source amplifier using simulation

software Tina Ver. 7 or Ver 9 or PSpice Ver. 9.1.

APPARATUS


Personal computer.

COMPONENTS


1 n-channel JFET 2N4393 1

2 Resistors 1 MΩ(2), 500 Ω, 2.5 KΩ 4

3 Capacitors 1μF(2), 10 μF 3

PROCEDURE


1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place a “Junction FET

N-Channel” transistor on the centre of the page. Double click the transistor and set the part no. as 2N4393.

2. Next, Click the Basic tab and pick and place resistors, capacitors, battery and the signal generator in


on the editor page, click anywhere on the page else, right click and select “Cancel Mode”).

Then, place the ground symbol from the Basic tab and a Voltage pin from the Meters tab.




components using the “Draw Wire” button according to the schematic in Fig. 1.



10kHz by entering 10k.

Check the node voltages

The Electric Rules Check (ERC) can be performed by clicking Analysis in the menubar and then clicking

ERC. This will show up errors and warning messages if the schematic is not proper. Correct the schematic

based on the summary displayed by the ERC.

5. Next, record the DC node voltages and currents VDS, VGS, and ID by clicking Analysis →DC Analysis

→Table of DC Results. Record the DC node voltages VDS, across RD and RS and current ID.


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Frequency Response



the box.



dB[ ].




A graph of gain in dB vs. Frequency in Hz will be displayed. Sketch the graph obtained on graph paper.




7. On a rough sketch of the drain characteristics, draw the dc load line and mark the quiescent point of

operation indicating the value of ID and the corresponding VGS.

Additional exercise

From the menu, double click the signal generator and set the input sinusoidal frequency to 10kHz.

On the menu bar click Test & Measurement (T&M) and click “Oscilloscope”. Click Run and then Auto (bar

at the bottom of the virtual oscilloscope, and set connection to AC) and set the V/div and Time/div till a

clean sinusoidal trace appears, Then press the “stop” button to freeze the oscilloscope trace and using the B

button in the Cursor box and with the ON button pressed in the Cursor box, measure the amplitude of the

traces taking care with the V/div mentioned at the top of the screen.

Next, change the amplitude of the signal generator to say, 500mV and again obtain a trace and observe the

trace and record your observations of the trace.


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CIRCUIT DIAGRAM

Fig. 1 FET Common Source amplifier

RESULT

1.The frequency response of the FET common-source amplifier is simulated and the graph plotted.

2. From the graph

i) The gain of the amplifier at 10 kHz = ………..dB

ii) The lower cutoff frequency corresponding to a gain 20log

i

o

v

vdB -3dB =……Hz.

iii) The upper cutoff frequency corresponding to a gain 20log

i

o

v

vdB -3dB =……Hz

Function

Generator

1μF

1μF

10μF

2.2 KΩ

500 Ω 1MΩ

vo

G

D

S

VDD

vi

ZL

Rs

10KΩ


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EXPERIMENT- 3

TWO STAGE RC COUPLED AMPLIFIER

AIM: To design and determine the gain of the first stage and overall gain of a two-stage RC coupled

amplifier using simulation software Tina Ver. 7 or Ver 9 or PSpice Ver. 9.1.

.

APPARATUS


Personal computer.

COMPONENTS


1 Transistors BC 107 2

2 Resistors 10KΩ, 33 KΩ, 10 KΩ, 6.8

KΩ(2), 1 KΩ(2), 470Ω, 220Ω

9

3 Capacitors 10 μF 5

PROCEDURE


1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place two NPN

transistors on the centre of the page. Double click the transistors and set their part nos. as BC107.




ground symbol from the Basic tab and two Voltage pins from the Meters tab, one each at the output of each

transistor stage as shown in the schematic of Fig. 1.




components using the Wire symbol in the menu bar, according to the schematic in Fig. 1.



10kHz by entering 10k.





5. Next, record the DC node voltages VCE, across Rc and across Re and current IC of the first stage of the

amplifier by clicking Analysis →DC Analysis →Table of DC Results.


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the box.



dB[ ].





the voltage of the generator vi1, the voltage at the amplifier output vo2, and calculate the gain in dB using the

expression 20 log vo2/ vi1 and verify that it tallies with the value in the graph at 10kHz.

7. Sketch the output characteristics and record the gain of first stage and second stage at 10 kHz. Draw the

DC load line and mark the quiescent point of operation given that for the BC 107 transistor (first stage)

BVCEO = 30V, hFE(dc) = β = 75, Ic(max) = 800mA.

Additional exercise

From the menu, double click the signal generator and set the input sinusoidal frequency to 10kHz. Ensure

that the signal generator amplitude is set to 2mvolts. On the menu bar click Test & Measurement (T&M)

and click “Oscilloscope”.

Click Run and then Auto (bar at the bottom of the virtual oscilloscope, and set connection to AC) and set the

V/div and Time/div till a clean sinusoidal trace appears. While the trace is on the scope (by default it shows

VF1), select VF2 in the “Channel” box to view the VF2 trace. Then press the “stop” button to freeze the

oscilloscope trace and using the B button in the Cursor box and with the ON button pressed in the Cursor

box, measure the amplitude of the traces taking care with the V/div mentioned at the top of the screen.

Next, change the amplitude of the signal generator to say, 50mV and again obtain a trace and observe the

trace and record your observations of the trace.


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CIRCUIT DIAGRAM

Fig 1 Two –stage RC coupled amplifier

RESULT

1. The frequency response of the Two stage RC coupled amplifier is measured and the graph plotted.

2. From the plot of overall gain vs. frequency

i) The gain of the first stage of the amplifier at 10 kHz = ………..dB

ii) The gain of the second stage of the amplifier at 10 kHz = ………..dB

iii) The overall gain of the amplifier 20log

1

2

i

o

v

v at 10 kHz = ……….dB

iv) The lower cutoff frequency corresponding to a gain 20log

1

2

i

o

v


v) The upper cutoff frequency corresponding to a gain 20log

1

2

i

o

v


vo2

Function

Generator

10μF

10μF

Rc 2.2K Ω

1 KΩ

B

E

C

33 KΩ

6.8 KΩ

VCC (+12V)

Cb

CE

CS

B

E

C

6.8 KΩ

CE 10μF

1 KΩ

10μF

Cb

vo1

X1 X2

Y1 Y2

vi1 vi2

Re Re

Rc

vi vinput

10μF

2.2K Ω 10 KΩ

10 KΩ

VF1

VF2


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EXPERIMENT- 4

CURRENT SHUNT AND VOLTAGE SERIESFEEDBACK AMPLIFIER

AIM: To design and determine the frequency of operation of a common-emitter amplifier using simulation

software Tina Ver. 7 or Ver 9 or PSpice Version 9.1

APPARATUS


Personal computer.

COMPONENTS

S.

No.

Description Part No./Value Quantity

1 Transistors BC107 2

2 Resistors 15K,2.2K,3.3K,33K,560,47K,150,1K 10

3 Capacitors 10 μF(3) 3

PROCEDURE


1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place an NPN





ground symbol from the Basic tab and a Voltage pin from the Meters tab.




components using the Wire symbol in the menu bar, according to the schematic in Fig. 1. Then, place a

single pole single throw (SPST or ON-OFF) switch from the Switches tab. Set the switch in ON position.


and enter DC = 0V, Signal (select Sinusoidal) AC = 1vby entering 1v and set the frequency to 1kHz by

entering 1k.





5. Next, record the DC node voltages VCE, across Rc and across Re and current IC by clicking Analysis →DC

Analysis →Table of DC Results.

Frequency Response .



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A graph of gain in dB vs. Frequency in Hz will be displayed. Sketch the graph obtained on graph paper of

only the response with the switch in ON position.




CIRCUIT DIAGRAM:

i)current shunt feedback amplifier

R1 3

.3k

R2 1k

R3 1

50

R4 1k

R5 5

00

V1 15

+ VG1

T1 !NPN T2 !NPN

VF1

C1 1u

Fig 1: current shunt feedback amplifier


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T

Ga

in (

dB

)

-50.00

-40.00

-30.00

-20.00

-10.00

0.00

10.00

20.00

Frequency (Hz)

10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M 1.00G

Ph

ase

[d

eg

]

-400.00

-300.00

-200.00

-100.00

0.00

100.00

Fig:2 frequency response of current shunt feedback amplifier

ii)Voltage series feedback amplifier:

R1 1

50k

R2 4

7k

R3 3

.3k

R4 5

60

R5 3

3k

R6 2

.2k

R7 3

.3k

R8 1

k

R9 150

T1 !NPN

T2 !NPN

+ VG1

V1 12

C1 1

0u

VF1

C3 1

u

R10 15k

C2 1u

Fig 3: Voltage series feedback amplifier


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T

Ga

in (

dB

)

0.00

10.00

20.00

30.00

Frequency (Hz)

10 100 1k 10k 100k 1M 10M 100M

Ph

ase

[d

eg

]

-300.00

-200.00

-100.00

0.00

100.00

Fig4:frequency response of Voltage series feedback amplifier


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=−

=−

=

===

=+=+=

=−=−=

===

===

KI

VVR

KI

VR

VVVV

AIII

AII

AmI

I

R

BCC

R

B

REBEB

BRR

BR

C

B

3125.40480

65.525

15.12465

65.5

65.5565.0&

46515480

480153232

15190

3

1

1

2

2

12

1

EXPERIMENT- 5

AIM: To design CASCODE amplifier with potential divider circuit using NPN Transistor 2N2923 for the

specifications: IC= 3 mA, Vce = 10v, = 190, & IR1 = 32IB .verify DC values (Voltage and current) at

various nodes using MULTISIM.

APPARATUS: - Multisim Software, PC.

DESIGN PROCEDURE:

Vcc = 25V

Select VRE ≤ VCE

Select VRE = 5V

)00.2(66.13

5KselectK

mI

VR

C

REE ===

& VRC=VCC-VCE-VRE=25-10-5=10V

=== KmI

VR

C

RCC 33.3

3

10


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CIRCUIT DIAGRAM:-

R1

6.8kOhm_5%

R2

1.8kOhm_5%

Q1

BC107BP

R3

1.1kOhm_5%

C1

22uF-POL

R4

4.7kOhm_5%

C2

4.7uF-POL

R5

5.6kOhm_5% C3

10uF-POL

VCC

18V

V1

1mV

1kHz

0Deg

C4

4.7uF-POL

XSC1

A B

G

T

Q2

BC177AP

XBP1

IN OUT


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WEIN BRIDGE OSCILLATOR USING TRANSISTOR

AIM: To construct and determine the frequency of operation of an RC phase-shift oscillator using Tina Ver.

7 or Ver 9 .

APPARATUS


Personal computer.

COMPONENTS



2 Capacitors 10μF, 0.001 μF 5

3 Resistors 22 KΩ, 3.9 KΩ, 3.3 KΩ, 2.2

KΩ, 4.7k KΩ,

11

PROCEDURE


1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place an “NPN”


2. Next, Click the Basic tab and pick and place resistors, capacitors and the battery in convenient locations

following the schematic of Fig. 1. (To rid the cursor of the component after placing it on the editor page,

click anywhere on the page else, right click and select “Cancel Mode”).

Then, place the ground symbol from the Basic tab and a Voltage pin at the output from the Meters tab.





4.Double-click the power supply symbol and set to 25V DC.




based on the summary displayed by the ERC.5. Next, record the DC node voltages VCE, across Rc and across

Re and current IC by clicking Analysis →DC Analysis →Table of DC Results.

6. Click Analysis in the menu bar and select Transient. In the dialog box set the start time to 0 sec and the

end time to 500u.Then click OK. Note the start and building up of oscillations as time progresses in the

graph. The software gives correct results only upto this time of 500microseconds. The values are in

picovolts and the axis does not accommodate this voltage.

7. Next, select “Oscilloscope” from the T&M Menu. Then click Run and then Auto in the bottom of the

virtual oscilloscope dialog. Select AC coupling and observe the steady-state sinusoidal waveform. To

synchronize screen waveform set Trigger mode to Normal and then using the B cursor ON, measure the


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time period of the waveform. Then, use the horizontal cursor to measure the peak to peak voltage of the

waveform. A screen shot of the output waveform is shown in Fig. 2.

Sketch the steady-state sinusoidal output waveform on a graph paper.

8. Sketch the output characteristics and draw the DC load line and mark the quiescent point of operation for

the BC 107 transistor using the values in the Table of DC results.

CIRCUIT DIAGRAM:

T1 !NPN

R2 2

2k

R3 1

0k

R5 4

.7k

R6 2

.2k

R9 2

.2k

R11 4

.7k

C1 1

nC

2 1

n

C3 10uC4 10u

R1 4

.7k

R4 4

.7k

R7 2

.2k

T2 !NPN

R8 2

2k

C5 1

0u

R10 2

.2k

V1 25

Fig. 1 Wein Bridge Oscillator Output waveform


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T

0.00 50.00u 100.00u 150.00u 200.00u

Axis

label

-5.00

-4.00

-3.00

-2.00

-1.00

0.00

1.00

2.00

3.00

Fig :2 Output wave form of wein bridge oscillator

RESULT

1. The frequency of the wein bridge oscillator was observed and the graph is plotted. The frequency

of oscillation is T

1 =…….Hz and vo(p-p) is ………..volts.

2. Caculte the theoretical frequency f = 1/2πRC


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=−

=−

=

===

=+=+=

=−=−=

===

===

KI

VVR

KI

VR

VVVV

AIII

AII

AmI

I

R

BCC

R

B

REBEB

BRR

BR

C

B

3125.40480

65.525

15.12465

65.5

65.5565.0&

46515480

480153232

15190

3

1

1

2

2

12

1

EXPERIMENT- 6

AIM: To design CASCODE amplifier with potential divider circuit using NPN Transistor 2N2923 for the

specifications: IC= 3 mA, Vce = 10v, = 190, & IR1 = 32IB .verify DC values (Voltage and current) at

various nodes using MULTISIM.

APPARATUS: - Multisim Software, PC.

DESIGN PROCEDURE:

Vcc = 25V

Select VRE ≤ VCE

Select VRE = 5V

)00.2(66.13

5KselectK

mI

VR

C

REE ===

& VRC=VCC-VCE-VRE=25-10-5=10V

=== KmI

VR

C

RCC 33.3

3

10


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CIRCUIT DIAGRAM:-

R1

6.8kOhm_5%

R2

1.8kOhm_5%

Q1

BC107BP

R3

1.1kOhm_5%

C1

22uF-POL

R4

4.7kOhm_5%

C2

4.7uF-POL

R5

5.6kOhm_5% C3

10uF-POL

VCC

18V

V1

1mV

1kHz

0Deg

C4

4.7uF-POL

XSC1

A B

G

T

Q2

BC177AP

XBP1

IN OUT


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RC PHASE SHIFT OSCILLATOR USING TRANSISTOR

AIM: To construct and determine the frequency of operation of an RC phase-shift oscillator using Tina Ver.

7 or Ver 9 or PSpice Ver. 9.1.

APPARATUS


Personal computer.

COMPONENTS



2 Capacitors 10μF, 0.001 μF (3) 4

3 Resistors 22 KΩ, 3.9 KΩ, 3.3 KΩ(2), 2.2

KΩ(2), 1 KΩ

7

PROCEDURE


1. Open the Tina Schematics Editor page. Click the Semiconductors tab and pick and place an “NPN”


2. Next, Click the Basic tab and pick and place resistors, capacitors and the battery in convenient locations

following the schematic of Fig. 1. (To rid the cursor of the component after placing it on the editor page,

click anywhere on the page else, right click and select “Cancel Mode”).

Then, place the ground symbol from the Basic tab and a Voltage pin at the output from the Meters tab.





4.Double-click the power supply symbol and set to 25V DC.




based on the summary displayed by the ERC.. Next, record the DC node voltages VCE, across Rc and across

Re and current IC by clicking Analysis →DC Analysis →Table of DC Results.

6. Click Analysis in the menu bar and select Transient. In the dialog box set the start time to 0 sec and the

end time to 500u.Then click OK. Note the start and building up of oscillations as time progresses in the

graph. The software gives correct results only upto this time of 500microseconds. The values are in

picovolts and the axis does not accommodate this voltage.

7. Next, select “Oscilloscope” from the T&M Menu. Then click Run and then Auto in the bottom of the

virtual oscilloscope dialog. Select AC coupling and observe the steady-state sinusoidal waveform. To

synchronize screen waveform set Trigger mode to Normal and then using the B cursor ON, measure the

time period of the waveform. Then, use the horizontal cursor to measure the peak to peak voltage of the

waveform. A screen shot of the output waveform is shown in Fig. 2.

Sketch the steady-state sinusoidal output waveform on a graph paper.


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8. Sketch the output characteristics and draw the DC load line and mark the quiescent point of operation for

the BC 107 transistor using the values in the Table of DC results.

CIRCUIT DIAGRAM

voutput

10 μF

3.9 KΩ

1KΩ

B

E

22 KΩ

2.2 KΩ

VCC

(+25V)

C

CE

C C

C

3.3 KΩ 3.3 KΩ 2.2 KΩ

0.001 μF

0.001 μF

0.001 μF

Rc

I3 Ib

Re

VF1


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25

Fig.2 Screenshot of virtual oscilloscope showing Oscillator waveform

RESULT

1. The frequency of the RC phase shift oscillator was observed and the graph for 2 cycles plotted. The

frequency of oscillation is T

1 =…….Hz and vo(p-p) is ………..volts.

2. The dc voltages i) VCE =……volts ii) across Rc = ……….volts, and

iii) across Re. = ……….volts

On the output characteristics, the dc load line is drawn and the quiescent point of operation indicating IC and

IB at this point is marked.


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HARDWARE LABORATORY


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27

EXPERIMENT- 1

CLASS A POWER AMPLIFIER

AIM: To determine the efficiency of a Class A amplifier with transformer coupling to an 8 ohm

loudspeaker.

APPARATUS

S. No. Description Range Quantity

1 Function Generator 1

2 Oscilloscope 1

COMPONENTS


1 Transistor BC 547B 1

2 Transformer (Primary) 100:(Secondary)25 1

3 DC Ammeter (Analog) 0-100 mA 1

4 Capacitors 100 μF, 10 μF 1 each

5 Resistors 18 KΩ, 8.1 KΩ, 220 Ω 1 each

6 Loudspeaker 8 Ω 1

THEORY

A Class A amplifier is one in which the operating point and the input signal are such that the current in the

output circuit (in the collector) flows at all times and it operates essentially over a linear portion of its

characteristics. While excellent for amplification purposes its use as a power amplifier in audio and other

low frequency applications driving large loads such as loudspeakers is limited by its poor efficiency mainly.

The primary reason for the fall in efficiency is poor impedance matching between say, the loudspeaker and

the transistor resulting in excessive power dissipation in the transistor, mostly wasted power due to the DC

power they consume from the power supply. This limitation can be overcome by coupling the load via an

impedance matching transformer which is configured as a step-down transformer whose primary winding

loads the transistor and the secondary winding the loudspeaker as shown in the circuit diagram of Fig.2. See

Note at the end of this document on maximum power transfer and efficiency of a simple circuit.


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28

Output power: The ac power delivered to the load (Rc resistor tied between supply and collector terminal)

may be expressed as C

CE

OR

rmsVacP

)()(

2

= using rms signal values, C

CE

OR

pVacP

2

)()(

2

= using peak signal

values, and C

CE

OR

ppVacP

8

)()(

2 −= using peak-to-peak signal values.

Efficiency: The efficiency of an amplifier represents the amount of ac power delivered (transferred) from

the dc source. The efficiency of the amplifier is calculated using %100)(

)(% =

dcP

acP

i

O where Pi(dc) = VCE

x ICQ (quiescent operation when VCE is approximately VCC) = VCC x ICQ.. The output ac power with a

transformer coupled loudspeaker (see schematic Fig. 2) is given by( )

−−−=

'

2

Re

8

)()()(

L

CO

R

ppvppvacP ,

where '

LR is the reflected impedance to the primary of the transformer.

The above gives the electrical efficiency. There is also the loudspeaker efficiency to contend with. A well-

designed speaker may only be around 5% efficient, in other words, 20 watts of electrical power from an

amplifier may only result in 1 watt of sound power.

Transformer-coupled Class A amplifier: A form of Class A amplifier having maximum efficiency of 50%

uses a transformer to couple the output signal to the load as shown in Fig 2.

A transformer can increase or decrease voltage or current levels according to the turns ratio. In addition, the

impedance connected to one side of the transformer can be made to appear larger or smaller (step-up or

step-down) at the other side of the transformer depending on the square of the transformer winding turns

ratio, thus matching the output impedance of the amplifier with the low impedance of the loudspeaker load.

The circuit in Fig. 2 uses a step-down transformer of turns ratio of 100:25 giving a voltage step-down ratio

of 4:1. The current in the secondary winding is inversely proportional to the number of turns (N2) in the

secondary windings. Since the dc resistances of the windings are small (ideally 0 Ω), the ac load line is used


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to analyse the operation of the amplifier. Although the impedance of the transformer primary winding is

high, its DC resistance (at 0Hz) is practically zero ohms.

Therefore, while a class A voltage amplifier (without transformer coupling) might be expected to have a

collector voltage of about half supply voltage, a class A power amplifier (with transformer coupling to the

load) will have a DC collector voltage approximately equal to the supply voltage (+9V in Fig. 2) and

because of the transformer action, this allows a maximum voltage swing of 9V above and below the DC

collector voltage, making a maximum peak to peak signal voltage (Vpp) available of 18V (see AC load line

in Fig. 1).The ac load resistance “seen” looking into the primary side of the transformer can be calculated

from the reflected load impedance given by LL RaR 2' = where

2

2

12

=

N

Na , where N1 is the number of turns

in the primary windings and RL is the resistance of the load connected to the secondary winding which in the

circuit of Fig. 2 is an 8 ohm loudspeaker, and so, RL = 8Ω.

Shown in Fig.1 are the output characteristics of the transistor. The DC load line is almost a vertical line

drawn from VCC on the y-axis, because the DC resistance of the transformer (not ideal) used is about 100

ohms.

Fig. 1 DC and AC load lines for a transformer-coupled amplifier.

The ac load line is a line of slope = -'

1

LRthrough the operating point ‘Q’ or by following a graphical

procedure. Notice from the ac load line in Fig. 1 that the output signal swing can exceed the value of VCC.

Therefore, it is always necessary to check that the large output voltage swing does not exceed the transistor

maximum voltage rating.

VCE (V)

IC (mA)

Output

current

swing

Q-point

VCC

DC load

line

AC load

line

2VCC


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CIRCUIT DIAGRAM

Fig. 2 Transformer-coupled Class A amplifier

PROCEDURE

1. Connect the circuit according to the circuit diagram in Fig 2 and switch ON the power supply.

2. Set input voltage vi to 35 mV(peak-to-peak) using the oscilloscope and frequency to 4 kHz until the

speaker sound is audible. Now, vary the frequency in steps beginning from 100 Hz, 5 kHz, 8kHz, 10 kHz

and 20 kHz and note down the output voltage vCE(peak-to-peak) and vRe at the collector terminal and the

emitter terminal from the oscilloscope, and enter in Table -1. Note down the ammeter reading and measure

the dc voltage across Re, Observe the waveform across the speaker at 1 kHz and around 20 kHz.

3. Calculate '

LR using the expression LL RaR 2' = where

2

2

12

=

N

Na given that N1 is 100 turns and N2 is 25

turns.

4. Calculate the output power at each of the frequency steps using

−=

'

2

8

)()(

L

C

OR

ppvacP (ignoring the small

vRe(p-p)) and the input power using the expression DCCCi IVdcP =)( . Then, calculate the efficiency

Function

Generator

10μF

100μF

220 Ω

B

E

C

18 KΩ

8.1 KΩ

VCC (+9 V)

CE

CS

vc= vo

vin

8 Ω loudspeaker

Collector

Pin configuration (Bottom view)

Base

Emitter A


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using %100)(

)(% =

dcP

acP

i

O .

5. For the BC 547B transistor used in the amplifier of Fig. 3, BVCEO = 45V, hFE(dc) = β = 150, Ic(max) =

100mA. On a rough sketch of its output characteristics, draw the dc load line and mark the quiescent point

of operation indicating IC and IB at this point. Also, draw the ac load line (slope = - '

1

LR)

Precautions

Set the offset of the function generator to OFF. For each reading, ensure that the input voltage vi is set to 35

mV peak-to-peak.

TABLE -1 vin = 35mV(p-p); VCC = volts; ICQ = IDC = milliamps

Frequency

(Hz)

vC(p-p)

(volts)

(IDC) DC

Ammeter

(Amps)

Input power

(dc) (watts)

Output power

(ac) (watts)

Efficiency

%η

100 Hz

---------

20 kHz

RESULT

1. The ac output power @ 10 kHz is …….watts and the dc input power @ 10 kHz is …….watts.

2. The overall efficiency (assuming the transformer has 100% efficiency) is ………%.


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EXPERIMENT- 2

CLASS C AMPLIFIER

AIM: To study the operation of class C power amplifier.

COMPONENTS AND EQUIPMENT REQUIRED:

1. Tuned RF Amplifier trainer kit

2. Digital Multi meter

3. Function generator

4. Patch cards

5. C.R.O.

CIRCUIT DIAGRAM:

DESIGNING OF TUNED AMPLIFIER:

Parallel resonance occurs at Fr, is given by

Where L = Inductance = 0.1mH


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C = Capacitance = 100KpF = 100*10-9

Fr = 1/2x3.14x(1x10-3x100x10-9)1/2 = 15.9 kHz

PROCEDURE:

1. Connect the circuit as shown in Fig.

2. Switch ‘ON’ the power supply and signal generator. Keeping the frequency of input signal at 5 KHz

adjusts the amplitude such that output appears on the CRO.

3. Keeping input constant, vary the frequency of the input signal.

4. Note down the frequency of input where the output is maximum. This is the resonant frequency.

5. Increase the input voltage and observe the value of input voltage for distortion less output waveform.

6. Measure the ammeter reading and peak to peak output voltage.

OBSERVATIONS & CALCULATIONS:

1. Resonant frequency:

Practical = ___________ KHz

Theoretical = LC2

1 = ____________ KHz

2. Efficiency ():

a) Ammeter reading Idc = _____________ mA.

b) DC input power Pdc = VCC Idc = _________.

c) Peak to peak output voltage VO = ___________ volts.

d) AC output power Pac = L

o

R

V

8

2

= ____________.

Efficiency = dc

ac

P

P 100 %

RESULT:

The operation of the Class C power amplifier is studied


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EXPERIMENT- 3

SINGLE TUNED VOLTAGE AMPLIFIER

AIM: To study single tuned voltage Amplifier and to calculate.

1) Resonant Frequency.

2)Q factor.

3)Bandwidth and

4)Impedance

EQUIPMENT:

1. Tuned RF Amplifier trainer Kit.

2. Function Generator.

3. CRO.

4. BNC probes and connecting wires

CIRCUIT DIAGRAM:


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PROCEDURE:

1. Connect ions should be made as per the circuit diagram.

2. Connect the AC signal source from function generator (above AF range) to input of the trainer kit

3. Keep the input voltage constant , vary the frequency in regular steps and down the corresponding output

voltage

4. Calculate the resonant frequency

5. Plot the graph: gain (db) Vs frequency

6. Find the input and output impedance

7. Calculate the bandwidth and Q factor

PRECAUTIONS:

1. Check connections before switching ON power supply

2. Don’t apply over voltage

3. When you are not using the equipment switch them OFF

4. Handle all equipment carefully

OBSERVATION:

Tabular Form:

S.No Frequency(Hz) Input Voltage(Vi) Out Voltage(Vo) Gain=Vo/Vi

1.

2.

3.

4.

5.

Expected Graph:


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Band Width (B)= f2-f1

RESULT:-

The CE single stage amplifier is designed. The D.C voltages and currents at various nodes are observed. The

D.C transfer characteristic is plotted

CONCLUSION:


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EXPERIMENT-4

i).HARTLEY OSCILLATOR

AIM: To study the Hartley oscillator and to find the frequency of the oscillations.

EQUIPMENT REQUIRED:

Equipment Range Quantity

Hartley Oscillator Circuit Kit

CRO

Patch Cords

(0-20) MHz

1

1

THEORY:

Hartley oscillator is a variable frequency RF oscillator. It is commonly used as a local oscillator in radio

receivers. It has two main advantages: adaptability to a wide range of frequencies and is easy to tune. It

works on the principle of parallel resonance. The total inductance of the tank circuit is divided into two

parts L1 & L2 connected in series and the combination works as a autotransformer. The capacitor blocks the

d.c. component. The resistor R provides the necessary base-emitter bias. Hartley is also called tapped

inductance Oscillator.

The frequency of oscillations is given by:

fo = 1/2п√(LT C) Where LT = L1 + L2

Variation of the variable inductor can alter the frequency of oscillations.


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CIRCUIT DIAGRAM:

VCC = 12V

AMPLIFIER

100K Gain A

100K R1 RC

CC 10µf

C

CC

B BC107

10µf

E V0

R2 RE

10K 100K CE

10µf

Gain

L1 C =0.1µf L2

. 10 mH 10 mH

FEED BACK NETWORK

PROCEDURE:

1. Connect the circuit as per the circuit diagram.

2. Switch on the power supply and observe the output on the CRO (sine wave).

3. Note down the practical frequency and compare it with its theoretical frequency.

4. Now vary the values of inductances and capacitance in the feed back network and repeat the above

procedure.


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EXPECTED GRAPH:

TABULAR COLUMN:

RESULT:

fTheoretical = fPractical is verified.

CONCLUSION:

S.NO

L1

L2

LT =L1+L2

CT

TL2

1 f

= PERIOD TIME

1 fP =

1

2

3

V

t

V


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EXPERIMENT NO-4

ii).COLPITT’S OSCILLATOR

AIM: To study the Colpitt’s oscillator and to find the frequency of oscillations.

EQUIPMENT REQUIRED:

Equipment Range Quantity

Colpitt’s Oscillator Circuit Kit

CRO

Patch Cords

(0-20) MHz

1

1

THEORY:

Colpitt’s oscillator is a sine-wave feedback oscillator of L-C type. It is a variable frequency RF

oscillator. It works on the principle of parallel resonance. The total capacitance of the tank circuit is

divided into two parts C1 & C2 connected in series. Colpitt’s oscillator is also called tapped capacitance

Oscillator.

The frequency of oscillations is given by:

fo = 1/[2II √(LCT)] Where CT = C1C2/ (C1 + C2)

The condition for sustained oscillations in the circuit is

hfe >= C1/C2

Varying the variable inductor can alter the frequency of oscillations


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CIRCUIT DIAGRAM:

VCC = 12V

AMPLIFIER

100K 1K Gain A

R1 RC

C CC 10µf

CC

B 2N BC107

10µf

E V0

R2 RE

10K 1K CE

10µf

Gain β L

C1 C2 FEED BACK

NETWORK

PROCEDURE:


2. Switch on the power supply and observe the output on the CRO (sine wave).

3. Note down the practical frequency and compare it with its theoretical frequency.

4. Now vary the values of inductance and capacitances in the feed back network and repeat the

above procedure.


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EXPECTED GRAPH:

TABULAR COLUMN:

RESULT: It was verified that the practical frequencies were approximately equal to theoretical frequencies.

CONCLUSION:

S.NO C1 C2

21

21T

C C

C C C

+=

T

TLC2

1 f

= PERIOD TIME

1 fP =

1

2

3

V

t

V


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EXPERIMENT NO-5

DARLINGTON PAIR

AIM: To construct and plot the frequency response characteristics of Darlington pair amplifier circuit

COMPONENTS AND EQUIPMENT REQUIRED:

Transistor: BC 107 -2 No’s

Resistor: 15kΩ, 10kΩ, 680Ω, 6kΩ -1 No. Each.

Capacitor: 0.1µF -2 Nos

Function Generator

Regulated power supply

Bread Board

Connecting wires

CRO

CIRCUIT DIAGRAM:


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THEORY:

In Darlington connection of transistors, emitter of the first transistor is directly connected to the

base of the second transistor .Because of direct coupling dc output current of the first stage is (1+hfe )Ib1.If

Darlington connection for n transistor is considered, then due to direct coupling the dc output current of last

stage is (1+hfe ) n times Ib1 .Due to very large amplification factor even two stage Darlington connection has

large output current and output stage may have to be a power stage. As the power amplifiers are not used in

the amplifier circuits it is not possible to use more than two transistors in the Darlington connection.

In Darlington transistor connection, the leakage current of the first transistor is amplified by the

second transistor and overall leakage current may be high, which is not desired.

PROCEDURE:


2. Set Vi =50 mV, using the signal generator.

3. Keeping the input voltage constant, vary the frequency from 0 Hz to 1MHz in regular steps and note

down the corresponding output voltage.

4. Plot the graph; Av in dB Gain Vs frequency.

5. Calculate the bandwidth from the graph.

TABULAR COLUMN:

Vi = 50mV

S.No

Frequency

(Hz) Output Voltage (volts) Av=Vo/Vin Av in dB =20log(Vo/Vi)


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MODEL GRAPH:

RESULT:

The Darlington current amplifier is arranged and the frequency response is observed.

CONCLUSION:

VIVA QUESTIONS:

1. What is meant by Darlington pair?

2. How many transistors are used to construct a Darlington amplifier circuit?

3. What is the advantage of Darlington amplifier circuit?


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EXPERIMENT-6

MOS COMMON SOURCE AMPLIFIER

AIM:

To study MOS Amplifier and to calculate Bandwidth

EQUIPMENT:

1. MOS Amplifier trainer Kit.


3. CRO.

4. BNC probes and connecting wires

CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect ions should be made as per the circuit diagram.

2. Connect the AC signal source 20mV from function generator (above AF range) to input of the trainer kit


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3. Keep the input voltage constant , vary the frequency in regular steps and down the

corresponding output voltage

4. Plot the graph: gain (db) Vs frequency

PRECAUTIONS:

1. Check connections before switching ON power supply

2. Don’t apply over voltage

3. When you are not using the equipment switch them OFF

4. Handle all equipment carefully

TABULAR FORM:

S.No Frequency(Hz) Input

Voltage(Vi)

Output

Voltage(Vo)

Gain=Vo/Vi Av in db= 20

log10Av

1.

2.

3.

4.

5.

EXPECTED GRAPH:

Band Width (B)= f2-f1


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RESULT:-

The MOS Amplifier is designed. The D.C voltages and currents at various nodes are observed. The D.C

transfer characteristic is plotted

CONCLUSION:

VIVA QUESTIONS:

1. What are the types of MOSFETS?

2. How is MOSFET different from JFET?

3. What are the advantages of MOSFET?

4. .What is the difference between depletion mode and enhancement mode?


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PART – II

PULSE CIRCUITS


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EXPERIMENT 1

LINEAR WAVE SHAPING

A) RC LOW PASS CIRCUIT FOR DIFFERENT TIME CONSTANTS

Aim :

Design a RC LPF and HPF at various time constants and verify the responses for Square wave input

(choose C = 0.1f, Vi = 4 VP-P, f = 10 K Hz).

Apparatus:

1. CRO

2. Signal Generator

3. Bread board

4. Capacitor (0.1f)

5. Resistors (100, 1K, 10 K)

6. Connecting wires.

Circuit Diagram:

HighPassFilter(HPF):

Design / Calculations:

a) RC == T

Given T = 1/10KHz = 0.1 mSec

R = 0.1x 10-3 / 0.1f = 1 Kohms

V1 = V / (1 + e-T/2RC) = 2.49 V

Ve

VV

RCT

51.11 2

|

1 =+

=

2

%|

11

V

VVtilt

−=


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= (2.49 – 1.51)/2 = 49%)

T1 = T2 = T/2

b) RC >> T

Choose RC = 10T = 1 mSec

R = =−

−

Kx

10101.0

106

3

The O/P waveform will be identical to I/P

T1 = T2 = T/2

c) RC << T

RC = 0.1 T

R = =−

−

100101.0

101.06

4

x

x


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B) RC HIGH PASS CIRCUIT FOR DIFFERENT TIME CONSTANTS

LowPassFilter(LPF):

a) RC == T

C = 0.1f, R = 1K

V

e

eV

VRC

T

RCT

49.0

1

12

2

2

2 =

+

−

=

V1 = -0.49 V

b) RC >> T

R = 10 K, C = 0.1 f

V

e

eV

VRC

T

RCT

05.0

1

12

2

2

2 =

+

−

= V1= 0.05v


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c) RC << T

R = 100,

C = 0.1 f

Note:

Low Pass Filter allows the DC component of I/P signal and High Pass Filter block the DC

component of I/P Signal.

Procedure:

1. Connect the circuit as shown in figure (LPF / HPF)

2. Apply the Square wave input to this circuit (Vi = 4 VP-P, f = 10KHz)

3. Observe the output waveform for (a) RC = T, (b) RC>>T, (c) RC>>T

4. Verify the values with theoretical calculations

Precautions:

Use two CRO probes and observe I/P & O/P waveforms simultaneously by putting CRO on DC

modes.


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Result:

LPF and HPF are designed at various time constants and the responses for square wave input is

observed & hence plotted.

CONCLUSION:


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EXPERINEMT No.2

NON-LINEAR WAVE SHAPING CIRCUITS

A) TRANSFER CHARACTERISTICS AND RESPONSE OF CLIPPERS

(i) POSITIVE AND NEGATIVE CLIPPERS

Aim:

a) To study the clipping circuits using diodes.

b) To observe the transfer characteristics of all the clipping circuits in CRO.

Apparatus:

1. Signal Generator.

2. Bread board

3. Connecting patch cards.

4. CRO

5. DC power supply (dual)

6. Resistors (1 K, 10K)

7. Diodes (1N4007)

Procedure:

1. Connect the circuit as shown in fig.1

2. In each case apply 10 VP-P, 1KHz Sine wave I/P using a signal generator.

3. O/P is taken across the load RL.

4. Observe the O/P waveform on the CRO and compare with I/P waveform.

5. Sketch the I/P as well as O/P waveforms and mark the numerical values.

6. Note the changes in the O/P due to variations in the reference voltage VR = 2V, 3V..

7. Obtain the transfer characteristics of Fig.1, by keeping CRO in X-Y mode.

8. Repeat the above steps for all the circuit.

Precautions:

1. Set the CRO O/P channel in DC mode always.

2. Observe the waveform simultaneously by keeping common ground.

3. See that there is no DC component in the I/P.

4. To find transfer characteristics apply input to the X-Channel, O/P to Y-Channel, adjust the dot at

the center of the screen when CRO is in X-Y mode. Both the channels must be in ground, then

remove ground and plot the transfer characteristics.


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Circuit Diagram Input&Output Wave Forms


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Circuit diagram O/P Wave Forms


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Circuit Diagrams Transfer Characteristics


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59


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(ii) CLIPPING AT TWO INDEPENDENT LEVELS

Circuit Diagram O/P Wave Forms

RESULT: Different types of clipping circuits have been studied and observed the responses for various

combinations of VR and clipping diodes.

CONCLUSION:


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(B) THE STEADY STATE OUTPUT WAVEFORM OF CLAMPERS FOR A

SQUARE WAVE INPUT

Aim:

To study the clamping circuits using diodes and capacitors.

Apparatus:

1. Signal Generator.

2. Bread board


4. CRO

5. DC power supply (dual)

6. Resistors ( 100 K )

7. Diodes (1N4007)

8. Capacitor (0.1f)

Theory:

Clamping circuits add a DC level to an AC signal. A clamper is also refer to as

DC restorer or DC re-inserter. The Clampers which clamp the given waveform either above or below the

reference level, which are known as positive or negative clamping respectively.

Procedure:

1. Connect the circuit as shown in fig.1.

2. Apply a Sine wave of 10VP-P, 1KHz at the input terminals with the help of Signal Generator.

3. Observe the I/P & O/P waveforms of CRO and plot the waveforms and mark the values with VR

= 2 V, 3V

4. O/P is taken across the load RL.

5. Repeat the above steps for all clamping circuits as shown.

6. Waveforms are drawn assuming diode is ideal.


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(i) POSITIVE AND NEGATIVE CLAMPERS

Circuit diagram I/P & O/P Wave Forms

C1

0.1uF R1

100kohm

V110V

7.07V_rms

1000Hz

0Deg

D1

1N4007GP

C1

0.1uF

R1

100kohm

V110V

7.07V_rms

1000Hz

0Deg

D1

1N4007GP

V2

2V

C1

0.1uF R1

100kohm

V110V

7.07V_rms

1000Hz

0Deg

D1

1N4007GP V0

Vi =5V

t

-5V

t 0.5V

-9.5V

V0

V0

V0

-0.5V

9.5V

5V

V0

V0

t

t

-1.5V

-6.5V

-11.5V


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(ii) CLAMPING AT REFERENCE VOLTAGE

Circuit diagram O/P Wave forms


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64

Result:

Different types of clamping circuits are studied and observed the response for different combinations

of VR and diodes.

CONCLUSION:


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EXPERIMENT No.3

COMPARISION OPERATION OF COMPARATORS

AIM:

To Study the operation of a Comparator.

COMPONENTS & EQUIPMENT REQUIRED:

1. Diode IN4007

2. Resistor 100K

3. DC power supply.


5. CRO.

6. Connecting wires.

7. Breadboard.

CIRCUIT DIAGRAM:

THEORY:

A Comparator circuit is one, which may be used to mark the instant when an arbitrary waveform

attains some particular reference level. The non-linear circuits, which can be used to perform the operation

of clipping, may also be used to perform the operation of comparison. The clipping circuits become

elements of a comparator system and are usually simply referred as comparators. When Vi <VR, diode is ON

and the output is fixed at VR. When Vi >VR diode is OFF and hence VO=Vi. Comparator may be non-

regenerative or regenerative.


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PROCEDURE:

1. Connections are made as per circuit diagram.

2. Apply a ramp wave input with peak to peak voltage of 10V at a frequency of 1KHz at the input

terminal using function generator.

3. Observe the input and output waveforms of comparator circuit and plot the input and output

waveforms.

4. Note down the max peak to peak voltage of output waveform.

RESULT:

Comparison of operation of comparator is observed.

CONCLUSION:


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EXPERIMENT No.4

SWITCHING CHARACTERISTICS OF TRANSISTOR

Aim:

Design Transistor to act as a Switch and verify the operation. Choose VCC = 10V, ICmax = 10 mA, hfe

= 50, VCESat = 0.2, Vin = 4Vp-p, VBESat = 0.6 V

Apparatus:

1. Transistor (BC 107).

2. Breadboard.

3. CRO.

4. Resistors (1K, 8.2K).

5. DC power supply.



Theory:

When the I/P voltage Vi is negative or zero, transistor is cut-off and no current flows through Rc

hence V0 VCC when I/P Voltage Vi jumps to positive voltage, transistor will be driven into saturation.

Then

V0 = Vcc – ICRC VCESat

Design procedure:

When Q is ON RC = maxC

CESatCC

I

VV −

= (10-0.2) / 10 mA = 1K

IB ICmax / hfe

10mA / 50

IB 0.2 mA

To keep transistor remain in ON, IB should be greater than Ibmin = 0.2mA

Vin = IBRB + VBE Sat

2V = 0.2 mA RB + 0.6V

RB = 7 K (choose practical values as 8.2 K)


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Circuit diagram:

Procedure:

1. Connect the circuit as shown in figure.

2. Apply the Square wave 4 Vp-p frequency of 1 KHz

3. Observe the waveforms at Collector and Base and plot it.

Precautions:

1. When you are measuring O/P waveform at collector and base, keep the CRO in DC mode.

2. When you are measuring VBE Sat, VCE Sat keep volts/div switch at either 0.2 or 0.5 position.

3. When you are applying the square wave see that there is no DC voltage in that. This can be

checked by CRO in either AC or DC mode, there should not be any jumps/distortion in

waveform on the screen.


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Expected waveforms:

Result:

Transistor as a switch has been designed and O/P waveforms are observed.

CONCLUSION:


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EXPERIMENT No.5

BISTABLE MULTIVIBRATOR

Aim:

a) Design the Bi-stable Multivibrator circuit and verify the operation.

b) Obtain the resolving time of Bi-stable Multivibrator and verify theoretically. Choose R1 = 10K,

C = 0.3f, VCE Sat = 0.2V, ICmax = 15mA, VCC = 15V,

VBB = 15V, VB1 = -1.2V

Apparatus:

1. Bi-stable Multivibrator trainer kit

2. Function Generator

3. CRO

4. Connecting patch chords.

Circuit diagram:


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Theory: A Bistable circuit is one which can exist indefinitely in either of two stable states and which can

be induced to make an abrupt transition from one state to the other by means of external excitation. The

Bistable circuit is also called as Bistable multivibrator, Eccles jordon circuit, Trigger circuit, Scale-of-2

toggle circuit, Flip-Flop & Binary.

A bistable multivibratior is used in a many digital operations such as counting and the storing of binary

information. It is also used in the generation and processing of pulse-type waveform. They can be used to

control digital circuits and as frequency dividers .

There are two outputs available which are complements of one another. i.e. when one output is

high the other is low and vice versa .

Design :

RC = maxC

CESatCC

I

VV −

RC = (15 – 0.2) / 15mA 1K

Choose RC = 1K, VB1 = 21

2

21

1

RR

RV

RR

RV CESatBB

++

+

−

-1.2 = 2

2

10

2.01015

R

Rx

+

+− ; R2 =100K

fmax = 21

21

2 RCR

RR + = KHz

KKxxxx

K55

10010103.02

100106

=+−

Procedure:

1. Switch ON the system and observe for the power LED indication.

2. Apply two Square waves with same frequency or different frequency at terminals T1 & T2. You

may observe symmetrical or Asymmetrical square waves respectively. Observe both I/P & O/P

waveforms on CRO.

3. Set the I/P frequency at 500hz.

4. Until you get a 500Hz at the O/P, increase the trigger I/P amplitude, note down the I/P

amplitude, this is the minimum pulse step required for trigger the bi-stable Multivibrator with the

given circuit parameters.

5. Now slowly increase the frequency and at one particular frequency the circuit does not respond

and the output disappears. Just lesser than this frequency, the circuit again responds, this is the

maximum allowable frequency.

6. Sketch the O/P waveforms. Sample O/P waveforms are as shown in figure.


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Expected waveforms:

Vt Trigger Input

t

t

V02(v)

VCC

VCE sat

t

V01(v)

VCC

VCE sat

0

0

0


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Result: Bistable multivibrator circuit is designed and the output waveforms are

observed

CONCLUSION:


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EXPERIMENT No.6

ASTABLE MULTIVIBRATOR

Aim :-

To design an Astable Multivibrator to generate a Square wave of 1KHz frequency. Choose C = 1nf,

10nf, 100nf.

Apparatus:

1. Bi-stable Multivibrator trainer kit

2. Function Generator

3. CRO

4. Connecting patch chords

Circuit diagram :

Theory:

The astable circuit has two quasi-stable states. Without external triggering signal the astable

configuration will make successive transitions from one quasi-stable state to the other. The astable circuit is

an oscillator. It is also called as free running multivibrator and is used to generate “Square Wave”. Since it

does not require triggering signal, fast switching is possible.

Design : The period T is given by


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T = T1 + T2 = 0.69 (R1C1 + R2C2)

For symmetrical circuit with R1 = R2 = R & C1 = C2 = C

T = 1.38 RC

10-3 = 1.38 x 10-9 x R

R = 724K (When c=1nf) ;

R = =−

−

Kxx

4.72101038.1

109

3

(when c=10nf)

R = 7.24K (when c=100nf)

Let VCC = 15V; hfe = 51 (for BC107)

VBESat = 0.7V; VCESat = 0.3V

Choose ICmax = 10mA,

RC = (VCC – VCESat) / ICmax

= (15 – 0.3) / (10 x 10-3) = 1.47K RC 1K

Procedure:

1. Connect the circuit as shown in figure.

2. Observe the Base Voltage and Collector Voltages of Q1 & Q2 on CRO in DC mode and plot

them. Verify the frequencies theoretically.


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Expected Waveforms:

Result :

An Astable Multivibrator is designed, the waveforms are observed and verified the results

theoretically.

CONCLUSION:


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EXPERIMENT No.7

MONOSTABLE MULTIVIBRATOR

Aim : To design a monostable multivibrator for the Pulse width of 0.03mSec.

Apparatus:

5. Monostable Multivibrator trainer kit.


7. CRO.

8. Multi-meter.


Circuit diagram :

Theory:

The monostable circuit has one permanently stable and one quasi-stable state. In the monostable

configuration, a triggering signal is required to induce a transition from the stable state to the quasi-stable

state. The circuit remains in its quasi-stable for a time equal to RC time constant of the circuit. It returns

from the quasi-stable state to its stable state without any external triggering pulse. It is also called as one-

shot a single-cycle, a single step circuit or a univibrator.


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Design :

To design a monostable multivibrator for the Pulse width of 0.03mSec.

Choose ICmax = 15mA, VCC = 15V, VBB = 15V, R1 = 10K.

T = ln 2

T = 0.69 RC

Choose C = 10nf

0.3 x 10-3Sec = 0.69 x R x 10 x 10-9

R = 43.47 K

RC = maxC

CESatCC

I

VV −

RC = (15 – 0.2) / 15mA 1K

Minimum requirement of for more margin, given

| VB1| 0.1 VB1 = -1.185

VB1 = 21

2

21

1

RR

RV

RR

RV CESatBB

++

+

−

-1.18 = 21

21 2.015

RR

RR

+

+−; given R1 = 10K

R2 = 100K

Procedure:

1. Switch ON the trainer kit and observe power indication.

2. Wire the circuit as shown in the circuit diagram.

3. Calculate the pulse width (T) of the Monostable O/P with the selected values of R & C on the

CRO. See that CRO is in DC mode.

4. Select the triggering pulse such that the frequency is less than 1/T

5. Apply the triggering input to the circuit and to the CRO’s channel 1 . Connect the CRO channei-

2 to the collector and base of the TransisterQ1&Q2..

6. Adjust the triggering pulse frequency to get stable pulse on the CRO and now measure the pulse

width and verify with the theoretical value.

7. Obtain waveforms at different points like VB1, VB2, VC1 & VC2.

8. Repeat the experiment for different combinations of R & C (C = 1nf, 100nf). Calculate R for

same value of T = 0.3 mSec.


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Expected Waveforms:

Result :

A collector coupled Monostable Multivinbrator is designed, the waveforms are observed

and verified the results theoretically.

CONCLUSION:


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EXPERIMENT No.8

RESPONSE OF SCHMITT TRIGGER CIRCUIT FOR LOOP GAIN LESS THAN

AND GREATER THAN ONE Aim:-

(a) To design the circuit of Schmitt trigger with UTP = 3V LTP = 1.5V ,Vcc = 15V ,Rs = 1k,Rc2

= 3k,R1 = 15k R2 = 4.7k

(b) To Obtain the UTP and LTP values Practically and verify it theoretically

(c) To obtain square wave from the sine wave.

Apparatus:-

(1) Schmitt Trigger Circuit board

(2) Function Generator

(3) Multimeter

(4) C.R.O

(5) Connecting patch chords.

Circuit diagram


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Procedure:-

(1) Switch ON the trainer

(2) Connect the circuit as shown in Fig.

(3) With Vi = 0V, measure the output voltage.

(4) Slowly increase the input voltage from 0V to maximum and observe the output for the

transition.

(5) Obtain the voltage at which the LOW to HIGH transition is occurred and this is the UTP and

now measure the input voltage.

(6) Now, slowly decrease the input voltage and observe for the HIGH to LOW transition at the

output, the input voltage at this point is called the LTP.

(7) Apply a sine wave input to the circuit.

(8) Observe the input and output waveforms on CRO.

(9) Vary the input frequency and comment on the results obtained.

(10) Repeat the experiment with different R2.

(11) Verify the result theoretically.

Observations:-

With Re = 480ohms

D C A C

UTP = 2.9V UTP = 3V

LTP = 1.8V LTP = 2V

VH = UTP – LTP VH = UTP – LTP

Theoretical Calculations:-

V1 calculation:

VBE2 = 0.6V for Si

Vr1 = 0.5V

(=VBE at cut in)

V’ = 211

2

RRR

RV

C

CC

++; Rb =

211

112 )(

RRR

RRR

C

C

++

+ VCC = 12V

VEN = (V’ - VBE2) * )1(

)1(

++

+

FEeb

FEe

hRR

hR

(Accurate value)

V1 = V’ - 0.1 v (approximate value)

V2 calculation:

V1 = VEN + Vr1


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a = 21

2

RR

R

+ ; R =

211

211 )(

RRR

RRR

C

C

++

+ ;

Re’ = Re(1+FEh

1);

VBE = 0.6V

Vr = 0.5V

(or) V2 = VBE1 + Re+aR

Re (V’ – Vr2) (approximately)

Expected Waveforms:

V2 = VBE1 + '

/'

eR

FEse

Ra

hRR

+

+(V’ - Vr2)


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EXPERIMENT NO.9

UJT RELAXATION OSCILLATOR

Aim:

To study the operation of UJT Relaxation Oscillator

Apparatus:

1. Resistors (470E, 220E, 100K Potentiometer)

2. Capacitors (.01F,0.1F, 1F)

3. UJT 2N2646

4. Cathode Ray Oscilloscope

5. Bread board

Circuit diagram:

2N2646

GaAsFET_N_VIRTUA L

R1

470ohm

R2

220ohm

Vo

C1

0.1uF

C2

0.01uF

C3

1uF

VcVB1

VB2

BusBusBus

50%Key = a

100K_LIN

R3

15VVCC 15VVCC 15VVCC 15VVCC

Procedure:

1. Connect the circuit as shown in figure. Apply 15V DC power supply to the circuit.

2. Observe the output pulses on the CRO at B1, B2 and Ve (Vc).

3. Vary the time constant (RC) by varying capacitance value and potentiometer value (R) ,observe the

variations in the out pulses on the CRO at B1, B2 and Ve (Vc).

4. Plot the graphs as shown in the expected waveforms.


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Expected waveforms:

The UJT relaxation oscillator output wave forms are as shown in the figure.

Result: The waveforms are plotted as shown and the practical T is verified to the theoretical value.

CONCLUSION:


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EXPERIMENT No.10

THE OUTPUT VOLTAGE WAVEFORM OF BOOTSTRAP SWEEP CIRCUIT

Aim:

To study Bootstrap sweep generator

Apparatus:

1. Cathode ray oscilloscope ,

2. Bread board

3. Resistors -RB =240kΩ

Rc1=14 kΩ

Re = 7.35kΩ

4 .Capacitors – 1 F (Cs)

10 F (CB)

5. Diode – IN 4007

Circuit diagram:


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Procedure:

1. Connect the circuit diagram as shown in the figure .(1) Apply +15V (Vcc) & -15V(-VEE ) DC

as power supply to the circuit.

2. Apply 1kHz symmetrical square wave signal with the help of signal generator.

3. Observe the input and output wave forms of CRO and plot the waveforms.

4. Calculate the sweep & retrace time from the CRO .

5. Clarify the values with the theoretical calculation

Theoritical Calculation:

Ts = Rc1.Cs

Tr = ( )Vcc

CsVs[ ]

1

1

RcR

hfe

B

−

Whose Vs = CsRc

VccTg

1

Tg = 1msec

Expected wave forms :

Vi

Tg

Tg

Ts

Tr

Result:

The wave forms shown in figure are observed.

CONCLUSION:


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EXPERIMENT No.11

THE OUTPUT VOLTAGE WAVEFORM OF MILLER SWEEP CIRCUIT

Aim:

To study Miller sweep generator

Apparatus:

1. Cathode ray oscilloscope ,

2. Bread board

3. Resistors -RB =100kΩ

Rc1=4.7kΩ

Rc2=1 kΩ

POT=10kΩ

4 .Capacitors – 1 F (Cs)

10 F (CB)

5. Transistor-2(BC107)

Circuit diagram:


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Procedure:

1.Connect the circuit diagram as shown in the figure.Apply +10V (Vcc) DC as power supply to the

circuit.

2.Apply 1kHz symmetrical square wave signal with the help of signal generator.

3.Observe the input and output wave forms of CRO and plot the waveforms.

4.Calculate the sweep & retrace time from the CRO .

5.Clarify the values with the theoretical calculation

Expected wave forms :

Result:

The wave forms shown in figure are observed

Documents

PART I ELECTRONIC CIRCUITSmist.ac.in/pdfs/LabManuals/ECE/ECPCLabManual.pdfDouble click the transistor and set the part no. as BC107. 2. Next, click the Basic tab and pick and place