Parasitic Components Effect Resonant

8/13/2019 Parasitic Components Effect Resonant

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1

Effects of Parasitic Components inHigh-Frequency Resonant Driversfor Synchronous Rectification

MOSFETs

Department of Information Engineering DEIUniversity of Padova, ITALY

Speaker:Giorgio Spiazzi


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2

Outline

Review of voltage source driver topology

Analysis of resonant voltage source drivertopologies

Unclamped turn-on and clamped turn-off Clamped turn-on and clamped turn-off

Unclamped turn-on and unclamped turn-off

Analysis of parasitic component effects


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3

Voltage Source Topology

+Vdd

S1

S2

Rch

M

Dissipative driver

CR

t

CoffgonCoffCone1VVVtv

Vgon

+

Ron

C+

vC(t)

i(t)

Ron= RDSon(S1)+Rch+Rg


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4

Possible energy

recovery to output in

VRM applications

Resonant Driver DR1

Vdd

Vo

+

+

S1

S2

Db1

Db2Dc1

Lext M

Unclampedturn-on and clampedturn-off


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5

Resonant Driver DR1

Unclampedturn-on and clampedturn-off

triTon tfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vdd

Vo

+

+

S1

S2

Db1

Db2

Dc1

Lext M

vC

+

-

i(t)


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6

Resonant Driver DR1

Turn-on phase

triTon tfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vdd+ S1 Db1

RDSon

C

Lext

M

Lint +VDb RLp Rg

Vgon

+

Ron L

C

+vC(t)

i(t)

on

oon

R

ZQ

C

LZo

on

oon

Q2L2

R 2

on

oQ4

11

Resonant circui t parameters


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Resonant Driver DR1

tsine

Q4

11Z

VVti t

2on

o

Cog

tcos

Q4

11Q2tsine

Q4

11Q2

VVVtv

2on

ont

2

on

on

Cog

gC

Inducto r current and capaci tor vol tage

onQ2CoffgongonCononC eVVVVTv

Final capacitor vo ltage

tsineZ

VVti o

tQ2

o

Cogon

o

tcostsinQ2

1eVVVtv oo

on

t

Q2CoggC on

o

If Qon>>1:


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Unclamped Resonance

0.2

0.4

0.6

0.8

1

0

3 32

34

35 20

0.4

0.8

1.2

1.6

2

0

Q = 1000

Q = 10Q = 5

Q = 2

Q = 1

Q = 0.5

[VN][IN]

Normalized capacitor voltage and inductor current as a

function of

ot for different Q values(vC(0) = 0, VN= Vgon, IN= Vgon/Zo)

o

onT

Ton


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Unclamped Resonance

0.2

0.4

0.6

0.8

1

0

1.2

1.4

1.6

1.8

2

1

[VN][]

0.1 1 10 100Q

Normalized f in al

capacitor voltage

NONres

res

P

P

Ideal performance comparison between a voltage

source and an unclamped resonant drivers

0.5


10/3910

UnclampedResonance

High Q means high L, that means lower

resonant frequency, i.e. higher turn on interval

Minimum loss resistance is the SR gate internal

resistance Rg

sw

o

on TLCT

C

TL

2

2

sw

C

T

C

LZ swo

don

o

on QR

Z

Q CQ

T

R d

sw

on

k1

1lnC

TR swonFor a voltage source topology:

gon

Con

V

Vk


11/3911

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50.01

0.1

1

10

100

fsw

[MHz]

Ron[W]

Voltage source

topology

Unclamped

resonance

topology

Q = 4

Q = 2

Q = 1

Maximum Ron

Q = 0.5Ron_min

= 0.05, k = 0.8, Ron_min= 1W, C = 10nF


12/3912

Vgoff

+

Roff-Rg L

C

+vC(t)

i(t)

Rg

+VDc

ig(t)

Resonant Driver DR1

Turn-off phase

triTon tfu

VConIpk_p

VCoff

Ipk_n

t

vC(t)i(t)

I1

Toff

ig(t)

Vgoff

+

Roff L

C

+vC(t)

i(t)


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DR1 Characteristics

both switches S1and S2turn on and off at zero current; the control signals of S1and S2have no critical timing, the only

requirement being to avoid any cross conduction; the switching times of S1and S2have no influence in the circuit

behavior; S1and S2body diodes are not used (they have high voltage drop and

bad reverse recovery behavior); switch lead inductances as well as any parasitic inductance due to

traces and layout simply add to the external inductance (they areactually exploited by the circuit);

different Tonand Tofftimes can be easily achieved;

Toffinterval duration as well as the amount of recovered energydepends on Vovalue (disadvantage); S2command signal must be suitably higher than Voto completely

turn it on (disadvantage). No low impedance paths during on and off intervals


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Resonant Driver DR2

Dc1and Dc2can be substituted by MOSFETs,thus ensuring a low impedance path to Vddan toground during on-time and off-time

tritfi

Ton

Toff

tfu

VCon

Ipk_p

VCoff

Ipk_n

ttru

tfwtfw

vC(t)i(t)

I2

I3

ig(t)

Clampedturn-on and clampedturn-off

+Vdd

S1

S2 Dc1

Dc2

Lext

M


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15

Vgon

+

Ron L

C+vC(t)

i(t)

Vdd

+RLp L

C

+vC(t)

i(t)

Rg+

VDc

ig(t)

+VD2

Vdd

+R

on-R

g L

C

+vC(t)

i(t)

Rg+

VDc

ig(t)

Resonant Driver DR2

tritfi

Ton

Toff

tfu

VCon

Ipk_p

VCoff

Ipk_n

ttru

tfwtfw

vC(t)i(t)

I2

I3

ig(t)

Turn-on phase


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16

DR2 Characteristics

both S1and S2switches turn on at zero current, but they turn off

almost at the inductor peak current; the control signals of S1and S2have critical timing, having to

minimize the freewheeling intervals tfw, in order not to adverselyaffect the overall efficiency;

the switching times of S1and S2have a great influence on the

circuit behavior, causing a significant power loss at turn off (seepoint 1) as well as increase of Tonand Toffintervals; S1and S2body diodes are involved during the recovery of the

inductor energy; switch lead inductances as well as any parasitic inductance due to

traces and layout have a great impact on the circuit behavior,

since they cause high frequency parasitic oscillations at turn offand delay S1and S2turn off times;

VConvalue is easily controlled by the supply voltage Vdd(advantage)


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17

Resonant Driver DR3

+Vdd

S1

S2

Db1

Db2

LextM

Unclampedturn-on and unclampedturn-off

Ton

Toff

VConIpk_p

VCoffIpk_n

t

vC(t)i(t)

offon

offonon

Q

1

Q

1

2

Q2Q2

goff

Q2

gon

Con

e1

e1eVe1V

V

offon

onoffoff

Q

1

Q

1

2

Q2Q2gon

Q2goff

Coff

e1

e1eVe1V

V


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18

DR3 Characteristics

Same considerations as DR1. Moreover:

high VConvalues can be achieved with verylow supply voltage Vdd;

Vddvalue must be higher than the threshold

voltage of S1(p-channel MOSFET) in orderto fully turn it on;

the driver needs some oscillating cycles in

order to achieve a steady state operation


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19

Losses Comparison

S1,2= IRF7319 Db1,2, Dcl, and Dc1,2= STPS1L40U Switching frequency: fsw= 1.8MHz

Maximum diode voltage drop: VDc= VDb= 0.63V External inductance parasitic resistance: RLp= 200mW External inductance: Lext= 30nH (DR1), Lext= 35nH

(DR2), Lext= 30nH (DR3) Internal gate resistance: Rg= 0.25W Equivalent gate capacitance: C = 10nF Supply voltage: Vdd= 5V (DR1), Vdd= 6.8V (DR2), Vdd=

3.85V (DR3) VRM output voltage for DR1: Vo= 1.3V

Driver parameters:


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20

Losses Comparison: calculations

Details of Losses Calculation for DR1(VCon= 7.41V, Lext= 30nH, Vdd= 5V, Vo= 1.3V)

Pdd

[mW]

PDb1,2

[mW]

PDcl

[mW]

PR[mW] Po[mW] PLoss

[mW]

Ton, Toff

[ns]

Ipk

[A]

PTot_loss

[mW]

Turn on 724 91 142 233 55 2.28

502

Turn off 103 13 153 212 269 58.3 -2.55

RDS(on)

[W]VD[V]

LSint

[nH]

LDint

[nH]Tsw_off[ns]

Qg@ VGS=5V

[nC]

Qg@ VGS=7V

[nC]

IRF 7319p-MOS 0.098 1 4 6 32 13 17

n-MOS 0.046 1 4 6 17 12.5 16.5

MOSFET S1and S2parameters


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21

Losses Comparison

Pdd[mW] PDb1,2[mW]

PR[mW] PLoss[mW]

Ton, Toff[ns] Ipk [A] PTot_loss[mW]

Turn on 772 126 272 399 54.4 3.16

773Turn off 126 242 374 54.4 -3.17

Details of Losses Calculation for DR3

(VCon= 7.44V, VCoff= -3.71V,Lext= 30nH, Vdd= 3.85V)

Details of Losses Calculation for DR2(V

Con= 7.43V, L

ext= 35nH, V

dd= 6.8V)

Pdd

[mW]

Pdd_recovered

[mW]

PD1,2

[mW]

PDcl ,2

[mW]

PR

[mW]

PLoss

[mW]Ton, Toff[ns]

Ipk

[A]

PTot_loss

[mW]

Turn on 967 179 22 51 241 295 56.1 3.2

574Turn off 199 29 36 215 280 50.5 -3.25


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22

Losses Comparison

Driver DR2 losses do not include S1

and S2switching losses:

at turn-on: Psw_on= 220mW

at turn-off: Psw_off= 135mW

Total DR1 losses: Ptot_loss= 502mW

Total DR2 losses: Ptot_loss= 574+355 = 929mWTotal DR3 losses: Ptot_loss= 773mW


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23

Experimental Waveforms: DR1

vC[2V/div]

vRs[100mV/div]

VGS_n-MOS[1V/div]

vG_p-MOS[1V/div]

vDS_n-MOS [2V/div]

With Lext

CLoad= 10nF (smd), Rs= 0.1W, Ualim= 5V, fsw= 1.8MHz

Rs

Dcl1

+VRs

+VCC


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24


vC[2V/div]

vRs[200mV/div]

VGS_n-MOS[1V/div]

vG_p-MOS[1V/div]

vDS_n-MOS [2V/div]

Without Lext


Rs

Dcl1

+VRs

+VCC


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25


vC[2V/div]

vRs[100mV/div]

VGS_n-MOS[2V/div]

vG_p-MOS[2V/div]

vDS_n-MOS [2V/div]

With Lext

CLoad= 10nF (smd), Rs= 0.1W, Ualim= 7.5V, fsw= 1.8MHz

TpNMOS= 58.4ns, TpPMOS= 58.4ns (misurati a 1V)


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26


vC[2V/div]

vRs[200mV/div]

vG_p-MOS[2V/div]

VGS_n-MOS[2V/div]

vDS_n-MOS [2V/div]

Without Lext

CLoad= 10nF (smd), Rs= 0.1W, Ualim= 7.5V, fsw= 1.8MHz

TpNMOS= 58.4ns, TpPMOS= 58.4ns (misurati a 1V)


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27


With Lext

vC[2V/div]

vRs[100mV/div]

VGS_n-MOS[1V/div]

vG_p-MOS[1V/div]

vDS_n-MOS [2V/div]


E l f


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28


Without Lext

vC[2V/div]

vRs[200mV/div]

VGS_n-MOS[1V/div]

vG_p-MOS[1V/div]

vDS_n-MOS [2V/div]



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29

Effect of Device Parasitic Capacitances

RLp

+vCC

+

Lext

i(t)vCp

Cp

+Vdd

The final capacitor voltage during turn on is lower than

expected, especially for driver DR2. Why?

Effect of devices

output capacitances

0

2

4

6

8

-2

-4

vC

vDS_n-MOS

iL

[V,A]

Time

VCon

VCoff

Ton_sw= 150ns

X axis scale = 50ns/div

0

2

4

6

8

-2

-4

vC

vDS_n-MOS

iL

[V,A]

Time

VCon

VCoff

Ton_sw= 90ns

VCon_nominal

Eff f


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30


Tsw-cond= 60ns

Tsw-cond= 90ns

DR2 Measurements: Vdd= 7V, fsw= 1.8MHz, Lext = 0

vc(t)

[2V/div]

Time [100ns/div]

Eff f D i P i i C i


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31


Pdd[mW]VCon

[V]

VCoff

[V]

Tsw_cond

[ns]Pnom[W]

0.5901 5.93 1.5 64 0.63 0.068

0.6482 5.86 1.28 90 0.62 -0.049

0.7049 6.14 1.23 99 0.68 -0.039

With

Lext

0.7791 6.42 1.17 140 0.74 -0.050

1.0878 6.94 -0.22 140 0.878 -0.255

1.0689 6.8 -0.22 120 0.83 -0.284

1.0437 6.94 0.14 107 0.87 -0.204

0.9408 6.6 0.22 90 0.78 -0.2

Without

Lext

0.6965 5.86 1 60 0.62 -0.127

DR2: Effect of Switch Conduction Time on VConand VCoff

(Vdd= 7V, Rs= 0)

sw2

Connom fCVP

nom

ddnom

P

PP

DR1 P L Diff V


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32

DR1 Power Losses at Different Vdd

Vdd[V]

VCpeak[V]

VCon[V]

Pdd[mW]

Pnom[W]

3 4.19 3.95 0.264 0.281 0.061

3.5 5.23 4.9 0.375 0.432 0.133

4 6.1 5.72 0.496 0.589 0.1584.5 6.95 6.5 0.635 0.761 0.166

With Lext

5 7.8 7.34 0.792 0.970 0.184

3 3 2.9 0.197 0.151 -0.298

3.5 4 3.84 0.285 0.265 -0.0754 4.93 4.72 0.404 0.401 -0.006

4.5 5.88 5.58 0.545 0.560 0.027

Without

Lext

5 6.68 6.42 0.698 0.742 0.059

(Rs= 0, Vo= 0)

DR2 P L t Diff t V


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33


Vdd

[V]

VCpeak

[V]

VCon

[V]

Pdd

[mW]

Pnom

[W]

5 5.62 4.09 0.310 0.301 -0.030

5.5 6.5 4.71 0.384 0.399 0.037

6 7.24 5.22 0.449 0.490 0.084

6.5 7.8 5.54 0.519 0.552 0.060

7 8.34 6 0.594 0.648 0.084

With Lext

7.5 9.02 6.38 0.683 0.733 0.068

5 6.78 4.4 0.372 0.348 -0.067

5.5 7.56 4.66 0.433 0.391 -0.1096 8.28 5.04 0.505 0.457 -0.104

6.5 9 5.4 0.588 0.525 -0.121

7 9.58 5.78 0.683 0.601 -0.136

Without

Lext

7.5 10.22 6.16 0.779 0.683 -0.141

(Rs= 0, Tsw-cond= 58.4ns)

DR3 P L t Diff t V


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34


Vdd

[V]

VCon

[V]

VCoff

[V]

Pdd

[mW]

Pnom

[W]

3 3.99 -1.9 0.363 0.287 -0.268

3.5 5.78 -2.88 0.609 0.601 -0.013

3.75 6.5 -3.32 0.744 0.761 0.021

4 7.1 -3.74 0.880 0.907 0.030

4.25 7.8 -4.11 1.037 1.095 0.053

4.5 8.42 -4.54 1.197 1.276 0.062

With Lext

5 9.63 -5.16 1.589 1.669 0.048

3 2.91 -1.02 0.255 0.152 -0.675

3.5 3.74 -1.31 0.373 0.252 -0.480

4 4.71 -1.78 0.542 0.399 -0.356

4.5 5.9 -2.26 0.752 0.627 -0.201

Without

Lext

5 6.94 -2.7 1.011 0.867 -0.166

(Rs= 0)

I t l MOSFET I d t


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35

Internal MOSFET Inductance

For the same Vddvalue, the final VConvoltage without the

external inductor Lextin DR1 and DR3 (and, to a less extent, alsoin DR2) is much lower than the corresponding value with Lext, and

this phenomenon is more pronounced at lower Vddvalues

This result can be explained only by a lower Qonfactor of the

circuit without Lext, i.e. a higher RDSonof the p-channel MOSFETS1caused by a reduced gate-to-source voltage due to the

voltage drop across the internal source inductance (4nH for the

IRF7319) that becomes worse at higher di/dt values, i.e. without

Lext. This explains why the observed phenomenon is morepronounced at lower Vddvalues, and justify why DR1, that

requires a higher Vddthan DR3 to achieve the same VConvalue,

has lower overall losses than DR3 even without energy recovery.

R t VRM


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36

Resonant VRM

Square-waveoperation of the primary half-bridge

Zero-voltageand zero-currentcommutations of SR MOSFETsQ1and Q2

Operation at fs= 1.8MHz, VIN= 48V, Vo= 1.3V, Io= 50A

Resonant driversfor SRs

VIN

+

HB1

HB2

LR

N:1

CA

CB C2

C1

LF1

LF2

Q2

Q1

+

VO

iF2

CF

RL

iF1

iR

+

+

TR

VGS_Q1

VGS_Q2

VC1

VC2

VRM P t t


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37

VRM Prototype

4 IRF7836 SR

MOSFETs

(Qg= 18-27nC@VGS= 4.5V,

Rg= 1 )

E i t l W f DR1


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38


VGS1[2V/div] VGS2[2V/div]

DR1measured waveforms driving 4 IRF7836

SR MOSFETs (no energy recovery)Ploss= 1W each

HB1

HB2

R f


39/39

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experimental results at 10 MHz,IEEEPower Electronics Specialists Conf. (PESC), 1987, pp. 404413.8. S. H. Weinberg, A novel lossless resonant MOSFET driver,IEEE Power Electronics Specialist Conf. (PESC), 1992, pp.

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9. H. L. N. Wiegman, A resonant pulse gate drive for high frequency applications,IEEE Applied Power Electronics Conf.(APEC), 1992, pp. 738743.10.Y. Panov and M. Jovanovic, Design considerations for 12-V/1.5-V, 50-A voltage regulator modules,IEEE Transactions.

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Parasitic Components Effect Resonant