Emission  Microscopy  analysis  of  hot  cluster  defects  of  imagers  processed  on  SOI      

G.  Meynants,  W.  Diels,  J.  Bogaerts,  W.  Ogiers  CMOSIS  nv,  Coveliersstraat  15,  2600  Antwerp,  Belgium  

guy@cmosis.com  ,  +32  3  260  17  32    Introduction  

On   the   IISW   2011,   we   reported   on   the   successful   development   of   2   and   4   MPixel   backside  illuminated   global   shutter   image   sensors   [1],  manufactured  with   an   SOI   based   backside   thinning  flow   [1,2].   The   SOI   thinning   flow  was   chosen   because   of   the   easier   thickness   control   due   to   the  strong   selectivity   of   the   thinning   etch   step   to   the   buried   oxide   layer.   More   recently   we   have  developed   new   SOI   based   image   sensors   intended   for   backside   illumination.   However,   during  frontside  illuminated  testing  of  devices  processed  on  SOI  substrates  using  3  or  10  micron  epitaxial  layers,  a  large  amount  of  hot  pixel  cluster  defects  were  observed.  An  example  dark  image  is  shown  in   figure  1a.  These  devices  were   frontside   illuminated   control  devices,  processed  with  a   standard  CIS   flow,   but   on   SOI   substrates.   They  were   intended   only   to   demonstrate   the   functionality   of   the  design  on  SOI  before  the  BSI  processing  steps  would  take  place.  In  the  devices  reported  in  [1],  these  hot  clusters  were  only  present  on  certain  areas  of  the  wafer  and  with  much  lower  occurrence.  

 

EMMI  analysis  results  

These  cluster  defects  were  analyzed  using  emission  microscopy  (EMMI).  A  microscope  containing  a  near-­‐infrared  (NIR)  sensitive  CCD  camera  was  used  to  observe  electroluminescence  on  the  hot  pixel  clusters  during  operation  of  the  image  sensor.  The  NIR  image  is  overlaid  on  a  visible  image  to  allow  locating   the   emission   center   on   the   chip.   This   experiment   demonstrated   an   excellent   correlation  between   the   electroluminescence   captured   by   the   EMMI   system   and   the   hot   cluster   positions   as  seen  in  the  images  captured  from  the  chip  (see  fig.  1).      

More  detailed  microscope  emission  pictures  showed  the  location  of  the  electroluminescence  centers  inside   the   pixel,   pointing   to   two   n+/p-­‐well   junctions   inside   the   pixel   that   operate   at   the   highest  potential   inside   the  pixel.  Figures  2  and  3  show  a  microscope  view  with   the  emission  centers  and  the  pixel  layout  side-­‐by-­‐side.  Figure  2  shows  emission  at  an  n+  diffusion  area  connected  to  the  drain  of  one  of  the  in-­‐pixel  source  followers.  Figure  3  shows  emission  at  the  drain  of  the  reset  transistor.  Increasing  the  supply  voltage  of  the  in-­‐pixel  source  followers  and  the  voltage  on  the  drain  level  of  the  reset  transistor  increased  the  EMMI  signal  and  also  increased  the  size  of  the  hot  clusters  in  the  image   taken  with   the   sensor.   It   is   not   clear   if   this   is   due   to   an   increase   in   intensity   or   a   shift   to  shorter  wavelength,  where  the  EMMI  camera  is  more  sensitive.  

This  electroluminescence  explains  the  hot  clusters  in  the  dark  images  captured  by  the  sensor.  The  clusters  are  caused  by  self-­‐absorption  of  the  emitted  photons  by  the  surrounding  photodiodes.  The  dark  image  shown  in  fig.  1a  shows  that  the  clusters  are  several  pixels  wide.  For  many  clusters,  the  center  pixel   is  black  again  because  of  the  very  high  radiation  present  close  to  the  emission  center.  This  causes  an   integration  of   charges  during   the  readout  of   the  FD  reset   level,   reversing   the  pixel  signal.  

This   photo-­‐emission   or   electroluminence   can   only   be   explained   by   radiative   recombination.   The  band-­‐to-­‐band  radiative  recombination  rate  is  very  low  in  silicon,  because  it   is  an  indirect  bandgap  material  and  a  phonon-­‐assisted  transition  is  normally  required.  However,  the  presence  of  localized  crystallographic  defect  in  the  silicon,  either  a  chemical  impurity  or  a  physical  defect,  can  replace  the  role  of  the  phonon  and  cause  emission  of  photons  at  sub-­‐bandgap  energies.  Besides  this,  hot  carriers  

can  cause  higher-­‐energy  photoemission,  either  through  interband  transitions,  also  called  “avalanche  emission”,   or   trough   intraband   transitions,   also   called   “deceleration   emission”   [3,4].   Since   the  energy  of  the  emitted  photons  is  higher  than  the  Si  bandgap  energy,  we  conclude  that  hot  carriers  are  responsible  for  the  effect  that  we  observe.  The  presence  of  the  defect  at  random  locations  in  the  pixel  array  points  to  crystallographic  defects  caused  by  impurities.  When  these  are  located  close  to  the  reverse  biased  n+/p  junction,  we  expect  that  these  assist  to  form  avalanche  emission  centers.  

Impurities   such   as   Cu,   Fe,   W,   Cr,   Ni   commonly   are   present   during   wafer   manufacturing.   They  introduce  energy  levels  around  mid  bandgap  [4].  In  a  standard  bulk  wafer,  these  impurities  would  diffuse   into  a  gettering   layer  at   the  bottom  of   the  wafer,  where   the   impurities  are   trapped.   In   this  case  however,  the  SOI  layer  forms  a  barrier  for  the  diffusion  of  some  of  these  impurities,  like  Fe  or  Ni.   Instead,   these   impurities   diffuse   as   interstitials   to   certain   areas   in   the   pixel   until   they   are  trapped.  For  example,  Fe  can  form  iron-­‐boron  pairs  (Fe-­‐B)  [6]  or  iron-­‐phosphorus  pairs  [7].  It  seems  that   at   least   some   of   these   impurities   get   trapped   near   the   n+/p   junctions   in   this   pixel   that   are  connected  to  the  pixel  power  supply  or  reset  drain  supply.  When  a  strong  electric  field  is  present  in  this  area,  radiative  recombination  occurs.    

These  observations,  and  the  fact  that  our  first  global  shutter  developments  presented  in  IISW2011  did   not   show   these   cluster   defects,   pointed   to   solutions   for   this   issue.   Meanwhile   our   foundry  partner   in   this   project,   TowerJazz   has   proposed   a   fix   for   the   issue,   and   we   have   successfully  demonstrated  that  this   fix  solved  this   issue  on  one  of  our  BSI  products.  Fig.  5  shows  a  dark  image  taken  on  a  backside  thinned  imager  after  this  fix,  with  a  500  ms  exposure  at  50ºC.  

Conclusion  

Emission  microscopy  has  demonstrated  that  radiative  recombination  at  high  voltage  n+/p  junctions  was  a  cause  of  hot  cluster  defects  in  imagers  processed  on  SOI  substrates.  Some  impurities  present  in   the   silicon   layer   assist   to   form  avalanche   emission   centers.   This   is   probably   the   first   time   that  light   emission   from   junctions   inside   a   pixel   of   an   image   sensor   has   been   reported   as   one   of   the  origins  of  hot  pixel  clusters.  But  the  use  of  an  array  of  avalanche  electroluminescent  diodes  in  silicon  was  already  proposed  in  1965  to  form  a  monolithic  display  [8].  

 

Acknowledgement  

We   thank   Ingrid   De  Wolf   of   IMEC   for  making   available   the   EMMI   setup   and   assistance   with   the  EMMI  measurements.    

References  

[1]  G.  Meynants,  et  al,  “Backside  illuminated  global  shutter  CMOS  image  sensors”,  proc.  IISW,  Hokkaido,  June  2011,  p.  305-­‐308  [2]  B.  Pain,  “Backside  Illumination  Technology  for  SOI-­‐CMOS  Image  Sensors”,  IISW  2009  symposium  on  BSI,  Bergen,  June  2009    [3]  H.  Ivey,  “Electroluminescence  and  Semiconductor  Lasers”,  IEEE  Journal  of  Quantum  Electronics,  Vol.  QE-­‐2,  No.  11,  Nov.  1966,  p.  713  -­‐  726  [4]  S.  M.  Sze,  “Physics  of  Semiconductor  Devices”,  1981,  J.  Wiley  &  Sons.  [5]  J.  Furihata,  et  al,  “Heavy-­‐Metal  (Fe/Ni/Cu)  Behavior  in  Ultrathin  Bondes  SOI  Wafers  Evaluated  Using  Radioactive  Isotope  Tracers”,  Jpn.  J.  Appl.  Phys,  Vol.  39  (2000),  pp  2251-­‐2255.  [6]  D.  Schroder,  “Carrier  Lifetimes  In  Silicon”,  IEEE  Trans.  El.  Dev.,  Vol.  44,  No.  1,  Jan.  1997  [7]  T.  Mchedlidze,  et  al,  “An  iron-­‐phosphorous  pair  in  silicon”,  J.  Phys.:  Condens.  Matter  16  (2004),  L79-­‐L84  [8]  R.H.  Dyck,  “Avalanche  luminescence  in  silicon  and  its  utilization  in  monolithic  light  source  array”,  1965  Proc.  ISSCC,  p.  64    

      a)               b)    fig.  1:     a)  dark  image  as  captured  by  the  image  sensor,  showing  hot  pixel  clusters  

b)  image  captured  by  the  EMMI  system  (NIR  image,  blue,  as  overlay  on  visible  image)    

 

      a)               b)    Fig.  2:    a)  image  of  EMMI  system  (NIR=red  overlay);    

 b)  layout  and  first  junction  in  the  pixel  where  the  electroluminescence  is  originated    (large  yellow  plate  is  a  top  metal  layer)  

 

Crop from a dark image

NIR overlay over visible

      a)               b)    fig.  3:     a)  image  of  EMMI  system  (NIR  channel  =red  overlay);  

b)    layout  and  junction  where  the  electroluminescence  is  originated.      

         

Fig.  4  :  impurity  caught  inside  the  epitaxial  layer       Fig.  5:  dark  image  captured  by  BSI  diffusing  and  trapped  at  one  of  the  in-­‐pixel  junctions.     imager  at    50ºC  (500  ms  exposure)                         after  fix  for  hot  clusters.  

p-

p+n

TX

n+

p++

impurity (e.g. metal contaminant)

epitaxial layer (3 - 10 µm)

bulk wafer± 725 µm

(removed during backside thinning)

BOX (145 nm)

n+