Panasonic GaN Power · 2020. 4. 27. · In the high-speed switching operation of GaN, even if the gate capacitance is small, the Gate voltage rises due to the Miller effect, and the

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Panasonic GaN Power Driver design and application

https://industrial.panasonic.com/ww/products/semiconductors/powerics/ganpower

Contributes to Global Eco

Miniaturization

Energy Saving

Mar 6/2018

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Exhibiter Seminar

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Panasonic X-GaNTM Family Product PGA26E34HA PGA26E19BA PGA26E07BA PGA26H04KA

Package

Power SMD(DFN) Power SOP DFN 6x4 DFN 8x8 PSOP 20

Blocking Voltage 600V 600V 600V 600V Drain Current 8.5A 13A 26A 52A

Rdson(typ) 270mΩ 140mΩ 56mΩ 32mΩ Qg 1nC 2nC 5nC 8nC Qr 0nC 0nC 0nC 0nC

Status Sampling (18/CQ1) Mass Production Mass production Sampling (18/CQ3) Samples available from

Panasonic X-GaNTM Power Transistor

Features

GaN Epitaxial Growth Technique on Si Substrate Normally-Off operation with single GaN Device Current-Collapse-Free 600V and more Zero Recovery Characteristics

High Speed

First of Normally OFF GaN power Transistor qualifying Mass Production. Fully qualify JEDEC standards and beyond, current collapse free and so on.

Small footprint

High Power

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1.Composition of Panasonic X-GaN 2. X-GaN gate design theory 3.X-GaN advantage 4.X-GaN application

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When system condition is Stand-by mode Start-up/Shut-down sequence Driver supply voltage malfunction,

Normally ON characteristic

Conventional

Normally ON is GaN natural behavior undesired for power electronics and Turn to Normally OFF is GaN development challenge.

0 2 4 -2 -4

0.2

0.0

0.4

0.6

0.8

1.0

Dra

in C

urre

nt (a

.u.)

Gate Voltage [V]

Normally ON Conventional GaN FET

Off

Drain Current GaN

AlGaN Drain Source Gate

Exist 2 terminals, Drain & Source, then automatically start current flow. That transistor called “Depletion Mode”, means Normally ON characteristic. Applying negative gate voltage to turn off transistor is undesired. In power electronics application during the standby mode, gate voltage is 0V, bridge configuration results high rush current and break.

Normally ON

400V Transformer

Driver

Driver

Shoot Current Occur! Break GaN-Tr!!

Down

Down

Break

Break

ON

ON

Apply negative voltage to turn off

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GSK Single Device Normally OFF e-mode GaN FET

GIT

Adopt p-GaN gate layer to be Normally OFF and resistive connection called GIT: Gate Injection Transistor.

Off

GaN

AlGaN Drain Source

Gate

pGaN layer lifts up potential at the channel and blocked electron movement. Halls inject from Gate to Drain region and Drain current increase using conductive modulation.

pGaN

ON

Drain Current GaN

AlGaN Drain Source

Gate pGaN

0 2 4 -2 -4

0.2

0.0

0.4

0.6

0.8

1.0

Dra

in C

urre

nt (a

.u.)

Gate Voltage [V]

Normally ON Conventional GaN FET

Normally OFF

Vth=1.2V

GIT

Pure single device

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Electrons TRAP, which might cause crystal dislocation, and blocks Drain current flow, results in higher Dynamic Rdson called Current Collapse.

Mechanism

AlN AlGaN

GaN epitaxial

Si(111) substrate

GaN/AlN Super-lattice Buffer

Occurs Minor Crystal dislocation by Compressive Strain though implemented Super-lattice buffer.

Crystal Dislocation

Compressive Strain

Drain

Si-substrate

AlGaN

GaN

Gate

Buffer layer

Source

Trapped Electron

Trapped Electron occur on the surface and bulk, which might be caused Crystal Dislocation.

Source terminal

Drain terminal

Trapped Electrons block Drain current flow and Rdson rises.

The number of Trapped Electrons has Vds correlations. High electronic fields capture Trapped Electron easily.

RDSon rises

Static Condition (No switching)

Reproduce same Rdson value as

datasheet

Dynamic Condition(Switching Operation)

Drain voltage waveform

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Si‐substrate

AlGaN

GaN

DrainSource

Buffer layer

p-GaN

Gate

X-GaN Current Collapse Countermeasure – HD-GIT

General method i.e. process countermeasure, reaches about 500V, but not enough. HD-GIT structure injects Hole and eliminate Trapped Electron immediately.

Approach 1 Reduce Compressive Strain to minimize Crystal Distortion

Approach 2

Fine tuning Super-lattice Buffer. Fine tuning GaN epitaxial growing. AlN

AlGaN

GaN epitaxial

Si(111) substrate

GaN/AlNSuper-lattice Buffer

CompressiveStrain

Reach physical limit for above 500V. No way to eliminate Crystal Dislocation by process approach.

Panasonic unique structure HD-GIT: Hybrid-Drain-embedded GIT (HD-GIT)

General method

Panasonic Original method

Release Trapped Electrons By Hole(+) injected from Drain

Perfectly solved 850V and above Drain voltage(V) D

ynam

ic R

on (a

.u.)

【Current collapse characteristics】

Approach2

Approach1 No

collapse

2nd Drain as similar to gate structure is automatically turn on during the switching period.

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X-GaN has no Dynamic Rdson degradation, no breakdown, under D-HTOL test up to 3600 hours.

Test items Test conditions Test standard Result

HTOL test Vds=480V, Id=10A, f=6.6kHz, Ton=7.7us, 5000puls, Ron measure=4.5us 3600h

Beyond-JEDEC (X-GaN origin) Pass

DUT: PGA26E19BA

D-HTOL test Aging result of Dynamic Rdson

PGA26E19BA N=3

Don’t observe Dynamic Rdson for 3600h under D-HTOL test. HD-GIT, current collapse counter measure, works well to keep GaN dynamic operation lifetime.

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X-GaN adapt resistive contact Gate structure and advantage for breakdown. GIT has robust Gate for voltage rise by external noise.

Conventional X-GaN GIT: Gate Injection Transistor

Structure

Gate connection Schottky Connection Resistive Connection

Gate Current Characteristic

No current flow until breaking Current flow Keep safety Gate voltage.

Gate Breakdown Voltage Control Gate Current Control Gate

Normally off structure by P-GaN gate

Normal Operation Absolute Maximum

>5mA 50mA 1.5A

Peak

Wider Margin

7V 6V

Normal Operation Absolute Maximum

No Margin

10V

Peak

i-GaN

i or n-AlGaNS D

G

p-typegate

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GSK GaN design challenges: Low Vth

Vth=1.2V

GaN Vth is much lower than SJMOS.

Need special Driver IC?

Need special Driver Design?

No

Yes To maximize GaN benefit. To adapt to GaN specific device characteristics

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GSK Low Vth courses False Firing

CopperL/F

ResinAu

L/F

GaN Die

断面図 Source Drain

All terminals has inherence stray inductance by wiring.

Silicon GaN

Switching speed Slow Fast

Vth High; 3.5V Low; 1.2V

False firing Low risk High risk

Equivalent Circuit with Stray L

ID

vs VGS vgs

VGS

ID

vs

vgs

ON Off

Rapid current change

Voltage drops by Stray L

false firing

false firing

GaN has low Vth and able to switching very fast. Source pin stray L create the voltage drops at electrode of die even supply VGS=0V strictly. Then Gate turn on and courses False Firing.

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0.7nH

2.9nH

1.3nH

Vth=1.2V

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Source2 Source1

Drain

Gate Driver

By applying a voltage between the source on the sense side and Gate, even if the Source on the Power side fluctuates due to the influence of the parasitic inductance, control can be stably performed.

Kelvin Source is necessary to prevent False Firing by Low Vth

VGS

ID

Vs

vgs

ON Off

Rapid current change

Voltage drops by Stray L

Eliminate false firing


Equivalent Circuit with Stray L

ID

vs VGS vgs

=vgs

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Vth=1.2V

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GSK GIT characteristics 1 – Current Control Gate -

Panasonic unique structure GIT requires constant gate current to keep turn on.

ON

Drain Current

GaN

AlGaN

Drain Source

Gate

pGaN

5mA

More than 5mA required to keep turn on.

Rdson Minimum Gate current to keep ON

PGA26E07BA 56mohm 5mA

PGA26E19BA 140mohm 2mA

PGA26E34HA 280mohm 1mA

The minimum Gate current depend on device size

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5mA

More than 5mA required to keep turn on.

5mA

GaN p-n junction V/I characteristic

Appear approximate 2.7V at Gate – Source.

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2.7V

Apply more than 2.7V at Vgs to keep turn-on.

Voltage control method for GIT

3.0V +/- 0.3V

Driver Vdd voltage design with tolerance 3.0V +/- 0.3V. Gate current fluctuate up to 50mA or more. Create big gate current loss and exceed absolute maximum.

50mA

Not recommended

Require narrow driver Vdd tolerance to allow Voltage control method.

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Rig

Vdd

Driver

50mA > Irg = (Vdd-Vgsf)/Rig > 5mA

The value of the Rig set between 5mA to 50mA.

Vdd：Driver supply voltage Vgdf：Gate-Source voltage approx. 2.8V＠Tj=125℃

5mA

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GSK GIT characteristics 5 – Gate transient -

Require transient Gate current for fast switching.

Rig

Vdd

Igp = Vcc/Rgp ＜ 1.5A

Vcc：Driver power supply Vgp：Combined resistance of Rig and Rgon Vgdf：Gate-Source voltage approx. 2.8V＠Tj=125℃

Rgon Cs

Qgp = Csx(Vcc-Vgsf) ＜ 32nC

Rgon determine transient Gate current for fast switching.

Rig is too big to provide transient Gate current for first switching.

Cs shuts off the transient current during static period.

The value of the Rgon set below 1.5A

The value of the Cs set below 32nC of gate charge Qgp

Vgs

Ig

Vth

Vgs

Ig

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GSK GIT characteristics 6 - absolute maximum voltage for gate -

No positive voltage limit. 10V limit for negative voltage by surge protection diodes.

Voltage limit is not specified as long as it is within the absolute maximum rating, IG, IGP and QGP

Vgs

Ig

Vth

Large current IGP

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GSK GIT characteristics 7 – Gate transient -

Gate resistance Rgon control dV/dt through rate like Silicon.

Turn off wave form Vds

Turn on wave form Vds

Rgon increase

time

Vds Tr, Tdon

change

Tf, Tdoff change

Rgon increase

time

Vds

GIT has Very simple dv/dt control method by external Rg like Silicon to prevent EMI issue.

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Rig

Vdd

Rgon Cs

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GSK GIT characteristics 8 - Mirror effect -

Low Vth triggers False Firing by rising gate voltage causing mirror effect.

Vdr

Vgs

Vds

Vth


In the high-speed switching operation of GaN, even if the gate capacitance is small, the Gate voltage rises due to the Miller effect, and the low Vth causes False Firing.

Cs provides negative Gate voltage when Vgs OFF. Its prevent False Firing.

Even if Vgs rises due to Miller effect, GaN can be protected from destruction due to False Firing by giving sufficient negative voltage not exceeding the Vth.

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Rig

Vdd

Rgon Cs Vgs

Ig

Vdr Vds

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GSK GIT characteristics 9 – Vth tolerance-

The temperature dependence of X-GaN threshold voltage Vth is extremely small comparing with Silicon.

Low Vth of GaN is an issue, but fortunately the temperature dependence is small, and it is not like Si as dramatically degrading Vth at high temperature.

Less than 0.1V fluctuation

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GSK GaN bi-directional switching device

X-GaN has same current capability to forward and revers mode conduction.

Vgs 0V -1V -2V -3V -4V -5V

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GSK X-GaN reverse conduction mode

Externally connect Gate and Source, Diode Connection, then conducts reverse with GaN diode VSD.

X-GaN is pure GaN device and no parasitic, no body diode. Reverse current conducts by GaN diode connection mode.

Vgs 0V -1V -2V -3V -4V -5V

VSD=2.1V @Vgs=0V, Id=8A

VSD=2.1V + Vgs (@Id=8A) Note: VSD is increase by Gate negative voltage Vgs.

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GSK Synchronous switching operation

Synchronous switching operation reduce from Diode loss to Conductive loss.

To minimize Diode loss, optimize dead time design, and Gate voltage close to 0V as much as possible.

IL

IL IL

LX

LX

High side Low side

Vcc

Vcc

VSD

VSD=2.1V + vgs Diode loss Conductive loss

Dead time

Dead time High side

ON High side ON

Low side ON

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GSK Zero Recovery Loss

X-GaN PGA26E07BA SJ-MOS

VDSS 600V 650V

Vth 1.2V 3.5V

RDS(ON) 56mΩ 62mΩ

Qg (RonQg)

5.0nC (280mΩｎC)

64nC （3968mΩnC)

Qrr 0nC 10000nC

>1/10

negligible

Since GaN has no p-n junction like SJMOS, theoretically Qrr is Zero. This zero recovery characteristics has big advantage in hard switching topology.


Vr 400V 400V

frequency 10kHz 10kHz

Qrr 0nC 10000nC

Recovery loss 0W 40W

Recovery Loss Pr Pr = f x Vr x Qrr

f: frequency Vr: recovery voltage Qrr: recovery charge

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GSK Small Co(tr)

Since GaN has no p-n junction like SJMOS, theoretically Qrr is Zero. This zero recovery characteristics has big advantage in hard switching topology.


VDSS 600V 650V

RDS(ON) 56mΩ 62mΩ

Co(er) @400V 87pF 100pF

Eoss @400V 7.2uJ 8.0uJ

Co(tr) @400V 106pF 1100pF >1/10

X-GaN

SJMOS

1/10

Zero Volt Switching: ZVS

GaN Drain Source Capacitance discharge period is 10 times faster than Si. GaN able switching 10 times faster in ZVS topology.

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GSK Vds transient

X-GaN design Vds breakdown voltage 900V and above to guarantee 750V Vds transient. No longer necessary Avalanche proof technique as SJMOS.

Si (P-N junction) has not high enough Vds breakdown voltage. Survive Vds transient by Avalanche proof technique. (Avalanche breakdown at 650V and Additional breakdown energy by parasitic resistance and transistor.)

Breakdown Characteristic [Ids vs.Vds]

Si X-GaN design Vds breakdown voltage Vds>900V, thanks to WBG. True device breakdown design, No need avalanche trick design anymore.

GaN has no parasitic, can’t create Avalanche proof.

Rating Item Symbol Values

Unit Min. Typ. Max.

Drain-source voltage (DC) VDSS - - 600 V

Drain-source voltage (pulse) VDSP - - 750 V

1000 900 800 700 600 Static

500

X-GaN

Breakdown Vds > 900V A

vala

nche

Bre

akdo

wn

2

4

6

8

10

750 Transient

Vds [V]

Id [A]

Guarantee transient Vds>750V

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GSK GaN Application: PFC

99 98 97 96 Efficiency [%] 95

Driver

AC110VAC240V

AC110VAC240V

Driver Driver

Dual boost PFC

Classic PFC

Si

GaN

Miniaturization

Small

Large

(Full bridge)

(Semi Bridge)

Smaller passive components by GaN high frequency operation.

Totem Pole PFC (Bridgeless)

Utilized GaN unique advantage Zero recovery characteristic.

Miniaturization by higher frequency.

Driver Driver

AC110VAC240V

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Zero Recovery advantage of GaN can realize the Totem Pole PFC and achieve efficiency of 99% or more

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GSK GaN Application: LLC

1M 250k Frequency [Hz

Efficiency [%]

500k 750k

Miniaturization Small Large

98

97

96

95

94

99

Si Limit

GaN

Si

Further miniaturization by high frequency

High Efficiency

Small differentiation

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X-GaN operates x10 faster than Si, because of its low Co(tr) characteristics. Device down sizing can be realized by miniaturization of peripherals by high frequency

LLC

Driver

380V

Driver

12V

L/S

MCU

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GSK GaN Application: AC-Adapter

1M 250k Frequency [Hz]

Efficiency [%}

500k 750k

94

92

90

88

86

Active Clamp Fly-Back

96

>40 W/in3

7-12 W/in3

Active Clamp

Si GaN

Higher frequency

Fly-Back

1/3 to 1/4 smaller

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X-GaN operates x10 faster than Si, because of its low Co(tr) characteristics. Device down sizing can be realized by miniaturization of peripherals by high frequency

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GSK GaN Application: Inverter

500 Output Power [W]

Efficiency [%]

1k 1.5k

99

98

97

96

95

100

IGBT

GaN Fewer losses by GaN zero recovery characteristic.

30x68x12mm

400W Servo Amp. Heat-sink-less

Power Board

Controller Board

Heat sink less, 1/4 size against Si

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Totally eliminate Recovery loss by X-GaN and reduce 60% losses. Enjoy heat-sink-less 400W motor driver.

3 Phase Motor Driver

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GSK GaN Application: Others

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A set aiming for miniaturization and weigh-saving are required X-GaN adoption to enjoy benefits of zero recovery, fast switching characteristics.

Class-D Audio Amplifire RF Power Supply for Plasma generator

Wireless charge Others

Transmitter

Class-E

Reciever

Automotive AGV

Consumer

RFPower Supply

Satellite

Aircraft Automotive

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Thank you for your attention

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No.010618

Documents

Panasonic GaN Power · 2020. 4. 27. · In the high-speed switching operation of GaN, even if the gate capacitance is small, the Gate voltage rises due to the Miller effect, and the