.elsevier.com/locate/msec

Materials Science and Engineering

Organic thin film transistors with polymer high-k dielectric insulator

Klaus Muller *, Ioanna Paloumpa, Karsten Henkel, Dieter Schmeißer

Brandenburgische Technische Universitat Cottbus, Angewandte Physik-Sensorik, 03013 Cottbus, P.O. Box 101344, Germany

Available online 28 November 2005

Abstract

With the soluble copolymer poly(vinylidene fluoride– trifluoroethylene) (P(VDF–TrFE)) for the dielectric layer, we fabricate organic field

effect transistors with enhanced gate effects, if we use P(VDF–TrFE) layers with a thickness of 2 Am. No hysteresis is observed. We obtain

a relative dielectric constant of about 11 (at 1 kHz), which enables operation voltages smaller than for the organic insulator

polymethylmetacrylate (PMMA, ( =3.3 at 1 kHz). In contrast, for thinner films of P(VDF–TrFE) (250 nm), we find the typical ferroelectric

hysteresis of the copolymer. This gives opportunities for building up organic transistors with a thin P(VDF–TrFE) ferroelectric layer as

nonvolatile memory element.

D 2005 Elsevier B.V. All rights reserved.

Keywords: Organic field effect transistors; Organic high-k; P(VDF–TrFE); Enhanced gate effects

1. Introduction

Integrated flexible logic circuits [1], flat panel devices [2,3]

or sensor arrays [4–6] represent a wide field of interest for low

cost and large area electronics. The organic field effect

transistor (OFET) is the central electronic device in organic

electronics, but the transistors need improvement of the

transconductance, operation voltage or the mobility of charge

carriers.

Another critical parameter in OFETs is the maximum

working frequency f of organic transistors, which is directly

related to the mobility of the charge carriers in the channel,

according to f=1/T¨lUDS/l2 (T=transfer time, l =mobility,

UDS=drain–source voltage, l=channel length). For example, a

working frequency of about 200 kHz for organic ring

oscillators was reported [7] (106 kHz [8]).

The operation voltage, the voltage necessary for a certain

value of current, is strongly depending on the capacitive

coupling of the gate dielectric. In the non-saturated regime, the

0928-4931/$ - see front matter D 2005 Elsevier B.V. All rights reserved.

doi:10.1016/j.msec.2005.09.057

* Corresponding author. Full mailing address: BTU Cottbus, Applied

Physics, Konrad Wachsman-Allee 1, 03046 Cottbus, Germany. Tel.: +49

355694067; fax: +49 355693931.

E-mail address: Muellerk@tu-cottbus.de (K. Mu ller).

equation for the drain–source current IDS vs. drain source

voltage UDS and the gate voltage UGS [9]

IDS ¼lWC

lUGS þ U0ð ÞUDS �

U 2DS

2

�� ��

points up the influence of capacitance C (per unit area):

C ¼ ee0d

on operation voltage (W=channel width, d = thickness of

dielectric layer, U0= threshold voltage). The threshold voltage

is the limiting factor for the on/off ratio in the saturated regime.

The transconductance in the saturation regime, defined as

g =flISDS/flUGS is proportional to the capacitance. For mini-

mized operation voltages and improved on/off ratios it should

be as high as possible.

As we learn from the equation for drain–source current, an

improved operation voltage and transconductance is of cause

realizable by choosing a short channel length l, but in terms of

a low cost production, e.g. roll to roll printing, the value for

channel length has a limitation and further optimization is only

possible with an increased capacitance. The capacitance can be

increased by choosing i) a lower thickness d of the insulation d

or ii) higher values for the relative capacitance (. In terms of a

reduced insulation thickness, dielectric layers of poly-4-

C 26 (2006) 1028 – 1031

www

AuAuP3HT

Carbon-Black

PMMAPVDF

Substrate: Glass

Fig. 1. Schematic view of the organic high-k transistor structure. Gold

electrodes are used as source–drain electrodes and carbon black (Degussa) as

gate. An additional layer of P(VDF–TrFE) is used to prevent a high leakage

current.

K. Muller et al. / Materials Science and Engineering C 26 (2006) 1028–1031 1029

vinylphenol (PVP) with 260–380 nm thickness or self-

assembled monolayers (SAM) are described [10–12]. Inor-

ganic materials with high relative dielectric constant (‘‘high-k’’)

for lower operation voltages are also reported for transistors

with organic semiconductors. High-k dielectric layers such as

TiO2, Al2O3, Ta2O5 or SrBi2Ta2O9 [13–15] are presented. For

these materials, the positive influence of the high dielectric

constant on operation voltage was demonstrated. A further

advantage of high-k materials, is that we have no reduction of

the thickness of the insulation layer with the disadvantage of

ever greater leakage currents.

For our experiments, we use the copolymer of poly(viny-

lidene fluoride) (PVDF) with trifluoroethylene: P(VDF–TrFE).

P(VDF–TrFE) is a soluble organic insulator and usable for

spin coating. It was successful used as ferroelectric layer in

organic field effect transistors and the memory effect due to the

polarization of the gate insulation was studied with metal/

insulator/semiconductor devices [16]. Organic transistors with

pentacene as active layer and P(VDF–TrFE) as gate insulation

were studied as nonvolatile memory element [17–19]. The

polarization voltage necessary for writing information depends

on the film thickness d of the dielectric polymer P(VDF–TrFE)

as example, for films with d>200 nm, a polarization field of 40

MV/m was reported [20] (for d <200 nm, 100 MV/m). By

transistor tests and C(U) measurements, we show that P(VDF–

TrFE) can be used also for conventional organic transistors

with lower operation voltages due to its high dielectric constant

if we use dielectric layers with a thickness of about 2 Am. For

thinner films of P(VDF–TrFE) (230 nm), we found the typical

hysteresis.

2. Experimental

As semiconductor for our experiments we use regioregular

poly(3-hexylthiophene) (P3HT, average molecular weight=

87.000, Aldrich) with chloroform as solvent, about 100 nm in

thickness after spin coating.

For transistor tests, we use structures made by lithographic

processing of Cr(15 nm)/Au(80 nm) on a Pyrex glass

substrate (MicroFAB, 1 cm�0.5 mm, each electrode) with

a channel length of 2 Am. As material for the gate electrode

we use a carbon nanodispersion in water with an average

grain size of about 20 nm (Derrusol An1, Degussa, Frankfurt,

Germany). The transistors are completed with an organic

dielectric layer of 2 Am in thickness. As dielectric layer, we

choose) spin-coated layers of the copolymer P(VDF–TrFE)

(Piezotech S.A., France) solved in 2-butanone with an

additional layer of polymethyl-methacrylate (PMMA) to

prevent high leakage current, see Fig. 1. The copolymeriza-

tion ratio of the VDF and the TrFE unit is 70/30. As

reference, we prepare transistors with) spin-coated layers of

PMMA (Allresist, Germany), solved in ethylacetate. The

thickness of this film is also 2 Am.

For the measurements of the ferroelectric behavior of

P(VDF–TrFE), we use structures with an oxidized Si-

substrate (235 nm SiO2). The P(VDF–TrFE) (70/30) is also

solved in 2-butanone and was spin-coated into films of a

thickness from 100 nm to 1 Am. Then, we anneal the samples for

2 h at 135 -C. As top-electrode, we use thermal evaporated

aluminum.

A combination of a HP power supply (E3631A) and two

multimeters (HP 34301A, PREEMA4001) is used for measur-

ing the current–voltage characteristics. Measurements of

capacitance (transistors) and capacitance vs. voltage (C(U))

are carried out with a LCR-Meter Agilent 4284A. The lowest

frequency available with our LCR meter is 20 Hz. The

thicknesses of the spin-coated films are measured by a Taylor

Hobson (Talystep) profilometer.

The measurements are carried out in ambient atmosphere.

Measurements in air do not favor a high on/off ratio or low

saturation voltages due to oxygen doping of the semiconductor,

of course. It may be noted that our aim was to study the effect

of a dielectric layer with high dielectric constant on the field-

induced charge carriers and the transconductance and not the

quality of the on/off ratio.

3. Results and discussion

3.1. Improvement of operation voltage

Fig. 2A shows the transfer characteristics of the two

structures with i) only PMMA as a layer with a thickness of

2 Am and ii) a P(VDF–TrFE)/PMMA sandwich with a total

thickness of 2 Am, again. The drain–source voltage is 9 V. The

measurements are performed by sweeping the gate voltage

from 0 to �50 V and vice versa (dashed line). The scanning

speed is 5 V/min.

We observe significant differences for the transfer char-

acteristics, the ratio of the two slopes DIDS/DUGS is 33:10. This

slope is constant and represents the partial derivative of the

drain–source current IDS with respect to the gate voltage UGS:

flIDS/flUGS=DIDS/DUGS=lCUDSW/l, see above-mentioned

equation.

The geometric parameters channel width, length and

insulator thickness here are the same for both structures and

the ratio of the two slopes flIDS/flUGS=DIDS/DUGS should

primarily be represented by the ratio of the two values of the

relative dielectric constants (P(VDF–TrFE)/(PMMA. If we choose

a reported value for (PMMA, 3.3 at 1 kHz [21] and our ratio of

slopes (3.3) for example, we obtain a value of 10.89 for the

relative dielectric constant of P(VDF–TrFE) at 1 kHz, in good

agreement with Furukawa [22]. The part of PMMA in layer

thickness of the P(VDF–TrFE)/PMMA sandwich structure is

about 10% (about 200 nm), estimated from spin coating

-50 -40 -30 -20 -10 0

-40

-50

-60

-70 UDS = -9V

P(VDF-TrFE)/PMMA

PMMASD

-Cur

rent

(μA

)

Gate Voltage (V)

-200 -100 0 100 200

-40 -20 0 20 40

1x10-6

1x10-7

2x10-8

2x10-6

2x10-7

2x10-5

Leak

age

Cur

rent

(A

)

Voltage (V)B

curr

ent d

ensi

ty (

A/c

m2 )

Electric field (kV/cm)

PVDF/PMMA

PMMA

A

Fig. 2. (A) Transfer characteristics at constant drain–source voltage of 9 V for two transistor structures with PMMA and P(VDF–TrFE)/PMMA gate insulator with

increasing gate voltage and vice versa (dashed line). Thickness of the gate insulation in both cases 2 Am. Measurement in air with lithographical structured Au/Cr

drain–source electrodes 2 Am on glass and P3HT as organic semiconductor. (B) Leakage current for the two structures.

K. Muller et al. / Materials Science and Engineering C 26 (2006) 1028–10311030

conditions. Then, additional effects of the resulting voltage

divider on the dielectric constant should also be in a range of

only 10%.

However, the slope DIDS/DUGS for the transistor with

P(VDF–TrFE) as dielectric layer represents the transconduc-

tance, in our case in the non-saturated region of the OFET. It

is improved by the factor 3.3 only due to the higher

dielectric constant the copolymer. Of course, the operation

voltage is reduced by the same factor: the gate voltage

necessary for a given source drain current is more than three

times smaller.

In addition, the transistors are free of hysteresis. We sweep

the applied voltage to a gate voltage of �50 V and back, this

is marked in Fig. 2A as a dashed line. This behavior is

reproducible and a result of the relatively thick dielectric

layer.

Fig. 2B shows that we are able to fabricate insulation layers,

consisting of the above described combination P(VDF–TrFE)/

PMMA with a resistivity in a value comparable with

conventional organic insulators, like PMMA. In both cases,

the leakage current and the related resistivity corresponds to a

value of 4�109 V cm. This is good enough for a transistor,

-8 -6 -4 -2 0 225

30

35

40

45

50

55

60

ΔVFB±

Flatband

C [p

F]

VDUT [V]

Voltage cycle -5...5V -20...20V -40...40V

and back

A

Fig. 3. (A) C(U) characteristics for different voltage sweeps. Thickness of the P(VD

the voltage sweep.

because the ratio for leakage current in relation to the channel

current induced by the applied field is negligible: a typical

value for leakage current at a gate voltage of �50 V is 300 nA.

Otherwise, the change of channel current at �50 V due to

charge accumulation is about 10 AA for PMMA as gate

insulation (Fig. 2A). For measuring the leakage current, we set

the source and drain electrode to zero and sweep the gate

voltage. For calculating the current density we use the electrode

area (2�1 cm�0.5 mm=0.1 cm2), and for calculating the

electric field, we use the thickness of the insulation layer (2

Am).

The output characteristics of (IDS vs. UDS) of both

transistors shows a typical short-channel characteristics, due

to an equal value for the two parameters channel length (2 Am)

and insulation thickness (2 Am). This is discussed in Muller et

al. [23].

Based on these data, the copolymer P(VDF–TrFE) should

give an improvement of the transconductance, the operation

voltage and the third important parameter for transistors: the

on/off ratio. The on/off ratio depends mainly on the threshold

voltage, but if we use a gate insulator with higher dielectric

constant the related higher charge density causes traps to be

0 20 40 60 800

1

2

3

4

ΔUF

B [V

]

ΔUDUT (V)

B

F/TrFE) film is 220 nm. (B) The flatband shift vs. the absolute value DUDUT of

K. Muller et al. / Materials Science and Engineering C 26 (2006) 1028–1031 1031

filled at lower gate voltages and reduces the threshold voltage

[13]. In terms of a low cost production with printing

techniques, the problem of leakage current is evident: if the

insulation layer is too thin, the amount of leakage current is

very high, but if we use gate insulators with higher dielectric

constants, thicker films can be used with same transistor data

like operation voltage, but lower leakage currents.

We have not yet tested whether the thickness can be further

reduced in order to improve operation voltages of transistors

without any hysteresis. For films with a thickness of <1 Am, a

hysteresis is obvious, as measured by C(U) curves.

3.2. Hysteresis of P(VDF–TrFE), thin films

For thinner films in a range of <1 Am, we find the

ferroelectric hysteresis of the copolymer. Fig. 3A shows a

typical C(U) characteristic of a Si/SiO2/P(VDF–TrFE) con-

densator. The P(VDF–TrFE) film of this example is prepared

in a thickness of 220 nm.

As x-axis, the applied voltage is given. Three voltage

sweeps corresponding to a range of T5 V, T20 Vand T40 V are

shown. The flatband capacitance is calculated after Sze [24]

and is indicated in the figure. This capacitance corresponds to a

related flatband voltage, also shown in the figure. A cycle, for

example T5 V, starts at �5 V, not shown here, runs to +5 Vand

back. As we see in the resulting capacitance, the influence of

voltage leads to a change of capacitance. This is also related to

a shift of the value for the flatband voltage. The flatband shift is

proportional to the electric field strength applied, as shown in

Fig. 3B. Here, the absolute value DUPVDF of the voltage sweep

is taken as x-axis. In this figure, we show all cycles applied.

The variation of flatband shift versus DUDUT is nearly linear

and no saturation occurs.

This shift of flatband versus the applied voltage indicates the

presence of polarization charges and the ferroelectric behavior

of the copolymer P(VDF–TrFE). The possibility of a charge

injection and a resulting shift in flatband voltage is studied by

Reece et al. [16], and was clearly excluded (MFIS structures).

No real saturation of the shift of flatband voltage (Fig. 3B) is

observed. This could be due to an effect of film thickness.

Nevertheless, the observed hysteresis opens a wide field of

applications for memory elements. If those are realizable with

organic transistors, the field of low cost production using

flexible substrates is opened.

4. Summary

In summary we have demonstrated an organic field effect

transistor with a high k (high () polymeric dielectric P(VDF–

TrFE). We obtained values for ( around 11. The material is a

good candidate for all-polymer FETs as its implementation

does not require additional preparation tools. In its performance

it results in an increase in the transconductance and enables a

reduction of operational voltages, accordingly. For films with

reasonable thickness, no hysteresis is found. This is the

prerequisite for transistor operation as a logic element.

For thinner films <1 Am, we found a hysteresis of the

flatband voltage by probing condensator devices, indicating

the ferroelectric influence of polarization charges. This opens

opportunities for memory applications, even for organic

devices.

References

[1] C. Drury, C. Mutsaers, C. Hart, M. Matters, D. de Leuw, Appl. Phys. Lett.

73 (1998) 108.

[2] C. Sheraw, L. Zhou, J.R. Huang, D.J. Gundlach, T.N. Jackson, M.G.

Kane, I.G. Hill, M.S. Hammond, J. Campi, B.K. Greening, J. Francl, J.

West, Appl. Phys. Lett. 80 (2002) 1088.

[3] H.E. Huitema, G.H. Gelinck, J.B. van der Putten, K.E. Kuijk, C.M. Hart,

E. Cantatore, P.T. Herwig, A.J. van Breemen, D.M. de Leeuw, Nature 414

(2001) 599.

[4] C. Bartic, A. Campitelli, G. Borghs, Appl. Phys. Lett. 82 (2003) 475.

[5] B.K. Crone, A. Dodabalapur, R. Sarpeshkar, A. Gelperin, H.E. Katz, Z.

Bao, J. Appl. Phys. 91 (2001) 10140.

[6] K. Muller, W. Bar, K. Henkel, A. Jahnke, C. Schwiertz, D. Schmeißer,

Tech. Mess. 70/12 (2003) 565.

[7] W. Clemens, SPIE Annual Meeting, San Diego, 2003.

[8] W. Fix, A. Ullmann, J. Ficker, W. Clemens, Appl. Phys. Lett. 81 (2002)

1735.

[9] G. Horowitz, X. Peng, D. Fichou, F. Garnier, J. Appl. Phys. 67 (1990)

528.

[10] M. Halik, H. Klauk, U. Zschieschang, G. Schmid, W. Radlik, W. Weber,

Adv. Mater. 14 (2002) 1717.

[11] J. Collet, D. Vuillaume, Appl. Phys. Lett. 73 (1998) 2681.

[12] M. Halik, H. Klauk, U. Zschieschang, G. Schmid, C. Dehm, M. Schutz, S.

Maisch, F. Effenberger, M. Brunnbauer, F. Stellacci, Nature 431 (2004)

963.

[13] G. Wang, D. Moses, A. Heeger, J. Appl. Phys. 95 (2004) 316.

[14] C. Bartic, J. Jansen, A. Campitelli, S. Borgs, Org. Electron. 3 (2002) 65.

[15] S. Han, X. Liu, J.P. Han, C. Zhou, J. Appl. Phys. 77 (2003) 873.

[16] T. Reece, S. Ducharme, A. Sorokin, M. Poulsen, Appl. Phys. Lett. 82

(2003) 142.

[17] Q. Zhang, V. Barthi, X. Zhao, Science 280 (1998) 2101.

[18] K. Narayanan, Unni, R. de Bettignies, Appl. Phys. Lett. 85 (2004) 1823.

[19] R. Naber, C. Tanase, P. Blom, G. Gelinck, A. Marsman, F. Touwslager, S.

Setayesh, D. de Leeuw, Nat. Mater. 4 (2005) 243.

[20] J. Glatz-Reichenbach, F. Epple, K. Dransfeld, Ferroelectrics 127 (1992)

13.

[21] Azom, datasheet, www.azom.com/details.asp?ArticleID=786.

[22] T. Furukawa, Phase Transit. 18 (1989) 143.

[23] K. Muller, I. Paloumpa, K. Henkel, D. Schmeißer, Appl. Phys. Lett. 98

(2005) 056104.

[24] S.M. Sze, Physics of Semiconductor Devices, Wiley & Sons, New York,

2000.