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OPERATING SYSTEMS
MEMORY MANAGEMENT
2
What Is In This Chapter?
Just as processes share the CPU, they also share
physical memory. This chapter is about
mechanisms for doing that sharing.
OPERATING SYSTEM
Memory Management
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MEMORY MANAGEMENTJust as processes share the CPU, they also share physical memory. This section is aboutmechanisms for doing that sharing.
EXAMPLE OF MEMORY USAGE:
Calculation of an effective address
Fetch from instruction
Use index offset
Example: ( Here index is a pointer to an address )
loop:
load register, index
add 42, register
store register, index
inc index
skip_equal index, final_address
branch loop
... continue ....
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MEMORY
MANAGEMENT
• The concept of a logical address space that is bound to a separate
physical address space is central to proper memory management.
• Logical address – generated by the CPU; also referred to as virtual
address
• Physical address – address seen by the memory unit
• Logical and physical addresses are the same in compile-time and load-
time address-binding schemes; logical (virtual) and physical addresses
differ in execution-time address-binding scheme
Definitions
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5
MEMORY
MANAGEMENTRelocatable Means that the program image can reside anywhere in physical memory.
Binding Programs need real memory in which to reside. When is the location of that
real memory determined?
• This is called mapping logical to physical addresses.
• This binding can be done at compile/link time. Converts symbolic to
relocatable. Data used within compiled source is offset within object
module.
Compiler: If it’s known where the program will reside, then absolute code is generated.
Otherwise compiler produces relocatable code.
Load: Binds relocatable to physical. Can find best physical location.
Execution: The code can be moved around during execution. Means flexible virtual
mapping.
Definitions
6
4 void main()
5 {
6 printf( "Hello, from main\n" );
7 b();
8 }
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11 voidb()
12 {
13 printf( "Hello, from 'b'\n" );
14 }
MEMORY
MANAGEMENTBinding Logical To Physical
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7
MEMORY
MANAGEMENTSource
Object
Executable
In-memory Image
Compiler
Linker
Other Objects
LibrariesLoader
Binding Logical To Physical
This binding can be done at compile/link
time. Converts symbolic to relocatable.
Data used within compiled source is offset
within object module.
Can be done at load time.
Binds relocatable to physical.
Can be done at run time.
Implies that the code can be
moved around during
execution.
The next example shows how a compiler
and linker actually determine the locations
of these effective addresses.
Address Binding
• Compile Time
• maybe absolute binding (.com)
• Link Time
• dynamic or static libraries
• Load Time
• relocatable code
• Run Time
• relocatable memory segments
• overlays
• paging
Source
Object
RAM
Binary
Compile
Load
Load
Module
Link
Run
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Dynamic loading
+ Routine is not loaded until it is called
+ Better memory-space utilization; unused routine is never loaded.
+ Useful when large amounts of code are needed to handle infrequently occurring cases.
+ No special support from the OS is required - implemented through program design.
Dynamic Linking
+ Linking postponed until execution time.
+ Small piece of code, stub, used to locate the appropriate memory-resident library routine.
+ Stub replaces itself with the address of the routine, and executes the routine.
+ Operating system needed to check if routine is in processes’ memory address.
+ Dynamic linking is particularly useful for libraries.
Memory Management Performs the above operations. Usually requires hardware
support.
MEMORY
MANAGEMENTMore Definitions
Normal Linking and LoadingPrintf.c
Printf.o
Static
Library
gcc
ar
a.out
Linker
Memory
Main.c
gcc
Main.o
Loader
X Window code:
- 500K minimum
- 450K libraries
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6
Load Time Dynamic Linking
Printf.c
Printf.o
Dynamic
Library
gcc
ar
a.out
Linker
Memory
Main.c
gcc
Main.o
Loader
• Save disk space.
• Libraries move?
• Moving code?
• Library versions?
• Load time still the same.
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Run-Time Dynamic Linking
Printf.c
Printf.o
Dynamic
Library
gcc
ar
a.out
Linker
Memory
Main.c
gcc
Main.o
Loader
Save disk space.
Startup fast.
Might not need all.
Run-time
Loader
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Design Technique: Static vs.
Dynamic• Static solutions
• compute ahead of time
• for predictable situations
• Dynamic solutions
• compute when needed
• for unpredictable situations
• Some situations use dynamic because static too restrictive (malloc)
• ex: memory allocation, type checking
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Logical vs. Physical
Addresses• Compile-Time + Load Time addresses
same
• Run time addresses different
CPU
Relocation
Register
+
14000
MMU
Logical
Address
346
Physical
AddressMemory
14346
• User goes from 0 to max
• Physical goes from R+0 to R+max 14
8
Relocatable Code Basics• Allow logical addresses
• Protect other processes
CPU
Limit Reg
<
error
no
Reloc Reg
+yes
physical
address
Memory
• Addresses must be contiguous!
MMU
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Multiprocessing w/Fixed
Partitions
OS
Partition 1
Partition 2
Partition 3
Partition 4
200k
300k
500k
900k
OS
Partition 1
Partition 2
Partition 3
Partition 4
(a) (b)
• Unequal queues • Waste large partition
• Skip small jobs
Simple!
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MEMORY
MANAGEMENTBARE MACHINE:
No protection, no utilities, no overhead.
This is the simplest form of memory management.
Used by hardware diagnostics, by system boot code, real time/dedicated systems.
logical == physical
User can have complete control. Commensurably, the operating system has none.
DEFINITION OF PARTITIONS:
Division of physical memory into fixed sized regions. (Allows addresses spaces to bedistinct = one user can't muck with another user, or the system.)
The number of partitions determines the level of multiprogramming. Partition is givento a process when it's scheduled.
Protection around each partition determined by
bounds ( upper, lower )
base / limit.
These limits are done in hardware.
SINGLE PARTITION
ALLOCATION
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MEMORY
MANAGEMENT
RESIDENT MONITOR:
Primitive Operating System.
Usually in low memory where interrupt vectors are placed.
Must check each memory reference against fence ( fixed or variable ) in hardware orregister. If user generated address < fence, then illegal.
User program starts at fence -> fixed for duration of execution. Then user code hasfence address built in. But only works for static-sized monitor.
If monitor can change in size, start user at high end and move back, OR use fence asbase register that requires address binding at execution time. Add base register toevery generated user address.
Isolate user from physical address space using logical address space.
Concept of "mapping addresses” shown on next slide.
SINGLE PARTITION
ALLOCATION
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MEMORY
MANAGEMENTSINGLE PARTITION
ALLOCATION
CPU
MEMORY
Limit
Register
Relocation
Register
+<
NoLogical
Address
Yes
Physical
Address
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JOB SCHEDULING
Must take into account who wants to run, the memory needs, and partition
availability. (This is a combination of short/medium term scheduling.)
Sequence of events:
In an empty memory slot, load a program
THEN it can compete for CPU time.
Upon job completion, the partition becomes available.
Can determine memory size required ( either user specified or
"automatically" ).
CONTIGUOUS
ALLOCATION
MEMORY
MANAGEMENT
All pages for a process are
allocated together in one
chunk.
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DYNAMIC STORAGE
(Variable sized holes in memory allocated on need.)
Operating System keeps table of this memory - space allocated based ontable.
Adjacent freed space merged to get largest holes - buddy system.
ALLOCATION PRODUCES HOLES
OS
process 1
process 2
process 3
OS
process 1
process 3
Process 2
Terminates
OS
process 1
process 3
Process 4
Starts
process 4
CONTIGUOUS
ALLOCATIONMEMORY
MANAGEMENT
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HOW DO YOU ALLOCATE MEMORY TO NEW PROCESSES?
First fit - allocate the first hole that's big enough.
Best fit - allocate smallest hole that's big enough.
Worst fit - allocate largest hole.
(First fit is fastest, worst fit has lowest memory utilization.)
Avoid small holes (external fragmentation). This occurs when there aremany small pieces of free memory.
What should be the minimum size allocated, allocated in what chunk size?
Want to also avoid internal fragmentation. This is when memory ishanded out in some fixed way (power of 2 for instance) and requestingprogram doesn't use it all.
CONTIGUOUS
ALLOCATIONMEMORY
MANAGEMENT
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If a job doesn't fit in memory, the scheduler can
wait for memory
skip to next job and see if it fits.
What are the pros and cons of each of these?
There's little or no internal fragmentation (the process uses the memory given to it -
the size given to it will be a page.)
But there can be a great deal of external fragmentation. This is because the
memory is constantly being handed cycled between the process and free.
LONG TERM
SCHEDULING
MEMORY
MANAGEMENT
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Trying to move free memory to one large block.
Only possible if programs linked with dynamic relocation (base and limit.)
There are many ways to move programs in memory.
Swapping: if using static relocation, code/data must return to same place.But if dynamic, can reenter at more advantageous memory.
COMPACTION
OS
P1
P3
P2
OS
P1
P3
P2
OS
P1
P3
P2
MEMORY MANAGEMENT
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Analysis of External
Fragmentation
• Assume:
• system at equilibrium
• process in middle
• if N processes, 1/2 time process, 1/2 hole• ==> 1/2 N holes!
• Fifty-percent rule
• Fundamental:• adjacent holes combined
• adjacent processes not combined
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Cost of Compaction
process 2
process 3
process 8
50k
100k
90k
60k
process 1 process 1
process 2
process 3
process 8
• 2 GB RAM, 10 nsec/access (cycle time)
5 seconds to compact!
• Disk much slower! 26
14
Solution?
• Want to minimize external
fragmentation
• Large Blocks
• But internal fragmentation!
• Tradeoff
• Sacrifice some internal fragmentation for
reduced external fragmentation
• Paging
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Paging
• Logical address space noncontiguous;
process gets memory wherever
available
• Divide physical memory into fixed-size
blocks
• size is a power of 2, between 512 and 8192
bytes
• called Frames
• Divide logical memory into bocks of same
size
• called Pages28
15
Paging• Address generated by CPU divided into:
• Page number (p) - index to page table
• page table contains base address of each page
in physical memory (frame)
• Page offset (d) - offset into page/frame
CPU p d
page table
f
f d
physical
memory
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Paging Example
Page 0
• Page size 4 bytes
• Memory size 32 bytes (8 pages)
Page 1
Page 2
Page 3
1
4
3
7
0
1
2
3
Page TableLogical
Memory
Page 1
Page 3
Physical
Memory
Page 0
Page 2
0
1
2
3
4
5
6
7
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Paging ExampleP
age
0P
age
1P
age
2P
age
3
01
11
00
10
00
01
10
11
Page Table
Logical
Memory
000
001
010
011
100
101
110
111
Physical
Memory
000
001
010
011
100
101
110
111
0 0 1 0 1 1
Page
Offset
Frame
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Paging Hardware
page number
p
page offset
d
• address space 2m
• page offset 2n
• page number 2m-n
m-n n
• note: not losing any bytes!
phsical
memory
2m bytes
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Paging Example
• Consider:
• Physical memory = 128 bytes
• Physical address space = 8 frames
• How many bits in an address?
• How many bits for page number?
• How many bits for page offset?
• Can a logical address space have only 2 pages? How big would the page table be?
33
Another Paging Example
• Consider:• 8 bits in an address
• 3 bits for the frame/page number
• How many bytes (words) of physical memory?
• How many frames are there?
• How many bytes is a page?
• How many bits for page offset?
• If a process’ page table is 12 bits, how many logical pages does it have?
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Page Table Example
1
4
0
1
Page Table
Page 0
Page 1
Process A
Page 1A
Page 1B
Physical
Memory
Page 0A
Page 0B
0
1
2
3
4
5
6
7
Page 0
Page 1
Process B
3
7
0
1
Page Table
page number
p
page offset
d
m-n=3 n=4
b=7
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Paging Tradeoffs
• Advantages
• no external fragmentation (no compaction)
• relocation (now pages, before were processes)
• Disadvantages
• internal fragmentation• consider: 2048 byte pages, 72,766 byte proc
– 35 pages + 1086 bytes = 962 bytes
• avg: 1/2 page per process
• small pages!
• overhead • page table / process (context switch + space)
• lookup (especially if page to disk) 36
19
Implementation of Page Table
• Page table kept in registers
• Fast!
• Only good when number of frames is small
• Expensive!Registers
Memory
Disk
37
Implementation of Page Table
• Page table kept in main memory
• Page Table Base Register (PTBR)
Page 0
Page 1
1
4
0
1
Page TableLogical
Memory
Page 1
Physical
Memory
Page 0
0
1
2
3
1 4
PTBR
• Page Table Length
• Two memory accesses per data/inst
access.
– Solution? Associative Registers
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• Logical address space of a process can be noncontiguous; process is
allocated physical memory whenever that memory is available and the
program needs it.
• Divide physical memory into fixed-sized blocks called frames (size is
power of 2, between 512 bytes and 8192 bytes).
• Divide logical memory into blocks of same size called pages.
• Keep track of all free frames.
• To run a program of size n pages, need to find n free frames and load
program.
• Set up a page table to translate logical to physical addresses.
• Internal fragmentation.
PAGINGMEMORY MANAGEMENTNew Concept!!
40
Address Translation Scheme
Address generated by the CPU is divided into:
• Page number (p) – used as an index into a page table which
contains base address of each page in physical memory.
• Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit.
PAGINGMEMORY MANAGEMENT
4096 bytes = 2^12 – it requires 12 bits to contain the Page offset
dp
21
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Permits a program's memory to be physically noncontiguous so it can be allocatedfrom wherever available. This avoids fragmentation and compaction.
PAGING
HARDWARE
An address is determined by:
page number ( index into table ) + offset
---> mapping into --->
base address ( from table ) + offset.
Frames = physical blocksPages = logical blocks
Size of frames/pages is defined by hardware (power of 2 to ease calculations)
MEMORY MANAGEMENT
42
Paging Example - 32-byte memory with 4-byte pages
MEMORY MANAGEMENTPAGING
0 a
1 b
2 c
3 d
4 e
5 f
6 g
7 h
8 I
9 j
10 k
11 l
12 m
13 n
14 o
15 p
0 5
1 6
2 1
3 2
Page Table
Logical Memory
0
4 I
j
k
l
8 m
n
o
p
12
16
20 a
b
c
d
24 e
f
g
h
28
Physical Memory
22
43
• A 32 bit machine canaddress 4 gigabytes whichis 4 million pages (at 1024bytes/page). WHO sayshow big a page is, anyway?
• Could use dedicatedregisters (OK only withsmall tables.)
• Could use a registerpointing to table in memory(slow access.)
• Cache or associativememory
• (TLB = TranslationLookaside Buffer):
• simultaneous search is fastand uses only a fewregisters.
MEMORY MANAGEMENT PAGING
IMPLEMENTATION OF THE PAGE TABLE
TLB = Translation Lookaside Buffer
Associative Registers
CPU
p d
page table
f
f d
physical
memory
page
number
frame
number
associative
registers
miss
hit
logical
address
physical
address
10-20% mem time
(Intel P3 has 32 entries)
(Intel P4 has 128 entries)
Also called Translation
Lookaside Buffer (TLB)44
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IMPLEMENTATION OF THE PAGE TABLE
Issues include:
key and value
hit rate 90 - 98% with 100 registers
add entry if not found
Effective access time = %fast * time_fast + %slow * time_slow
Relevant times:
2 nanoseconds to search associative memory – the TLB.
20 nanoseconds to access processor cache and bring it into TLB for next time.
Calculate time of access:
hit = 1 search + 1 memory reference
miss = 1 search + 1 mem reference(of page table) + 1 mem reference.
MEMORY MANAGEMENT PAGING
46
SHARED PAGES
Data occupying onephysical page, butpointed to by multiplelogical pages.
Useful for common code -must be write protected.(NO write-able datamixed with code.)
Extremely useful forread/write communicationbetween processes.
MEMORY MANAGEMENT PAGING
24
Large Address Spaces
• Typical logical address spaces: • 4 Gbytes => 232 address bits (4-byte address)
• Typical page size: • 4 Kbytes = 212 bits
• Page table may have: • 232 / 212 = 220 = 1million entries
• Each entry 3 bytes => 3MB per process!
• Do not want that all in RAM
• Solution? Page the page table• Multilevel paging
47
Multilevel Paging
Page 0
...
...
...
Outer Page
Table
Logical
Memory
...
...
Page Table
...
page number
p1
page offset
d
10 12
p2
10
48
25
Multilevel Paging Translationpage number
p1
page offset
dp2
outer page
tableinner page
table
desired
page
d
p2
p1
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MEMORY MANAGEMENT PAGING
Hierarchical paging
Reduce the number ofentries in the page table.
Page table is paged.
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INVERTED PAGE TABLE:
One entry for each real page ofmemory.
Entry consists of the virtualaddress of the page stored in thatreal memory location, withinformation about the process thatowns that page.
Essential when you need to dowork on the page and must findout what process owns it.
MEMORY MANAGEMENT PAGING
Inverted Page Table
• Page table maps to physical addresses
CPU pid dp
searc
h
pid p
i
i d
Physical
Memory
• Still need page per process --> backing
store
• Memory accesses longer! (search +
swap)
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PROTECTION:
•Bits associated with page tables.
•Can have read, write, execute, valid bits.
•Valid bit says page isn’t in address space.
•Write to a write-protected page causes a fault. Touching an invalid page causes a fault.
ADDRESS MAPPING:
•Allows physical memory larger than logical memory.
•Useful on 32 bit machines with more than 32-bit addressable words of memory.
•The operating system keeps a frame containing descriptions of physical pages; if allocated, thento which logical page in which process.
MEMORY MANAGEMENT PAGING
54
MULTILEVEL PAGE TABLE
A means of using page tablesfor large address spaces.
MEMORY MANAGEMENT PAGING
28
Memory View
• Paging lost users’ view of memory
• Need “logical” memory units that grow and contract
subroutine
stack
symbol table
main
• Solution? • Segmentation!
ex: stack,
shared library
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USER'S VIEW OF MEMORY
A programmer views a process consisting of unordered segments with variouspurposes. This view is more useful than thinking of a linear array of words. Wereally don't care at what address a segment is located.
Typical segments include
global variables
procedure call stack
code for each function
local variables for each
large data structures
Logical address = segment name ( number ) + offset
Memory is addressed by both segment and offset.
MEMORY MANAGEMENT Segmentation
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MEMORY MANAGEMENT Segmentation
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MEMORY MANAGEMENT Segmentation
Segmentation is a memory management scheme that supports user’s view of thememory.
A logical address space is a collection of segments.
Each segment has a name and a length.
In paging – logical address is partitioned into a page number and offset by H/W.Paging does not reflect logical structure of a process. Segments corresponds tological divisions of the process.
The compiler automatically constructs segments reflecting the input program. A Ccompiler can create separate segments for the following:
1. The code,
2. Global variables
3. Stacks used by each thread
4. Standard C library
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HARDWARE -- Must map a dyad (segment / offset) into one-dimensional address.
MEMORY MANAGEMENT
CPU
MEMORY
Limit Base
+<
No
Logical
Address Yes
Physical
Address
Segment Table
S D
Segmentation
Segmentation
CPU
s dlogical
address
limit base
<
error
no
+
yesphysical
address
physical
memory
main
stack
(“Er, what have we gained?”)
Paged segments!
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61
HARDWARE
base / limit pairs in a segment table.
MEMORY MANAGEMENT
1
3
2
4
1
4
2
3
Logical Address Space Physical Memory
0
1
2
3
4
Limit
1000
400
400
1100
1000
Base
1400
6300
4300
3200
4700
0
Segmentation
62
PROTECTION AND SHARING
Addresses are associated with a logicalunit (like data, code, etc.) so protection iseasy.
Can do bounds checking on arrays
Sharing specified at a logical level, asegment has an attribute called"shareable".
Can share some code but not all - forinstance a common library of subroutines.
MEMORY MANAGEMENT
FRAGMENTATION
Use variable allocation sincesegment lengths vary.
Again have issue of fragmentation;Smaller segments means lessfragmentation. Can use compactionsince segments are relocatable.
Segmentation
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MEMORY MANAGEMENT Segmentation
64
MEMORY MANAGEMENT Combined paging
and segmentationSegments are divided into fixed lengthpages.
Segment A: Page 1
Page 2
Page 3
Segment B: Page 1
Page 2
Segment C: Page 1
Page 2
Page 3
Page 4
A3
A2
B1
C3
Segments of one process
Real memory
33
65
MEMORY MANAGEMENT Combined paging
and segmentation
Segment s page p Displacement d
Segment table
for process
page table for
segment
Frame number displacement
66
PAGED SEGMENTATION
Combination of paging andsegmentation.
address =
frame at ( page table base for segment
+ offset into page table )
+ offset into memory
Look at example of Intel architecture.
MEMORY MANAGEMENT Segmentation
34
67
We’ve looked at how to do paging - associating logical with physical memory.
This subject is at the very heart of what every operating system must do today.
MEMORY MANAGEMENT
WRAPUP
