On the Hardness of Graph Isomorphism

Jacobo Torán SIAM J. Comput. Vol 33, p1093-1108, 2004.

Presenter:

Qingwu Yang

April, 2006

Graph isomorphism (GI)

• A graph isomorphism is a bijection, i.e., a one-to-one mapping, between the vertices of two graphs G and H:

with the property that any two vertices u and v from G are adjacent if and only if f(u) and f(v) are adjacent in H.

• If an isomorphism can be constructed between two graphs, then we say those graphs are isomorphic.

• Determining whether two graphs are isomorphic is the graph isomorphism problem.

(From Wikipedia, the free encyclopedia)

Example

• f(a) = 1• f(b) = 6• f(c) = 8• f(d) = 3

• f(g) = 5• f(h) = 2• f(i) = 4• f(j) = 7

(From Wikipedia, the free encyclopedia)

Why is GI interesting?

• Many applications

• One of the few problems in NP that has resisted all attempts to be classified as NP-complete, or within P.

• Graph isomorphism complete complexity class.

• The best existing upper bound for GI is

• Polynomial time algorithms for restricted graph classes, such as planar graphs or graphs of bounded degree.

Graph Automorphism

• An automorphism in an undirected graph G = (V,E) is a permutation ϕ of the nodes that preserves adjacency. That is, for every u, v V, (u, v) E ⇔ (ϕ(u), ϕ(v)) E.∈ ∈ ∈

http://mathworld.wolfram.com/GraphAutomorphism.html

For example, the grid graph has four automorphisms: (1, 2, 3, 4, 5, 6), (2, 1, 4, 3, 6, 5), (5, 6, 3, 4, 1, 2), and (6, 5, 4, 3, 2, 1).

An example of Graph Automorphism

http://mathworld.wolfram.com/GraphAutomorphism.html

Logarithmic space modular counting class -- ModkL Class

• Functions f: there is a nondeterministic polynomial time Turing machine which, on input x, has exactly f(x) accepting computation paths.

• ModkL is the complexity class corresponding to sets recognized by nondeterministic logarithmic space machines such that x ModkL iff f(x) 0 (mod k) for every natural number k.

AC0 Class and AC0 many-one reductions

• AC0 Class: class of problems solvable by a uniform family of Boolean circuits of polynomial size and constant depth with unbounded fan-in AND- and OR- gates, and NOT gates.

• AC0 many-one reductions from function f to function g: if there is a uniform AC0 family of circuits such that f(x) = g((x)) for every input x.

GI is hard for all the logarithmic space modular counting classes ModkL (k≥2)

Main idea:

• simulate each modular gate with a graph gadget • then combine the gadgets for the different gates into a

graph, whose automorphisms simulate the behavior of the modular circuit.

How to generate graph gadgets?

The graph G2 simulating a parity gate(k = 2 )

Properties of graph gadgets

• The graph gadget for a modular gate has nodes encoding the inputs and outputs of the gate.

• Any automorphism in the graph mapping the input nodes in a certain way must map the output nodes according to the value of the modular gate being simulated.

• Next we prove ϕ is an automorphism, for all v,w, (v,w) E ∈ if and only if (ϕ(v), ϕ(w)) E∈ .

• The nodes in graph Gk can be partitioned in three layers, the x and y nodes (input layer), the u nodes, and the z nodes (output layer).

Proof

• Let k ≥ 2. We reduce the modk circuit value problem to GI.

• We transform an instance C of the circuit value problem for modk circuits into a graph GC by constructing for every modular gate gj of C a graph gadget.

• Moreover, we color the x, y, u, and z nodes of the jth gadget, respectively, with one of the colors (x, j), (y, j), (u, j), and (z, j). The coloring implies that in any automorphism the nodes corresponding to a gate are mapped to nodes from the same gate.

Proof• Connections between gates are translated in the following way:

If the output z of a gate in the circuit is connected to one of the inputs x of another gate, the reduction puts k additional edges connecting (for i {∈ 0, . . . , k − 1}) node zi from the first gate to node xi from the second gate.

• For an input variable vj , k nodes vj0, . . . , vj

k−1 are considered in the reduction.

• Suppose the input variables of the circuit, v1,…,vn, take values a1,…,an. The output gate z takes value b {∈ 0,…,k−1} if and only if there is an automorphism in GC mapping

for all i = 0,…,k−1 and j = 1,…,n, and mapping zi to

Proof

• All the steps in the reduction can be done locally by an AC0 circuit.

• The question of whether the output of the circuit equals b {∈ 0,…,k−1} can be easily reduced to whether two graphs Gb,Gb

’ are

isomorphic. • This question can be reduced to two graphs pairs ((G,H), (I, J))

∈ PGI, with G being isomorphic to H if the value of the circuit is b, and I being isomorphic to J otherwise. For this it suffices to define G as Gb, H as Gb, and I and J as the standard OR-function for GI of i=b(Gi,Gi).

Homework

• The undirected graph accessibility problem is: given an undirected graph G and two vertices u, vG, determine whether there is a path from u to v.

• Show that the undirected graph accessibility problem is reducible to the complement of GI.