NUST Syllabus for DLD

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  • 8/13/2019 NUST Syllabus for DLD

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    B.E(Electrical)-unified curricula 2012

    EE 221Digital Logic Design 1 PN Engineering College

    Required Course EE-221 Digital Logic DesignCatalog Description: Credit Hours: 3-1.

    Basic concepts and tools to design digital circuits consisting of both combinational and sequential logic circuits,Number Systems, Boolean Algebra, Logic Gates, Combinational logic circuits, Sequential logic circuits, , Memory

    Devices, Programmable Logic Devices, use of simulation software.

    Prerequisite: Nil

    Co-requisite: Nil

    Text Books: 1. Digital Fundamentals by Thomas L Floyd , 10th Ed.,Pearson

    2. Digital Principles and Applications by Leach & Malvino ,5th Ed., McGraw Hill

    Reference Books: 1. Digital Electronics Principles &Applications by Roger Tokheim ,7thEd., Mc Graw

    Hill

    Course Objectives: The objective of this course is to create understanding of the basic concepts and tools to design

    and develop digital circuit, consisting of both combinational and sequential circuits. Specific objectives are to help

    student learn:

    1. Building blocks of Digital circuits.2. Number systems..3. Boolean laws and the methods used for designing and simplifying logic circuits.4. Multiplexing and Demultiplexing circuits.5. Latches and Flip Flops.6. Counters and Registers7. Encoding and Decoding circuits.8. Fundamental Arithmetic circuits.9. Different types of Memory devices and PLDs.Course Outcomes: After completion of this course students should be able to:

    1. Fully understand fundamental logic circuits.2. Gain knowledge to design digital circuits.3. Gain sufficient knowledge to simplify a complex logic design.4. Acquire sufficient knowledge of memory and programmable logic devices.5. Design and develop digital hardware.

    Topics: Week

    1. Introduction to Digital Electronics and the Logic Gates. 1

    2. Number Systems: Binary, Hexadecimal and Octal Numbers 23. De Morgans Theorems, Boolean Laws 3

    4. SOP, POS methods, Nand-Nand Logic 4,5

    5. Karnaugh Map Method, Multiplexer, DeMultiplexer 6,76. Latches and Flip Flops: RS latch, D Latch, JK flip flop, Master-Slave flip flop 8,9

    7. Counters: Synchronous and Asynchronous Binary counters, Modulus counter 10

    8. Shift Registers: Serial and Parallel Shift registers, Shift Register Ring counter 11

    9. Encoders and Decoders: Priority Encoder, Decoder driver, Seven segment display 1210. Arithmetic Circuits: Half and Full Adders, 2s complement Adder/Subtracor 13

    11. Memory Devices: Types of RAMs and ROMS 14

    12. Programmable Logic Devices : Introduction to SPLD, CPLD, FPGA 15

    Lab Work:

    The course is accompanied by a series of supervised laboratory assignments on topics in the course outline.

    Laboratory Topics: Week1. Digital ICs recognition and testing. 1

    2. Verification of the Logic Functions of Gates. 2

  • 8/13/2019 NUST Syllabus for DLD

    2/2

    B.E(Electrical)-unified curricula 2012

    EE 221Digital Logic Design 2 PN Engineering College

    3. Multiplexer and Demultiplexer 34. Latches and Flip Flops 4,5

    5. Counters 6,7

    6. Shift Register 87. Decoder and Seven segment display 9

    8. Adder/ Subtractor 10

    9. Digital circuit designing and simulation 11,12

    10. Mini Project 13-15

    Evaluation Methods:

    Theory: Quizzes, assignments, three exams, and one final exam.

    Quiz 10%

    Assignment 10%Tests 30%

    Final 50%

    Laboratory grade will be separate from the course grade and based on weekly performance in the lab.

    Lab: Lab work 70%

    Exam 30%