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UNXTIDEVICUSANDBUSESF@RDEVICESNETUFORK

2.1 INPUT AND OUTPUT DEVICEJ nputand output devicesareessentialor all kindsof systems.r An Embedded ystem onnectso extemal evicesike printer,multiline displayunit,keypad r modem hroughports.A deviceconnectsand accessesfom and to the systemprocessorhrougheithera parallelor serial /O port.

A deviceportmay be ull duplexor halfduplex.Eachporthasanassigned ort address.2.1.1Types of Input and Output DevicesInput and output devicescanbe classified nto the following I/Otypes.

i Synchronous erial /O devicesii Serial UART /O devicesiii Parallel Port I/O devices

Synchronous erial /O devicesSynchronousSerial communieations definedas a Byte or aFrameof data s transmitted r receivedat constant ime intervalswith uniform phasedifferences.o Synchronous erial nputDevices. Synchronous erialOutputDevices


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SerialInputPort

SERUL NPUT

SERAL OWPWSerialUART/O devicesTheseiialUARTcommunicationa Frame of data is transmittedorintervals.(,(i,

InputBits

Clock (Optional)

Clock (Optional)

may be definedasa Byte orreceived at variable time

DevicesandBuses or DevicesNetwork 2.3Parallel Port I/O devicesIn this communication ny numberof portscouldbe connectedwith the device and the data communication s bidirectional innature.i. SingleBit Inputand Output

a. ParallelPortSingleBit Inputb. ParallelPortSingleBit Outputii. ParallelPort nput andOutput

a. ParallelPort nputb. ParallelPortOutput

2.1.2 Examples

nSerialOutput

AsynchrornusSerial UART nput DevicesAsynchronousSerial UARTOutputDevices

SerialOutputPort

VO Devices ExamplesSynchronous SerialInputDevices

AudioA/ideo Input Network Input,ScannernputSynchronous SerialOutputDevices Audio/VideoOutputNetworkOutput,TVRemoteControlOutput

.AsynchronouserialUART InputDevicesKeyboard,Mouse,Modem

AsynchronouserialUART OutputDevicesModem,Printer

Parallel Port SingleBit Input Completion of a rcvolution of a wheel.filling a liquid up to a fixed level.Parallet Port SingleBit Output Pulseso an ExtemalCircuitParallelPort nput ADC Input from a temperature ensor.Encoder inputs for bits for angularposition f rotating haft.ParallelPortOutput Multilane LCD Display Matrix, Printeror


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2.4 EmbeddedSystemsRobot stepperMotor coil driving outputbits.

Summaryo An embeddedsystem connects o external devices likekeypad,multi-linedisplayunit hrough orts.o A device connectsand accessesrom and to the systemprocessorhrougheitheraparallolor serialport.o The processoracoesseshe addresses n a memory-mapped /O.o A decoder akes he address us signalsas he input and. generatesa chip select signal,'for the port address

.selection.2.2 SYNCHRONOUS,NO-SYNCHRONOUSAND

ASYNCHRONOUS COMMUNICATIONSFROM SERIAL DEVICES.2.2.1 SynchronousIn thismeans f communication,yteor frameof data eceived rtransmitted at constant time intervals with uniform phasedifferences. its of a data ramearesent n a fixed maximum imeintervals. Handshakingbetween sender and receiver is notprovidedduringcommunication.

ExampleFrames entoverLAN.CharacteristicsThe main featuresof thesynchronous ommunication re

o Bytesmaintaina constantphasedifference.No sendingofbytesat random ime intervals.

DevicesandBuses or DevicesNetwork 2.5o A clock must be presentat transmiffer o send he data' .Moreover, the clock information is sent to the receiver(i.e.) t is not always mplicit o the eceiver.

CommunicationProtocolsusedo Most often synchronous erialcommunication s useil fordata s transmission etween hysicaldevices.o It canbe complexandhas o be asper the communicationprotocol ollowed.o Example.,HDLC (HighLevelDataLink Control)

SynchronizationwaysTen waysby which the synchronous ignalswith the clockinginfo transmitted rom transmitter o the receiver are as shownbelow.

Synohronization ays

SeparateClockPulsesAlongwiththe databits

DatabitsModulated rEncodedwithClockInformation

EmbeddedClocklnformationwith DataBitFramebeforeTransmitting

PISo | | stPo(Transmit)| | (Recevied) SynchronizationCodeBitsPrecedingsDataBit Frame(SyncCode)

Bi-SyncCodingI

MFM QAM Bi-PhaseManchester In betwoen.framesSignalingBits

FM


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2.6 Embedded2.2.2 Iso-SynchronousIso-synchronous ommunications a specialcaseof synchronouscommunication. n contrastwith the synchronous ommunicationwhere bits of data frame are sent in a fixed maximum timeinterval, the iso=synchronousommunicationmay have variedmaximum ime intervals.2.2.3 AsynchronousIn the asynchronous ommunication Byte or a Frameof data sreceivedor sentat variable ime intervalswith phase ifference.

The asynchronous ommunicationechnique s a transmissiontechniquewhich is most widely usedby personalcomputers oprovidi conneetivity o printer, modems ax machinesetc' Thisullo*r a sedesof bytgs o be sentalonga singlewire (actuallyagroundwire is required o completehecircuit)The data s sentas a'seriesof bits. A shift register(in either

hardwareor software) s used o serializeeach nformatiortbyteinto the seriesof bits which are hensenton thewire usingan I/Oport anda busdriver to connecto thecable'Characteristics

o ,Bytesor Framesof data s sentor receivedat variable imeintervals.o Handshakingbetween senderand receiver is providedduringcommunication.o A clock is needed t he ransmitter o send he data'o The clock data s not sent o the receiver i.e) it is always' implicit to thereceiver.

SummaryoSynchronous,iso.synchronousandasynchronousarethreewaysof communicationrom a device'o clock information s transmittedexplicitly or implicitly inSynchronous ommunication'

with the transmitter lock.

2.3 Examplesof Internal SerialCommunicationDevices

u CommonIISART like Device n 8051oTherewi l lbeacommonUSARTl ikehardwaredevicein805 .o USART - Universal Synchronousand Asynchronous.ReceiverandTransmitter'o It is alsocaliedasSI (Serial nterface)

Featuresi. SCON SavesControlandstatus lags n SIii. SFR SpecialFunctionRegisteriii. SBUF- SerialBufferSI Operatesn two modesi. Half DuplexSynchronous odeof operationii. Full DuplexAsynchronousmodeof operation

b. SPIand SCI:Setiul Peripheral nterface (SPlolthasfullduplexfeatureforasynchronouscommunicationolthasafeatureofprogrammableratesforclockbits.o lt.is also programmableor defining he -instance.ofhe

occurence oT negative and positive edges within anintervalsof bits.r Devicesselections alsoprograrmnable

Seial Communic tion Interface (SCo UART asynchronousSCDbaud atesaresameasSPIbutnot programmable.o Communications in full duPlex'


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2.8 EmbeddedSystemsA baud atecanbe selected mong32 possibleonesby thethree ate bits and wo prescaler its.T8 and R8 provide the inter processor UARTcommunicationwhen programmed ontrolsbits are in I Ibit format.

c. Common On-Chip SI (Serial Interface) in Intel80196o It is like USARTo Programmable atesregisterafter loading the 14 bits atBAUD_RATE twice.o No programmable nstancesof occurrencesof negativeand positive edgeswithin an intervaldT the serialoutdata.

Two modesof operationi. Half Duplex synchronous erial communicationii. Asynchronous erial communication

SummaryMicrocontrollershave nternaldevicespresent or dynchronous swell as asynchronous ART transmission nd reception.2,4 UART(Universal synchronouseceiverTransmitter)The Universal Asynchronous receiver Transmitter (UART)controller is the key componentof the serial communicatiotrsubsystemof a computer.The UART takes byes of data andtransmits the individual bits in a sequential ashion. At thedestination,a secondUART re-assembleshe bits into complexbytes.

Block diagramof the UniversalAsynchronousRe e ve /Transm e AA RT

2.4.1 Key Featureso Converts he bytes it receives rom the computer alongparallel ircuits nto a singleserialbit stream or outboundtransmission.o On inbound transmissionconverts he serial bit streaminto the bytes hat he computerhandles.

Adds a parity bit (if it's been selected)on outboundtransmission nd checks he parity of incoming bytes (ifselected) nd discardsheparitybit.Adds a startand stop delineators n outboundand stripsthem rom nboundransmissions.Handles ntemrpts rom the keyboardand mouse(whichareserialdeviceswith specialports)May handle othet kinds of intemrpt and devicemanagement hat require coordinating the computer'sspeed f operationwith devicespeeds.

Dlviies andBusesor Devices etwork


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2.10 Embeddedystems2.4.2 Types of U-ART

o UART - UniversalAsynchronousReceirrer ransmittero USART Universal SynchronousAsynchronousReceiverTransmitter

2.4.3 SynchronousSerialTransmissionSynchronousserial transmission equires that the sender andreceiver share a clock with one another, or that the senderprovidesa strobeor other iming signalso hat he receiverknowswhen o "read" the nextbit of the data.

A form of synchronousransmissions usedwith printersandfixed disk devices n that he data s senton oneset of wireswhilea clock or strobe s senton a different wire. Printersand fixeddisk devices are not normally serialdevicesbecausemost fixeddisk interfacestandards endan entireword of data or eachclockor strobesignal by usinga separate ire for eachbit of the word.2.4.4 Asynchronous Serial TransmissionAsynchronousransmission llows data o be transmittedwithoutthe sender aving o senda clock signal o the receiver. nstead,the sender and receiver must agree on timing parameters nadvanceand specialbits are added o eachword which is used osynchronizehe sending nd receivingunits.

. When a word is given to the UART for Asynchronoustransmissions, bit called the "Start Bit" is added o thebeginningof eachword that s to be ransmitted.o After the Start Bit, the individualbits of the word of dataare sent,with the LeastSignificant Bit (LSB) being sentfirst.r Eachbit in the transmission s trarrsmitted or exactly hesame amourfi of time as all of the other bits and thereceiver *looks" at the wire at approximately halfivaythrough the period assigned o each bit to deter.minef theb i t i s a l o r a 0 "

Devices ndBusesor Devices etwork 2 .1 1The sender oesnot know when he receiverhaS looked"at the value of the bit. The senderonly knows when theclock says o begin ransmittinghe nextbit of theword.When the entire data word hasbeensent, he transmittermay add aParityBit that he ransmittergenerates.The Parity Bit may be used by the receiver o pgrformsimple enor checking.Then at least one Stop Bit is sentbv thetransmitter.

When the receiverhas eceivedall of the bits in the dataword.It may check for the Parity Bits (both senderand receivermustagreeon whethera Parity Bit is to be used)and hen he receiverlooks for a StopBit. If the StopRit doesnot appearwhen it issupposed o the UART considers he entire word to be garbledand will report a Framing Error to the host processorwhen thedata word is read.The usualcauseof a Framing Error is that thesenderandreceiverclockswerenot running at the samespeed,orthat he signalwas ntemrpted.. Regardless f whether hat datawas receivedcorrectly or not,the UART automatically iscards he Start,Parityand Stopbits. Ifthe senderand receiverare configured dentically, hesebits arenotpassedo the host.2.4.5 Other UART FunctionsIn addition to the basic ob of convertingdata from parallel toserial for transmission nd from serial o parallel on reception,aUART will usuallyprovideadditionalcircuits for signals hatcanbe used o indicate he state of the transmissionmedia, and toregulate he flow of data n the event hat the remotedevice s notpreparcdo acceptmoredata.

For example,when the device connected o the UART is amodem, he modem may report thb presence f a carrier on thephone ine while the computermay be able o instruct he modemto reset tself or to not take calls by raisingor loweringonemoreof theseextra signals.


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2.10 Embedded ystems2.4.2 Typesof UART

. UART - UniversalAsynchronousReceirrer ransmittero USART Universal SynchronousAsynchronousReceivsrTransmitter

2.4.3 Synchronous Serial TransmissionSynchronousserial transmission equires that the sender andreceiver share a clock with one another, or that the senderprovidesa strobeor other iming signalso hat the receiverknowswhen o "readnthe nextbit of the data.

A form of synchronousransmissions usedwith printersandfixed disk devices n that he data s senton one setof wires whilea clock or strobe s sent on a different wire. Printersand fixeddisk devices are not normally serialdevicesbecausemost fixeddisk interfacestandards endan entireword of data or eachclockor strobesignalby usinga separate ire for eachbit of the word.2.4.4 AsynchronousSerialTransmissionAsynchronous ransmission llows data o be transmittedwithoutthe sender aving o senda clock signal o the"receiver.nstead,the sender and receiver must agree on timing parameters nadvance nd specialbits are added o eachword which is used osynchronizehe sending nd eceivingunits.

o When a word is given to the UART for Asynchronoustransmissions, bit called the "Start Bit" is added o thebeginningof eachword that s to be ransmitted.After the StarJBit, the individualbits of the word of dataare sent,with the LeastSignificant Bit (LSB) being sentfirst.Each bit in the transmission s transrnitted or exactly hesame amount of time as all of the other bits and therceiver "lookd' at the wire at approximatelyhalfivaythrough he pciod assignod'to achbit to determine f theb i t i s a l o r a 0 -

DevicesandBuses or DevicesNetwork 2 . t lThe sender oesnot know when he receiverhaS looked"at the value of the bit. The senderonly knows when theclock says o begin ransmittinghenext bit of theword.When the entire dataword has beensent, he transmittermay adda ParityBit that he ransmittergenerates.The Parity Bit may be usedby the receiver o performsimple enor checking.Then at least one StopBit is sentby the transmitter.

When he receiverhas eceivedall of the bits in the dataword.It may check for the Parity Bits (both senderand receivermustagreeon whethera Parity Bit is to be used)and hen he receiverlooks for a StopBit. If the StopBit doesnot appearwhen it issupposedo the UART considershe entire word to be garbledand will report a Framing Error to the host processorwhen thedataword is read.The usualcauseof a FramingError is that thesender ndreceiverclockswere not runningat the samespeed, rthat he signalwas ntemrPted.. Regardless f whether hat datawas receivedcorrectlyor not,theUART automatically iscardsheStart,ParityandStopbits. Ifthe senderand receiverare configured dentically, hesebits arenotpassedo thehost.

2.4.5 Other UART X'unctionsIn addition to the basic ob of convertingdata from parallel toserial for transmission nd from serial o parallel on reception,aUART will usuallyprovideadditionalcircuits for signals hat canbe usedto indicate he stateof the transmissionmedia, and toregulate he flow of data n the event hat the remotedevice is notprepared o acceptmoredata.

For example,when the deviceconnected o the UART is amodem, the modem may report thb presenceof a carrier on thephone ine while thecomputermaybeable o instruct he modemto reset tself or to not take callsby raisingor loweringonemoreof theseextra signals.


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2.12 Embedde4ystemsThe functions f eachof these dditional ignals redefined rtheEIA RS232Cstandard.

Summaryo A standardAsynchronousSerial nput andoutputport forserialbits.o UART usuallysends byte n l0-bits formator ll-bitsformat.o The O-Uitr format is when a start bit precedeshe g-bitmessage nda stopbit succeedshe message.o An I l -bit format is when a specialbit also precedeshestopbit.

2.5 HDLC (HIGH LEVEL DATA LINKcoNTROL)The HDLC protocol s a generalpurposeprotocolwhich operatesat the data link layer of the osl referencemoder.The piotocoluses he services f a physical ayer,and provideseithera besteffort or reliable communications ath between he transmitterand receiver (i.e. with acknowledged ata transfer) he type ofservice rovided epends pon heHDLC modewhich s used.Each piece of data is encapsulatedn an HDLC frame byadding a trailer and a header.The headercontainsan HDLCaddress nd4n HDLC field.Thehailer is foundat theend'of heframe,and containsa Cyclic Redundancy heck(CRC) whichdetectsany erors which may occur during transmission. heframes are separatedby HDLC flag sequencewhich aretransmittedbetweeneach rameand whenever here s no data obetransmitted.

DevicesandBusesqfpgvices Nefivor 2. t3DL-SDU

Header Trailer Data

Ph DL-PDU0 1 1 1 1 1 1 0 0 l l l l l l 0

flag HDLC

Link

cal

flag

HDLC FrameStructureshowingflags'header address ndcontrol),dataand railer (CRC 16) "

2.5.1 KeY FeaturesInternationalStandardProtocol or a Data ink network

Usedforl inkingdatafrompointtopointandbetweenmultiplepoints elecommunication ndcomputernetworks'It is a Bit-OrientedProtocol'The total numberof bits is notnecessarily n ntegermultiple of a byteot a32 bit integer'ProvidesDuPlexCommunication

2.5.2 Modes of OPerationTheHDLCprotocol isagenenr ldatal inkcontrolprotocolrupJft oi supportinga rangeof modesof operation'The twomostprevalentmodesare

The besteffort or datagram serviceIn this mode, he packetsare carried n a UI frame' and a besteffort delivery is performed i'e', there is no guaranteehat thepacketcarriedby the framewill bedelivered)'

The link layer doesnot provideerror recov"ty 9f lost frames'This mode is used for point to point links carrying a networkp-to"of which itself usis ddtagram ackets example' P)' The


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control field of HDLC follows the addressield and s the secondpartof all HDLC frames.The AsynchronousBalancedMode (ABIvf)

This providesa reliable datapoint to point data ink serviceand may be usedto provide a servicewhich supportseither adatagramor reliablenetworkprotocol. n this mode.The packetsare carried n numbered frames,which areacknowledged y thereceiver using numbered supervisory frames. Error recovery(example,checkpointor go backn enor recovery) s employed oensure well orderedand eliable low of frames.

2.5.3 The HDLC Address fieldThe first byte(s) of a frame transmittedusing the High LevelControl (HDLC) Protocolareused o carry an addressield. Thisfield is typically a singlebyte,butextensions possibleallowing anumberof byes to be used.The addressormat is shown n thefigurebelow.

ServiceAccessPoint C / R I E6 bits I bit I bit

Figure Format of tlw AddressByte(s) n HDLC

The address onsists f threepartsA SemiceAccessPoint (SAP)which is usually set to zero, butused n somevariantsof HDLC to identiff oneof the numberofdata ink protocolentities.A Command/Response ft to indicatewhetherthe framerelates oinformation rame I-frames)beingsent rom thenodeor receivedby thenode.

Devices ndBusesor Devices etwork 2.15An addressextension6ir which is usually set o true to indicatethat the address s of length one byte. When.set to false itindicates nadditionalbyte ollows.The address ield is mainly usedwhen HDLC is sued n a modewhich provides reliable data transfer using numberedcontrolframes.2.5.4 Control Field of HDLCThe control iel d of HDLC follows the address ield and is theSecondpart of all HDLC frames. The best effort service isprovidedthrough he useof U (un-numbered)ramesconsistingof a single byte. All framescarrya field of size I bit is known asthe "poll/final" bit and s usedby the checkpointing procedureoveriff correct ransmission.

Formatof thecontrolbyte n HDLCframesHDLC defines urrently wo formats or frameswhich carrysequenceumbers. heseypes f frames reused o provide hereliabledata ink service.Two typesof numberedramesaresupported.

S (supervisory)rames ontaining nly an acknowledgedumber(N(R)).I (information)rames arrying ataandcontaining oth a sendsequenceumberN(S) andanacknowledgmentumberN(R)).

N/p\ plf Nrs\ 0N(R) plt S S 0 I

t U U p/t U U I I

-


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2.5.6 FlagsHDLC is a data ink protocolwhich usesa uniquebit sequenceto delimit the startandendof eachPDU transported y the datalink layer service. n HDLC, framesaredelimitedby a sequ^enceof bits known as a^.,flag".The flag sequences a unique 8 bitsPquencef the for 0l1l lll0. The way in which this is

peiformed s describedn the ext anddiagramswhich follow.

DevicesandBuses or DevicesNetwork 2.17

0-bit inserted fterfive consecutivel's in theoriginaldataf}ata after 0-bit

t z z a 'Or ig ina lda tal l l0 \ | ] y t

Insertion of a "zero-bit" into the contentof aframe to ensuretransparency

2.5.8 Abort and Idle PatternsValid frames aro terminatedby a closing flag. If the link layerprotocol needs to transmit a higher priority frame before thecurrent rame has been ully sent, t may "Abort" ths frame.An"aborted" frame s terminated y an"abort sequence": l I I I I I Iinsteadof the normal "flag sequence". bort sequencemay alsobe causedby bit errorswhich occurwhile the frame is travelingfrom the transmitter o the receiver.(For instancea fl4g maysuffera I bit invqrsionof the eastsignificantbit resulting n a bitsequencedentical o an"abort").A frame which is terminatedby an abort is received by the

receiver n the normalway, but markedas being "aborted".Theframe s then discardedwithout furtherprocessing. his is shownbelowAn abort sequences often followed by a seriesof I's. Thesequence f all I's may be used o fill the gapsbetween rames(or alternativelya continuous eriesof flagsmay be transmitted)The all I's sequences known as the "idle" sequence, ince heline becomes 'dle (N.B. represented'athe physical layer by 0

Flag HDLC Frame Flag

The lags beforeandafter an HDLCframe indicate thestart andendof theframe

2.5.7 TransparencYThe flag sequencemust never occur within the contentof aframe otherwise t could be confusedwith an intentionally sentflag. A techniqueknown as O-bit insertion is used to prevent,un-donldata synthesizing flag. The technique s said to makeHDLC transparent, inceany stream s achievedby encoding hedataby insertinga O-bitafterany sequence f 5 consecutive'swithin thepayloadasshown'

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