4
1088 IEEE Transactions on Nuclear Science, Vol. 35, No. 5, October 1988 NONLINEAR ADC WITH DIGITALLY SELECTABLE QUANTIZING CHARACTERISTIC .I. N. LYGOURAS Department of Electrical Engineering School of Engineering, Univercity of Thrace 67100 Xanthi Greece Abstract In this paper a method is presented for generating linear or nonlinear functions digitally. The Nonlinear Analog to Digital Conversion (NLADC) is accomplished using the Pulse Width Modulation (PWM) of the analog input voltage. The conversion is done according to a special Quantizing Characteristic Function (Q. C. F. 1, which depends on the specific application. This special Q. C. F. sampled, quantized and coded has been stored in an EPROM. The quantizing characteristic can be any monotonically increasing function of any type (e.g. linear, square, exponential e.t.c.1 resulting in a very flexible linear or nonlinear A/D converter. More than one Q.C.F. can be stored in the EPROM. Such a NLADC could be used for the expansion or compression of the dynamic range in Nuclear Science measurments, in robotics for the Cartesian space path planning, as in the case of Pulse Code Modulation (PCM) nonlinear quantization, e.t.c. The corresponding nonlinear Digital to Analog Converter is described. Introduction Many authors have dealt with the NLADC problem [l], [21. All the existing nonlinear analog to digital conversion techniques solve the problem in most cases for a specific equation and for a particular application, while more recent methods [3l,cover a wider spectrum of NLADC equation solutions. The Nonlinear ADC problem refers to the conversion of a bandwidth and amplitude limited analog signal to a digital one, according to a nonlinear quantization characteristic. In this paper a technique for selecting any one of a set of N different prestored conversion characteristics for a general (linear or nonlinear) ADC is described. The proposed circuit (Fig. 1) is suitable to produce a digital output which is related with the sampled input voltage via any nonlinear quantizing characteristic. This latter quantizing characteristic has been sampled, quantized and coded and is stored in binary form in a specific region of an EPROM, in the form of 2 ' binary numbers, k-bit each. These binary numbers represent 2=samples of the original analog quantizing characteristic used for the conversion quantized in Zk levels. These samples can be read when a specific characteristic is to be used by simply selecting its "address" in the characteristic selection input of the memory. Manuscript received January 22, 1988. Ramp Comparator A/D conversion A sophisticated and accurate type of A/D converter is the ramp type [41. The operation of the ramp type A/D is fairly simple. In this method (Fig.2) of analog to digital conversion, the inputs of a voltage comparator (V.C.) are fed by output from a D/A converter (Ramp Waveform Generator) and the unknown Characteristic Selection NLADC F(nT) k nT T Digital Latch Fig. 1. Block diagram of the NLADC analog input voltage V,(t). Digital values for the D-to-A converter come from a counter driven sequentially by a clock. Output from the D-to-A converter is thus a linear ramp (step voltage VA). When the ramp voltage is equal to the analog input voltage, the comparator changes state and the digital value is read directly from the counter. For the linear ADC the output pulse width as a function of the analog input voltage is given by the relation: VC t, = - f,. Vr and the count N registered in the latch during the high state ofthe comparator is given by: where r fc the clock fixed frequency f, the sampling frequency fc/Zr V, the maximum amplitude of the analog Vc the analog signal amplitude at the the number of bits per sample for the A/D. voltage point crossed by the ramp. Due to the linearity of the ramp waveform applied to the comparator, the PWM output pulse duration t, is 0018-9499/88/1ooO-1088$01.00 0 1988 IEEE

Nonlinear ADC with digitally selectable quantizing characteristic

  • Upload
    jn

  • View
    212

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Nonlinear ADC with digitally selectable quantizing characteristic

1088 IEEE Transactions on Nuclear Science, Vol. 35, No. 5 , October 1988

NONLINEAR ADC WITH DIGITALLY SELECTABLE QUANTIZING CHARACTERISTIC

.I. N. LYGOURAS Department of Electrical Engineering

School of Engineering, Univercity of Thrace 67100 Xanthi Greece

Abstract

In this paper a method is presented for generating linear or nonlinear functions digitally. The Nonlinear Analog to Digital Conversion (NLADC) is accomplished using the Pulse Width Modulation (PWM) of the analog input voltage. The conversion is done according to a special Quantizing Characteristic Function (Q. C. F. 1, which depends on the specific application. This special Q. C. F. sampled, quantized and coded has been stored in an EPROM. The quantizing characteristic can be any monotonically increasing function of any type (e.g. linear, square, exponential e.t.c.1 resulting in a very flexible linear or nonlinear A/D converter. More than one Q.C.F. can be stored in the EPROM. Such a NLADC could be used for the expansion or compression of the dynamic range in Nuclear Science measurments, in robotics for the Cartesian space path planning, as in the case of Pulse Code Modulation (PCM) nonlinear quantization, e.t.c. The corresponding nonlinear Digital to Analog Converter is described.

Introduction

Many authors have dealt with the NLADC problem [l], [21. All the existing nonlinear analog to

digital conversion techniques solve the problem in most cases for a specific equation and for a particular application, while more recent methods [3l,cover a wider spectrum of NLADC equation solutions. The Nonlinear ADC problem refers to the conversion of a bandwidth and amplitude limited analog signal to a digital one, according to a nonlinear quantization characteristic.

In this paper a technique for selecting any one of a set of N different prestored conversion characteristics for a general (linear or nonlinear) ADC is described. The proposed circuit (Fig. 1) is suitable to produce a digital output which is related with the sampled input voltage via any nonlinear quantizing characteristic. This latter quantizing characteristic has been sampled, quantized and coded and is stored in binary form in a specific region of an EPROM, in the form of 2' binary numbers, k-bit each. These binary numbers represent 2=samples of the original analog quantizing characteristic used for the conversion quantized in Z k levels. These samples can be read when a specific characteristic is to be used by simply selecting its "address" in the characteristic selection input of the memory.

Manuscript received January 22, 1988.

Ramp Comparator A/D conversion

A sophisticated and accurate type of A/D converter is the ramp type [41. The operation of the ramp type A/D is fairly simple. In this method (Fig.2) of analog to digital conversion, the inputs of a voltage comparator (V.C.) are fed by output from a D/A converter (Ramp Waveform Generator) and the unknown

Characteristic Selection

NLADC F(nT)

k nT

T

Digital

Latch

Fig. 1. Block diagram of the NLADC

analog input voltage V,(t). Digital values for the D-to-A converter come from a counter driven sequentially by a clock. Output from the D-to-A converter is thus a linear ramp (step voltage VA). When the ramp voltage is equal to the analog input voltage, the comparator changes state and the digital value is read directly from the counter. For the linear ADC the output pulse width as a function of the analog input voltage is given by the relation:

VC t, = -

f,. Vr

and the count N registered in the latch during the high state ofthe comparator is given by:

where r fc the clock fixed frequency f, the sampling frequency fc/Zr V, the maximum amplitude of the analog

Vc the analog signal amplitude at the

the number of bits per sample for the A/D.

voltage

point crossed by the ramp.

Due to the linearity of the ramp waveform applied to the comparator, the PWM output pulse duration t, is

0018-9499/88/1ooO-1088$01.00 0 1988 IEEE

Page 2: Nonlinear ADC with digitally selectable quantizing characteristic

1089

- 0..

fk, C1 oc k

Analog Input r \ + Y

Binary Counter

Binary - iming C1 ock- Counter fc -

Fig. 2. Ramp type A / D converter

a linear function of instantaneous analog signal amplitude at the point crossed by the ramp. However, by applying a special shaped waveform to the comparator input we could implement a nonlinear A/D converter. This method for providing nonlinear functions digitally can be developed by modifying the linear rising section of the comparator conversion characteristic to a nonlinear one 151.

The use of a general system for quantization and

0 . . -

. .

0 . .

A$ *A,-, D o

I F(nT)

Fig. 3. Block diagram of a general system for W D (a) and D/A (b) conversion.

Latch

0 . .

A I D conversion is shown in- Fig. 3(al: The quantized input signal y(nT) is transformed in a sequence of new samples according to the equation:

y(nT)= F[ y (nT)] n = 1.2,. . .

where T is the sampling interval. The resulting signal is then passed through the encoder in order to take its final digital form.

The quantity A represents the quantization step size for the quantizer. In the D/A converter the inverse process takes place; i.e. the samples y(nT) are transformed backward into a sequence of quantized samples via the inverse transformation F-'.

y(nT) = F-'[y(nT)] n = 1,2,

as depicted in Ftg.3 (b).If no errors have been introduced during the transmission in c(nT) then the output of the D/A is identical to the quantized samples.

The circuit shown in Fig.4 describes how a nonlinear transfer characteristic can be achieved. The well known ramp comparator AID converter has been modified by inserting an EPROM between the binary counter and the Ladder D/A. Here the high frequency clock pulses are fed into a binary counter whose outputs drive the r lower-order address lines of an EPROM with m (m>r) address lines in total. The remaining m-r = M address lines are used as

I I1"'I Charac t e r i s t i c

Fig. 4. A/D converter with

sel ec t i on input

digitally selectable quantizing characteristic

Page 3: Nonlinear ADC with digitally selectable quantizing characteristic

1 om

characteristic selection inputs. Thus, the whole memory field has been divided in 2'=N sections, each one containing 2' samples of a specific characteristic. The samples of each characteristic have been stored after coding themuin binary form in k-bit words, in any one of the 2 sections of the EPROM.

With a fixed selection in the characteristic selection input the running binary counter sweeps the 2r lower order memory locations and reads the coded samples of a specific characteristic which is stored in these locations. The following R2R Ladder D/A reconstructs the sampled characteristic and feeds it to the inverting input of the comparator. Thus the A/D conversion is done according to the characteristic se 1 ect ed.

F(t) can be any monotonically increasing function defined for t>O for which F(t)>O and F(O)=O. We can select a suitable characteristic already stored in the EPROM at the inverting input of the comparator by simply selecting its "address" through the characteristic selection input. For example let us suppose that the function F(t1 = a(tl"2 has been selected as the quantizing characteristic (Fig.5). The voltage in the AID output will have the quantized form

C o n t a i n e d Sample

t 1111111

100G000

0000000 A, 0 1 0 . . . . . . . . . . . . . .

L 1 EPROM

. Address A , 0 0 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ar-, ' @ ' o ' c ' . . . . . . . . . . . . . . 1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A, 0 0 1

A,.,OO 1 . . . . . . . . . . . . . . Fig. 5. EPROM contents fo%/2 the quantizing

characteristic V(t) = a(t) .

of the function F(t), i.e.:

and the PWM pulse zduration in the comparators output will be t,a (V) and since the output binary number B stored in the latch is proportional to the PWM output pulse duration, B will be analogous to the square power of the input voltage.

The D/A converter

In Fig. 6 the corresponding D/A converter is described. As it is shown the D/A converter consists of an EPROM an R2R ladder D/A and a Low Pass Filter (LPF). In the EPROM the inverse function F-'(nTl has

been stored. The digital output number from the A/D converter is used here in order to drive the r low-order address lines of the EPROM, while the M high-order address lines are used as selection inputs for the corresponding characteristic, in the same manner as in the A/D converter.

The coded samples of the inverse function F-' are read and appear at the data output of the EPROM. The following ladder R2R D/A converts the digital signal to the original analog voltage.

O U t D U t

C h a r a c t e r i s t i c s e l e c t i o n

i n p u t

Fig. 6. D/A converter with digitally selectable quantizing characteristic.

Conclusions-Applications

A very flexible NLADC has been described with predetermined transfer characteristics. The flexibility achieved by this circuit is obvious because of the ability to change the transfer characteristic by simply selecting a new one which is already stored in the EPROM or by reprogramming the memory. It can be used in a mode with a nonlinear response function resulting in the expansion or the compression of the dynamic range in Nuclear Science measurments (as in the case of PCM nonlinear quantization).

An other application of the above NLADC would be in the area of Robotics for Cartesian space path planning which requires transformations in real-time between the Cartesian and joint coordinates. In that case a NLADC using inverse trigonometric functions as quantizing characteristic functions could be used in deriving the x, y, z Cartesian coordinates, for a single Joint manipulator.

The circuit described above was constructed and tested in the laboratory using ordinary LSTTL components and the MM1702A 256x8-bit EPROM with 1 9s access time. A typical characteristic obtained by sampl ing the f unct ion V( t 1 =a( t I (i.e. the V(nT)=an(T)'/2) is shown in the photograph of Fig.7 using m=10 samples of the original waveform quantized in 256(=2*) levels for an E-bit per sample representation.

Fast NLADC, up to 10 MHz sampling frequency, can be designed if required by using fast TTL or ECL components. Using for example the ECL type SN10139 32x8-bit PROM, 2011s access time can be achieved. Since the sampling frequency f, for the NLADC is given by: f. = fJ2' the converter speed will decrease with the number of samples derived from the quantization

Page 4: Nonlinear ADC with digitally selectable quantizing characteristic

1091

characteristic when the system is clocked with the maximum f,.

5 psec/div

Acknowledgments

The anthor would like to express his thanks t o Prof. B.G. Mertzios and Dr. Ch. P. Avratoglou for reading this manuscript and making a number of helpful suggest ions.

References

[11 Harrison,D.C., "A quadratic A/D converter", I.E.E. E. Trans Nucl. Sci., 396-398, (1980).

[21 Hafeth, B.A., and Abdul-Karim, M.A.H., "Digital power meter using a non-linear ADC", Int. J. Electronics, 57, 179-186, (1984).

[31 Hafeth, B.A., and Abdul-Karim, M.A.H., "Flexible non-linear analoque-to-digital converter", Int. J. Electronics, 58, 111-115, (1985).

[41 Owen, E.F., "PCM and Digital Transmission Systems", New York, McCraw-Hi 11, ( 1982)

[51 Lygouras, N. J., "Non-linear analogue-to-digital conversion through PWM", Int. J. Electron, 62,

Fig. 7. Waveform stored in a EPROM for m=10 samples and 8-bit per sample representation.

347-352, ( 1987).