NEXT GENERATION OPTICAL INTERFACES

NEXT GENERATION OPTICAL INTERFACES

“Scaling Bandwidth with Optical Integration”

Scott Schube, Intel

Scaling Bandwidth with Optical Integration

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Scott Schube, Intel

Scaling Bandwidth With Optical IntegrationScott SchubeIntel Silicon Photonics Products DivisionEthernet Alliance TEF, January 2021

Ethernet Alliance TEF, January 2021Silicon Photonics Product Division

• Cost, cost, cost• Cloud expectation of cost/bit parity or better from Day 1 for a new generation

• Power• Supply scale

Optics Bandwidth Scaling Requirements

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But also:• Availability timing and risk• Backwards compatibility

• across 2 or even 3 speed/technology generations• Support for various network architectures

• E.g. sufficient switch radix• Configuration/application flexibility

• E.g. ability to support multiple reaches, different mixes of interfaces in common platform• Support for multiple suppliers/sources

• For availability + security of supply across multiple optics types


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But also:• Availability timing and risk• Backwards compatibility

• across 2 or even 3 speed/technology generations• Support for various network architectures

• E.g. sufficient switch radix• Configuration/application flexibility

• E.g. ability to support multiple reaches, different mixes of interfaces in common platform• Support for multiple suppliers/sources

• For availability + security of supply across multiple optics types


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Any next-generation technology or approach need to be evaluated on all of these


• More channels• Fibers• Wavelengths

• Higher baud rate / channel• Advanced modulation formats (e.g. PAM4, QAM)

Optics Bandwidth Scaling Options

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• More channels• Fibers

+ Lower baud rate = easier on device technology- Packaging cost/complexity, fiber cost

• Wavelengths+ Lower baud rate, lower fiber cost- Packaging cost/complexity, link budget

• Higher baud rate / channel+ Fewer channels = simpler packaging- Performance feasibility and yield, cost/complexity, lower

switch radix, backwards compatibility challenges• Advanced modulation formats (e.g. PAM4, QAM)

+ Lower baud rate- Performance feasibility and yield, cost/complexity, lower

switch radix, backwards compatibility challenges, higher performance FEC required w/ higher latency


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• More channels• Fibers

+ Lower baud rate = easier on device technology- Packaging cost/complexity, fiber cost

• Wavelengths+ Lower baud rate, lower fiber cost- Packaging cost/complexity, link budget

• Higher baud rate / channel+ Fewer channels = simpler packaging- Performance feasibility and yield, cost/complexity, lower

switch radix, backwards compatibility challenges• Advanced modulation formats (e.g. PAM4, QAM)

+ Lower baud rate- Performance feasibility and yield, cost/complexity, lower

switch radix, backwards compatibility challenges, higher performance FEC required w/ higher latency


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Traditionally, the optics imperative has been to

serialize wherever possible, because of

optical packaging challenges/cost


Integration Changes the GameFor high-yield process technology,

cost per channel drops with the integration of more channels

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Source: Internal Intel analysis and estimates; your mileage may vary

Integration changes the tradeoff between optics options, enabling “scale out” as well as “scale up”


Example: 16x100G Silicon Photonics Integrated Circuit• 16-channel (1.6Tbps, 16x100G / 4x400G DR4+)

PSM transmitter PIC• On-die integrated lasers• 112G ring-resonator modulators• Mode-converters and V-grooves for cost-effective

high-volume packaging• Fully integrated Tx optics enables wafer-level test• Supports redundant lasers if needed

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• Suitable for 2x400G products starting to be deployed in the market this year

• Monolithically-integrated 8-channel WDM demonstrated to enable 2x400G FR4/LR4 on two fiber pairs for maximum interoperability, or 800G on single duplex fiber for maximum fiber efficiency (see right)

Example: 8x100G Silicon Photonics Integrated Circuit

Silicon Photonics Product Division Ethernet Alliance TEF, January 2021 12

System Level Optical Integration: Co-Packaged Optics• Co-packaged optics targeted to provide both lower power and

cost/bit• Demonstrated Intel 1.6T CPO optics and 12.8T switch system with CPO

shown here as an example

• Support for interoperability and backwards compatibility depends on implementation• To be most useful, need to support standard optical interfaces (e.g. FR4,

DR4, DR1/FR1) and electrical interfaces (e.g. XSR)

• Support for multi-sourcing and configuration flexibility also depends on implementation. A socketed/replaceable engine approach enables• Multiple supplier sources – can mix and match silicon and optics• Multiple technologies can coexist within this envelope (e.g. remote vs.

integrated laser) for maximum innovation flexibility and options

• “Configure at manufacture” flexibility to support different types of interfaces in the same platform

• Reworkability in system manufacturing

Silicon Photonics Product Division Ethernet Alliance TEF, January 2021

Very Quick Note on Coherent• As noted by many, coherent optics is getting more attractive for certain applications as its maturity goes up

and cost and power comes down

• In addition to the two “marquee” challenges/goals for coherent to penetrate into shorter, less fiber-constrained data center applications (cost and power competitiveness: ultimate intercept for high-BW links likely, timing TBD), other issues that may constrain or delay coherent deployment in non-greenfield data center applications include

• Interoperability with current generations

• Backwards compatibility with prior generations

• Compatibility with network architectures and radix

• Coherent optics are coming into data center networks – but when and how far down?

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Implications for Next-Generation Optics• With integrated optics, “scaling out” by adding more lanes is an increasingly attractive

solution to scale bandwidth• E.g. for 25T and 51T, adding more lanes of 100G (4x100G > 8x100G > 16x100G or 32x100G) • Most cost-effective (especially if leveraging high levels of integration)• Less technologically risky (100G/lane starting to be deployed in the market now), can get to market

faster• Can preserve compatibility and interoperability with 400G infrastructure (Nx400G breakout)• Preserves switch radix (Nx100G or Nx400G breakout) for full network connectivity• Channel “scale out” can be combined with lane speed “scale up” to enable even higher bandwidths

for 100T+ once 200G/lane is ready (e.g. 8x200G 1.6T, 32x200G 6.4T CPO, etc.)• Integration at the system level with co-packaged optics integration promises further benefits in

power and cost

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Silicon Photonics Product Division Ethernet Alliance TEF, January 2021 15

Thank You

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If you have any questions or comments, please email [email protected]

For our TEF 2021 on-demand content go tobit.ly/EATEF2021-OD

www.ethernetalliance.org 17

mailto:[email protected]

bit.ly/EATEF2021-OD

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NEXT GENERATION OPTICAL INTERFACES