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1P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C4M-BIT [512K x 8] SINGLE VOLTAGE
5V ONLY FLASH MEMORYFEATURES
GENERAL FEATURES• SinglePowerSupplyOperation -4.5to5.5voltforread,erase,andprogramoperations• 524288x8only• SectorStructure -64K-Bytex8• Latch-upprotectedto100mAfrom-1VtoVcc+1V• CompatiblewithJEDECstandard -PinoutandsoftwarecompatibletosinglepowersupplyFlash
PERFORMANCE• HighPerformance -Accesstime:70/90ns -Programtime:9us(typical) -Erasetime:0.7s/sector,4s/chip(typical)• LowPowerConsumption -Lowactivereadcurrent:30mA(maximum)at5MHz -Lowstandbycurrent:1uA(typical)• Minimum100,000erase/programcycle• 20yearsdataretention
SOFTWARE FEATURES• EraseSuspend/EraseResume -Suspendssectoreraseoperation to readdata fromorprogramdata toanothersectorwhich isnotbeingerased
• StatusReply -Data#Polling&Togglebitsprovidedetectionofprogramanderaseoperationcompletion
PACKAGE • 32-PinPLCC• 32-PinTSOP• All Pb-free devices are RoHS Compliant
2P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
PIN CONFIGURATIONS
32 PLCC
32 TSOP (Standard Type) (8mm x 20mm)
145
9
1314 17 20
21
25
2932 30
A14
A13
A8
A9
A11
OE#
A10
CE#
Q7
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GN
D Q3
Q4
Q5
Q6
A12
A15
A16
A18
VCC
WE#
A17
MX29F040C
A11A9A8
A13A14A17
WE#VCCA18A16A15A12
A7A6A5A4
12345678910111213141516
OE#A10CE#Q7Q6Q5Q4Q3GNDQ2Q1Q0A0A1A2A3
32313029282726252423222120191817
MX29F040C
3P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
LOGIC SYMBOL
SYMBOL PIN NAMEA0~A18 AddressInput
Q0~Q7 DataInput/Output
CE# ChipEnableInput
WE# WriteEnableInput
OE# OutputEnableInput
GND GroundPin
VCC +5.0Vsinglepowersupply
PIN DESCRIPTION
8Q0-Q7A0-A18
CE#
OE#
WE#
19
4P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
BLOCK DIAGRAM
CONTROLINPUTLOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTERFLASHARRAY
X-D
EC
OD
ER
ADDRESS
LATCH
AND
BUFFER Y-PASS GATE
Y-DE
CO
DE
R
ARRAYSOURCE
HVCOMMANDDATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGMDATA
HV
PROGRAMDATA LATCH
SENSEAMPLIFIER
Q0-Q7
A0-AM
AM: MSB address
CE#OE#WE#
5P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Sector Sector Address Address RangeA18 A17 A16
SA0 0 0 0 00000h-0FFFFh
SA1 0 0 1 10000h-1FFFFh
SA2 0 1 0 20000h-2FFFFh
SA3 0 1 1 30000h-3FFFFh
SA4 1 0 0 40000h-4FFFFh
SA5 1 0 1 50000h-5FFFFh
SA6 1 1 0 60000h-6FFFFh
SA7 1 1 1 70000h-7FFFFh
Note: Allsectorsare64Kbytesinsize.
Table 1. SECTOR STRUCTURE
MX29F040C SECTOR ADDRESS TABLE
Table 2. BUS OPERATION
Notes:1.Vhvistheveryhighvoltage,11.5Vto12.5V.2.Xmeansinputhigh(Vih)orinputlow(Vil).
Mode Pins CE# OE# WE# A0 A1 A6 A9 Q0 ~ Q7
ReadSiliconIDManufactureCode L L H L L X Vhv C2H
ReadSiliconIDDeviceCode L L H H L X Vhv A4H
Read L L H A0 A1 A6 A9 DOUT
Standby H X X X X X X HIGHZOutputDisable L H H X X X X HIGHZWrite L H L A0 A1 A6 A9 DIN
6P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
REQUIREMENTS FOR READING ARRAY DATA
Readarrayactionistoreadthedatastoredinthearrayout.Whilethememorydeviceisinpowereduporhasbeenreset,itwillautomaticallyenterthestatusofreadarray.Ifthemicroprocessorwantstoreadthedatastoredinarray,ithastodriveCE#(deviceenablecontrolpin)andOE#(Outputcontrolpin)asVil,andinputtheaddressofthedatatobereadintoaddresspinatthesametime.Afteraperiodofreadcycle(TceorTaa),thedatabeingreadoutwillbedisplayedonoutputpinformicroprocessortoaccess.IfCE#orOE#isVih,theoutputwillbeintri-state,andtherewillbenodatadisplayedonoutputpinatall.
Afterthememorydevicecompletesembeddedoperation(automaticEraseorProgram),itwillautomaticallyre-turntothestatusofreadarray,andthedevicecanreadthedatainanyaddressinthearray.Intheprocessoferasing, if thedevicereceives theErasesuspendcommand,eraseoperationwillbestoppedafteraperiodoftimenomorethanTreadyandthedevicewillreturntothestatusofreadarray.Atthistime,thedevicecanreadthedatastoredinanyaddressexceptthesectorbeingerasedinthearray.Inthestatusoferasesuspend,ifuserwantstoreadthedatainthesectorsbeingerased,thedevicewilloutputstatusdataontotheoutput.Similarly,ifprogramcommandisissuedaftererasesuspend,afterprogramoperationiscompleted,systemcanstillreadar-raydatainanyaddressexceptthesectorstobeerased. Thedeviceneedsto issueresetcommandtoenablereadarrayoperationagaininordertoarbitrarilyreadthedatainthearrayinthefollowingtwosituations:
1.Inprogramoreraseoperation,theprogrammingorerasingfailurecausesQ5togohigh.
2.Thedeviceisinautoselectmode.
In the twosituationsabove, if resetcommand isnot issued, thedevice isnot in readarraymodeandsystemmustissueresetcommandbeforereadingarraydata.
WRITE COMMANDS/COMMAND SEQUENCES
Towriteacommandtothedevice,systemmustdriveWE#andCE#toVil,andOE#toVih.Inacommandcycle,alladdressare latchedat the later fallingedgeofCE#andWE#,andalldataare latchedat theearlier risingedgeofCE#andWE#.
Figure1illustratestheACtimingwaveformofawritecommand,andTable3definesallthevalidcommandsetsofthedevice.Systemisnotallowedtowriteinvalidcommandsnotdefinedinthisdatasheet.Writinganinvalidcommandwillbringthedevicetoanundefinedstate.
AUTOMATIC SELECT OPERATION
When thedevice is inReadarraymodeorerase-suspendedreadarraymode,usercan issuereadsilicon IDcommandtoenterreadsiliconIDmode.AfterenteringreadsiliconIDmode,usercanqueryseveralsiliconIDscontinuouslyanddoesnotneed to issuereadsilicon IDmodeagain.WhenA0 isLow,devicewilloutputMa-cronixManufactureIDC2.WhenA0ishigh,devicewilloutputDeviceID.InreadsiliconIDmode,issuingresetcommandwillresetdevicebacktoreadarraymodeorerase-suspendedreadarraymode.
AnotherwaytoenterreadsiliconIDistoapplyhighvoltageonA9pinwithCE#,OE#andA1atVil.WhilethehighvoltageofA9pin isdischarged,devicewillautomatically leavereadsiliconIDmodeandgobacktoreadarraymodeorerase-suspendedreadarraymode.WhenA0isLow,devicewilloutputMacronixManufactureIDC2.WhenA0ishigh,devicewilloutputDeviceID.
7P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
DATA PROTECTION
Toavoidaccidentalerasureorprogrammingofthedevice,thedeviceisautomaticallyresettoreadarraymodeduringpowerup.Besides,onlyaftersuccessfulcompletionofthespecifiedcommandsetswillthedevicebeginitseraseorprogramoperation.
Otherfeaturestoprotectthedatafromaccidentalalternationaredescribedasfollowed.
WRITE PULSE "GLITCH" PROTECTION
CE#,WE#,OE#pulsesshorter than5nsaretreatedasglitchesandwillnotberegardedasaneffectivewritecycle.
LOGICAL INHIBIT
AvalidwritecyclerequiresbothCE#andWE#atVilwithOE#atVih.WritecycleisignoredwheneitherCE#atVih,WE#aVih,orOE#atVil.
POWER-UP SEQUENCE
Uponpowerup,MX29F040Cisplacedinreadarraymode.Furthermore,programoreraseoperationwillbeginonlyaftersuccessfulcompletionofspecifiedcommandsequences.
POWER-UP WRITE INHIBIT
WhenWE#,CE#isheldatVilandOE#isheldatVihduringpowerup,thedeviceignoresthefirstcommandontherisingedgeofWE#.
POWER SUPPLY DECOUPLING
A0.1uFcapacitorshouldbeconnectedbetweentheVccandGNDtoreducethenoiseeffect.
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MX29F040C
TABLE 3. MX29F040C COMMAND DEFINITIONS
Notes:1.DeviceID:A4H.2. Itisnotallowedtoadoptanyothercodewhichisnotintheabovecommanddefinitiontable.
Command ReadMode
ResetMode
AutomaticSelect Program ChipErase
SectorErase
EraseSuspend
EraseResumeManufacturerID DeviceID
1stBusCycle
Addr Addr XXX 555 555 555 555 555 XXX XXXData Data F0 AA AA AA AA AA B0 30
2ndBusCycle
Addr 2AA 2AA 2AA 2AA 2AAData 55 55 55 55 55
3rdBusCycle
Addr 555 555 555 555 555Data 90 90 A0 80 80
4thBusCycle
Addr X00 X01 Addr 555 555
Data C2 ID Data AA AA
5thBusCycle
Addr 2AA 2AAData 55 55
6thBusCycle
Addr 555 SectorData 10 30
9P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
RESET
Inthefollowingsituations,executingresetcommandwillresetdevicebacktoreadarraymode:• Amongerasecommandsequence(beforethefullcommandsetiscompleted)• Sectorerasetime-outperiod• Erasefail(whileQ5ishigh)• Amongprogramcommandsequence(beforethefullcommandset iscompleted,erase-suspendedprogramincluded)
• Programfail(whileQ5ishigh,anderase-suspendedprogramfailisincluded)• ReadsiliconIDmode
Whiledeviceisatthestatusofprogramfailorerasefail(Q5ishigh),usermustissueresetcommandtoresetdevicebacktoreadarraymode.WhilethedeviceisinreadsiliconIDmode,usermustissueresetcommandtoresetdevicebacktoreadarraymode.
Whenthedeviceisintheprogressofprogramming(notprogramfail)orerasing(noterasefail),devicewillig-noreresetcommand.
AUTOMATIC SELECT COMMAND SEQUENCE
AutomaticSelectmodeisusedtoaccessthemanufacturerID,deviceID.Theautomaticselectmodehasfourcommandcycles.Thefirst twoareunlockcycles,and followedbya specific command.The fourth cycle isanormalreadcycle,andusercanreadatanyaddressanynumberoftimeswithoutenteringanothercommandsequence.TheresetcommandisnecessarytoexittheAutomaticSelectmodeandbacktoreadarray.Thefol-lowingtableshowstheidentificationcodewithcorrespondingaddress.
Address Data (Hex)ManufacturerID X00 C2
DeviceID X01 A4
ThereisanalternativemethodtothatshowninTable2,whichisintendedforEPROMprogrammersandrequiresVhvonaddressbitA9.
10P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
AUTOMATIC PROGRAMMING
TheMX29F040Ccanprovidetheuserprogramfunction.AslongastheusersentertherightcycledefinedintheTable.3(including2unlockcyclesandA0H),anydatauserinputswillautomaticallybeprogrammedintothear-ray.
Once theprogram function is executed, the internalwrite state controllerwill automatically execute thealgo-rithmsand timingsnecessary forprogramandverification,which includesgeneratingsuitableprogrampulse,verifyingwhetherthethresholdvoltageoftheprogrammedcellishighenoughandrepeatingtheprogrampulseifanyofthecellsdoesnotpassverification.Meanwhile,theinternalcontrolwillprohibittheprogrammingtocellsthatpassverificationwhiletheothercellsfailinverificationinordertoavoidover-programming.
Programmingwillonlychangethebitstatusfrom"1"to"0".Thatistosay,itisimpossibletoconvertthebitstatusfrom"0"to"1"byprogramming.Meanwhile,theinternalwriteverificationonlydetectstheerrorsofthe"1"thatisnotsuccessfullyprogrammedto"0".
Anycommandwrittentothedeviceduringprogrammingwillbeignoredexcepthardwarereset,whichwilltermi-natetheprogramoperationafteraperiodoftimenomorethanTready.Whentheembeddedprogramalgorithmiscompleteortheprogramoperationisterminatedbyhardwarereset,thedevicewillreturntothereadingarraydatamode.
Withtheinternalwritestatecontroller,thedevicerequirestheusertowritetheprogramcommandanddataonly.ThetypicalchipprogramtimeatroomtemperatureoftheMX29F040Cis4.5seconds.
Whentheembeddedprogramoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:
*1:Thestatus"inprogress"meansbothprogrammodeanderase-suspendedprogrammode.
Status Q7 Q6 Q5Inprogress*1 Q7# togging 0
Finished Q7 Stoptoggling 0
Exceedtimelimit Q7# Toggling 1
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MX29F040C
SECTOR ERASE
SectorEraseistoeraseallthedatainasectorwith"1"and"0"asall"1".Itrequiressixcommandcyclestois-sue.Thefirsttwocyclesare"unlockcycles",thethirdoneisaconfigurationcycle,thefourthandfiftharealso"unlockcycles"andthesixthcycleisthesectorerasecommand.Afterthesectorerasecommandsequenceisissued, there isa time-outperiodof50uscounted internally.During the time-outperiod,additional sectorad-dressandsectorerasecommandcanbewrittenmultiply.Onceuserentersanothersectorerasecommand,thetime-outperiodof50usisrecounted.Ifuserentersanycommandotherthansectoreraseorerasesuspenddur-ingtime-outperiod,theerasecommandwouldbeabortedandthedeviceisresettoreadarraycondition.Thenumberofsectorscouldbefromonesectortoallsectors.Aftertime-outperiodpassingby,additionalerasecom-mandisnotacceptedanderaseembeddedoperationbegins.
Duringsectorerasing,allcommandswillnotbeacceptedexcepthardwareresetanderasesuspendandusercancheckthestatusaschiperase.
Status Q7 Q6 Q5 Q2Inprogress 0 Togging 0 Toggling
Finished 1 Stoptoggling 0 1
Exceedtimelimit 0 Toggling 1 Toggling
Whentheembeddederaseoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:
Status Q7 Q6 Q5 Q3 Q2Time-outperiod 0 Toggling 0 0 Toggling
Inprogress 0 Togging 0 1 Toggling
Finished 1 Stoptoggling 0 1 1
Exceedtimelimit 0 Toggling 1 1 Toggling
CHIP ERASE
ChipEraseistoeraseallthedatawith"1"and"0"asall"1".Itneeds6cyclestowritetheactionin,andthefirsttwocyclesare"unlock"cycles,thethirdoneisaconfigurationcycle,thefourthandfiftharealso"unlock"cycles,andthesixthcycleisthechiperaseoperation.
Duringchiperasing,allthecommandswillnotbeacceptedexcepthardwarerestsortheworkingvoltageistoolowthatchiperasewillbeinterrupted.AfterChipErase,thechipwillreturntothestateofReadArray.
Whentheembeddedchiperaseoperationisongoing,usercanconfirmiftheembeddedoperationisfinishedornotbythefollowingmethods:
*1:ThestatusQ3isthetime-outperiodindicator.WhenQ3=0,thedeviceisintime-outperiodandisacceptibletoanothersectoraddresstobeerased.WhenQ3=1,thedeviceisineraseoperationandonlyerasesuspendisvalid.
12P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
When thedevicehassuspendederasing,user canexecute thecommandsetsexcept sectoreraseandchiperase,suchasreadsiliconID,program,anderaseresume.
SECTOR ERASE RESUME
Sectoreraseresumecommandisvalidonlywhenthedeviceisinerasesuspendstate.Aftereraseresume,usercan issueanothererasesuspendcommand,but thereshouldbea400us intervalbetweeneraseresumeandthenexterasesuspend.Ifuserissueinfinitesuspend-resumeloop,orsuspend-resumeexceeds1024times,thetimeforerasingwillincrease.
Status Q7 Q6 Q5 Q3 Q2Erasesuspendreadinerasesuspendedsector 1 Notoggle 0 N/A toggle
Erasesuspendreadinnon-erasesuspendedsector Data Data Data Data Data
Erasesuspendprograminnon-erasesuspendedsector Q7# Toggle 0 N/A N/A
SECTOR ERASE SUSPEND
Duringsectorerasure,sectorerasesuspendistheonlyvalidcommand.Ifuserissueerasesuspendcommandinthetime-outperiodofsectorerasure,devicetime-outperiodwillbeover immediatelyandthedevicewillgobacktoerase-suspendedreadarraymode.Ifuserissueerasesuspendcommandduringthesectoreraseisbe-ingoperated,devicewillsuspendtheongoingeraseoperation,andaftertheTready1(<=20us)suspendfinishesandthedevicewillentererase-suspendedreadarraymode.Usercanjudgeifthedevicehasfinishederasesus-pendthroughQ6,andQ7.
Afterdevicehasenterederase-suspendedreadarraymode,usercanreadothersectorsnotaterasesuspendbythespeedofTaa;whilereadingthesectorinerase-suspendmode,devicewilloutputitsstatus.UsercanuseQ6andQ2tojudgethesectoriserasingortheeraseissuspended.
13P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
ABSOLUTE MAXIMUM STRESS RATINGS
SurroundingTemperaturewithBias.................................................-65oCto+125oCStorageTemperature............................................................-65oCto+150oCVoltageRange Vcc........................................................................-0.5Vto+7.0V A9.......................................................................-0.5Vto+13.5V Theotherpins.............................................................-0.5VtoVcc+0.7VOutputShortCircuitCurrent(lessthanonesecond)......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200mA
Note:1.Minimumvoltagemayundershootto-2Vduringtransitionandforlessthan20nsduringtransitions.2.MaximumvoltagemayovershoottoVcc+2Vduringduringtransitionandforlessthan20nsduringtransitions.
OPERATING TEMPERATURE AND VOLTAGE
Commercial (C) GradeSurroundingTemperature(TA)........... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°Cto+70°CIndustrial (I) GradeSurroundingTemperature(TA)......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°Cto+85°CVCC Supply VoltagesVCCrange........................... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5Vto5.5V
14P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
DC CHARACTERISTICS
Symbol Description Min Typ Max RemarkIilk InputLeak ± 1.0uA
Iolk OutputLeak 10uA
Icr1 ReadCurrent(10MHz) 50mA CE#=Vil,OE#=Vih
Icr2 ReadCurrent(5MHz) 40mA CE#=Vil,OE#=Vih
Icw WriteCurrent 15mA 30mA CE#=Vil,OE#=Vih,WE#=ViL
Isb1 StandbyCurrent(TTL) 1mA Vcc=Vccmax,CE#=Vihotherpindisable
Isb2 Standbycurrent(CMOS) 1uA 5uA Vcc=Vccmax,CE#=vcc+0.3V,otherpindisable
Vil InputLowVoltage -0.3V 0.8V
Vih InputHighVoltage 0.7xVcc Vcc+0.3V
Vhv VeryHighVoltageforAutoSelect 11.5V 12V 12.5V
Vol OutputLowVoltage 0.45V Iol=2.1mA,Vcc=Vccmin
Voh1 OuputHighVoltage(TTL) 2.4V Ioh1=-2mA
Voh2 OuputHighVoltage(CMOS) Vcc-0.4V Ioh2=-100uA
15P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
SWITCHING TEST CIRCUITS
TestConditionOutputLoad:1TTLgateOutputLoadCapacitance,CL:100PFRise/FallTimes:10nSInput/Outputreferencelevels:0.8V,2.0V
SWITCHING TEST WAVEFORMS
R1=6.2KohmR2=2.7Kohm
TESTED DEVICE
DIODES=IN3064OR EQUIVALENT
CLR1
Vcc
0.1uFR2
Vcc
2.0V 2.0V
0.8V0.8VTEST POINTS
0.7xVCC
0.45VOUTPUTINPUT
16P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
AC CHARACTERISTICS
Symbol Description Speed Option -70/90 UnitMin Typ MaxTaa Validdataoutputafteraddress 70/90 ns
Tce ValiddataoutputafterCE#low 70/90 ns
Toe ValiddataoutputafterOE#low 30/35 ns
Tdf DataoutputfloatingafterOE#high 20 ns
Toh Output hold time from theearliest risingedgeofAddrss,CE#,OE#
0 ns
Trc Readperiodtime 70/90 ns
Twp WE#pulsewidth 35 ns
Twph WE#pulsewithhigh 30 ns
Tghwl Readrecovertimebeforewrite 0 ns
Twc Writeperiodtime 70/90 ns
Tcwc Commandwriteperiodtime 70/90 ns
Tas Addresssetuptime 0 ns
Tah Addressholdtime 45 ns
Tds Datasetuptime 30/45 ns
Tdh Dataholdtime 0 ns
Tcs CE#Setuptime 0 ns
Tch CE#holdtime 0 ns
Toes OE#setuptime 0 ns
Tcep CE#pulsewidth 35/45 ns
Tceph CE#pulsewidthhigh 20 ns
Tavt Programoperation 9 300 us
Taetc ChipEraseOperation 4 32 sec
Taetb SectorEraseOperation 0.7 8 sec
Tbal SectorAddressholdtime 50 us
17P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 1. COMMAND WRITE OPERATION
Addresses
CE#
OE#
WE#
DIN
Tds
Tah
Data
Tdh
Tcs Tch
Tcwc
Toes
Tas
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
VA
VA: Valid Address
Twp Twph
18P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
READ/RESET OPERATION
Figure 2. READ TIMING WAVEFORMS
Addresses
CE#
OE#
Taa
WE#
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Voh
Vol
HIGH Z HIGH ZDATA Valid
Toe Tdf
Tce
Outputs
Toh
ADD Valid
Trc
19P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
ERASE/PROGRAM OPERATION
Figure 3. AUTOMATIC CHIP ERASE TIMING WAVEFORM
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tch
Tds Tdh
Tavt
Last 2 Read Status CycleLast 2 Program Command Cycle
TcsWE#
Data
20P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 4. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
YES
NOData=FFh ?
Write Data 10H Address 555H
Write Data 55H Address 2AAH
Data# Polling Algorithm or Toggle Bit Algorithm
Auto Chip Erase Completed
21P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 5. AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Twc
Address
OE#
CE#
55h
2AAh SectorAddress 1
SectorAddress 0
30h
InProgress Complete
VA VA
30h
SectorAddress n
Tas
Tah
Tbal
Tch
Tds Tdh
Taetb
Read Status
Last 2 Erase Command Cycle
TcsWE#
Data30h
22P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 6. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
Write Data 30H Sector Address
Write Data 55H Address 2AAH
Data# Polling Algorithm orToggle Bit Algorithm
Auto Sector Erase Completed
NOLast Sectorto Erase
YES
YES
NOData=FFh
23P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 7. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
Toggle Bit checking Q6 not toggled
ERASE SUSPEND
YES
NO
Write Data 30H
Continue Erase
Reading or Programming End
Read Array orProgram
AnotherErase Suspend ?
NO
YES
YES
NO
ERASE RESUME
24P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 8. AUTOMATIC PROGRAM TIMING WAVEFORMS
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tch
Tds Tdh
Tavt
Last 2 Read Status CycleLast 2 Program Command Cycle
TcsWE#
Data
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MX29F040C
Figure 9. CE# CONTROLLED WRITE TIMING WAVEFORM
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tghwl
Tcep
Tds Tdh
Tavt or Taetb
Tceph
WE#
Data
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MX29F040C
Figure 10. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Program Data/Address
Write Data A0H Address 555H
YES
Read Again Data:Program Data?
YES
Auto Program Completed
Data# Polling Algorithm orToggle Bit Algorithm
next address
Last Byte to beProgramed
No
No
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MX29F040C
Figure 11. SILICON ID READ TIMING WAVEFORM
Taa
Tce
Taa
Toe
Toh Toh
Tdf
DATA OUT
C2H A4H
Vhv
Vih
VilA9
ADD
CE#
A1
OE#
WE#
A0
DATA OUTDATAQ0-Q7
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
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MX29F040C
WRITE OPERATION STATUS
Figure 12. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tdf
Tce
Tch
Toe
Toh
CE#
OE#
WE#
Q7
Q0-Q6 Status Data Status Data
ComplementComplement True Valid Data
Taa
Address VAVA
High Z
High ZValid DataTrue
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MX29F040C
Figure 13. DATA# POLLING ALGORITHM
Read Q7~Q0 at valid address(Note 1)
Read Q7~Q0 at valid address
Start
Q7 = Data# ?
Q5 = 1 ?
Q7 = Data# ?(Note 2)
FAIL Pass
No
No
No
Yes
Yes
Yes
Notes:1.Forprogramming,validaddressmeasprogramaddress.Forerasing,validaddressmeaserasesectorsaddress.2.Q7shouldberecheckedevenQ5="1"becauseQ7maychangesimultaneouslywithQ5.
30P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 14. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tdf
Tce
Tch
Toe
Taa
Toh
Address
CE#
OE#
WE#
Q6/Q2 Valid Status
(first read)
Valid Status
(second read) (stops toggling)
Valid Data
VA VAVA
Notes:
1. VA : Valid Address
2. CE# must be toggled when toggle bit is toggling.
VA
Valid Data
31P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
Figure 15. TOGGLE BIT ALGORITHM
Notes:1.Readtogglebittwicetodeterminewhetherornotitistoggling.2.RechecktogglebitbecauseitmaystoptogglingasQ5changesto"1".
Read Q7-Q0 Twice
Q5 = 1?
Read Q7~Q0 Twice
Program/Erase failWrite Reset CMD Program/Erase Complete
Q6 Toggle ?
Q6 Toggle ?
NO
(Note1)
(Note1, 2)
YES
NO
NO
YES
YES
Start
32P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
ACtimingillustratedinFigureAisrecommendedforthesupplyvoltagesandthecontrolsignalsatdevicepower-up.Ifthetiminginthefigureisignored,thedevicemaynotoperatecorrectly.
Figure A. AC Timing at Device Power-Up
Vcc
ADDRESS
CE#
WE#
OE#
DATA
Tvr
TaaTr or Tf Tr or Tf
TceTf
Vcc(min)
GND
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Voh High ZVol
ValidOuput
ValidAddress
Tr
ToeTfTr
Symbol Parameter Min. Max. UnitTvr VccRiseTime 20 500000 uS/V
Tr InputSignalRiseTime 20 uS/V
Tf InputSignalFallTime 20 uS/V
33P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
LATCH-UP CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
Parameter Symbol Parameter Description Test Set TYP MAX UNITCIN2 ControlPinCapacitance VIN=0 12 pF
COUT OutputCapacitance VOUT=0 12 pF
CIN InputCapacitance VIN=0 8 pF
TSOP AND PLCC PIN CAPACITANCE
PARAMETERLIMITS
MIN. TYP. MAX. UNITSByteProgrammingTime 9 300 us
SectorEraseTime 0.7 8 sec
ChipEraseTime 4 32 sec
ChipProgrammingTime 4.5 13.5 sec
Erase/ProgramCycles 100,000 Cycles
Note: 1.Typicalconditionmeans25°C,5V. 2.Maximumconditionmeans90°C,4.5V,100Kcycles.
MIN. MAX.InputVoltagedifferencewithGNDonallpinsexceptI/Opins -1.0V 13.5V
InputVoltagedifferencewithGNDonallI/Opins -1.0V VCC+1.0V
VccCurrent -100mA +100mA
IncludesallpinsexceptVCC.Testconditions:VCC=5V,onepinpertesting
DATA RETENTIONPARAMETER Condition Min. Max. UNITDataretention 55˚C 20 years
34P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
ORDERING INFORMATIONPART NO. Access
Time (ns)Operating Current
MAX.(mA)
Standby Current
MAX.(uA)
Temperature Range
PACKAGE Remark
MX29F040CQC-70G 70 30 5 0oC~70oC 32PinPLCC PBfree
MX29F040CQC-90G 90 30 5 0oC~70oC 32PinPLCC PBfree
MX29F040CTC-70G 70 30 5 0oC~70oC 32PinTSOP(NormalType)
PBfree
MX29F040CTC-90G 90 30 5 0oC~70oC 32PinTSOP(NormalType)
PBfree
MX29F040CQI-70G 70 30 5 -40oC~85oC 32PinPLCC PBfree
MX29F040CQI-90G 90 30 5 -40oC~85oC 32PinPLCC PBfree
MX29F040CTI-70G 70 30 5 -40oC~85oC 32PinTSOP(NormalType)
PBfree
MX29F040CTI-90G 90 30 5 -40oC~85oC 32PinTSOP(NormalType)
PBfree
35P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
PART NAME DESCRIPTION
MX 29 F 70C T I GOPTION:G: Lead-free packageblank: normal
SPEED:70:70ns90: 90ns
TEMPERATURE RANGE:I: Industrial (-40C to 85C)
PACKAGE:Q: PLCCT: TSOP
REVISION:C
DENSITY & MODE:040: 4M, x8 Equal Sector
TYPE:F: 5V
DEVICE:29: Flash
040
.
36P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
PACKAGE INFORMATION
37P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
38P/N:PM1201 REV. 2.1, JUN. 30, 2009
MX29F040C
REVISION HISTORY
Revision No. Description Page Date1.0 1.Removed"Preliminary"title P1 DEC/20/2005 2.Removedcommercialgrade All 3.Addedaccesstime:55ns;Removedaccesstime:120ns All1.1 1.Removedaccesstime:55ns P1,13,15,16 JUN/21/2006 P29,30 2.Removedsectorprotect/chipunprotectfeature P1,5~7,10,12 P26~29 3.Addeddata#polling,togglebitalgorithm P20,211.2 1.DataSheetformatchanged All AUG/15/20061.3 1.Datamodification All AUG/17/20061.4 1.Addedstatement P40 NOV/06/20061.5 1.RemovedPDIPpackageoption P1,2,34,35 JAN/18/2007 2.AddedrecommedationfornonRoHScompliantdevices P1,341.6 1.Addednote1intotable3.CommandDefinitions P8 JAN/17/20081.7 1.ModifiedFigure9.CE#ControlledWriteTimingWaveform P25 FEB/21/20081.8 1.RemovednonPb-freeEPNs P1,34,35 SEP/15/2008 2.AddedC-gradeEPNs P34,351.9 1.ModifiedFigure10.CE#ControlledWriteTimingWaveform P25 MAR/09/2009 (Changed"Twhwh1orTwhwh2"into"TavtorTaetb") 2.ModifiedFigure12.DATA#POLLINGTIMINGWAVEFORM P282.0 1.AddedNoteofmaximum/minimumvoltageduringtransition P13 MAY/26/2009 intoDCcharacteristics 2.AddedDC:IcwspecandmodifyMax.Icr1 P14 3.AddedAC:Twp/Twph/Tghwlspec P162.1 1.Addeddataretentiontable P33 JUN/30/2009 2.Modifiedthesectorerasetimemaxfrom15sto8s P16,33
MX29F040C
39
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