Multiplexores (1)

8/13/2019 Multiplexores (1)

1/14

2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10th ed

A multiplexer (MUX) selects one data line from two or

more input lines and routes data from the selected line tothe output. The particular data line that is selected is

determined by the select inputs.

SummarySummarySummary

Multiplexers

Select n

Output 1Input 2n 2n x 1

MUX

2009 Pearson Education

Multiplexor de 2-a-1 (2 entradas de 1 bit)


2/14


Multiplexor de 4-a-1 (4 entradas de 1 bits)

Data Select

Inputs

S1 S0

Input

Selected

Y

0 0

0 1

1 0

1 1

D0D1D2D3

Two select lines are shown

here to choose any of the

four data inputs.


Diagrama lgico del multiplexor de 4-a-1


3/14


Otra visin


74HC157: Cudruple mult iplexor de 2-a-1

(multiplexor de 2 entradas de 4 bits)


4/14



74x157: otra descripcin


5/14


Multiplexacin de dgitos BCD para un display 7-segmentos


74x153: Mult iplexor de 4 entradas de 2 bits

(doble multiplexor de 4-a-1)


6/14


74LS151: Mult iplexor de 8-a-1

con habilitacin bajo-activa


De otra forma


7/14


Diagrama lgico


Aplicacin: multiplexar 16 entradas de datos


8/14


Expansin de multiplexores: multiplexor de 32-a-1


Multiplexor de 64-a-1


9/14


Cudruple multiplexor de 4-a-1 (de 4 entradas de 4 bits)


Generador de funciones lgicas en forma de suma

de productos

InputsA2A1A0

OutputY

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0

Funcin de 3 variables con un mux 3-a-1


10/14


Para una funcin de 4 variables

A0A1A2A3


Dos realizaciones de un sumador completo


11/14


A demultiplexer (DEMUX) performs the opposite function

from a MUX. It switches data from one input line to two ormore data lines depending on the select inputs.


Demultiplexers

Select n

Input 1 Output 2n

1 x 2n

DEMUX


Un decodificador util izado como demultiplexor (de 1-a-16)

The 74LS138 was introduced

previously as a decoder but can also

serve as a DEMUX. When connected

as a DEMUX, data is applied to oneof the enable inputs, and routed to the

selected output line depending on the

select variables. Note that the outputs

are active-LOW as illustrated in the

following example74LS138

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y0

DEMUX

A

A

A

0

1

2

G

G

G

1

2A

2B

Select

linesData

outputsData

input


12/14


Determine the outputs, given the

inputs shown.


Demultiplexers

74LS138

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y0

DEMUX

A

A

A

0

1

2

G

G

G

1

2A

2B

Data

select

lines

Enable

inputs

Data

outputs

A0

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

A1

A2

G1

G2A

G2B

LOW

LOWThe output logic is opposite to the inputbecause of the active-LOW convention. (Red

shows the selected line).


El decodi ficador 74HC154 usado como demultiplexor (de 1-a-16)


13/14



Parity Generators/Checkers

Parity is an error detection method that

uses an extra bit appended to a group ofbits to force them to be either odd or

even. In even parity, the total number of

ones is even; in odd parity the total

number of ones is odd.

11010011S with odd parity =

S with even parity = 01010011

The ASCII letter S is 1010011. Show the parity

bit for the letter S with odd and even parity.


Lgica bsica de paridad


14/14



Parity Generators/Checkers

The 74LS280 can be used to generate a parity bit or to

check an incoming data stream for even or odd parity.Checker: The 74LS280 can test codes with up

to 9 bits. The even output will normally be

HIGH if the data lines have even parity;

otherwise it will be LOW. Likewise, the odd

output will normally be HIGH if the data lines

have odd parity; otherwise it will be LOW.

Generator: To generate even parity, the parity

bit is taken from the odd parity output. To

generate odd parity, the output is taken from

the even parity output.

(5)

(6)(13)

(1)

(11)

(12)

(2)

(10)

(9)

(8)

F

G

D

E

H

C

B

A

(4) I

74LS280

Data

inputs

Even

Odd


Documents

Multiplexores (1)