Multilayer thin film technology for the STS electronic high density

interconnection

E. Atkin Moscow Engineering Physics Institute (State University) – MEPhI,

M. Merkin, A.Voronin Skobeltsyn Institute of Nuclear Physics / Moscow State University – SINP / MSU,

A. KazakAvangard

CBM Collaboration meeting

March 9-12, 2005

The Interconnection gap• Requires new high density

Interconnect technologies

IC scaling

Time

Siz

e sc

alin

g

PCB scaling

Advanced PCB

Reduced Gap

Thin film lithography based

Interconnect technology

By Eric BeyneIMEC

WHY ?

• Material budget• 25 um pitch• space flexibility• reliability of the contact• stress reliability• special bonding equipment• Difficult to repair

By Eric Beyne

Bonding technology

IC

Bond pitch :

100 25m

SPCBFPCB

contact pitch :

800100 m• Down to 25m pitch

Wire bonding

• High density

substrate

BONDING THIN FILM Technology

By Avangard company

High Density Thin Film Interconnects for Digital Applications

•Technology :– Substrates : 150 mm Ø, Si, glass, ceramic, high Tg laminate or metal.

– Cu lines, 3-5m thick, down to 10m wide lines & spaces– Metal finish top surface : Cu/Ni/Au– Power & ground layers : 2 m thick Al – Integrated decoupling

capacitors (0.75 nF/mm2)

– Automated design

methodology

By Eric BeyneIMEC, Kapeldreef 75, B-3001 Leuven

High Density Thin Film Interconnects By Eric Beyne

IMEC, Kapeldreef 75, B-3001 Leuven

Si w afer

Cu/low K interconnect

Chip passivation

BCB Dielectric

Electroplated Cu

Electroplated Ni (UBM )

Electroplated solder bump

Cu bond pad

Solder balls <100 um

60 um flip chip bump pitch

BCB -benzo-cyclobutene

Flexible PC board&solderingby Avangard company

• polyimide• precise soldering up to 20um pitch to create high reliability contacts between the detector and chip• low profile• price is 1Euro**/front-end channel • passive SMD components close the chip• possibility to create capacitors and inductances by polyimide-metal film• micro connectors 600um high and 300um pitch – easy to repair • SIS ( system in the package)• high frequency interconnection

Multilayer thin film technology RrontEnd

module RND

Micro connector

Silicon detector

FrontEnd chipPolyimide board (options)

Substrate (?)

Option 2

First layer Second layer

10 – Soldering 65

4

3

21

87 87 9

79

7

1. Chip

2. Additional protection

3. First Insulate layer

4. First conductor layer

5. Second Insulate layer

6. Second conductor layer

7. Soldering pads

8. Internal Metallized hole

9. Second layer soldering hole

10.Soldered contact

Option 2Steps

• Cu pad film on the chip

• Polyimide board production

• Chip mounting

• ? Substrate production, polyimide board with the chip mounting onto substrate

• Testing with micro connector

Option 3

3

76

5 4

1 8 2

1. Substrate

2. Chip

3. Glue

4. Polyimide lacquer

5. First conductor layer

6. Polyimide

7. Second conductor layer

8. Evaporated contact

Summary

• Thin film technology interconnection RND

started

• First result expected this year

• Expected price is 1Euro/channel

• We really need to test interconnection technologies