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microprocessors for electrical engineers
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Microcontrollers
8051
CPU
General-Purpose Micro-processor
RAM ROM I/O Port
TimerSerial COM Port
Data Bus
Address Bus
General-Purpose Microprocessor System
Microprocessors:
• CPU for Computers
• No RAM, ROM, I/O on CPU chip itself
• Example : Intel’s x86, Motorola’s 680x0
Many chips on mother’s board
General-purpose microprocessor
RAM ROM
I/O Port
TimerSerial COM Port
Microcontroller
CPU
• A smaller computer
• On-chip RAM, ROM, I/O ports...
• Example : Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X
A single chip
Microcontroller :
Microprocessor
• CPU is stand-alone, RAM, ROM, I/O, timer are separate
• designer can decide on the amount of ROM, RAM and I/O ports.
• expansive
• versatility
• general-purpose
Microcontroller
• CPU, RAM, ROM, I/O and timer are all on a single chip
• fix amount of on-chip ROM, RAM, I/O ports
• for applications in which cost, power and space are critical
• single-purpose
Microprocessor vs. Microcontroller
Advantages over mp
• Cost is lower• Standalone mp never used – memory, I/O,
clock necessary• For mp- large size PCB • Large PCB- more effort and cost• Big physical size• More difficult to trouble shoot mp based• A mc is a mp with integrated peripherals.
Advantages of mc
• Low cost• Small size of product• Easy to troubleshoot and maintain• More reliable• Additional mem, I/o can also be added• Software security feature• All features available with 40 pins. • Useful for small dedicated applications and not for larger
system designs which may require many more I/O ports. • Mostly used to implement small control functions.
Block Diagram
CPU
On-chip RAM
On-chip ROM for program code
4 I/O Ports
Timer 0
Serial PortOSC
Interrupt Control
External interrupts
Timer 1
Timer/Counter
Bus Control
TxD RxDP0 P1 P2 P3
Address/Data
Counter Inputs
Pin Description of the 8051Pin Description of the 8051
1234567891011121314151617181920
4039383736353433323130292827262524232221
P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7RST
(RXD)P3.0(TXD)P3.1
(T0)P3.4(T1)P3.5
XTAL2XTAL1
GND
(INT0)P3.2(INT1)P3.3
(RD)P3.7(WR)P3.6
VccP0.0(AD0)P0.1(AD1)P0.2(AD2)P0.3(AD3)P0.4(AD4)P0.5(AD5)P0.6(AD6)P0.7(AD7)EA/VPPALE/PROGPSENP2.7(A15)P2.6(A14)P2.5(A13)P2.4(A12)P2.3(A11)P2.2(A10)P2.1(A9)P2.0(A8)
8051(8031)
Register Set of 8051-SFR• Special Function Registers (SFR) are
special purpose registers – 21 in number• Addresses from 80H to FFH of all SFR’s• Two 8 bit regist. A and B – store operands• A, B, PSW, P0-P3, IP, IE, TCON,SCON
– Bit addressable, 8bit each, 11 in number• SP, DPH,DPL,TMOD,TH0,TL0,TH1,TL1,SBUF,PCON
– Byte addressable, 8bit each. – DPTR – data pointer, accesses ext. mem. DPH + DPL = DPTR
• Starting 32 bytes of RAM – general purpose reg, divided into 4 register banks of 8 registers each. Only one of these bank accessible at one time. RS1 and RS0 of PSW used to select bank.
Register Set of 8051-SFR• TH0-TL0 and TH1-TL1
– 16 bit timer registers
• P0-P3 – port latches• SP, PSW, IP – Interrupt Priority, IE – enable• TCON – timer/counter control reg to turn on/off the
timers, interrupt control flags for ext. int like INT1 and INT0
• TMOD – modes of operation of timer/counter• SCON – serial port mode control reg• SBUF – serial data buffer for transmit and receive• PCON – Power control reg – power down bit, idle bit
RegistersA
B
R0
R1
R3
R4
R2
R5
R7
R6
DPH DPL
PC
DPTR
PC
Some 8051 16-bit Register hold addresses
Some 8-bitt Registers of the 8051
PSW (8)
SP (8)
8051 features• Internal ROM – 4K, RAM – 128bytes
• Thirty two I/O pins as 4 – 8 bit ports P0 –P3
• Two 16 bit timer/counters T0 and T1• Full duplex serial data receiver/trans. SBUF
• Control registers – TCON, TMOD, SCON, PCON, IP and IE
• Two external and three Internal Interrupt sources
• Oscillator and clock circuits
PCON
• Idle mode – oscillator, serial port, interrupt, timer blocks are active but clock disabled.
• Can be terminated with INT or reset
• Power down mode – on-chip osc stopped. RAM contents preserved. Hardware reset
• Two general purpose flags and a double baud bit.
TMOD Register:
• Gate : When set, timer only runs while INT(0,1) is high.
• C/T : Counter/Timer select bit.
• M1 : Mode bit 1.• M0 : Mode bit 0.
TCON Register:
• TF1: Timer 1 overflow flag.• TR1: Timer 1 run control bit.• TF0: Timer 0 overflag.• TR0: Timer 0 run control bit.• IE1: External interrupt 1 edge flag.• IT1: External interrupt 1 type flag.• IE0: External interrupt 0 edge flag.• IT0: External interrupt 0 type flag.
Memory addressing• Program memory - EPROM
– Intermediate results, variables, const– 4KB internal from 0000 – 0FFFH– 64KB external with PSEN, till FFFFH– Internal –external difference PSEN
• Data Memory – RAM– 64KB of external with DPTR signal– Internal memory two parts - 128 bytes Internal RAM
and secondly set of addresses from 80-FFH for SFR’s
– 128 bytes from 00 – 7FH direct or indirect– SFR addresses – only direct addressing mode
Memory Addressing
• Lower 128 bytes in three sections– 00-1F – 32 bytes 4 banks 00,01,10,11 each
containing 8 registers of 8 bits each. Only one accessible at a time with PSW bits.
– 20-2FH – 16bytes is bit addressable with addresses 0F to 7FH, 20.7 or 20.0, or 0-7
– 30-7F – 80 bytes of general purpose data memory. It is byte addressable, used for stack
• RAM memory space allocation in the 8051
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00HRegister Bank 0
(Stack )Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM
External I/O interfacing
• 8051 has two timers, one Serial i/o port and 4 – 8bit addressable ports.
• More I/O as external memory-mapped I/O
Interrupts of 8051
• 5 sources of Interrupts– INT0 and INT1 bars external interrupt inputs
• These are processed internally by IE0 and IE1 flags
– Two timers which generate int when FFFFH– Serial port interrupt if R1 or T1 is set.
• Single step int by software
Interrupt Enable Register :
• EA : Global enable/disable.• --- : Undefined.
• ET2 :Enable Timer 2 interrupt.• ES :Enable Serial port interrupt.• ET1 :Enable Timer 1 interrupt.• EX1 :Enable External 1 interrupt.• ET0 : Enable Timer 0 interrupt. • EX0 : Enable External 0 interrupt.
Addressing modes• Direct - MOV R0, 89 H, Eg 89 of TMOD
– operands 8 bit address field– Internal data RAM and SFRS only
• Indirect - ADD A, @ R0
– Address is stored in R0 or R1 or SP if 8bits
– 16 bit addresses only in DPTR
• Register Instructions - ADD A, R7
– Operands in R0 – R7 of selected register bank. Register bank selected by two bank select bits of PSW
• Register specific (Register Implicit) RLA• Immediate Mode ADD A, #100• Indexed Addressing
Addressing Modes
• Indexed Addressing– MOVC A, @A+DPTR– JMP @ A + DPTR– Used to access only program memory not data– Used for look up table manipulations– Only PC or data pointer – 16 bit storage registers allowed– Base address in PC or DPTR, relative addr in A
Identify the addressing modes
• MOV A,#50H• MOV A, R5• MOV DPTR,#nn• MOV 90H, #0a5H• MOV 0A8H, 77H• MOV @R1,#n• MOV A, @R0• MOVX @DPTR,A• MOVC A, @A+PC
• Explain the internal and external program memory as well as data memory of 8051 with the diagram showing their capacities.
• Draw the diagram to Interface Program memory of 16K x 8 EPROM to 8051and give its memory map. The address of memory map should start from 0000H.
• Discuss about various addressing modes of 8051.• Explain the interrupt structure. Mention the priority. Explain how least priority
is made as highest priority? • Explain in 8051 instruction set to handle bit addressable RAM. • Draw and discuss the formats and bit definitions of the following SFR’s .(a)
IP(b) TMOD(c) TCON(d) SCON • (a) Explain the internal RAM organization of 8051? Discuss how switching
between register banks is possible? • What is the use of SFR? List out the SFR of 8051? • Discuss the advantages of microcontroller based systems over
microprocessor based systems?• (b) With a neat sketch discuss the internal architecture of 8051?
Explain the Flags d program status word of 8051 microcontroller? • Explain the different types of Interrupt in 8051.• Discuss the register set of 8051• Explain the addressing modes of 8051 microcontroller. • Explain the different modes of operation of timer/counter in 8051.• How does 8051 differentiate between the external and Internal prog mem