Mosfet Lab 1

8/10/2019 Mosfet Lab 1

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University of Pennsylvania

ESE206: Electrical Circuits and Systems II Lab

MOSFET (Field Effect Transistor) Lab 1:

NMOS Measurements and Characterization

1. ObjectivesThe objectives of this first Field Effect Transistors (FETs) lab is:

1. To understand the operation of the MOSFET

2. To measure the I-V characteristics and to determine the transistor parameters:

a. Threshold voltage Vt,

b. Transconductance parameter kn'W/L

c. Channel length modulation parameter (or Early voltage VA)3. To illustrate amplification using a MOSFET

2. Background

A MOSFET transistor is a three terminal semiconductor device in which current, flowingfrom the drain-source terminals, is controlled by the voltage on the gate terminal ( Figure

1a). The current-voltage characteristics of a NMOS transistor are shown in Figure 1b. In

order for current to flow the gate voltage VGShas to be larger than the threshold voltageVt.

(a)


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(b)

Figure 1 (a) NMOS transistor showing two different symbols (with biasing voltages) and

(b) Drain current IDvs. drain-source voltage VDSwith gate-source voltage VGSas a

parameter (VGS=1 to 3V in steps of 0.2V).

There are two regions in which the transistor operates depending on the voltages one

applies. The first region is called the "triode" region and the second one is called"saturation" as indicated in Figure 1b. The current-voltage relationship in each region is

given below.

2.1 Triode region (vDS vGS-Vt)

When the drain to source voltage vDSis smaller than vGS-Vt, the transistor operates in thetriode region. The currents-voltage relationship is given by,

= 2'2

1)( DSDStGSnD vvVv

L

Wki when vDS


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)(

1

'

tGSn

DS

VvL

W

k

r

= (3)

2.2. Saturation region (vDS vGS-Vt)

When the drain to source voltage exceeds the value vGS-Vt, the channel will be pinched-off and the current can be written as

2' )(2

1tGSnD Vv

L

Wki = when vDS >(vGS- Vt) (4)

In the expression above, the drain current is independent of the drain-source voltage what

implies that the transistor acts as an ideal current source in this region. This is only anapproximation. In reality, the current will vary slightly with the drain voltage. This

variation can be modeled by adding a parameter , called the channel length modulationparameter, as shown in the following expression,

)1()(2

1 2'DStGSnD vVv

L

Wki += when vDS >(vGS- Vt) (5)

The channel length modulation parameter is usually pretty small (typical values are0.02 V

-1). The output resistance of the transistor in saturation can now be written as,

D

A

D

oI

V

Ir ==

1 (6).

in which IDis the drain current, and VA(=1/) is the Early voltage.

2.3 Determination of the transistor characteristics.

The main parameters that characterize a MOSFET are the threshold voltage V t, the

parameter (kn'W/L) and the channel length modulation parameter . The first two

parameters can be easily found by plotting the square root of the drain current versus the

t lt h th t i t i i t ti I d d i ti (4)


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Slope = LWkn /2

1 '

. (8)

2.4 PMOS transistor

The PMOStransistor has similar characteristics. The only difference is that the polarity

of the voltages changes, as shown in Figure 2.

Figure 2: PMOS transistor showing two symbols and direction of the current flow.

The values of the threshold voltage Vt(for enhancement transistor), and of and kp' arenow negative. The current expressions are then given by,

Triode region:

= 2'2

1)( DSDStGSpD vvVv

L

Wki when vDS >(vGS- Vt) (9)

Saturation region:

2' )(2

1tGSpD Vv

L

Wki = when vDS


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4. In-Lab Experiments

Parts1 - CD4007 MOS transistor array (data sheet from National Semiconductor)

2 - 0.1 microFarad capacitors2 - 10 kOhm resistor

Power supplies

Oscilloscope with FFT moduleDigital multimeter (Voltage and Current meter)

Procedure

You will be using the CD4007 MOSFET array that contains three NMOS and three

PMOS transistors as shown in Figure 3. The key point to remember when using this arrayis that the substrate of the NMOS (bulk connection) is connected to pin 7 and should

always be connected to the most negative supply voltage. Pin 14 is the substrate of

the PMOS and must be connected to the most positive supply voltage in the circuit!

Figure 3: The CD4007 MOSFET array.

Pin 7is connected to the substrate of theNMOS and should be connected to the

most negative voltage of the circuit; pin14 is the bulk of the PMOS and shouldbe connected to the most positive voltage

in the circuit. (Source: National

Semiconductor CD4007 Datasheet)

4.1. IDSvGScharacteristics and determination of Vtand kn'W/L

The goal of this experiment is to determine the drain current as a function of the gatevoltage when the transistor is in saturation. From this characteristic you can determine the

threshold voltage and the transconductance parameter.

a. Build the circuit of Figure 4. You can use any of the three NMOS transistors of
http://cd4007datasheet.pdf/http://cd4007datasheet.pdf/


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Figure 4: NMOS transistor in saturation used to measure iD-vGScharacteristic.

b. Vary the gate voltage (vGS= vDS) from 0 to 6V in steps of 1V and record the

corresponding drain current iD.

c. For the report: Plot the ID-vGSgraph. Also, calculate the square root of iDand plot the

iD- vGS relationship. Use the method outlined in section 2.3to find the thresholdvoltage Vt(the intersection with the horizontal axis) and the transconductance

parameter (kn'W/L).

4.2 ID- vDScharacteristics and determination of the output resistance ro and

The objective of the following experiment is to measure the output characteristics of theNMOS transistor: iD-vDSwith vGSas a parameter. From this graph you will be able to

determine the output resistor ro and the channel length modulation parameter .

Figure 5: Circuit to measure the output characteristics of a transistor.

a. Build the circuit of Figure 5 (or modify the circuit of Figure 3). Use the sametransistor as you used for the previous experiment.

b Keep the gate voltage constant at 3V and measure the drain current while varying


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voltage VA. It is likely that the values you find for are slightly different for eachgraph. In that case, take the average value as the value for the transistor.

4.3 ID- vGSfor small values of vDS(determination of the resistance of a MOSFET)

In this experiment you will keep the value of the drain voltage small so that the transistoroperates in the triode region. Since vDSis kept small the transistor acts as a resistor with a

value that is determined by the gate voltage (see expression (3) above).

The goal of this experiment is to experimentally determine the resistor values rDSforvarious gate voltages.

a. In the circuit of Figure 5, set the voltage vDS=0.2V so that the transistor will act asa electronically controlled resistor.

b. Vary the gate voltage vGSfrom 3 to 10V in steps of 1V, and record the

corresponding drain current iDS. Find also the value of the resistor rDS = (vDS/iDS).c. For the report: determine the resistance rDSfrom the measurements and plot the

value of rDSas a function of the gate voltage vGS. Also, calculate the value of the

resistance according to the expression (3) and using the measured values of V tandkn

'W/L. Plot the measured and calculated resistor values on the same graph.

Notice the 1/x relationship.

4.4 Large-Signal Operation: Transfer characteristic

The objective of this measurement is to determine the transfer characteristic of the

MOSFET amplifier, shown in Figure 6. You will determine the output versus the input

voltage. The graph you'll obtain will be similar to the one in Fig. 4.26(b) of the textbook

(Sedra-Smith, 5th

ed., section 4.4.1). From this characteristic you will be able todetermine the amplification of this circuit.


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value of amplification (i.e. the ratio of the amplitude of the output sinusoid to the

input sinusoid)? What do you notice about the phase relationship between the

input and output signal? Is the signal distorted? Take a snapshot of the input andoutput signals for your report.

c. You may change the amplitude of the input and see if the distortion improves or

deteriorates. You can see the effect of the non-linearity of the amplifier betterwhen you switch to a triangular input signal. Notice the distortion (or lack of

distortion). Take a snapshot for your report.

d. Switch the input back to a sinusoid with 5 kHz frequency. Set the amplitude sothat the output signal is not too much distorted. Take the FFT of the output signal

and determine the amplitude (in dB) and position (frequency) of the peaks. If thesignal is not distorted you should have a single peak at a frequency of 5kHz. Thepresence of peaks at multiples of the fundamental frequency of 5kHz indicates

that the signal is distorted. It is normal to see multiple peaks for this simple

amplifier. Later we'll discuss ways to reduce the distortion. Take a snapshot for

your report.e. Determine the cut-off frequencies (i.e. the 3-dB where the amplitude of the output

signal has decreased by 3-dB). Do this by changing the frequency of the input

signal from a few tens of Hz up to hundred of kHz. Record the values of the two3-dB points. What is bandwidth of the amplifier?

f. For your report:

Compare the value of the amplification determined in this experiment withthe value obtained from the transfer characteristic (previous experiment ofsection 4.4).

What is the phase relationship between input and output? Can you explain

the phase relationship? From the FFT determine the total harmonic distortion THD of the outputsignal (for definition of total harmonic distortion see previous lab on AM

Demodulator: www.seas.upenn.edu/~ese216/labs/AMDemodLabOpAmpPart2.pdf.

The coupling capacitor and resistor R1 in Figure 7acts as a high passfilter. Calculate the corresponding 3-dB point of this filter. Express the

value in Hz. Compare this value to the one measured in the lab (low

frequency 3-dB point).

References

1. "Microelectronic Circuits, Sedra, Smith, 5th

edition, Oxford University Press, New

York, 2004.

A di A (MOSFET L b1)
http://www.seas.upenn.edu/~ese206/labs/AMDemodLabOpAmpPart2.pdfhttp://www.seas.upenn.edu/~ese206/labs/AMDemodLabOpAmpPart2.pdfhttp://www.seas.upenn.edu/~ese206/labs/AMDemodLabOpAmpPart2.pdfhttp://www.seas.upenn.edu/~ese206/labs/AMDemodLabOpAmpPart2.pdf


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Date/Time run: 03/27/05 14:00:35** Profile: "SCHEMATIC1-DCTran2" [ C:\My Documents\ClassWork\@ESE216\PSpiceSimulations\nmoschar-schemati...

Temperature: 27.0

Date: March 27, 2005 Page 1 Time: 14:07:04

(A) nmoschar-SCHEMATIC1-DCTran2.dat (active)

V_V20V 2V 4V 6V 8V 10VID(M1)

0A

0.5mA

1.0mA

1.5mA

2.0mA

1.01.2

1.4

1.6

1.8

2.0

2.2

2.4

2.6

2.8

Vgs=3V

Triode

Saturation

Appendix A (MOSFET Lab1)