12
© Semiconductor Components Industries, LLC, 2015 December, 2020 Rev. 2 1 Publication Order Number: FDPC8014AS/D MOSFET – Dual, N-Channel, POWERTRENCH ) , Power Clip, Asymmetric 25 V FDPC8014AS General Description This device includes two specialized NChannel MOSFETs in a dual package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFETt (Q2) have been designed to provide optimal power efficiency. Features Q1: NChannel Max r DS(on) = 3.8 mW at V GS = 10 V, I D = 20 A Max r DS(on) = 4.7 mW at V GS = 4.5 V, I D = 18 A Q2: NChannel Max r DS(on) = 1.0 mW at V GS = 10 V, I D = 40 A Max r DS(on) = 1.2 mW at V GS = 4.5 V, I D = 37 A Low Inductance Packaging Shortens Rise/Fall Times, Resulting in Lower Switching Losses MOSFET Integration Enables Optimum Layout for Lower Circuit Inductance and Reduced Switch Node Ringing These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant Applications Computing Communications General Purpose Point of Load PIN DESCRIPTION Pin Name Description 1 HSG High Side Gate 2 GR Gate Return 3, 4, 9 V+ (HSD) High Side Drain 5, 6, 7 SW Switching Node, Low Side Drain 8 LSG Low Side Gate 10 GND (LSS) Low Side Source www. onsemi.com Power Clip 5x6 PDFN8 5x6, 1.27P, CASE 483AR See detailed ordering and shipping information on page 10 of this data sheet. ORDERING INFORMATION MARKING DIAGRAM Bottom Top NChannel MOSFET FDPC8014AS = Specific Device Code $Y = ON semiconductor Logo &Z = Assembly Plant Code &3 = 3Digit Date Code &K = 2Digits Lot Run Traceability Code PIN1 PIN1 PAD10 GND(LSS) PAD9 V+(HSD) $Y&Z&3&K FDPC 8014AS GR GR V+ LSG SW SW SW V+ HSG LSG SW SW SW V+ V+ HSG

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Page 1: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

© Semiconductor Components Industries, LLC, 2015

December, 2020 − Rev. 21 Publication Order Number:

FDPC8014AS/D

MOSFET – Dual, N-Channel,POWERTRENCH�, PowerClip, Asymmetric25 V

FDPC8014ASGeneral Description

This device includes two specialized N−Channel MOSFETs in adual package. The switch node has been internally connected to enableeasy placement and routing of synchronous buck converters. Thecontrol MOSFET (Q1) and synchronous SyncFET� (Q2) have beendesigned to provide optimal power efficiency.

Features• Q1: N−Channel

♦ Max rDS(on) = 3.8 m� at VGS = 10 V, ID = 20 A♦ Max rDS(on) = 4.7 m� at VGS = 4.5 V, ID = 18 A

• Q2: N−Channel♦ Max rDS(on) = 1.0 m� at VGS = 10 V, ID = 40 A♦ Max rDS(on) = 1.2 m� at VGS = 4.5 V, ID = 37 A

• Low Inductance Packaging Shortens Rise/Fall Times, Resulting inLower Switching Losses

• MOSFET Integration Enables Optimum Layout for Lower CircuitInductance and Reduced Switch Node Ringing

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHSCompliant

Applications• Computing

• Communications

• General Purpose Point of Load

PIN DESCRIPTION

Pin Name Description

1 HSG High Side Gate

2 GR Gate Return

3, 4, 9 V+ (HSD) High Side Drain

5, 6, 7 SW Switching Node, Low Side Drain

8 LSG Low Side Gate

10 GND (LSS) Low Side Source

www.onsemi.com

Power Clip 5x6PDFN8 5x6, 1.27P,

CASE 483AR

See detailed ordering and shipping information on page 10 ofthis data sheet.

ORDERING INFORMATION

MARKING DIAGRAM

BottomTop

N−Channel MOSFET

FDPC8014AS = Specific Device Code$Y = ON semiconductor Logo&Z = Assembly Plant Code&3 = 3−Digit Date Code&K = 2−Digits Lot Run Traceability Code

PIN1PIN1

PAD10 GND(LSS)

PAD9 V+(HSD)

$Y&Z&3&KFDPC

8014AS

GR

GR

V+

LSG

SW

SW

SWV+

HSG

LSG

SW

SW

SW

V+

V+

HSG

Page 2: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com2

MOSFET MAXIMUM RATINGS (TA = 25°C, unless otherwise noted)

Symbol Parameter Q1 Q2 Unit

VDS Drain to Source Voltage 25 (Note 4) 25 V

VGS Gate to Source Voltage ±12 ±12 V

ID Drain Current −Continuous TC = 25°C (Note 5) 59 159 A

−Continuous TC = 100°C (Note 5) 37 100

−Continuous TA = 25°C 20 (Note 1a) 40 (Note 1b)

−Pulsed (Note 3) 266 1116

EAS Single Pulse Avalanche Energy (Note 2) 73 294 mJ

PD Power Dissipation for Single Operation TC = 25°C 21 37 W

Power Dissipation for Single Operation TA = 25°C 2.1 (Note 1a) 2.3 (Note 1b)

TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)

Symbol Parameter Q1 Q2 Unit

R�JC Thermal Resistance, Junction to Case 6.0 3.3 °C/W

R�JA Thermal Resistance, Junction to Ambient 60 (Note 1a) 55 (Note 1b)

R�JA Thermal Resistance, Junction to Ambient 130 (Note 1c) 120 (Note 1d)

1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. RθJC is guaranteed bydesign while RθCA is determined by the user’s board design.

G DF

DS

SF

SS

G DF

DS

SF

SS

G DF

DS

SF

SS

G DF

DS

SF

SS

a. 60°C/W when mounted ona 1 in2 pad of 2 oz copper

c. 130°C/W when mounted ona minimum pad of 2 oz copper

b. 55°C/W when mounted ona 1 in2 pad of 2 oz copper

d. 120°C/W when mounted ona minimum pad of 2 oz copper

2. Q1: EAS of 73 mJ is based on starting TJ = 25°C; N−ch: L = 3 mH, IAS = 7 A, VDD = 30 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 24 A.Q2: EAS of 294 mJ is based on starting TJ = 25°C; N−ch: L = 3 mH, IAS = 14 A, VDD = 25 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 46 A.

3. Pulsed Id please refer to Figure 11 and Figure 24 SOA graph for more details.4. The continuous VDS rating is 25 V; However, a pulse of 30 V peak voltage for no longer than 100 ns duration at 600 kHz frequency can be

applied.5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &

electro−mechanical application board design.

Page 3: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com3

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Symbol Parameter Test Condition Type Min Typ Max Unit

OFF CHARACTERISTICS

BVDSS Drain to Source Breakdown Voltage

ID = 250 �A, VGS = 0 V ID = 1 mA, VGS = 0 V

Q1Q2

2525

−−

−−

V

�BVDSS / �TJ Breakdown Voltage Temperature Coefficient

ID = 250 �A, referenced to 25°CID = 10 mA, referenced to 25°C

Q1Q2

−−

2425

−−

mV/°C

IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V VDS = 20 V, VGS = 0 V

Q1Q2

−−

−−

1500

�A�A

IGSS Gate to Source Leakage Current, Forward

VGS = 12 V / −8 V, VDS = 0 V VGS = 12 V / −8 V, VDS = 0 V

Q1Q2

−−

−−

±100±100

nAnA

ON CHARACTERISTICS

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 �A VGS = VDS, ID = 1 mA

Q1Q2

0.81.0

1.31.5

2.53.0

V

�VGS(th) / �TJ Gate to Source Threshold Voltage Temperature Coefficient

ID = 250 �A, referenced to 25°C ID = 10 mA, referenced to 25°C

Q1Q2

−−

−4−3

−−

mV/°C

rDS(on) Drain to Source On Resistance VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 18 A VGS = 10 V, ID = 20 A, TJ =125°C

Q1 −−−

2.93.63.9

3.84.75.3

m�

VGS = 10 V, ID = 40 A VGS = 4.5 V, ID = 37 A VGS = 10 V, ID = 40 A , TJ =125°C

Q2 −−−

0.750.91.0

1.01.21.5

gFS Forward Transconductance VDS = 5 V, ID = 20 A VDS = 5 V, ID = 40 A

Q1Q2

−−

182296

−−

S

DYNAMIC CHARACTERISTICS

Ciss Input Capacitance Q1: VDS = 13 V, VGS = 0 V, f = 1 MHZ Q2: VDS = 13 V, VGS = 0 V, f = 1 MHZ

Q1Q2

−−

16956985

23759780

pF

Coss Output Capacitance Q1Q2

−−

4952170

7103040

pF

Crss Reverse Transfer Capacitance Q1Q2

−−

54172

100245

pF

Rg Gate Resistance Q1Q2

0.10.1

0.40.4

1.21.2

SWITCHING CHARACTERISTICS

td(on) Turn−On Delay Time Q1: VDD = 13 V, ID = 20 A, RGEN = 6 �Q2: VDD = 13 V, ID = 40 A, RGEN = 6 �

Q1Q2

−−

816

1629

ns

tr Rise Time Q1Q2

−−

26

1012

ns

td(off) Turn−Off Delay Time Q1Q2

−−

2448

3876

ns

tf Fall Time Q1Q2

−−

25

1010

ns

Qg Total Gate Charge VGS = 0 V to 10 V Q1: VDD = 13 V, ID = 20 A Q2: VDD = 13 V, ID = 40 A

Q1Q2

−−

2597

35135

nC

Qg Total Gate Charge VGS = 0 V to 4.5 V Q1: VDD = 13 V, ID = 20 A Q2: VDD = 13 V, ID = 40 A

Q1Q2

−−

1144

1662

nC

Qgs Gate to Source Gate Charge Q1: VDD = 13 V, ID = 20 A Q2: VDD = 13 V, ID = 40 A

Q1Q2

−−

3.414

−−

nC

Qgd Gate to Drain “Miller” Charge Q1Q2

−−

2.29

−−

nC

Page 4: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com4

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued)

Symbol UnitMaxTypMinTypeTest ConditionParameter

DRAIN−SOURCE DIODE CHARACTERISTICS

VSD Source to Drain Diode Forward Voltage

VGS = 0 V, IS = 20 A (Note 6) VGS = 0 V, IS = 40 A (Note 6)

Q1Q2

−−

0.80.8

1.21.2

V

IS Diode Continuous Forward Current

TC = 25°C Q1Q2

−−

59159

−−

A

IS,Pulse Diode Pulse Current Q1Q2

−−

2661116

−−

A

trr Reverse Recovery Time Q1: IF = 20 A, di/dt = 100 A/�s Q2: IF = 40 A, di/dt = 300 A/�s

Q1Q2

−−

2544

4070

ns

Qrr Reverse Recovery Charge Q1Q2

−−

1078

20125

nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions.6. Pulse Test: Pulse Width < 300 �s, Duty cycle < 2.0%.

TYPICAL CHARACTERISTICS (Q1 N−CHANNEL) (TJ = 25°C unless otherwise noted)

NO

RM

ALI

ZE

DD

RA

IN T

O S

OU

RC

E O

N−

RE

SIS

TAN

CE

0.0 0.2 0.4 0.6 0.8 1.00

15

30

45

60

75

VGS = 3.5 V

VGS = 3 V

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

VGS = 2.5 V

VGS = 10 V

I D, D

RA

IN C

UR

RE

NT

(A

)

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 4.5 V

0 15 30 45 600

1

2

3

4

5

VGS = 3 V

ID, DRAIN CURRENT (A)

VGS= 3.5 V VGS = 4.5 V

VGS = 2.5 V

VGS= 10 V

−75 −50 −25 0 25 50 75 100 125 0150.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6ID = 20 AVGS = 10 V

NO

RM

ALI

ZE

DD

RA

IN T

O S

OU

RC

E O

N−

RE

SIS

TAN

CE

TJ, JUNCTION TEMPERATURE (°C)1 4 5 6

0

3

6

9

12

TJ = 125°C

ID = 20 A

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 1. On Region Characteristics Figure 2. Normalized On−Resistance vs. Drain Currentand Gate Voltage

Figure 3. Normalized On Resistance vs. JunctionTemperature

Figure 4. On−Resistance vs. Gate to Source Voltage

r DS

(on)

DR

AIN

TO

SO

UR

CE

ON−

RE

SIS

TAN

CE

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

75

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

TJ = 25°C

2 3 8 9 107

Page 5: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com5

TYPICAL CHARACTERISTICS (Q1 N−CHANNEL) (TJ = 25°C unless otherwise noted) (continued)

I D, D

RA

IN C

UR

RE

NT

(A

)

Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs.Source Current

Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage

Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs.Case Temperature

1.0 1.5 2.0 2.5 3.00

15

30

45

60

75

VGS, GATE TO SOURCE VOLTAGE (V)0.0 0.2 0.4 0.6 0.8 1.0

0.001

0.01

0.1

1

10

100

I S, R

EV

ER

SE

DR

AIN

CU

RR

EN

T (

A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

VDS = 5 V

TJ = 150°C

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

TJ = 25°C

TJ = −55°C

VGS = 0 V

TJ = 150°C TJ = 25°C

TJ = −55°C

0 6 12 18 24 300

2

4

6

8

10

Qg, GATE CHARGE (nC)

ID = 20 A

VDD = 13 V

VDD = 10 V

VDD = 15 V

VG

S, G

AT

E T

O S

OU

RC

E V

OLT

AG

E (

V)

0.1 1 10 2510

100

1000

10000

CA

PA

CIT

AN

CE

(pF

)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Crss

Coss

Ciss

f = 1 MHzVGS = 0 V

0.001 0.01 0.1 1 101

10

30

TJ = 125°C

tAV, TIME IN AVALANCHE (ms)

TJ = 25°C

TJ = 100°C

100 25 50 75 100 1250

10

20

30

40

50

60

TC, CASE TEMPERATURE (°C)

150

I AS, A

VA

LAN

CH

E C

UR

RE

NT

(A

)

I D, D

RA

IN C

UR

RE

NT

(A

)

VGS = 4.5 V

VGS = 10 V

R�JC = 6.0°C/W

Page 6: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com6

TYPICAL CHARACTERISTICS (Q1 N−CHANNEL) (TJ = 25°C unless otherwise noted) (continued)

10−5 10−4 10−3 10−2 10−1 10.001

0.01

0.1

1

2

SINGLE PULSE

DUTY CYCLE−DESCENDING ORDER

r(t)

, NO

RM

ALI

ZE

D E

FF

EC

TIV

E T

RA

NS

IEN

TT

HE

RM

AL

RE

SIS

TAN

CE

PDM

t1t2

10−5 10−4 10−3 10−2 10−1 110

100

1000

10000

t, PULSE WIDTH (s)0.01 0.1 1 10

0.01

0.1

1

10

100

300

CURVE BENT TOMEASURED DATA

VDS, DRAIN to SOURCE VOLTAGE (V)

SINGLE PULSETJ = MAX RATEDR�JC = 6.0°C/WTC = 25°C

Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation

Figure 13. Junction−to−Case Transient Thermal Response Curve

THIS AREA IS LIMITEDBY rDS(on)

10 �s

100 �s

1 ms10 ms100 ms/DC

100

I D, D

RA

IN C

UR

RE

NT

(A

)

P(P

K),

PE

AK

TR

AN

SIE

NT

PO

WE

R (

W)

t, RECTANGULAR PULSE DURATION (sec)

D = 0.50.20.10.050.020.01

NOTES:Z�JC (t) = r(t) x R�JCR�JC = 6.0°C/WDUTY FACTOR: D = t1 / t2TJ − TC = PDM x Z�JC (t)

SINGLE PULSER�JC = 6.0°C/WTC = 25°C

Page 7: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com7

TYPICAL CHARACTERISTICS (Q2 N−CHANNEL) (TJ = 25°C unless otherwise noted)

0.0 0.2 0.4 0.60

30

60

90

120

150

0 30 60 90 1200

2

4

6

8

−75 −50 −25 0 25 50 75 100 1250.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5ID = 40 AVGS = 10 V

0

1

2

3

4

5

ID = 40 A

1.0 1.5 2.0 2.50

30

60

90

120

150

0.0 0.2 0.4 0.6 0.80.001

0.01

0.1

1

10

100

0.8

150

3.0 1.0

Figure 14. On−Region Characteristics Figure 15. Normalized on−Resistance vs. Drain Current and Gate Voltage

Figure 16. Normalized On−Resistance vs.Junction Temperature

Figure 17. On−Resistance vs. Gate to Source Voltage

Figure 18. Transfer Characteristics Figure 19. Source to Drain Diode Forward Voltage vs.Source Current

NO

RM

ALI

ZE

DD

RA

IN T

O S

OU

RC

E O

N−

RE

SIS

TAN

CE

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

I D, D

RA

IN C

UR

RE

NT

(A

)

VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

NO

RM

ALI

ZE

DD

RA

IN T

O S

OU

RC

E O

N−

RE

SIS

TAN

CE

TJ, JUNCTION TEMPERATURE (°C)

TJ = 125°C

VGS, GATE TO SOURCE VOLTAGE (V)

r DS

(on)

DR

AIN

TO

SO

UR

CE

ON−

RE

SIS

TAN

CE

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

TJ = 25°C

I D, D

RA

IN C

UR

RE

NT

(A

)

VGS, GATE TO SOURCE VOLTAGE (V)

I S, R

EV

ER

SE

DR

AIN

CU

RR

EN

T (

A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

VDS = 5 V

TJ = 125°C

PULSE DURATION = 80 �sDUTY CIRCLE = 0.5% MAX

TJ = 25°C

TJ = −55°C

VGS = 0 V

TJ = 125°C

TJ = 25°C

TJ = −55°C

VGS = 10 V

VGS = 4.5 V

VGS = 3.5 V

VGS = 3 V

VGS = 2.5 V

VGS = 3.5 V VGS = 4.5 V VGS = 10 V

VGS = 3 V

VGS = 2.5 V

150

4 5 62 3 8 9 107

Page 8: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com8

TYPICAL CHARACTERISTICS (Q2 N−CHANNEL) (TJ = 25°C unless otherwise noted) (continued)

0 20 40 60 800

2

4

6

8

10

0.1 1 10100

1000

10000

Crss

Coss

Ciss

0.001 0.01 0.1 1 10 100 10001

10

100

25 50 75 100 1250

32

64

96

128

160

0.1 1 100.1

1

10

100

10002000

10−5 10−4 10−3 10−2 10−1 110

100

1000

10000

100

150

Figure 20. Gate Charge Characteristics Figure 21. Capacitance vs. Drain to Source Voltage

Figure 22. Unclamped Inductive Switching Capability Figure 23. Maximum Continuous Drain Current vs.Case Temperature

Figure 24. Forward Bias Safe Operating Area Figure 25. Single Pulse Maximum Power Dissipation

25

70

Qg, GATE CHARGE (nC)

ID = 40 A

VDD = 13 V

VDD = 10 V

VDD = 15 V

VG

S, G

AT

E T

O S

OU

RC

E V

OLT

AG

E (

V)

CA

PA

CIT

AN

CE

(pF

)

VDS, DRAIN TO SOURCE VOLTAGE (V)

f = 1 MHzVGS = 0 V

TJ = 125°C

tAV, TIME IN AVALANCHE (ms)

TJ = 25°C

TJ = 100°C

TC, CASE TEMPERATURE (°C)

I AS, A

VA

LAN

CH

E C

UR

RE

NT

(A

)

I D, D

RA

IN C

UR

RE

NT

(A

)

VGS = 4.5 V

VGS = 10 V

R�JC = 3.3°C/W

t, PULSE WIDTH (s)

CURVE BENT TOMEASURED DATA

VDS, DRAIN to SOURCE VOLTAGE (V)

SINGLE PULSETJ = MAX RATEDR�JC = 3.3°C/WTC = 25°C

THIS AREA IS LIMITEDBY rDS(on)

10 �s

100 �s

1 ms

10 ms100 ms/DCI D

, DR

AIN

CU

RR

EN

T (

A)

P(P

K),

PE

AK

TR

AN

SIE

NT

PO

WE

R (

W)

SINGLE PULSER�JC = 3.3°C/WTC = 25°C

Page 9: MOSFET – Dual, N-Channel, POWERTRENCH , Power Clip, …

FDPC8014AS

www.onsemi.com9

TYPICAL CHARACTERISTICS (Q2 N−CHANNEL) (TJ = 25°C unless otherwise noted) (continued)

10−5 10−4 10−3 10−2 10−1 10.001

0.01

0.1

1

2

SINGLE PULSE

DUTY CYCLE−DESCENDING ORDER

r(t)

, NO

RM

ALI

ZE

D E

FF

EC

TIV

E T

RA

NS

IEN

TT

HE

RM

AL

RE

SIS

TAN

CE

PDM

t1t2

Figure 26. Junction−to−Case Transient Thermal Response Curve

t, RECTANGULAR PULSE DURATION (sec)

D = 0.50.20.10.050.020.01

NOTES:Z�JC (t) = r(t) x R�JCR�JC = 3.3°C/WDUTY FACTOR: D = t1 / t2TJ − TC = PDM x Z�JC (t)

TYPICAL CHARACTERISTICS

SyncFET Schottky Body Diode CharacteristicsON Semiconductor’s SyncFET process embeds a

Schottky diode in parallel with POWERTRENCHMOSFET. This diode exhibits similar characteristics to adiscrete external Schottky diode in parallel with a MOSFET.

Figure 27 shows the reverses recovery characteristic of theFDPC8014AS.

Schottky barrier diodes exhibit significant leakage at hightemperature and high reverse voltage. This will increase thepower in the device.

Figure 27. FDPC8014AS SyncFET Body Diode ReverseRecovery Characteristic

Figure 28. SyncFET Body Diode Reverse Leakage vs.Drain−source Voltage

100 150 200 250 300 350 400 450 500−10

0

10

20

30

40

50

di/dt = 300 A/�s

CU

RR

EN

T (

A)

TIME (ns)0 5 10 15 20

10−6

10−5

10−4

10−3

10−2

VDS, REVERSE VOLTAGE (V)

25I DS

S, R

EV

ER

SE

LE

AK

AG

E C

UR

RE

NT

(A

)

TJ = 125°C

TJ = 25°C

TJ = 100°C

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FDPC8014AS

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ORDERING INFORMATION

Device Device Marking Package Reel Size Tape Width Shipping†

FDPC8014AS FDPC8014AS Power Clip 56PDFN8 5x6, 1.27P

(Pb−Free)

13” 12 mm 2000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.

POWERTRENCH is registered trademark and SyncFET is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in theUnited States and/or other countries.

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PQFN8 5x6, 1.27PCASE 483AR

ISSUE ADATE 21 MAY 2021

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specificallydisclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor therights of others.

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Electronic versions are uncontrolled except when accessed directly from the Document Repository.Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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