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Introduction to Metal-Oxide- Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson

MOSFET

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Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson. MOSFET. History Structure Review Future Threshold Voltage I-V Characteristics Modifications to I-V: Depletion layer correction (Sup. 3) Mobility, Vsat Short Channel Effects - PowerPoint PPT Presentation

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Page 1: MOSFET

Introduction toMetal-Oxide-

SemiconductorField Effect Transistors

(MOSFETs)

Chapter 7, Anderson and Anderson

Page 2: MOSFET

MOSFET• History• Structure• Review• Future• Threshold Voltage• I-V Characteristics• Modifications to I-V:

– Depletion layer correction (Sup. 3)– Mobility, Vsat– Short Channel Effects– Channel Length Modulation– Channel Quantum Effects

• MOSFET Scaling and Current Topics (Literature + Sup. 3)• Subthreshold Behavior• Damage and Temperature (Sup. 3)• Spice (Sup. 3)• HFET, MESFET, JFET, DRAM, CCD (Some in Sup. 3)

Page 3: MOSFET

MOSFET History (Very Short!)

• First Patents: – 1935

• Variable Capacitor Proposed: – 1959

• Silicon MOS: – 1960

• Clean PMOS, NMOS: – Late 1960s, big growth!

• CCDs: – 1970s, Bell Labs

• Switch to CMOS: – 1980s

Page 4: MOSFET

Structure: n-channel MOSFET(NMOS)

pn+n+

metal

LW

sourceS

gate: metal or heavily doped poly-Si G

drainD

bodyB

oxide

IG=0

ID=ISIS

x

y

(bulk or substrate)

Page 5: MOSFET

Circuit Symbol (NMOS)enhancement-type: no channel at zero gate voltage

G

D

S

B (IB=0, should be reverse biased)

ID= IS

IS

IG= 0

G-GateD-DrainS-SourceB-Substrate or Body

Page 6: MOSFET
Page 7: MOSFET

Structure: n-channel MOSFET(NMOS)

pn+n+

metal

LW

sourceS

gate: metal or heavily doped poly-Si G

drainD

bodyB

oxide

IG=0

ID=ISIS

x

y

(bulk or substrate)

Page 8: MOSFET

Energy bands

(“flat band” condition; not equilibrium) (equilibrium)

Page 9: MOSFET

Flatbands! For this choice of materials, VGS<0 n+pn+ structure ID ~ 0

pn+n+

n++

LW

sourceS

gateG

drainD

bodyB

oxide

+-

VD=Vs

VGS

Page 10: MOSFET

Flatbands < VGS < VT (Includes VGS=0 here). n+-depletion-n+ structure ID ~ 0

pn+n+

n++

LW

sourceS

gateG

drainD

bodyB

oxide

+-

+++

VD=Vs

Page 11: MOSFET

VGS > VT n+-n-n+ structure inversion

pn+n+

n++

LW

sourceS

gateG

drainD

bodyB

oxide

+-

+++++++++

- - - - -

VD=Vs

Page 12: MOSFET

VGS>VT

Channel Charge (Qch)

Qch

Depletion regioncharge (QB) is dueto uncovered acceptor ions

Page 13: MOSFET

pn+n+

n++

LW

Ec(y) with VDS=0

(x)

Page 14: MOSFET

Increasing VGS decreases EB

EB

y0 L

EF ~ EC

Page 15: MOSFET

Triode Region A voltage-controlled resistor @small VDS

G

pn+n+

metal

S DB

oxide

+-

+++

+++

- - - -

VGS1>Vt

pn+n+

metal

S DB

oxide

+-

+++

++++++

- - - - - -

VGS2>VGS1

pn+n+

metal

S DB

oxide

+-

+++

++++++

- - - - - - - - -

VGS3>VGS2+++

ID

VDS

0.1 v

increasingVGS

Increasing VGS puts more charge in the channel, allowing more drain current to flow

cut-off

Page 16: MOSFET

Saturation Regionoccurs at large VDS

pn+n+

metal

sourceS

gateG

drainD

bodyB

oxide

+-

+++++++++

VDS large

As the drain voltage increases, the difference in voltage between the drain and the gate becomes smaller. At some point, the difference is too small to maintain the channel near the drain pinch-off

Page 17: MOSFET

Saturation Regionoccurs at large VDS

pn+n+

metal

sourceS

gateG

drainD

bodyB

oxide

+-

+++++++++

VDS large

The saturation region is when the MOSFET experiences pinch-off.

Pinch-off occurs when VG - VD is less than VT.

Page 18: MOSFET

Saturation Regionoccurs at large VDS

pn+n+

metal

sourceS

gateG

drainD

bodyB

oxide

+-

+++++++++

VD>>Vs

VGS - VDS < VT or VGD <

VDS > VGS - VT

VT

Page 19: MOSFET

Saturation Regiononce pinch-off occurs, there is no further increase in

drain current

ID

VDS

0.1 v

increasingVGS

triode

saturation

VDS>VGS-VT

VDS<VGS-VT

Page 20: MOSFET

Band diagram of triode and saturation

Page 21: MOSFET

Simplified MOSFET I-V Equations

Cut-off: VGS< VT

ID = IS = 0

Triode: VGS>VT and VDS < VGS-VT

ID = kn’(W/L)[(VGS-VT)VDS - 1/2VDS

2]

Saturation: VGS>VT and VDS > VGS-VT

ID = 1/2kn’(W/L)(VGS-VT)2

where kn’= (electron mobility)x(gate capacitance)

= n(ox/tox) …electron velocity = nE

and VT depends on the doping concentration and gate material used (…more details later)

Page 22: MOSFET

Structure: n-channel MOSFET(NMOS)

pn+n+

metal

LW

sourceS

gate: metal or heavily doped poly-Si G

drainD

bodyB

oxide

IG=0

ID=ISIS

x

y

(bulk or substrate)

Page 23: MOSFET

MOSFET Future (One Part of)

• International Technology Roadmap for Semiconductors, 2008 update.

• Look at size, manufacturing technique.

Page 24: MOSFET

From Intel

Page 25: MOSFET
Page 26: MOSFET
Page 27: MOSFET
Page 28: MOSFET
Page 29: MOSFET

MOSFET ScalingECE G201

Page 30: MOSFET
Page 31: MOSFET

Fin (30nm)

Gate

BOX

prevents “top” gate

Page 32: MOSFET

Energy bands

(“flat band” condition; not equilibrium) (equilibrium)

Page 33: MOSFET
Page 34: MOSFET

VGS>VT

Channel Charge (Qch)

Qch

Depletion regioncharge (QB) is dueto uncovered acceptor ions

Page 35: MOSFET
Page 36: MOSFET
Page 37: MOSFET

Threshold Voltage Definition

VGS = VT when the carrier concentration in the channel is equal to the carrier concentration in the bulk silicon.

Mathematically, this occurs when s=2f ,

where s is called the surface potential