Module Flow 11.1 Circuit Protection Overview 11.2 Circuit Protection Device Features and Options...
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Module Flow 11.1 Circuit Protection Overview 11.2 Circuit Protection Device Features and Options 11.3 Common Design Errors 11.4 Common Test Errors 11.5
Module Flow 11.1 Circuit Protection Overview 11.2 Circuit
Protection Device Features and Options 11.3 Common Design Errors
11.4 Common Test Errors 11.5 eFuses 11.5a eFuse Overview 11.5b
eFuse vs. Fuse 11.5c eFuse vs. Polyfuse 1
Circuit Protection What is it ? Many things with many names
Inrush Control Hotswap Hotplug Current Limiting Electronic Circuit
Breaker Short Circuit Protection Soft Start Over Voltage Protection
(OVP) eFuse Load Power Limiting FET SOA Limiting ( Protecting the
Protector ! ) Reverse Current Protection (ORing) Often Required for
Agency Rating UL, CSA North America EN, IEC, (CENELEC) Europe CCC
Mark (CNCA) - China ~ the same functions 3
Slide 4
Circuit Protection What is it ? Circuits designed specifically
to. Prevent Fire ! --Keep the smoke in! Keep small problems from
growing big Minimize damage by quickly isolating failures Prevent
potentially disruptive power bus disturbances One small transient
can take down/reset an entire system What Gets Protected ? LOAD
POWER FET CONNECTORSSUPPLY 4
Slide 5
Circuit Protection Where Is It Used ? Telecom Equipment
Datacenters / Servers Storage / HDD, SSD, Midplanes Industrial
Control 24 or 48 V typically Tower Mounted Antennas Merchant Power
5
Slide 6
Circuit Protection The Basic Parts Most Common Elements
Location.. Sometimes on the Load Side of the Connector Sometimes on
the Supply Side of the Connector LOAD BOARD BACKPLANE Element for
controlling the FET Element for sensing current Element for
modulating current 6
Slide 7
Thank you! 7
Slide 8
Circuit Protection Fundamentals 11.2 Device Features and
Options
Slide 9
9 End customers cant make you design in protection circuits but
they can make you wish you had. Design review wisdom
Slide 10
Device Features/Options Some of the Choices FET Internal or
External Inrush control dV/dT, or di/dT Current Limit Always,
Never, or just at startup Fault response Latch off or Retry Short
Circuit Response Latch Off or Retry Control I2C or Analog Control
Outputs Power Good, Fault, FET Fault ILIMIT Accuracy 20% Standard,
10% Pretty Good, 5% Very Good FET SOA protection.. Or not Allows
use of smaller FET and provides very high survivability Current
Indicator Output (IMON) Analog or Digital Output ? Digital Output
requires internal ADC and typically includes PIV Monitoring ORing
Control Linear or Hysteretic 10
Slide 11
Device Features/Options Internal FET vs. External FET 11
Internal FETExternal FET Highly Integrated -Few External Parts
-Internal sense FET -Built it Power Limiting -Extremely well
protected Compromises are made -FET process vs. Analog process -FET
package vs. Analog package Require careful thermal design Generally
not found in app > 5 A Flexible R DSON (Designers Choice) More
feature options No limit on upper current limit Generally more
accurate More external parts -R SENSE, FET -R S, C S for
configuration Larger foot print
Slide 12
Device Features/Options FET SOA Protection One of the least
understood but most appreciated features Allows use of smaller,
less expensive FETs Analog multiplier calculates P DIS_FET in real
time and compares result to PROG pin If P LOAD > PROG then gate
drive reduced to lower I LOAD and P FET TI is now the ONLY
manufacturer to offer true Power Limiting ! 12
Slide 13
Device Features/Options FET SOA Protection Dynamically adjusts
I LIMIT to be approximately proportional to 1/(V DS ) 2 Limits P
DIS of FET to programmed limit TPS2420 Startup into 15 , 700 F I
LOAD V OUT TPS2420 Limits FET P DIS < 5 Watts P DIS V OUT I LOAD
Orange = Violet x (V IN Blue) P DIS = I LOAD x V DS 13
Slide 14
Device Features/Options Power Limiting Startup into overload
response SOA protection keeps FET safe even when starting up into a
severe overload Fault timer limits T(ime) factor of SOA Some
competitive devices will reduce I LIMIT over a limited range and
with limited protection. ONLY TI has true FET SOA Power Limiting
built into the Hotswap Controller !!! P DIS V OUT I LOAD CTCT
TPS2420 Startup into overload 14
Slide 15
Positive Low Voltage Protection TI Device Portfolio Sample PART
Input Range Package V THRESH (mV) I LIMIT Int. FET SOAOVI2CPG Imon
Acc. TPS2420 3 to 20 QFN16 (4x4mm) Internal FET R DSON = 30 m I
LIMIT = 10% @ 2 A AlwaysYes No Lo17%@2A TPS2590 QFN16 (4x4mm) - N/A
TPS2421-1/2 SOIC8 Lo TPS24720 2.5 to 18 QFN16 (3x3)Prog Startup
Only No Yes No LoProg TPS24710/1/2/3 MSOP10 25 10% YesNol/l/h/h N/A
TPS24700/1 MSOP8 No Lo LM25066/A 2.9 to 17 LLP24 (4x5mm) 25 10%
46.5 11.8% AlwaysNoYes Hi 2.40% LM25066I/AI LLP24 (4x5mm) 1.00%
LM25069-1/2 MSOP1050 10% NoN/A LM25061-1/2 MSOP1050 10% No
TPS2480/1 9 to 26 PW2050 10% Yes 0.5% TPS2482/3 9 to 36 0.5%
15
Slide 16
Typical Inrush/OCP Design Steps 1.Select R SENSE to set I LIMIT
and I FASTTRIP I LIMIT = V TH /R SENSE - V TH typically 25 50 mV
Simplest controllers have fixed V TH High V TH Better Accuracy but
Higher I 2 R Losses Fast trip (Short Circuit) threshold usually
1.5x -3x I LIMIT Level 2. Select C FAULT to get desired T FAULT Set
T FAULT long enough to allow all downstream caps to charge (T
CHARGE )before time out T CHARGE ~ CV/I (C = Bulk Cap, V = V OUT,
I= I LIMIT ) Set T FAULT as short as reasonable to minimize FET
stress during overcurrent events Ensure that T FAULT x V IN X I
LIMIT is within SOA curve 3.Select FET that can withstand T FAULT x
V IN x I LIMIT x ~1.5 ..SOA !! 4.Set FET SOA Power Limit on devices
so equipped Design tools available for some devices - check webpage
TPS24700/10/20, TPS2490/1/2/3, TPS2480/1, LM5064/6/7/9, LM25061/6/9
16
Slide 17
Questions To Ask During Design 1.Will a load get plugged into a
live socket? 2.Will a load get unplugged from a live socket? 3.Is
it OK for supply to collapse if one load shorts? 4.Are multiple
loads connected to a common supply? OK for all loads to shut off if
one load shorts? 5.Do loads need ability to ride through
transients? 6.Do loads needs protection from voltage surges? 7.Do
loads have large capacitance on the inputs? 8.Are multiple supplies
powering the load or bus? 17
Slide 18
Thank you! 18
Slide 19
Circuit Protection Fundamentals 11.3 Common Design Errors
Slide 20
Common Design Errors SOA of FET too Small Layout Issues
Inadequate Transient Protection 20
Slide 21
SOA of FET Too Small I DS Drain to Source Current 10 3 10 2 10
1 10 0 10 -1 10 -2 10 -2 10 -1 10 0 10 1 10 2 V DS Drain to Source
Voltage V DS_MAX I D_MAX R DSON 1 ms 10 ms 100 ms 1 s DC SOA = Safe
Operating Area SOA Chart Every FET has one Defines Bounds of FET
Operation V DS_MAX = Vertical Limit I D_MAX = Horizontal Limit R
DSON limits I D at lower voltages Theoretical P MAX = 3000 W Fault
Time Is Critical Longer Fault time means bigger FET Shorter Fault
Time allows higher peak power Most Stressful FET Events Startup
into short Shorted load while under full load 21
Slide 22
SOA of FET Too Small Example - 12 V, 50 A Server 10 3 10 2 10 1
10 0 10 -1 10 -2 10 -2 10 -1 10 0 10 1 10 2 V DS Drain to Source
Voltage I DS Drain to Source Current 1 ms 10 ms 100 ms 1 s DC
Without Power Limiting P MAX = I LIMIT x V SUPPLY = 600 W T SOA_MAX
= ~800 us With Power Limiting P MAX_LIMITED = 50 W As V DS
increases I LIMIT is reduced T SOA_MAX = 10 ms Smaller FET can be
used @ 50 A will start limiting when V DS > 1V Common Error to
Pick FET Too Small 12 V 50 A 22
Slide 23
Layout Issues - A Little Stray R Can Make a Big Error Critical
Kelvin Connections Sense Runs Critical Short Run Ground Gate High
Current Runs Poor Kelvin Runs Inaccurate/variable ILIMIT Poor High
Current Runs Voltage droop Power loss Overheating 23
Slide 24
Inadequate Transient Protection All wires are inductive
Inductance stores energy When the FET turns off, voltage spikes
occur LOAD CURRENT LOAD VOLTAGE Positive Spikes at Input to
Switch/FET Negative Spikes at Output of Switch/FET 24
Slide 25
Inadequate Transient Protection To squelch inductive spikes
from supply / load leads Caps and/or TVS at UUT Input to clamp
positive spike Schottky Clamp across output to clamp negative spike
Short, Wide Leads and Runs 25
Slide 26
Thank you! 26
Slide 27
Circuit Protection Fundamentals 11.4 Common Test Errors
Slide 28
Common Test Error Sources Current Probes Electronic Loads
Transients From Long Supply Leads Supply ILIMIT Too Low 28
Slide 29
Current Probes Current Probe Behavior Great For Observing
Waveform Shapes Dont have to be In The LoopNice !! Simply Clamps
around feed or RTN wire Need Frequent Degaussing/Cal Not So Great
for Precise Measurements Limited Bandwidth 1% Accuracy at Best
29
Slide 30
Current Probes For precise DC current measurements If I LOAD
< 10 Amps use Multimeter on Current Scale If I LOAD > 10 Amps
Use Shunt and Multimeter Pick R SENSE so V RSENSE @ I LIMIT =
50-100 mV Note.Now V OUT_SUPPLY VIN_LOAD...so measure V LOAD at The
Load! 30
Slide 31
Electronic Loads Good for DC Loading and Automated Tests Proper
Setup Very Important Ex. - Constant Current, Constant Power,
Constant Resistance Butoften Have Switch Transients When Stepping
Load Transients Can Cause Premature Trip When Measuring ILIMIT So
What Do We DO ?? 31
Slide 32
Electronic Loads For Minimal Transients While Adjusting Load 32
Method 1: Use Power Resistors as Loads Method 2: Use Power FET as
Load A bit tedious and Old School but accurate A collection of
fixed and variable resistors is best Apply Last Half Amp With Small
Wire Rheostat Can be effective with eLoads also Connect FET and
Series Resistor as Load Adjust Potentiometer to vary Current Make
Sure the FET can Handle the power !!!!
Slide 33
Long Supply Leads All wires are inductive Long Supply Leads can
have significant L Lab Test Environment Usually Worse Than Final
Application! Reason for TVS and diodes on most TI EVMs When the FET
turns off, voltage spikes occur To counter inductive spikes from
supply / load leads Caps and/or TVS at UUT Input to clamp positive
spike Schottky Clamp across output to clamp negative spike Twisted
Supply leads 33
Slide 34
Supply I LIMIT Too Low Lab Supply Limit Sometimes Set Slightly
Above I LIMIT_LOAD V SUPPLY can sag due to I limiting during
overload / short circuit testing Sagging V SUPPLY can cause UV
shutdown before I LOAD reaches I FASTTRIP UV Shutdown is typically
much slower than Fast trip (SC) Shutdown Slow shut down can violate
FET SOA, resulting in dead FETs Fix 1: Ensure PS set to supply
currents ABOVE fast trip level Fix 2: Attach bulk caps at input of
UUT before test is run 34
Slide 35
Trends in Circuit Protection Accuracy Current limit, power
limit, monitoring Efficiency Low R DSON, low I Q High levels of
integration i.e. bring FET, R SENSE into the package I 2 C, PMBus
for control and monitoring Especially PMBus with Intel Grantley
processors eFuses replacing/augmenting fuses & polyfuses High
Power POE Systems (25-100 Watts) 35
Integrated Circuit Protection Types Power controlling element
contained therein Initial $ Level of Protection Wishful Thinking
Fuse eFusePolyfuse (PTC) 38
Slide 39
What is an eFuse? An active circuit protection device that
Will: Limit current at inrush Prevent load or source damage due to
OC events Have an internal FET to control the load current Might:
Provide OVP (none, fixed, adjustable) Have adjustable fault time
and/or current limit Have indicator outputs (Fault, PG, etc.) Be
able to control turn on slew rate Have a load current indicator
output Be on source side of a connector or load side or.. Be
nowhere near a connector 39
Slide 40
Typical Applications for eFuse Enterprise Class SSD SAS HDD
Storage Server Chassis Set-Top Box DVD Player Internet TV m-SATA
SSD Appliances 40
Slide 41
Brand Damage A Hidden Cost Its not fair and that wont change
Most end users dont know or care how a product works Even fewer
know or care about circuit protection A good fuse design in a bad
system can still get the blame Dirty power, poor transient control,
can cause a fuse to blow A load with a blown fuse is viewed as the
problemnot the faulty source Blame should go to the source of bad
power...but rarely does END CUSTOMER DOESNT CARE about power specs
!!! Your board died.now fix it!!! Replacement board likely to blow
a fuse, too Customer not happy switches to competitive brand
Control your products destiny !! Dont rely on other systems to do
the right thing Protect the product, the brand, the profit, your
career ! Someone will pay.dont let it be you! 41
Slide 42
Backend costs of fuse only designs Tangible costs Replacement
of nonfunctional product RMA admin costs / time Shipping broken/new
devices from/to customer Truck rolls, service personnel Intangible
backend costs Unhappy retailers Brand damage Loss of customer(s) In
the end, we all want happy customers Its that simple, its that
complicated 42
Slide 43
Thank you! 43
Slide 44
Circuit Protection Fundamentals 11.5b eFuse vs. Fuse
Slide 45
Why Not Use a Fuse? Slow Inaccurate Lossy Leave a load
unpowered after event 45
Slide 46
Fast Blo Fuse Trip Time vs. Current eFuse vs. Fuse Time and
trip limit inaccuracies mean bigger power supplies eFuse Limit !
Fusible fuse trip range eFuse trip range Time (sec.) 46
Slide 47
Fuses Are SlowEven the Fast Ones eFuse Performance I LIMIT is
programmable, predictable, and stable over temp Bus droop and
supply stress reduced by tight over current tolerance 47
Slide 48
Fuses are Lossy Higher resistance -> more energy -> more
heat -> higher OPEX 13x more power lost with fuse! 800 mV/2A =
400 m vs. eFuse @ 30 m Lifetime cost of 1 Watt = $2 to $18 (
customer supplied numbers) Includes energy cost, distribution
infrastructure, HVAC, product life Little Fuse 231Series 0.12 0.19
0.30 0.48 0.75 1.19 Lower Losses using TPS2590 ( 30 m ) 48
Slide 49
Fuses are Inaccurate Fuse makers recommend the I NOMINAL <
75% I FUSE_RATED Power supplies must be overspecd Accommodate fuse
derating, fuse tolerance, P FUSE Bigger supplies = more CAPEX, more
OPEX Seconds 49
Slide 50
Fuses Behavior is Sloppy and Stressful 50 During OverloadAfter
Overload Much slower than eFuse No active current limiting
Uncontrolled turn off time Bus droop likely More stress on supplies
& load High I 2 R losses 10x+ nom. trip current for 3 ms No
auto reset Inoperative system Module, fuse, or system must be
replaced Repair costs Field returns Unhappy Customers
Slide 51
Fuse Summary 51 ChallengesBenefits Slow Lossy Inaccurate Load
unpowered after event Low Cost Can provide Safety Compliance -UL,
IEC, CSA
Slide 52
Fuses DO Excel in Some Apps! 52
Slide 53
Thank you! 53
Slide 54
Circuit Protection Fundamentals 11.5c eFuse vs. Polyfuse
Slide 55
eFuse vs. Polyfuse 55 eFuse (USB Power Switch)Polyfuse Current
based I LIMIT Stable, accurate (20% - 30%) I LIMIT Fixed or
Programmable I LIMIT Repeatable I LIMIT0 Fast ( < 1.5 us typ)
Wide temp range -40 to +125 C Temp based I LIMIT Sloppy, variable I
LIMIT No Programmable I LIMIT R ON Increases with each event Slow
to trip (several ms) Not usable above 85 C Auto-resets after trip
event
Slide 56
Polyfuses (PTC Devices) Require Derating Curve D TPS2420/21,
TPS2590/910 D D
Slide 57
eFuse vs. Polyfuse Brand conscious Tier 1, 2, 3s use USB Power
Switch Low cost bottom end apps may use Polyfuse True story #2
Major ODM experiencing Power supply resets during STB short
testing. TPS2066C with faster response got designed in and no more
resets. True story #1 Low end desktop maker melted wireless
datacard during a short condition. Three times. Now using USB
switches.
Slide 58
Polyfuse Summary 58 ChallengesBenefits Slow Lossy 2x regular
fuse Inaccurate Each OC event increases resistance Not suitable for
high temp. R increases with Temp.- Resets after OC event Low Cost
Can provide Safety Agency compliance UL, IEC, CSA