CorrespondenceMODULAR NETWORKS FOR DIRECTPROCESSING OF DELTA-MODULATEDSIGNALSSome networks for direct processing of delta-modulatedsignals have been proposed by Lockhart,A includingsome comments concerning the comparison of thesenetworks with those proposed in a previous paper.8 Asthe way these comments are presented leads to someambiguous impressions about the work,B the followingpoints will be clarified:

(i) Lockhart mentions in the introduction of his paperA

(30th line) that his method' . . . in most cases leads to greater economy of hardware

and/or less quantisation error in comparison with Kouvaras'network based on the delta adder'.In answer:

(a) From all Lockhart's networks that can be comparedwith those in Reference B, only his .ft-input adder and onlyfor R > 2 is it slightly more economical and introducessmaller quantisation errors. Nevertheless, the .ft-inputadder8 is easier to synthesise, is absolutely symmetricaland can be used as an TV-input adder for N^R, no matterwhether or not N isa power of 2. For N< R the remainingR-N inputs are fed with the idling sequence, i^ = 0, 1,0, 1,. . . , while the output is always the same, and this is anotherimportant property of the R-input adder.8

It should be noted here that Lockhart's /?-input adderbecomes, for R — 2, exactly the same as the delta adder,8

with a maximum quantisation error of 1/2 unit, accordingto the error unit defined in his paper.A

(b) Lockhart's parallel multiplier can be considered as avariety of the second type in Reference B, and it is notsuperior to that of Reference B either in hardware economyor -in quantisation error. In paragraph 5 of his paper,Lockhart compares the quantisation error of his parallelmultiplier with that of the first-type but not of the improvedsecond-type multiplier.8

On page 239, line 14, of his paper,A Lockhart mentionsthat

'It should be noted from eqn. 9 that f.a.O could beeliminated from Fig. 4 by using simple logic to feed eitherthe idling sequence i'n = 0 ,1 , 0 , 1 , . . . to the carry input off.aj if Ko = 1 or a constant logic 1 if Ko = 0'.The first part of his note is correct, but the second part isnot, because with constant logic 1, if KQ = 0 , the multiplierwould not work for signals derived from a linear deltaencoder. Where an exponential delta encoder is employed,the multiplier output will be the product on top of a d.c.bias. This bias increases when the number of delta addermodules of the multiplier decreases. These results weretheoretically predicted by applying the 'specialisedmathematics,'8 and were also experimentally verified. Toavoid this disadvantage, the carry input of f.a.l must bethe complement of d'n for Ko = 0.

(c) Lockhart does not mention in his paper that a deltaadder8 is employed for the realisation of his proposed basicnetworks. It should therefore be noted that the modulesemployed for the synthesis of his parallel multiplier aredelta adders, whereas the output module of his .K-inputadder and of his serial multiplier are also delta adders.Furthermore, the module 'multiplier element' used byLockhart for the synthesis of his tree multiplier is identical

to the delta adder of Reference B. It therefore becomesevident that the delta adder8 is the basic unit for therealisation of networks for direct processing of delta-modulated signals.

(ii) Lockhart also mentions in the introduction of hispaper that his technique

' . . . circumvents the need for the specialised math-ematical approach formulated by Kouvaras'.It should be noted here that the 'specialised mathematics'8

are simple and provide a mathematical tool which facilitatesboth the design of networks for direct processing of deltamodulated signals and the estimation of the quantisationerrors introduced. On the other hand, it is not clear howLockhart's conventional mathematics lead from the networkcalled 'digital encoder' to the realisation of his parallelmultiplier.

4th August 1980 N. KOUVARAS

Electronics DepartmentN.R.C. "Demokritos"Aghia Paraskevi A ttikiAthens, Greece

Concerning point (a) above, the Kouvaras .ft-input adder8

requires (R-l) full adders (f.a.) and (R-l) flip-flop (f.f.)elements compared with {R-l) and \og2R, respectively.A

If R is large, as it will tend to be (delta-modulation (d.m.)signal processors manipulate many single-bit inputs ratherthan a lesser number of multibit inputs), the difference isnot inconsiderable. Also, since the Kouvaras adder isequivalent to a cascade of log2^ digital d.m. encoders, thequantisation error will grow with log2/? rather than remainconstant.

Ease of synthesis must depend on the means employedfor implementation. Both methods seem entirely appropriateto l.s.i. fabrication, although the Kouvaras method wouldinvolve greater complexity due to the additional f.f. TheadderA is not limited to R, a power of 2, since the numberof effective inputs may also be reduced in the same wayas Kouvaras suggests, although, for both methods,intelligent use must also be made of the sequence i'n tominimise the quantisation error.

Turning to point (b), the multiplied is a direct imple-mentation of the digital d.m. encoder.0 Kouvaras8

discusses three multiplier variants illustrated respectivelyin Figs. 5a, Sb and 6 of his paper.8 The quantisation errorfor Fig. 5a will depend crucially on the phasing of idlingsequencesA and can never be less in comparison with thedirect method. Regarding Fig. 5b, it has been pointed outA

that this approach is functionally equivalent to a directimplementation but confers no hardware advantage. Fig. 6illustrates the ingenious tree multiplier embodied in thealternative approach referred to in Reference A andattributed there to Kouvaras. However, the Kouvaras treemultiplier is a tree of digital d.m. encoders0 sharingcommon elements.

Concerning point (c), it seems natural to name anelementary part of a multiplier a 'multiplier element'rather than a 'delta adder'. In general, it appears sensibleto label the building blocks of a system according to theway in which the system is conceived. Thus, it becomesvery much a matter of viewpoint whether the networks

IEEPROC, Vol. 127, Pt. E, No. 6, NOVEMBER 1980 279

described in References A and B are interpreted in terms ofdelta adders, digital d.m. encoders or, indeed, f.a. and f.f.

Returning to point (b), I am grateful to Kouvaras forpointing out the error in my suggestion for eliminatingf.a.O in Fig. 4 of Reference A. The condition for Ko = 0is correctly stated by Kouvaras above and is evident(without any mathematics) by inspection of the actionof f.a.O and f.f.O as a function of input conditions.

Concerning the more general points regarding math-matics, it must be emphasised that the Kouvaras approachB

is limited to parallel realisations and does not account forcertain differences in quantisation performance (e.g.between Figs. 5a and b in Reference B). The alternativeviewpoint based on the digital d.m. encoder0 and earlierideas connected with digital-differential analysers0 doesnot call for a special notation, provides an understanding ofquantisation effects and embraces both parallel and serialforms. The realisation of the multiplier described inReference A derives directly from the concept of thedigital d.m. encoder as described in Reference C andrepeated in Section 2 of Reference A. (Perhaps someconfusion has arisen due to a typographical error in eqn. 9,the last line of which should read — 1 x 2, dn — — 1).

In conclusion, it becomes apparent that current advances

in d.m. signal-processing techniques promise direct com-petition with p.c.m. methods over a wide range of appli-cations. It is to be hoped that the advantages of d.m. willnot be overlooked in the almost universal trend to p.c.m.implementation in digital signal processing.

23rd September 1980 G.B. LOCKHART

Department of Electrical & Electronic EngineeringUniversity of LeedsLeeds LS2 9JT, England

References

A LOCKHART, G.B.: 'Modular networks for direct processing ofdelta-modulated signals', IEE J. Comput. & Digital Tech.,1979,2, (6), pp. 237-239

B KOUVARAS, N.: 'Operations on delta-modulated signals andtheir application in the realization of digital filters', Radio& Electron. Eng., 1978, 48, pp. 431-438

C LOCKHART, G.B.: 'Implementation of delta modulators fordigital inputs', IEEE Trans, 1974, ASSP-22, pp. 453-456

D SIZER, T.R.H.: 'The digital differential analyser' (Chapman &Hall, 1968)

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280 IEEPROC, Vol. 127, Pt. E, No. 6, NOVEMBER 1980