Modelling and Real-Time Simulation of a Modular Bidirectional

Solid-State Transformer for Ultra-Fast Charging of Electric Vehicles

by

Yousef Al-Shawesh

A thesis submitted to the

School of Graduate and Postdoctoral Studies

in partial fulfilment of the requirements for the degree of

Master of Applied Science in Electrical and Computer Engineering

Department of Electrical, Computer, and Software Engineering

Faculty of Engineering and Applied Science

University of Ontario Institute of Technology (Ontario Tech University)

Oshawa, Ontario, Canada

August 2021

© Yousef Al-Shawesh, 2021

ii

THESIS EXAMINATION INFORMATION

Submitted by: Yousef Mohammed Lutf Al-Shawesh

Master of Applied Science in Electrical and Computer Engineering

Thesis title: “Modelling and Real-Time Simulation of

a Modular Bidirectional Solid-State Transformer for Ultra-Fast

Charging of Electric Vehicles”

An oral defence of this thesis took place on August 9, 2021, in front of the following

examining committee:

Examining Committee:

Chair of Examining Committee

Asst. Prof. Dr. Khalid Elgazzar

Research Supervisor

Prof. Dr. Hossam Gaber

Supervisory Committee Member

Assoc. Prof. Dr. Mohamed Youssef

Thesis Examiner

Prof. Dr. Sheldon Williamson (Ontario Tech University)

The above committee determined that the thesis is acceptable in form and content and that

a satisfactory knowledge of the field covered by the thesis was demonstrated by the

candidate during an oral examination. A signed copy of the Certificate of Approval is

available from the School of Graduate and Postdoctoral Studies.

iii

ABSTRACT

This thesis proposes a modular Solid-State Transformer (SST) system architecture to be

directly interfacing with a three-phase MV utility network enabling high-power and ultra-

fast charging capabilities for electric vehicles, with the capacity to incorporate energy

storage systems at the MVDC-link. This topological configuration allows bi-directional

power flow for Vehicle-to-Grid and for scalability to higher voltage and power levels. A

detailed model-based design of a multi-module SST is presented with 3.3 kV SiC

MOSFETs for highly efficient charging rated at 1.5 MW, supplied by a 27.6 kV distribution

feeder. The SST switching model is based on a high-frequency two-stage power conversion

solution with a Cascaded H-Bridge (CHB) rectification stage followed by a Dual Active

Bridge (DAB) conversion stage. Control strategies and modulation schemes are

implemented to achieve voltage balance and unity power factor, and to mitigate current

harmonics and voltage ripples in compliance with IEEE standards, validated by Model-in-

the-Loop real-time simulation.

Keywords: Ultra-Fast Charging of Electric Vehicles; High-Power Multilevel Converters;

CHB Rectifier; DAB; SiC MOSFET

iv

AUTHOR’S DECLARATION

I hereby declare that this thesis consists of original work of which I have authored

alone. And ideas and inventions attributed to others have been properly referenced. This

dissertation is the result of my own work and includes nothing which is the outcome of

work done in collaboration. My central contribution was on the review of literature,

formulating the problem statement, defining the thesis objectives, collection of data,

procuring the real-time simulator equipment from the market, design, modelling and

simulation of the SST-based ultra-fast charging solution, as well as the analysis of the

results obtained. The fundamental concepts of control strategies and modulation schemes

utilised in this thesis were developed by others and are acknowledged in the main content.

This is a true copy of the thesis, including any required final revisions, as accepted by

my examiners.

I authorise the University of Ontario Institute of Technology (Ontario Tech

University) to lend this thesis to other institutions or individuals for the purpose of scholarly

research. I further authorise the University of Ontario Institute of Technology (Ontario

Tech University) to reproduce this thesis by photocopying or by other means, in total or in

part, at the request of other institutions or individuals for the purpose of scholarly research.

I understand that my thesis will be made electronically available to the public.

Yousef Al-Shawesh

v

STATEMENT OF CONTRIBUTIONS

An article summarising the design and simulation results of the ultra-fast charging

system architecture proposed in this thesis, showing the different models derived will be

submitted for publication in a peer-reviewed journal as:

Yousef Al-Shawesh and Hossam Gaber, “Modular Bidirectional Ultra-Fast Charger based

on a Two-Stage High-Frequency Solid-State Transformer with 3.3 kV SiC MOSFETs”,

Energies, 2021 [To be submitted on 30 August 2021].

A book chapter is also considered for publication from Chapters 2 and 3 of this

thesis as:

Yousef Al-Shawesh and Hossam Gaber, “A Comprehensive Review of State-of-the-Art

Ultra-Fast Charging Standards, Topologies and Configurations”, Springer, 2021.

The work described in Sections 3.6 and 4.4 was implemented in practice at the Vehicle-

to-Grid (V2G) laboratory, the Canadian Centre for Housing Technology (CCHT), the

National Research Council of Canada (NRC) in Ottawa. Through a 33-weeks-long service

contract, I led the development efforts of modelling, control, and simulation of the V2G-

enabled EV fast-charging system. I also contributed to engineering design, commissioning

and technical support of hardware and software systems including various communication

protocols for the CCHT-V2G testing facility. I also took part in developing an algorithm

for multiple EVs, and co-authored an article published in a peer-reviewed journal.

I hereby certify that I am the sole author of this thesis and that no part of this thesis has

been published or submitted for publication. I have used standard referencing practices to

acknowledge ideas, research techniques, or other materials that belong to

others. Furthermore, I hereby certify that I am the sole source of the creative works and/or

inventive knowledge described in this thesis.

vi

DEDICATION

I dedicate this MASc thesis and all my scholastic awards and university degrees

that I had undertaken around the world to:

my angel, my mother,

my life mentor, my father,

my uncle, Abdulwahab,

my beloved family, my lifetime friends,

and

Arabia Felix, Yemen, my fatherland.

vii

ACKNOWLEDGEMENTS

First and foremost, all praise is due to Allah the Almighty for everything I have

been blessed with in all my educational and career endeavours across four continents.

I would like to express my sincerest thanks to Prof. Dr. Hossam Gaber, for giving

me the opportunity to conduct my MASc research course at his leading research lab group,

and for inspiring me to contribute to research projects that address real-world engineering

problems throughout my Master’s studies. It has been a great honour to be his student. I

sincerely appreciate his supportive supervision and constructive guidance on my MASc

thesis. I highly appreciate the valuable guidance and support I received during my MASc

from the Dean Prof. Dr. Langis Roy. I also would like to thank Dr. Mohamed Youssef, Dr.

Khalid Elgazzar, and Dr. Sheldon Williamson for their constructive feedback on this thesis.

Special thanks to the staff of the School of Graduate and Postdoctoral Studies

(SGPS) and the Office of Student Life at Ontario Tech University for facilitating excellent

professional training programmes and workshops which have enriched my graduate studies

experience. Moreover, I would like to thank my colleagues at the Smart Energy Systems

Lab (SESL), Ontario Tech University Academic Council (AC), and the Graduate Students’

Council (GSC), as well as my friends and the many amiable people whom I had the pleasure

of working and commuting with in Toronto, Oshawa, Ottawa, and Montreal, and who made

this two-year-long academic and professional venture in Canada more interesting.

The work described in this thesis was carried out in the context of the project titled

“Analysis and Design of Fast Charging Stations for Electric Buses” which was partially

funded in the first eight months of my MASc studies by Mitacs and Canadian Urban Transit

Research & Innovation Consortium (CUTRIC) through the Mitacs Accelerate Fellowship.

I gratefully acknowledge both Mitacs and CUTRIC for the financial grant: IT15756.

Part of this applied research was conducted in the second year at the National

Research Council of Canada (NRC) in Ottawa. I would like to tremendously thank Mr

Yeong Yoo for his great mentorship and constructive feedback on the work undertaken at

the Canadian Centre for Housing Technology (CCHT), and for the numerous intellectually

stimulating and enlightening discussions we have had on various scientific and technical

topics. My sincere appreciation to the NRC for hosting me and enabling my access to their

cutting-edge R&D facilities, in spite of the lockdown restrictions due to the pandemic of

CoViD-19 which had initially hindered our lab work activities’ progress for several weeks.

The independent research I undertook at the graduate school, while also working

off-campus simultaneously to self-fund this degree, over the past two years has been

intensely challenging, but I have tried my very best to make it worthwhile. During my

international graduate student life, I had spent much effort and time on many projects and

ideas that ended up unexpectedly drifting through the wind. Having read over a thousand

of published journal articles, I have learnt that asking the right questions is as important as

viii

answering them. It took me a while to learn new lessons from failures within the reality of

working on research problems that have no discernible solution, that is when unrealistic

expectations were quickly shattered. Not only my research interests that pushed me to

conquer the unknown due to the nature of my research, because I realised that full

autonomy, in-depth analytical thinking and dealing with uncertainty which I had developed

over the years were highly important. This thesis is merely a fraction of what I have worked

on throughout the MASc programme. More questions than answers emerged out of many

simulations I had derived, some approaches had outright failed in their own right, but each

and every single one gave me new insights into each research problem. The competence to

find that insight is a vital skill I have honed. Success in such a research environment cannot

be achieved in solitary, and it requires full funding and focus on a clearly specified topic at

a time. Uplifting leadership with insightful inputs is essential for the success of any

complex project. Having learnt these lessons along with the student volunteer leadership

opportunities I held at Ontario Tech, I am so grateful for this daring but fruitful adventure.

With so much love and honour, my profound gratitude to the dearest persons of my

entire life: the queen of kindness, my mother, my life mentor, my father, and my angel,

Abdulwahab, who always believed in my aspirations, and who have earnestly helped me

with everything they had and beyond to acquire the best education at every stage of my

schooling journey and longed for this achievement to come true. I cannot imagine myself

without their continued devotion and self-sacrificing support even while them being under

the war and myself thousands of kilometres far away for over seven years to this day. I am

truly the luckiest person in life to ever have such a genuinely supportive and fervently

encouraging family. To my late beloved grandfather, Lutf, and great-uncle, Abdulrahman,

I will always cherish the beautiful moments you have shown me the principles of

conscientiousness, magnanimity, and generosity. To my dear grandmother, Amatalrazaq,

who passed away while I was writing this thesis, I will always remember our last phone

conversation with tears when you were lovingly praying for me to have a bright future.

May Allah grant them the highest level of paradise. Also, I am forever thankful for the love

and prayers of my grandparents, Lutf and Amatullah, may Allah bless them with great

health and long life. Perseverance, persistence, and prudence are a few of the many core

values they have instilled in me, and which have been indispensable to this success.

Moreover, I am so grateful for the love and compliments of my three charming siblings:

Salma, Isra and Ilyas. I miss each and every one of you immensely and I hope to always

see your consistent academic excellence in your medical, engineering and computer

specialisations. Your ambition and optimism, despite all the circumstances, have been a

great inspiration for me to overcome countless obstacles I have encountered overseas.

Lastly, I am thankful to Canada for granting me this unique opportunity to pursue

my MASc studies, despite the two unsolicited PhD admission offers that I received from

Sydney, Australia in 2019 and the job that I enjoyed in Circular Quay, in pursuit of a more

challenging career in North America. The Great White North will always be my second

home, and I love to see it always prospering. Yousef Al-Shawesh, August 2021.

ix

TABLE OF CONTENTS

ABSTRACT ……………………………………………………………………………iii

AUTHOR’S DECLARATION ....................................................................................... iv

STATEMENT OF CONTRIBUTIONS .......................................................................... v

DEDICATION .................................................................................................................. vi

ACKNOWLEDGEMENTS ........................................................................................... vii

TABLE OF CONTENTS ................................................................................................ ix

LIST OF TABLES ........................................................................................................... xi

LIST OF FIGURES ........................................................................................................ xii

GLOSSARY OF ACRONYMS & ABBREVIATIONS ............................................. xvii

LIST OF MAIN SYMBOLS & NOMENCLATURE ................................................. xxi

Chapter 1. Introduction .................................................................................................... 1

1.1 Background and Motivation .......................................................................... 1

1.2 Current Challenges ........................................................................................ 6

1.3 Problem Statement………….....………………………..…………………11

1.4 Research Objectives .................................................................................... 15

1.5 Thesis Outline ............................................................................................. 16

Chapter 2. State of the Art Review.................................................................................17

2.1 EV Charging Classifications, Standards and Protocols, and Latest

Technologies ……………..……………………………………………….17

2.2 Grid Connections & Common Architectures of State-of-the-Art

DC Fast Charging Systems………….……………..…………..……..…..22

2.3 State-of-the-Art SST-based Ultra-Fast Charging Structures and

Converter Topologies………………………..…………………………….26

2.4 Viable Multi-level Converters for the MV ISOP DPSS SST…..............….41

2.4.1 Multi-level Converters for the AC-DC Conversion Stage.......................42

2.4.2 Isolated Converters for the DC-DC Conversion Stage……..……….….43

2.5 Control Strategies and Modulation Techniques for Multi-level

Converters…………………….………………...…………………………48

2.6 Modelling Approaches and Simulation Software Tools for SSTs.………..54

2.7 Summary……………………………….……………………….……..…..55

Chapter 3. Power Circuit Design ………….…......………………………………....... 56

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3.1 System Requirements, Specifications and Assumptions ........................... 56

3.2 Proposed SST System Architecture with Modular Configuration ............. 61

3.3 MVAC Grid Distribution Feeder Voltage Level and Filter Selections. ..... 64

3.4 Cascaded H-Bridge MVAC-MVDC Rectifier ........................................... 70

3.5 Dual Active Bridge MVDC-LVDC Converter ........................................... 83

3.6 EV Battery Model ....................................................................................... 93

3.7 Overall Power Circuit of the SST System Model ....................................... 96

3.8 Summary ..................................................................................................... 98

Chapter 4. Control System Design and Modulation Scheme Implementation......... 99

4.1 Monitoring System for the Grid based on a Three-Phase PLL……….....100

4.2 Control and Modulation for the MVAC-MVDC Conversion Stage ........102

4.3 Control and Modulation for the MVDC-LVDC Conversion Stage……..117

4.4 EV Battery Controller ……………………………………………….….126

4.5 Summary…...………………………………………………….…..…….128

Chapter 5. Results and Analysis………….…………….....…...…………………..... 130

5.1 Design Parameters of the SST System and Cost Estimations…………....130

5.2 Performance Evaluation of the UFCSEV under Various Scenarios…..…137

5.3 Efficiency Analysis …………………….……………..….…….…..…... 152

Chapter 6. Conclusions and Recommendations…...……………………...…….….. 156

6.1 Summary of Results …...……………….……………..….…….……... 156

6.2 Contributions ……..…………………….……………..….…….……... 158

6.3 Limitations ……….…………………….……………..….…….……... 158

6.4 Future Works and Recommendations ………………..….…….…….... 159

References ………………………………………………………….………………....160

Appendices ………………………………………………………………………....... 183

Appendix A: Framework of the Research Study ….....………...…………....... 183

Appendix B: Flowchart of the Systematic Design Procedure of the CHB..........184

Appendix C: Optimisation Flowchart for the Selection of fCHB and LCHB........185

Appendix D: Flowchart of the Systematic Design Procedure of the DAB…......186

Appendix E: Flowchart of the Control System Design Process for the SST.......187

Appendix F: Flowchart of the CCCV Charging Method.....................................188

xi

LIST OF TABLES

CHAPTER 1

Table 1.1 Comparison of ESS Technologies for EV Charging Applications [29–30] ..........6

CHAPTER 2

Table 2.1: Comparison of IEC and SAE Standards and Ratings for EV Charging [69]…...19

Table 2.2: Comparison of the SST Topological Configurations for EV Fast

Charging [107]………………………………………………………….……30

Table 2.3: Comparison of State-of-the-Art SSTs for EV Ultra-Fast Charging-Part (a)....39

Table 2.4: Comparison of State-of-the-Art SSTs for EV Ultra-Fast Charging-Part (b)....40

Table 2.5: Comparison of Modular Multi-level AC-DC Converter

Topologies [159–167]………………………………………………………...45

Table 2.6: Comparison of Isolated Bidirectional DC-DC Converter Topologies [169]....47

Table 2.7: Comparison of High-Frequency Modulation Techniques

for Multi-level Converters………..……….....…….…………………………53

Table 2.8: Review of Simulation Models for Two-Stage SSTs..……………………...…54

CHAPTER 3

Table 3.1: MVAC Feeder Overhead Line Parameters...…………………………………64

Table 3.2: IEEE Standards for Current Distortion Limits for odd Harmonics in

per cent of IL [236]…..……………………….……...……...………………..66

Table 3.3: Design Parameters of the EV Battery………………………………………...96

CHAPTER 4

Table 4.1: Comparison of Modulation Techniques for the DAB Converter [306-308]..125

CHAPTER 5

Table 5.1: UFCSEV System Specifications………………………………………..…...130

Table 5.2: Switching Devices’ Ratings, Number of CHB Cells and MVDC-Voltages..131

Table 5.3: CHB Parameters and Values………………………………….………..…...133

Table 5.4: DAB Parameters and Values………………………………….………..…...134

Table 5.5: DC-Link Voltages and Turns-Ratios of HFT...………………...…..…..…...135

Table 5.6: Cost Estimates of Power Circuit Devices and Components………..…..…...136

xii

LIST OF FIGURES

CHAPTER 1

Figure 1.1: Conventional EV Fast Charging employing an MV-LV LFT [57]…………...12

CHAPTER 2

Figure 2.1: Types of EV Charging Mechanisms: (a) DC Conductive Charging with

Overhead Indoor/at Depot Pantograph, b) DC Conductive Charging with

On-route Pantograph, (c) DC Charging with Off-board Charger, (d) AC

Conductive Charging with On-board Charger, e) Inductive Wireless

Charging [64, 74] …………………………………………………………...22

Figure 2.2: EV Charging System with AC Coupling…………………………………….24

Figure 2.3: EV Charging System with DC Coupling…………………………………….24

Figure 2.4: Classifications of SST [106]………...………………………………………..26

Figure 2.5: SST Type-I: Single-Stage SPSS Configuration with no DC-link……..….....29

Figure 2.6: SST Type-II: Two-Stages SPDS Configuration with an LVDC-link…...…..29

Figure 2.7: SST Type-III: Two-Stages DPDS Configuration with an MVDC-link…..…29

Figure 2.8: SST Type-IV: Three-Stages DPDS with MVDC and LVDC-links…………29

Figure 2.9: Control Strategies for Multi-level Converters……………………………….51

Figure 2.10: Classification of Multi-level Modulation Techniques for

Multi-level Converters……………………………………………………..51

CHAPTER 3

Figure 3.1: Power Triangle Diagram………………………………………...…………..59

Figure 3.2: Four-Quadrant Operating Area of the SST-based High-Power

Conversion System………………………………………………………….60

Figure 3.3: Architecture of the Proposed SST-based High Power Conversion System…61

Figure 3.4: Configurational Topology of the Proposed DPSS SST-based Charging

System………………………………………………………………….……62

Figure 3.5: Configuration of the Proposed Modular ISOP SST-based High-Power

Charging System…………………………………………………..………...63

Figure 3.6: Fundamental Structure of a Single Converter Cell of the Proposed SST...…63

Figure 3.7: Single-line Diagram of the MVAC Distribution Feeder…………………….65

xiii

Figure 3.8: Three Phase Star Connection from the MVAC Feeder to the UFCSEV…….65

Figure 3.9: Schematic Diagrams Filters: (a) L-filter (b) LC-filter (c) LCL-filter………..67

Figure 3.10: The SST Converter Topology with the DC-Links’ Capacitors…...…….….68

Figure 3.11: Three-Phase Representation of Cascaded Rectifier Topology

within the Proposed SST System Configuration………………………..…71

Figure 3.12: Single-Phase Representation of Cascaded H-Bridge MVAC-MVDC

Rectifier Topology……...…………..……………………………………...72

Figure 3.13: Simple Circuit Diagram of Single-Phase Connection from MVAC

Grid to the CHB……………………………………………………….……72

Figure 3.14: Representation of the Relationship between the required Rectified

Output Voltage Amplitude of the CHB and the Phase Angle between

the MVAC Grid Voltage and Current [259]..………...……………………73

Figure 3.15: Vector Representation of the Relationship between the Voltages

and Current at Unity PF (a) Arbitrary Current (b) Power flow from

CHB to MVAC Grid (c) Power flow from MVAC Grid to CHB…………74

Figure 3.16: Factors for Trade-offs of Selecting the Optimum Number of CHB

Rectifier Cells [259]………………...………..………………………….…77

Figure 3.17: Representation of MVDC-Link Voltage Limitations………………………78

Figure 3.18: Multiple Module Topology of DAB MVDC-LVDC Converter.…………..85

Figure 3.19: Equivalent Circuit Schematic of the HFT………………………………….86

Figure 3.20: Simplified Circuit Schematic of HFT…………………..………………….86

Figure 3.21: Phase Shift Waveform Representation of the Input and Output

Voltages of the HFT………………….…………………………………..89

Figure 3.22: DAB Output Power versus Duty Cycle [263]..…………………………….90

Figure 3.23: DC Conversion-Ratio versus Output Current of the DAB [263]…..………91

Figure 3.24: Model of the Li-ion EV Battery [277-279] ……..…………………………93

Figure 3.25: Characteristics of the Charge and Discharge of the Li-ion Battery

Cell [276]…………………………………………………..……………....95

Figure 3.26: Topological Configuration of the Modular Structure of the Proposed

SST System…………………………………………...……………………97

Figure 3.27: System-Level Simulink Model of the Overall Power Circuit of the SST….98

xiv

CHAPTER 4

Figure 4.1: Three-Phase Phase-Locked Loop Structure for Grid Monitoring..………...101

Figure 4.2: Current-Mode Closed-Loop Feedback Controller for the CHB Rectifier….102

Figure 4.3: Decoupled Current Control Scheme for Three-Phase Single Cell of

the CHB Rectifier ……………………………………………….………...105

Figure 4.4: ABC and dq0 Frames with A-axis and the d-axis initially aligned………...106

Figure 4.5: Voltage Balancing Control Scheme for the Multi-level CHB Rectifier……107

Figure 4.6: Carrier Signals of the CHB Cells for Phase-A based on Phase Shift

Sinusoidal Pulse Width Modulation (PS-SPWM) ………………………...109

Figure 4.7: Averaged Model of a Single H-Bridge Cell of the CHB Rectifier in

Single-Phase…………………………………………………………….….111

Figure 4.8: Averaged Model of the Three-Phase Circuit of the CHB Rectifier

with NCHB Cells………………………………………………………….....112

Figure 4.9: Simplified Averaged Model of the Three-Phase CHB Rectifier with

NCHB Cells………………………………………………………………….113

Figure 4.10: Current-Mode Closed-Loop Feedback Controller for the DAB Converter.118

Figure 4.11: Dynamic Averaged Model of a Single Module of the DAB Converter......119

Figure 4.12: Voltage Waveforms of the DAB HFT with the Operation States of

MOSFETs ..................................................................................................120

Figure 4.13: Equivalent Circuit of the Dynamic Averaged Model of the DAB

Module for period t0 ..................................................................................120

Figure 4.14: Equivalent Circuit of the Dynamic Averaged Model of the DAB

Module for period t1 ...................................................................................121

Figure 4.15: Simplified Circuit Diagram of Figure 4.13.................................................121

Figure 4.16: Simplified Circuit Diagram of Figure 4.14.................................................121

Figure 4.17: Waveforms of DAB Operation with the Rectangular Phase Shift

Modulation Technique................................................................................126

Figure 4.18: Waveforms of the Charging Profiles using CCCV Method for the

EV Battery..................................................................................................127

xv

CHAPTER 5

Figure 5.1: Voltage and Current Waveforms of the three-phase MVAC Grid at rated

Charging Power and Ideal Grid Condition..................................................137

Figure 5.2: SST Input Active and Reactive Power Waveforms at rated Charging

Power and Ideal Grid Condition...................................................................138

Figure 5.3: Harmonics Distortion of Input Current to the SST.......................................139

Figure 5.4: Harmonics Distortion of Input Voltage to the SST ………………………..140

Figure 5.5: MVDC-Link Voltage (Top) Output Current (Bottom) and of each CHB

Cell at the rated Charging Power………………..………………………….141

Figure 5.6: Output Current and Voltage of the DAB Converter to the EV Battery

at the rated Charging Power………………………………………………..142

Figure 5.7: Waveforms of HFT Primary and Secondary Voltage in Ideal Grid

Condition at the rated Charging Power…..……......................................…143

Figure 5.8: Waveforms of the Input Voltage and Current from the MVAC to the SST

with disturbances conditions at the grid between 0.2 and 0.5 s…….…...…143

Figure 5.9: Comparison of the Grid Frequency Measurements using the proposed

PPL versus the built-in MATLAB PLL………..……….……………...….144

Figure 5.10: The dq components of the MVAC grid affecting the CHB

controller during the disturbances between 0.2 and 0.5 s………....……...145

Figure 5.11: The MVAC Grid Voltage LL RMS measurement from the proposed

PLL showing the affected disturbances between 0.2 and 0.5 s ….…….146

Figure 5.12: The MVAC Grid Voltage LL RMS measurement from the

proposed PLL during ideal grid conditions…………………………...….146

Figure 5.13: Phase angles’ measurements of the MVAC grid voltages during

ideal grid condition using the proposed PLL.……..……...……………....147

Figure 5.14: Simulation Results of the MVAC– 3Phase with LLLG Fault a) Voltages

b) Currents c) Grid Frequency using the built-in MATLAB PLL………...148

Figure 5.15: Overall Simulation Model of the SST-based UFCSEV ……………...…..149

Figure 5.16: Pulsing signals for CHB MOSFETs: Top: Switches 1&4

Bottom: Switches 2&3 ……………………….. ……………………...….149

Figure 5.17: Pulsing signals for DAB MOSFETs using Phase-Shift Modulation:

a) Switches 1&4 b) Switches 2&3 c) Switches 5&8

d) Switches 6&7……………………………………………………...…...150

xvi

Figure 5.18: Li-ion Battery Characteristics for the EV Battery Model used on

MATLAB/Simulink ………………………………..……………………150

Figure 5.19: EV’s Charging Profile with SoC limits………………………………...…151

Figure 5.20: Forward Characteristic Approximation of a MOSFET (or Diode)

by Vsw,0 and r………………………………...........................................…152

xvii

GLOSSARY OF ACRONYMS & ABBREVIATIONS

ABP Adaptive Balancing Power

AC Alternating Current

AFE Active Front-End

BESS Battery Energy Storage System

BEV Battery Electric Vehicle

BMS Battery Management System

BPSM Bidirectional Phase Shift Modulation

CAES Compressed Air Energy Storage

CAN Control Area Network

CHB Cascaded H-Bridge

CHAdeMO Charge de Move

CCCV Constant Current Constant Voltage

CCS Combined Charging System

DAB Dual Active Bridge

DAM Dynamic Average Model

DBC Dead Beat Control

DHB Dual Half-Bridge

DER Distributed Energy Resource

DES Distributed Energy System

DC Direct Current

DPSS Dual Primary Single Secondary

DPDS Dual Primary Dual Secondary

DSP Digital Signal Processor

DSM Detailed Switching Model

EB Electric Bus

EMI Electromagnetic Interference

EMS Energy Management System

xviii

EMT Electromagnetic Transient

ESS Energy Storage System

EV Electric Vehicle

EVSE Electric Vehicle Supply Equipment

FC Flying Capacitor

FCS Finite Control Set

FESS Flywheel Energy Storage System

FPGA Field Programmable Gate Array

FCV Fuel-Cell Vehicle

G2V Grid-to-Vehicle

GHG Green-House Gas

GB/T Guobiao

HE High Energy

HESS Hybrid Energy Storage System

HFT High-Frequency Transformer

HIL Hardware-in-the-Loop

HP High Power

HV High Voltage

IEC International Electrotechnical Commission

IBC Interleaved Boost Converter

ICE Internal Combustion Engine

IGBT Insulated-Gate Bipolar Transistor

IPT Inductive Power Transfer

ISOP Input-Series, Output-Parallel

ITCM Integrated Triangular Current Mode

JBS Junction Barrier Schottky

KPB Kinetic Power Booster

LF Low Frequency

xix

LFP Lithium-Iron Phosphate

LFT Line Frequency Transformer

Li-ion Lithium-Ion

LMO Lithium Manganese Oxide

LPF Low-Pass Filter

LV Low Voltage

LVDC Low Voltage Direct Current

NPC Neutral-Point-Clamped

NPP Neutral Point Piloted

MFT Medium-Frequency Transformer

MIL Model-in-the-Loop

MIMO Multiple Input Multiple Output

MMC Modular Multi-level Converter

MPC Model Predictive Control

MV Medium Voltage

MVAC Medium Voltage Alternating Current

MOSFET Metal–Oxide Semiconductor Field-Effect Transistor

PCC Point of Common Coupling

PET Power Electronic Transformer

PEV Plug-in Electric Vehicle

PHEV Plug-in Hybrid Vehicle

PF Power Factor

PFC Power Factor Correction

PID Proportional–Integral–Derivative

PR Proportional Resonant

PSFB Phase-Shift Full-Bridge

PLC Power Line Communication

PLL Phase-Locked Loop

xx

PV Photovoltaic

PWM Pulse Width Modulation

RES Renewable Energy Source

RFB Redox Flow Battery

RMS Root Mean Square

SAE Society of Automotive Engineers

SHB Sample-and-Hold Block

SISO Single Input Single Output

SoC State of Charge

SoH State of Health

SPDS Single Primary Dual Secondary

SPM Single-Phase Module

SPTS Single Primary Triple Secondary

SRF Synchronous Reference Frame

SST Solid-State Transformer

SVM Space Vector Modulation

TCC Transistor-Clamped Converter

THD Total Harmonic Distortion

TLB Three-Level Boost

TPSS Triple Primary Single Secondary

TPS Triple Phase Shift

UFCSEV Ultra-Fast Charging System for Electric Vehicles

V2G Vehicle-to-Grid

V4G Vehicle-for-Grid

VSC Voltage-Source Converter

WBGSs Wide-bandgap Semiconductors

ZCS Zero-Current Switching

ZVS Zero-Voltage Switching

xxi

LIST OF MAIN SYMBOLS & NOMENCLATURE

g Phase angle of the grid supply

ϕ Phase

𝜑 Impedance phase angle between the active and apparent power vectors

fg Nominal grid frequency

h Harmonic order

ISC Maximum short-circuit current at PCC

IL Maximum demand load current (at fundamental frequency) at PCC

VMVAC-ph Phase-to-neutral voltage of the MVAC grid

VMVAC_LL Nominal voltage (RMS line-to-line) of the MVAC grid

IMVAC-ph Phase current of the MVAC grid flowing through the grid filter

LCHB Inductor of the grid filter

fCHB Switching frequency of the CHB rectifier

MCHB Nominal modulation index of the CHB

NCHB Number of H-Bridge cells of the CHB rectifier

Smax Maximum apparent power flowing through the SST

VCHB1 Fundamental AC input voltage to the CHB

VMVDC Voltage across the MVDC-link

VMOSFET_rated Rated blocking voltage value of the MOSFET semiconductor switch

fDAB Switching frequency of the DAB converter

dDAB Phase shift or duty cycle of the DAB converter

CO2 Carbon Dioxide

GaN Gallium Nitride

NiCd Nickel–Cadmium

NiMH Nickel–Metal Hydride

Si Silicon

SiC Silicon Carbide

1

Chapter 1. Introduction

This chapter introduces the motivation of this study followed by the challenges

pertaining to the predilection of conventional charging of electric vehicles in favour of

ultra-fast charging. The scope, problem and objectives of the thesis are defined, and the

framework and methodology of which this research has been carried are briefly introduced.

The thesis layout with a brief overview of each chapter finalises this introductory chapter.

1.1 Background and Motivation

1.1.1 Electrification of Transportation

In the light of the continued increasing demand for efficient, reliable and convenient

transportation means, there is perhaps no apter symbol of the 21st century than the

automobile and mass transit; the dominant means of mobility aspired and one of the levers

of socio-economic progress throughout the globe [1–3].

In today’s world, the energy for personal and public transportation emanates largely

from petroleum in the form of gasoline, diesel, and gas to power traditional vehicles by

ICEs. These modes of transport are in crisis due to their heavy dependency on fossil fuels.

However, the environmental impacts and energy security problems are rapidly making

automobile transportation and mass transit unsustainable for our society [2]. This is

because transportation is one of the largest contributors to GHG emissions in the world

with 15% of the total emissions [3–4]. Canada is the 7th biggest GHG emitter in the world;

which is the highest amongst all G20 members; with its transportation that accounts for

28% of the total CO2 emissions as the 2nd largest contributor of emission in the country [5].

Over the past few decades cultivated, the evolution of the transportation sector was

increasingly being questioned for its impact on climate change and public health. A

considerable amount of research has been dedicated to rationalising energy consumption

and finding alternative solutions which aim to curb and mitigate the environmental issues

stemming from transportation sources without penalizing personal, commercial or mass

mobility. In order to preserve the climate and natural resources of planet Earth, the

transition from ICE vehicles to BEVs will play a vital role in ensuring sustainability as this

technology presents an enormous opportunity to decrease CO2 emissions and air pollution.

2

Electrification of transport is regarded as a promising trend as it is more environmentally

friendly and has higher efficiency. In the mobility industry, compared with conventional

ICE, an electric driven engine is able to increase the efficiency by 30-40% [6–9]. This has

become the major objective for the automotive industry worldwide and has led to the

invention and development of new propulsion technologies focused on vehicle

electrification which is the most viable option by spurring a different mix of vehicles. The

ICEs in conventional cars have been replaced by motors with rechargeable battery packs

as in PEV that can be recharged from any external electricity sources such as wall sockets.

PEV technology is a subcategory of alternative-fuel vehicles that includes BEVs, PHEVs,

and FCVs [7–9]. Most state-of-the-art EVs mainly operate using electrical energy being

stored in their batteries [7]. The electricity stored in the batteries either drives or contributes

to driving the EV wheels. The fact that these batteries have limited energy capacity for

storage and use in long-distance travel, recharging EVs from time to time is essential to

overcome drive range anxiety. However, there is still challenging evidence when

considering the capacity of the existing electricity distribution networks to supply the

necessary power sufficient to recharge these EVs [7–8]. Currently, due to the limited

number of charging stations and the relatively high price of the battery, PHEV is more

welcomed by the global market. However, with further penetration of EV charging systems

and advancement of battery technologies, PEV has a much more potential to be dominant

in the future from viewpoints of environment, efficiency, and cost [7–11].

Transportation electrification is revolutionising the mobility industry and

transforming the future of how automobiles, public transits, watercraft, and even aircraft

and spacecraft are powered to support the larger goal of sustainable development with zero

tail-pipe modes of transport. Regardless of technology development, higher cost, limited

range, and long recharging time represent critical drawbacks that still limit the adoption

and availability of all EVs in both personal and mass transportation sectors. Thus, the role

of automobile and mass transit in the present needs to become part of a much bigger energy

network, wherein energy storage, power conversion, information and communication play

a principal role. Therefore, research is moving rapidly towards vehicle electrification that

assists in enhancing both the mobility and the power industries. Therefore, the only

potential energy source for transportation is electricity as it tackles the simultaneous

3

demands for energy supply security, fuel diversity, reductions in GHG emissions, and it is

widely obtainable and can be produced domestically, in both urban and rural areas.

1.1.2 Charging and V2G Concepts for Electric Vehicles

Transitioning to an electric transportation model requires energy storage capable of

supplying the energy and power demands of such EV. The availability and effectiveness

of charging equipment for EVs play a vital role in their development, grid integration and

fostered adoption by users worldwide. As the number of EVs increases, there is an urgent

and intensifying need for sustainable, efficient, cost-effective, reliable, and fast responsive

EV charging solutions. One practical way to achieving an all-electric cruising range of EVs

is to design and implement well distributed charging infrastructures. Thus, battery chargers

play a critical role in the development of EVs [9]. A charging station generally includes a

charging stand, power outlet, charge cord, attachment plug, vehicle connector, and

protection equipment. Charging system configurations can vary from country to country

depending on the standards adopted and the type of electrical grid connection as well as

the charging power level, voltage level and nominal grid frequency. In all cases, the

charging time and lifetime of an EV’s battery are greatly influenced by the characteristics

of the charger that must guarantee a suitable charge of the battery. Significant research has

been focused on developing efficient and reliable charging with high power density, low

cost and low weight and volume. The power level is the main charging parameter, which

is proportional to the charging time, cost, equipment size and impacts on the grid.

International standards are referred to this parameter for the EV charging equipment

classifications [12].

The EV charging system can be categorised into two types: off-board and on-board

chargers with unidirectional or bidirectional power flow capability. On-board chargers

usually have limited power levels due to their weight, space need and costs. This charger

is installed inside the EV which allows owners to charge their EVs anywhere from a

suitable electricity source. Off-board charger is usually designed for high power charging

rates and is less constrained by size and weight. Unidirectional charging simplifies the

interconnection issues and limits hardware requirements whereas bidirectional charging

supports battery energy injection back to the grid; this technology is known as V2G [12].

4

EV batteries can be utilised as effective storage devices in micro-grids when they are

plugged in for charging. Most vehicles usually represent an idle asset as an average vehicle

sit parked for about 22 hours each day. Charging millions of EVs from the electricity power

grid could nevertheless be significant, in the form of increased loading of power supply

capacity, transmission, distribution and economics. Hence, the interaction between

vehicles and the utility grid effect should be considered in an intelligent and coordinated

method by controlling and scheduling the charging via communication-based distributed,

dispatch, and decentralised control systems for improved energy infrastructure. EVs could

potentially support energy management by storing energy when there is a surplus (G2V)

as DES and feeding this energy back to the grid in times of high demands on the grid or

shortages via V2G. V2G capabilities applied to the utility power grids still face some

challenges such as control complexities and regulatory policies [13–14].

1.1.3 Energy Storage Technology Options for EV Charging Applications

The expansion of electric mobility is a key component of strides towards

decarbonisation. Apart from EVs development, there has been an emerging interest in

employing electric ESSs in transportation electrification. Currently, the short-range of EB

and the lack of infrastructure for high-power charging terminals is a limiting factor for

rapid growth in electric public long-haul transport. ESS plays a key role in enabling the

roll-out of EV charging stations, especially in locations with a weak power distribution

grid. The ESS to be selected should have high efficiency and be able to afford to operate

in a lot of frequent charge/discharge cycles before its end-of-life point is reached, due to

the frequent connection and disconnection of EV fleets. ESS should also have high power

density and moderate energy density to enable delivering a large amount of power quickly.

The most commonly used ESS is the BESS technology, which includes Li-ion, Lead-

acid, NiCd/NiMH and other types of batteries. Lead-acid is a cheap BESS option, but it

has low efficiency and low power density. The health of a Lead-acid battery is significantly

reduced due to its chemical materials when overcharged or discharged. NiCd BESS has

been widely used since the late 1990s, its power density is much higher compared to Lead-

acid, but its life cycles are short, and it suffers from memory effects. NiMH BESS has an

improved power and energy density, while its capacity is still reduced critically in

overcharge conditions. On the other hand, Li-ion BESS is commonly used nowadays in

5

transportation electrification applications due to its high performance and cost-

effectiveness. Li-ion battery is the most widely employed technology in EVs as it has

advanced significantly over the past decades, making EVs more cost-effective and

practical. The cost of batteries has fallen considerably to less than $120/kWh [14–16].

Though it can operate in higher current conditions, Li-ion degradation issues still exist in

the condition of deep charge and discharge in peak rate [17–21]. There is theoretically up

to the five-fold potential to go from the current Li-ion energy density of 200 Wh/kg to up

to 1000 Wh/kg possible with Li-air batteries. There is a huge potential for research into the

material, stability, safety, cycle life, power and energy density and manufacturability of

such emerging technologies such as Li-air, Li-sulphur and Mg-ion [64].

Employing a chemical Li-ion-based BESS in the charging system is feasible, but

multiple charging cycles shorten the battery life span. This, unfortunately, leads to more

frequent system replacements, making this option costly and dismally polluting as they

pose recycling complications to the environment. Looking for sustainable alternatives

comes into the picture. Flywheel: for instance, employs a rotating steel or composite mass

to achieve energy storage as it is driven by an electric machine, including an induction

machine, permanent magnetic machine, and brushless DC machine. The biggest feature of

the flywheel is that it purely operates mechanically, and it utilises recyclable materials.

FESS technology has a huge advantage compared to any other ESSs; that its capacity can

reach up to several hundred kW at 100 % cycle stability and also has over 20 years of

service life and scalability to individual applications [22–23]. Chakratec [24] developed a

unique kinetic battery, based on a flywheel concept, which can withstand practically a very

high number of charging cycles. Utilising its proprietary KPB technology, Chakratec

facilitates the deployment of fast and ultra-fast EV charging stations in any location with a

weak grid. This applies especially to EBs as they run for long-haul or all-day shuttle

operation, but they have a battery capacity limitation. Opportunity charging at scheduled

stops extends their range to better fit normal bus schedules. ABP’s FESS enables

opportunity charging without the need for extensive upgrades to the utility grid [25].

In addition to offering a sustainable alternative of ESS with high efficiency and long-

life cycle, FESS has high power density as it is capable of delivering high-power bursts

which enable fast charging in low-voltage power grids allowing extended ranges for

6

electric transportation without hauling bigger batteries and without requiring significant

grid expansion at every bus stop. The advantage of flywheels on opportunity charging

station is frequented several times a day by EBs. Less frequent use increases effective cost

both of infrastructure and per unit energy. The latter is due to ratcheted demand charges on

peak loads. BESSs are not suitable in this application as cycling them multiple times per

day would severely shorten their life. On the other hand, FESSs match this application

quite well as they are designed for more than 100,000 cycles under the same conditions.

FESS, with a flexible grid interface for nearly any point of coupling, is freely scalable and

can be designed for individual applications [24] – [28]. There are also other ESS solutions

that can be employed in EV charging, such as ultra-capacitors and redox flow batteries.

Table-1 illustrates the energetic characteristics of various ESS technologies for EV

charging applications. Choosing an appropriate ESS technology depends on economic

considerations and technical specifications of the respective technology.

Table 1.1: Comparison of ESS Technologies for EV Charging Applications [29–30]

ESS

Technology

Energy

Density

Power

Density

For 200 EVs

per day L

ifet

ime

[cycl

es]

Inves

tmen

t

Cost

[$/k

W·h

]

Cost

Per

cycl

e

[$/k

W·h

]

[W.h

/kg

]

[W.h

/l]

[W/k

g]

[W/l

]

Mas

s [t

]

Vo

lum

e

[m3]

Lead-acid 30 74 100 250 76 31 ~ 103 300 0.5

Li-ion HE 200 630 220 650 11 4 ~ 104 800 0.5

Li-ion HP 80 140 750 1400 29 16 ~ 104 2000 0.5

RFB 23 30 60 80 99 76 ~ 104 500 0.1

Supercapacitor 6 7.6 5900 7400 380 300 ~ 105 7000 0.08

Flywheel 11 18 800 1300 207 127 ~ 106 4000 0.08

CAES 23 24 23 24 99 95 ~ 106 50 0.02

1.2 Current Challenges

Despite the recent advancements of technologies for EV charging solutions, there

are still many challenges that are encountered by the electric power and mobility industries.

Some of the most significant challenges that are being considered in research and

development nowadays are focused on the followings:

7

1.2.1 Prolonged Charging and Driver Range Anxiety

The driving range of EVs on one single charge is still shorter than the range of the

ICE gasoline vehicles due to the orders of magnitude larger (12,000 Wh/kg) energy density

of petroleum [31–32]. Despite the falling cost and major improvements in performance,

Li-ion battery degradation at rest and during cycling, as well as the charging rate limitations

due to the electrochemical processes and its limited energy density (compared to

petroleum) still pose major challenges to further EV adoption [33–36]. Range anxiety is a

serious issue and has led to the urgent need to re-think refuelling similar to gasoline

stations. To provide a better performance in terms of the mileage range of the EV, there

are two feasible solutions. The first is increasing the battery capacity resulting in an

increase in the cost, size, and weight of the EV [36]. The second solution would be to

enhance the fast-charging infrastructure; thus, enabling drivers to recharge their EVs more

frequently. Out of the two solutions, the latter proves to be more beneficial technically and

economically [37–38].

The duration required to charge such batteries can be significantly minimised, which

implies the use of the grid and additional sources of energy that must be managed

efficiently and intelligently. A waiting period is also required to recharge the ESS installed

in charging stations once the EV departs. Such a period should also be minimised in order

to reduce the time that the driver needs to wait at the station before charging the EV battery

and to accelerate the EV battery swapping process at some charging stations if applicable.

Recharging the battery of parked EVs at the parking lots of workplaces, residential

buildings, or in public charging stations could be one of the prominent solutions. However,

users are bound to charge their EVs via residential AC mains with low power capability

due to the lack of fast charging infrastructures. These charging points are referred to as

level-1 (120 V) and level-2 (240 V) AC chargers as per SAEJ1772 standards [39]. In such

cases, EVs are equipped with dedicated on-board chargers that are capable of drawing

power of 1.92 kW (level-1) and 19.2 kW (level-2) from the utility grid [40]. Typically,

these chargers take more than 8 hours for a single charge to add about 200 miles of driving

range on the EV. This is; however, undesirable for highway driving and long trips. Thus,

there is a huge demand to enhance the power capability of on-board battery chargers to

8

quickly replenish the charge in an EV battery. However, it is difficult to develop high

power density on-board chargers due to the size, cost, weight and safety constraints of the

EVs. Thus, establishing fast and ultra-fast charging infrastructures to meet the increasing

power demand while facilitating acceptable and safe charging of EV batteries is a feasible

solution that is currently undertaken by extensive research and development [41–42].

1.2.2 Limited Capacity of EVs’ Batteries

EV batteries have limited storage capacity used for a limited average range while

travelling long distances, which is defined by the EV battery performance. Substantial

development in the area of on-board batteries is expected in order to lengthen the total

driving range. Nowadays, commercially available fast-charging solutions allow recharging

of an EV within 20 minutes as a minimum [43–44]. High energy density lithium batteries,

based mostly on the LMO spinel or LFP electro chemistries are widely utilised by

manufactures worldwide in order to reach the highest autonomy possible while having

prolonged charging disadvantage of durations in the scale of 6-8 hours for charging power

between 3-4 kW. High power density batteries; however, require less time to recharge. Li-

ion batteries are popular energy storage solutions for peak loads and demand charges, but

they suffer from a few inherent deficiencies such as insufficient power density to meet

peak-power demand, uncontrolled thermal management (cooling the battery and warming

it up during colder weather conditions), and limited lifetime/driving range (only 249 km is

achievable at best from a 90 kWh all-electric bus battery pack on a single charge [45–46].

1.2.3 Complex Installation and Inefficiency of Existing MVAC-LVAC LFTs

The entire system of modern EV fast charger stations with AC and DC coupling

system connects to the MVAC utility supply via a three-phase step-down service LFT that

delivers power at LVAC (up to 480 V or 600 V line to line) to all of its subsystems, which

is usually not readily available in public installations. The subsystems are connected to the

transformer via switchgear cabinets that contain circuit breakers and disconnects. The

system may include ESSs and generation capabilities to help mitigate demand charges that

are incurred during peak power consumption requirements at the charging station. An

9

example of an AC-coupled system is a supercharger station in Mountain View, California,

which includes six superchargers and 200 kW (400 kWh) of BESS [53–57].

Existing ultra-fast charging solutions employ MV-LV LFTs to step down the AC

voltage as in DC distribution configurations, where the charging station connects to the

MVAC distribution system via an MV-LV transformer and an LV rectifier. The three-

phase LFT delivers power at LV to a single AC-DC rectifier stage, which then distributes

the DC power to individual station subsystems. The dedicated service transformer is used

to reduce the distribution system MV and provide a three-phase supply to a single DC fast

charger or to a DC fast-charging station comprising of multiple chargers. The conventional

iron-and-copper LFT in this application adds power losses and costs to the charger system

and generally complicates installations. Moreover, distributing high power to a charger or

a charging station at LV implies the need for conductors and LV distribution and

switchgear equipment that are large and bulky in size and weight [47–48]. The existing

transformer and the charger system total efficiency is around 93%. Besides its relatively

high losses at the average load level, the LFT cannot convert single-phase service to three-

phase for certain equipment [49–51]. These make LFTs an undesirable choice for ultra-fast

charging applications for EVs.

1.2.4 Limited Capability of Power Grids for High-Power Ultra-Fast Charging

The existing distribution utility grid has limitations in power capability. For

instance, European power is rated up to 3.6 kW and 11 kW for single-phase systems and

three-phase connections, respectively [29]. Charging a 100 kWh battery for Tesla Model S

EV from a standard 240 V, 30 A outlet takes approximately 11 hours to reach 80% SoC,

after which the car is able to cover up to 647 km of travel distance [52]. Since 38 km only

is the average daily travelling distance for a typical car as estimated by [53], charging EVs

using level-1 and level-2 would satisfy the demands of some EV drivers. However, for the

long-stretch highway travel segments, faster-charging options must be guaranteed in order

to overcome the “range anxiety”. If a fuel tanking for a conventional ICE vehicle with the

flow rate of 35 l/min, it would require an equivalent power of 22 MW which is utterly

absurd if compared with the charging of EVs. Even for lower charging rates between 5 to

10 minutes, it is necessary to connect to a strong grid with a higher capability if the EV

10

battery’s ability to accept a high charging power rate is taken into account. The worst-case

scenario is when several EVs are being charged simultaneously. This demands a huge

upgrade and change in the existing public infrastructures. In this case, the charging station

must have an ESS as a buffer to supply energy when needed and alleviate the high effects

of power demand on the grid system [53–55]. The scale of the charging power at the EV

input and the transferred energy required is of absolute importance regarding the electricity

power grid. A high-power charging solution requires the deployment of an extra buffering

ESS in order to mitigate the adverse impacts on the distribution grid. Existing industry

charging stations employ one type of ESS technology to directly charge EVs, otherwise,

EVs are charged directly from the electricity grid if it has sufficient capacity without

impacting other loads; like blackouts in neighbourhoods. However, when a fast-charging

station is not operational at full power rate, the ESS unit can still benefit from drawing

energy from the grid as widely spread by chargers based on CHAdeMO standard [56].

1.2.5 System Integration and V2G Impacts on Grids and EVs’ Batteries

Since electricity is distributed with AC, whereas, batteries use DC, power electronic

devices are required to convert AC into DC for charging batteries. In the EV application

framework, this could be achieved by deploying off-board or on-board chargers. As many

EVs require high-power and compact chargers, high-power chargers are often implemented

off-board due to the size constraints inside EV. However, low power chargers are regularly

embarked into the EVs. In some cases, a combination of off-board and on-board chargers

are often implemented in order to achieve the appropriate compatibility regarding the

power, voltage, and current ratings between the utility grid AC mains and the EV batteries.

One important concern of the effects of fast charging on the EV battery pack is that

its usage over time results in degradation of the battery’s SoH. The situation is even worse

for V2G as it has a huge direct impact on the battery lifetime due to the electro-chemical

reactions taking place in the battery. The rate at which chemical reactions take place for

each of the battery chemistry is well defined since the battery is subjected to such high

voltage and current levels during fast charging. With comparatively higher temperatures

generated, the EV battery experiences greater thermal degradation as a result [36].

11

There are significant discrepancies and variations of charging specifications based

on the manufacturers in many countries due to the wide range of EV models, batteries and

charging technologies that exist in the market. For instance, the EV manufacturers prefer

to sell their products in a set with a Level-1 single-phase on-board charger, which could be

connected to a standard household 16 A socket, the charging power is even more limited,

reaching a maximum of 1.92 kW. Therefore, a small-sized EV with a 20 kWh battery would

require at least 9 hours to be recharged up to 90% SoC. However, level-3 which requires

off-board chargers has been implemented nowadays by the CHAdeMO consortium [56],

where the charging current is limited up to 120 A by the connector used. This enables

charging a commercial EV within 30 minutes depending on the EV battery capacity. Off-

board DC fast chargers have limited flexibility for charging availability and locations. Such

a fast charger requires high input power which may affect the electricity grid as the loading

of this charger needs to be regulated. Still, EV manufacturers have not yet reached an

agreement on the standard connectors and power levels required for fast charging, the

increased charging especially where bidirectional power flow is used via the V2G

technology constitutes many challenges. Standardized charging protocols and charger inlet

connectors must be well-established in order to ensure charging compatibility and safety.

Thus, it is important to look at some aspects of the impacts caused by such charging stations

on the grid power quality and reliability such as harmonics by analysing the THD, power

factor, phase unbalance, ground fault and electricity sources.

1.3 Problem Statement

The development of ultra-fast charging technology has recently increased the

autonomy and the flexibility of EV drivers by mitigating the range limitations given

through the prolonged charging times (as in most cases taking several hours for a single

charge by conventional charging). Commercially available ultra-fast charger solutions

employ 3-phase LVAC input units that can be supplied by 208/480 V AC. For instance,

ABB [57] and Siemens [58]’s state-of-the-art high-power charging systems for electric

12

buses with a charging power of up to 450 kW are to be connected to the LV side of the

distribution step-down LFT with multi-windings and varying turns ratio. These conductive

DC ultra-fast chargers incorporate conventional service three-phase LFTs that convert

MVAC to the required LVAC with three power conversion stages, as shown in Figure 1.1:

(1) AC-AC conversion stage via LFT (MVAC-LVAC step-down transformer).

(2) AC-DC conversion stage via power electronics (LVAC-LVDC rectifier), with

an output that provides a shared DC distribution link for the loads tied to the

LV system. However, this front-end rectifier unit has disadvantages especially

in MW range high-power charging operations, such as producing unwanted

harmonic effects. With more stringent requirements by the grid code, in terms

of THD, which puts constraints on restricting the switching frequency of the

power electronic devices. Since there is no zero crossing of the voltage in the

DC-link system, this stage also requires more complicated protection devices

and control strategies [59].

(3) DC-DC conversion stage via power electronics (LVDC-LVDC converter to

convert the DC-link voltage to the voltage required to charge the EV battery.

No galvanic isolation is required in this stage as it is provided by the LFT of the

first stage.

Figure 1.1: Conventional EV DC Fast Charging employing an MV-LV LFT [57]

At low voltage levels, the input current to the conventional charging system is

typically large rated at 90A for 480V AC or 200 A at 208 V AC. This yields in increased

power losses and lower efficiency. Most DC fast chargers have an overall efficiency in the

range of 90-92%. Combining this with the efficiency of the MVAC-LVAC three-phase

13

LFT (~99%), results in 89-91% of overall system efficiency (excluding power losses on

the low voltage runs). If the LFT secondary drops (runs) are included, the overall system

efficiency can be expected to decrease further [47]. This service LFT also adds complexity

in installation as well as costs to the EV charging system. Furthermore, distributing high

power to an EV charging station at LV implies the need for large size conductors and bulky

LV distribution and switchgear equipment, which severely limit the number of EVs that it

can support. Besides, LFTs are unable to mitigate voltage flicker and unable to provide

perfect voltage regulation, especially at the distribution level as there is an inversely

proportional relationship between the transformer rating and its capability to perform

voltage regulation. Additionally, the saturation of the iron-and-copper LFT’s core results

in harmonics that usually yields high inrush currents. LFT also has limited performance

under DC-offset load unbalances. Other drawbacks of such LFT include its inability to

convert single-phase service to three-phase for powering certain types of equipment and

some environmental concerns, particularly when its mineral oil leaks [49–51]. Most of the

commercially available DC fast chargers have a total efficiency of around 93% if the LFT

has a 98.5% efficiency. The power losses and costs can be halved if this conventional LFT

is replaced with an SST or PET technology [48]. This approach enables direct connection

to the MVAC grid with the elimination of the LFT. The SST technology essentially covers

all functionalities of the LFT and AC/DC conversion stage. It also offers additional

functionalities such as galvanic isolation, bi-directional power flow, fault isolation and

fault current limitation. Simpler charging architecture adopting a common DC bus

configuration can be achieved as it offers the flexibility to also integrate large-scale DESs

such as RESs and ESSs with reduced conversion stages and higher efficiency by direct

connection to the MV utility grid at a comparable high voltage level [60–61]. Multilevel

converter systems are advantageous over bulky LFT for providing voltage adaptation as

required. Especially, SST modular multilevel converters have great benefits such as

reduced filtering effort, lower harmonics as well as robust operation and reduced switching

losses [62]. As SST is an emerging technology, previous publications focused primarily on

G2V on their SST system architectures without considering bidirectional power flow

capability for important applications such as V2G and V4G which can provide significant

technical benefits to the utilities such as frequency regulation and peak shaving. Moreover,

14

most of the previously published research employed Si IGBTs as the main switching

devices for their proposed SSTs. In addition to lacking the design steps and justifications

on the selection of converter topologies and their parameters, most previously proposed

SST configurations consider few aspects in regard to IEEE standards requirements and lack

a comprehensive analysis considering THD, PFC, power balance, voltage ripple,

efficiency, and costs while employing a highly efficient and commercially available SiC

MOSFETs for practical implementation. To investigate the SST performance while

considering prototyping costs, there is a lack of a detailed model-based design of two-stage

high-frequency SST combining the key features of CHB and DAB for ultra-fast charging

applications without a third stage. Different modelling methodologies of multilevel power

converters have been presented in various publications where some techniques such as

averaged modelling, and semi-analytical modelling were applied. However, there is still

no much research focusing on modelling of modular converters for ultra-fast charging at a

large scale incorporating a MVDC bus system that guarantees flexibility and optimum

efficiency in a wide range of operations. Also, for high fidelity of SST performance

analysis, there has not been any real-time simulation conducted with the implementation

of MIL in the literature. This research study became possible by choosing OPAL-RT real-

time simulator [63] with MATLAB/Simulink as an integrated testing and validation

platform using the MIL real-time simulation approach. This is because of the OPAL-RT’s

key features that include its fastest computing level for real-time simulation that achieves

more accurate results on FPGA for power electronics applications. Since most of the

research found in publications focuses on small-scale experimental setups in a few kW to

validate their theoretical design of various power conversion systems, an experimentally

verified method without the need to build a whole physical test bench is undertaken in this

study using OPAL-RT’s RT-LAB. RT-LAB is an integrated hardware and software system

with multi-core processors used for external validation and verification of power systems

and power electronics simulation models with full integration with MATLAB/Simulink.

Using the MIL real-time simulation technique saves time, manpower and cost for

industrial-based high-power applications such as EV charging. Verification of the proposed

model-based design approach is based on the MIL concept, for the first time in EV charging

applications, to validate transient response and dynamic behaviour of the proposed

15

switching simulation model in real-time. The MIL technique is advantageous compared to

any other method of modelling and simulation due to its ultra-high fidelity and very small

step time appropriate in capturing such transient behaviour owing to its unique simulator

based on FPGA. A detailed framework of the methodology undertaken for this research

study is outlined in the flowchart shown in Appendix A.

1.4 Research Objectives

The main purpose of this thesis is to develop, analyse and evaluate the realisation of a

two-stage multi-level SST system model with an MVDC-link utilising MVAC-MVDC and

MVDC-LVDC high-power converters directly interfacing with a three-phase utility-scale

MVAC power distribution feeder for EV ultra-fast charging applications. This is achieved

by developing a modular model-based design of an SST based on multi-modules with 3.3

kV SiC MOSFETs and an HFT, targeted for ultra-fast charging operation rated at 1.5 MW

of power and a maximum DC charging voltage of 1000 V. The specific objectives are:

1) Develop a realistic time-domain system-level simulation model of a 27.6 kV AC

grid-connected multi-module DPSS ISOP SST based on MVAC-MVDC CHB and

galvanically isolated MVDC-LVDC DAB converters, and an EV battery for the

UFCSEV system on MATLAB/Simulink to be integrated with OPAL-RT-LAB.

2) Implement appropriate control strategies and structures, and modulation schemes

to incorporate necessary functionalities: voltage balance, THD mitigation and PFC.

3) Optimise the design and sizing parameters of each component of the SST high-

power conversion system model to achieve full modularity as well as maintaining

low voltage ripples across the DC-links in compliance with IEEE standards.

4) Evaluate the developed system-level model performance, validate the UFCSEV

design by MIL real-time simulation, and analyse the efficiency of the SST system.

16

1.5 Thesis Outline

The present thesis consists of six chapters, which are organised as follows:

Chapter 1 serves as a generic introduction, beginning with a motivation for the topic

of transportation electrification and briefly describes the concepts of charging and V2G

with ESSs. The challenges of the charging infrastructures available today are outlined, and

the specific research problem addressed in this thesis is also defined. State-of-the-art

research approaches and the objectives of this thesis are also summarised.

Chapter 2 reviews the literature on latest ultra-fast charging technologies and

industry standards. It also provides an overview of SST structures and compares the various

SST converter topologies for ultra-fast charging applications, modelling types, and relevant

control strategies and modulation schemes presented in most recent publications.

Chapter 3 presents the proposed UFCEV architecture and describes in detail the

selected power converter topologies for the two-stage DPSS SST, and the first order design

parameters’ calculations. It also depicts the overall system-level model of the power circuit

of the modular SST system based on time-domain detailed switching modelling technique.

Chapter 4 demonstrates the selection of the control strategies, modulation schemes,

and modelling techniques implemented for the proposed SST charging system. It also

provides the detailed derivations of the transfer functions of the open loop and closed-loop

of the PI-controllers using averaged dynamic models, and small-signal models with state-

space averaging. It also shows the control technique implemented for the EV battery model.

Chapter 5 illustrates the design and simulation results of the developed SST model.

Various operating scenarios are also detailed for analysis and discussion of the transient

and dynamic performance of the system model validated by MIL real-time simulation.

Chapter 6 concludes this thesis by summarising the previous chapters, highlighting

the contributions, and presenting possible future works for extending such research studies.

17

Chapter 2. State-of-the-Art Review

This chapter provides a brief description and evaluation of presently available EV

fast-charging mechanisms, standards and protocols. A comparative study of the present

status and future implementation plans for ultra-fast charging infrastructures is outlined.

This chapter also reviews the latest publications which propose SST configurations and

topologies for EV ultra-fast charging applications. Different DC-link structures, control

schemes and modulation techniques of the relevant power converters are also compared.

2.1 EV Charging Classifications, Standards and Protocols, and Latest Technologies

Re-charging of EVs’ batteries can be performed using three developed approaches

namely, inductive, AC conductive and DC conductive.

Wireless charging can be enabled by the IPT mechanism. This technology already

exists in the industry but still has not been standardised yet. The IPT method is facilitated

by transferring the energy via an airgap from the power supply underneath the EV to the

EV battery through the magnetic induction capability based on the principle of

electromagnetic induction at high frequency. The main components of inductive charging

are two coils; the primary coil, which is placed on the road interface (charging pad) in the

building construction linked to the socket (power network), and the secondary coil which

is placed on the EV battery pack plate. This charging strategy is not fully mature yet due

to its high infrastructure cost, inefficiency, and low-power-transfer capability [65–67].

In contrast, the AC charging system transfers energy from the mains supply to the

EV battery through the EV’s on-board charger. This is the most common charging

technique as it provides much more flexibility in choosing where to charge whether at

home, workplace, or at a public charging station due to its lower-cost construction and

installation requirements. The AC conductive method is also known as Level-1 or Level-2

as defined by the SAE J1772, which refers to 120 V and 240 V charging, respectively. This

can be implemented almost anywhere provided that a standard electrical outlet with AC

power is available and also depending on the level of current that the supporting circuitry

can sustain. However, this conductive charging has two disadvantages namely, power

18

output limitation due to the size and weight restriction on the on-board charger, as well as

relatively long charging period. Additionally, the AC power of the utility grid outlet has to

be converted to DC power using an on-board inverter coupled with a DC-DC converter in

order to charge the EV battery via its DC positive and negative terminals [68, 69].

DC conductive charging, also known as Level-3; on the other hand, is suitable for

high-power and rapid charging applications, which usually take less than 1 hour for a single

charge. The power output of the DC chargers is limited only by the ability of the EV battery

to accept the charge. The biggest advantage of such a DC charger is that it can be designed

with either high or low charging rates and it is not limited to its weight and size. DC

charging solutions use off-board chargers which are located outside the EV, and this setup

provides flexibility because it does not take up space within the EV and also the charger

can be shared by several EVs. The higher the power charger delivers, the faster the charging

gets. Nevertheless, with higher power operation, the AC/DC converter, the DC/DC

converter, and the power control circuits become larger and more expensive. That is why

DC charging requires high investment for installation compared to AC charging and could

be availably accessed at public charging stations only. Although DC fast charging is quite

attractive as it delivers high power to the EV battery which results in very short recharging

times, DC charging has a number of limitations as the power cannot be increased infinitely

due to two technical limitations. First, the high charging current leads to high overall losses

in charger and battery (I2R). Suppose the internal resistance of the EV battery is R, and the

power losses in the battery can be expressed simply by I2R, where I is the charging current,

then the losses would increase by a factor of 4 times whenever the current is doubled. For

any EV charger, it is important that the cable is flexible lightweight so that the user can

carry the cable and connect to the EV. With higher charging powers, thicker and thicker

cables are needed to allow more charging current. Else, it will heat up due to the losses.

Today’s DC fast chargers can transmit charging currents up to 250A without cooling.

However, in the future with currents above 250 A, the charging cables would become too

heavy and less flexible for usage. This applies to CHAdeMO 3.0 that is 350-400 kW

charging enabled, charging with up to 600 A and 1.5 kV. The solution would then be to

use thinner cables for the given current with cooling systems built-in and thermal

19

management to ensure that the cable does not heat up which is more complex and costly to

implement compared to using a cable without cooling [68].

With the continuously growing number of EVs during the past decade, various

standards have been introduced globally by several industry governing bodies, including

the SAE and the IEC that stipulates specific standards of charger voltage, power range, and

configurations for manufacturers to enable EV charging based on established standardised

protocols in order to ensure charging compatibility and safety. The comparison of the

classifications defined by SAE and IEC is summarised in Table-2.1 where IEC defines four

unique modes, whereas SAE has six different modes for EV charging [69].

Table 2.1 Comparison of IEC and SAE Standards and Ratings for EV Charging [69]

Standard Category Ratings (Voltage, Current, Power) Applications

IEC

61851

Mode-1 1×250V, 3×480V

16A/ϕ, 13.3 kW/ϕ

Household outlet charging

On-board charging

Mode-2

1×250V, 3×480V

32A/ϕ, 26.6 kW/ϕ

Household outlet with on-board

charger or dedicated EVSE

Mode-3 3×400V, ≤ 80A/ϕ, 66.5 kW/ϕ On-board charging w/ dedicated

EVSE Slow or Fast charging

Mode-4 ≤ 1000V(DC), 300A, 300 kW DC fast charging

Off-board charger or dedicated EVSE

SA

E J

1772

AC

Level-1 1×120V, 12 A/16 A, ≤ 1.9kW Residential parking lots

On-board chargers Level-2 1×240V, ≤ 80 A, ≤ 19.2kW

Level-3 3-ϕ or 1-ϕ, ≥ 20kW Not implemented yet

DC

Level-1 200-400 V, ≤ 80 A, ≤ 36 kW DC fast charging

Off-board chargers Level-2 200-400 V, ≤ 200 A, ≤ 90 kW

Level-3 200-600 V, 400 A, ≤ 240 kW DC fast charging, Off-board chargers

There are various communication protocols, inlet connectors, and plugs that EV

manufacturers and other service providers have developed to ensure enhanced safety and

proper charging operation of the DC fast-charging system. These standards vary by

manufacturers and by geographical areas of countries. CHAdeMO, CCS, GB/T, and Tesla

are the four distinct standards for DC conductive charging coupler types that are used in

EVs today. The CHAdeMO standard was proposed by Japanese companies, such as Nissan

20

and Mitsubishi. CHAdeMO serves the largest number of fast-chargeable plug-ins around

the world. CHAdeMO 2.0 allows for up to 400 kW (1,000 V/400 A) high-voltage DC fast

charging [70]. The CCS Type-1, also known as the Combo-1, and Type-2, known as the

Combo 2 system, that uses the SAE J1172 standards are promoted predominately in North

America and Europe, respectively. A CCS connector has AC plugs along with two

additional DC pins for fast charging. CCS v1.0 supports power up to 80 kW at 500 V and

200 A, whereas the newest CCS standard, CCS v2.0, can support DC fast-charging up to

350 kW at the supply line voltages of up to 1,000 V, with the maximum output current of

500 A. Furthermore, Tesla Inc. has developed its own proprietary charging system

standards and plugs exclusively for Tesla EVs. Tesla’s 1st and 2nd generation versions of

superchargers have the capability of delivering up to 120 kW and 135 kW respectively.

These superchargers have a charging voltage ranging from 50 V to 410 V and a maximum

current of 210 A to serve power to either single EV charging or multi-EV charging split

power when multiple EVs are being charged simultaneously. Multi-vehicle charging can

be realised by paralleling the EVs. However, the 3rd generation of Tesla’s superchargers,

with better efficiency (96%), can support up to 250 kW of DC charging without power-

sharing between adjacent EVs plugged into the same stall of a supercharger [71]. Another

example of a CCS and CHAdeMO compatible DC fast-charger is Delta Ultra-Fast Charger

which can be supplied by a 3-phase, 400 V AC to provide up to 150 kW at 170-1000 V DC

and 300A with 94% peak efficiency [72, 73]. One of the most popular DC fast-chargers in

North America and Europe is the ABB Terra HP which complies with SAE Combo 1 and

CHAdeMO, which can be connected to a 3-phase 480 V AC to deliver a maximum output

power of 350 kW at 150-920 V DC and 375 A or 500 A, with peak efficiency at a full load

of almost just over 95% [74, 75]. Of the highest efficiency available in the market today

reaching 98% peak efficiency is the Tritium Veefil-PK in compliance with CCS Type 1

and 2 CHAdeMO, which can be supplied by a 3-phase, 480 V AC to provide DC fast

charging power of 350 kW at 950 V DC, 500 A (CCS) or 200 A (CHAdeMO) [76, 77].

These DC fast chargers are suitable for many EVs including heavy-duty types.

Configuration BB, known as GB/T, is only used in China which mandates the use of a new

standard (GB/T 20234.3-2015) for all new EVs even foreign EVs sold in China to follow

21

the GB/T standard. The current GB/T standard is for up to 237.5 kW at 950 V and 250 A,

whereas the new GB/T standard offers 900 kW charging at 1,500 V and 600 A [78].

For the operation of public transit busses that require charging as fast as filling up

a gasoline tank, ultra-fast charging technologies specified for EBs have been developed

over the past decade. Canada is home to four EBs’ manufacturers namely, Green Power

Motor Company [79], The Lion Electric Company [80], New Flyer Industries [81], and

Nova Bus [82]. Amongst the largest on-board battery capacity of these EBs is the Nova

Bus LFSe+ battery which has powerful modular options capable of storing up to 564 kWh

of energy [83]. For such public transit EBs, there are some world-leading electrification

technology developers including BTC Power [84], BAE Systems [85], Proterra [86],

SIEMES [87] and ABB [88]. The EB charging technologies can be categorised into two

types permitting flexibility on EB allocation and route planning:

1) Flash Charging through Overhead Rails for High-Power Charging

Operating for a charging system compatible with SAE J3105 standards, the

maximum charging power of this type that is available in the market today is 1500 kW with

a DC voltage ranging from 150-1000 V with a continuous 1000 A [89]. The charging

interface via roof-mounted fixed conductors and a structural mast inversely mounted

pantograph at 4–5 m height where the moving parts are on the stationary side of the

charging system, where the EB is charged within a few seconds or minutes depending on

the EB battery’s SoC. The most popular of this system is VersiCharge Go/MaxxHP built

by SIEMENS US with dedicated configurations for overhead and depot charger rated at

150-600 kW. SIEMENS SICHARGE is currently being developed for overhead and depot

chargers rated at 50-600 kW, with flexible dispenser configurations and semi-parallel

charging [87].

2) Plug-in at Depot via Inlet Ports and Connectors for Low-Power Charging

For a standardised charger of CCS type 1, J1772, the charging power is rated at 150

kW maximum. The most popular of this charging system is VersiCharge Ultra 50/175

developed by SIEMENS US, rated at 50 and 175 kW, taking only 30 minutes to fully

charge the EB battery [87].

22

Figure 2.1: Types of EV Charging Mechanisms: (a) DC Conductive Charging with Overhead

Indoor/at Depot Pantograph, b) DC Conductive Charging with On-route Pantograph,

I DC Charging with Off-board Charger, (d) AC Conductive Charging with On-board

Charger, I Inductive Wireless Charging [64, 74]

2.2 Grid Connections & Common Architectures of State-of-the-Art DC Fast

Charging Systems

The current state-of-the-art DC fast chargers available on the market today, capable of

delivering more than 50 kW typically have two main distribution link architectures for

connecting the DC fast charging systems to the MVAC grid. These are the AC common

link architecture and DC common link architecture as depicted in Figure 2.2 and Figure 2.3

respectively. Both systems require a three-phase step-down LFT that provides LV power

supply as well as galvanic isolation which separates the EVs from the grid [69].

The AC-link architecture utilises the secondary windings of the LFT as the main AC

distribution bus, where various loads or DESs can connect by independent AC–DC and

DC-DC conversion units. On the other hand, the DC-Link architecture provides a shared

DC distribution bus by using a single dedicated AC–DC conversion unit from the LFT.

The concept of the AC-Link multiport system is to have several interleaved AC-DC

rectifiers connecting the loads or DESs independently to the MVAC grid. This architecture

improves the reliability, redundancy, and overall system stability because each AC-DC

conversion stage is independent of the other systems connected to the LFT. Nevertheless,

one drawback of this architecture is the high unwanted harmonic effects of the several

independent AC-DC rectifiers on the utility grid, especially in high-power charging

operations [90]. When more dynamic loads and DESs such as ESSs, solar PV systems are

connected to the AC-link, the number of independent rectifier units in the system increases,

thus leading to more complex control, larger size, and higher cost [69].

23

The alternative approach is using the DC-link architecture, via a single front-end, high-

power AC–DC rectifier unit along with PFC that connects the MVAC grid via the MVAC-

LVAC LFT to a regulated DC voltage standalone substation. The shared DC distribution

bus is a simpler system that requires fewer power conversion stages compared to the AC-

link architecture; thereby, enhancing the overall system efficiency. Furthermore, the

common DC-link system provides a more flexible structure, which can be easily integrated

with DESs such as RESs and ESSs. In addition, the DC-link is less susceptible to power

conditioning issues compared to the AC-link system in terms of PFC and synchronisation.

Therefore, the DC-link architecture concept allows EV charging systems to act as

intelligent systems, reducing the adverse impacts of a higher EV penetration in the existing

electricity network and load diversification. The absence of reactive power in such a DC

system simplifies the control [93]. However, the reliability of the DC-link architecture

depends primarily on the front-end AC-DC conversion stage, which must be rated at higher

voltage and power levels than that of the AC-link system to directly interface to the

MVAC-LVAC LFT while allowing power transfer to the system loads. This yields more

stringent limits in terms of THD as required by the utility grid code. These constraints can

restrict the switching frequency of the semiconductor switching devices and the overall

system efficiency, particularly in high power of MW range applications. A recent

comparative analysis in [91] examined the impact in terms of harmonic generation of the

common DC and AC bus architectures specifically for EV fast-charging stations by using

a VSC connected with the grid found that the DC-bus architecture has a much better

performance than that of the common AC-bus architecture. This is due to the lower THD

in the current and voltage which yields a better power quality obtained in the case of DC-

bus configuration. Additionally, the EV charging rate is faster in the case of DC-bus

architecture as compared to the AC-bus. The system efficiency of the DC-link

configuration is higher because of the better power quality and power factor. Furthermore,

the DC-bus system in the dynamic state is more stable as compared to the AC-bus system.

Moreover, this architecture requires more complicated control strategies and DC protection

schemes than the common AC-link system due to the absence of voltage zero crossing in

the DC-link system [92]. The lack of established standards for protection coordination in

DC-connected systems makes this configuration less desirable [93]. However, employing

24

bi-directional AC-DC active front-end AC-DC rectifiers can enable smart networks, with

the capability to transfer energy from the EV battery to the grid as a V2G technology.

Figure 2.2: EV Charging System with AC Coupling

Figure 2.3: EV Charging System with DC Coupling

To the best knowledge of the author, the implementation technique of most

manufacturers’ charging architectures commonly uses one form of the AC-link architecture

due to the well-established standards and practices for the AC power distribution systems

[93]. Figure 1.1 illustrates a simplified block diagram of a typical DC fast-charging system

fed from a MVAC distribution grid via the MVAC-LVAC LFT, which provides an AC

distribution bus to the LV electrical systems, including EV chargers. The typical EV

charger contains two distinct conversion stages: an AC-DC rectification stage, where the

conversion of three-phase or single-phase AC input voltage to an intermediate DC voltage

25

happens, followed by a DC-DC power conversion stage, which interfaces the EV battery.

An isolated DC-DC converter can also be implemented by transforming the intermediate

DC voltage to a regulated DC voltage level of the EV battery through an HFT. This fulfils

the galvanic isolation requirements of IEC standards for safety purposes [94, 95].

From economical perspectives, the costs of the charging infrastructure hardware

include the EV charger and its pedestal. Based on several studies for DC fast chargers, the

average hardware cost for 50 kW DC fast charger is in the range between $20,000 and

$35,800, for 150 kW DC fast charger, the cost starts from $75,600 to $100,000 while for

350 kW DC fast charger, the cost ranges between $128,000 and $150,000 [96]. Advanced

ultra-fast DC chargers for EVs are properly configured to directly connect with a three-

phase power supply, having 480 V line-to-line AC voltage. Since this voltage level is

typically in-accessible in public installations, a dedicated MVAC-LVAC LFT is used to

supply three-phase power to the charging system. Besides adding complexity to the

installation and the requirement for confined concrete foundation, this bulky LFT increases

the size and cost. Moreover, for high-power applications, the LFT requires large conductors

and bulky switchgear protection equipment. As a result, this increases the overall cost of

the charging system. The control of existing utility grid requires a fast response from all

entities connected to it, which may not be possible with traditional LFTs. Moreover, other

drawbacks relating to LFT include limited performance in voltage regulation, additional

heating losses and reactive power control issues [97, 98].

Therefore, the existing ultra-fast-charging station architecture can severely limit the

number of EVs and charging power. With the recent research advancement to further

accelerate EV charging technologies, an innovative solution has been proposed in

publications by which the charging system can be directly interfaced with the MVAC grid

distribution feeder, without the need to install such a heavy and bulky LFT on which the

current architecture widely depends. Indeed, with the reach and technological

advancements in power electronics and materials technologies, especially with the

introduction of SST and WBG-based semiconductor devices, such development of

modular, high-power density, compact and efficient design withstanding high-voltages,

new ultra-fast charging systems appear to be forthcoming and promising in the next years.

26

2.3 State-of-the-Art SST-based Ultra-Fast Charging Structures and Converter

Topologies

In addition to providing power conversion and galvanic isolation with its lighter

weight and size, the SST has other unique features compared to the traditional LFT, such

as higher efficiency, better controllability, current limiting capabilities [99]. Most of the

SSTs proposed in publications aim at converting the grid line-frequency MVAC input to

an LVAC output via three conversion stages. The first stage has an active front-end rectifier

that converts the MVAC input into a DC voltage. An isolated DC-DC converter in the

second stage, which provides a galvanic isolation, then converts the DC voltage to establish

a DC-link at a desired DC voltage level. The third conversion stage inverts the DC voltage

into a final line-frequency LVAC output. Other designs with fewer conversion stages such

as the single-stage SST proposed in [100] can also be implemented. However, the three-

stage SST design explicitly creates a common DC-link which enables integrating DESs,

ESSs, EVs, and other DC loads [101, 102]. Comparative studies of the SST configurations,

topologies, and their applications have been summarised in [103–107]. Figure 2.4 below

classifies SSTs in different aspects and highlights in blue the selected category for the work

proposed in this thesis.

Figure 2.4: Classifications of SST [106]

With the several SST implementations proposed in the literature, this section

focuses on SST systems that are specifically designed for ultra-fast EV charging

applications. The main function of the SST is to convert the MVAC into LVDC while

27

providing galvanic isolation by employing an HFT inside the SST. Since the operating

frequency of the HFT is much higher than the LFT (tens of kHz versus 60 Hz), the size of

the HFT is much smaller than that of the LFT. Instead of the conventional LFT and rectifier,

an ultra-fast charging system's overall efficiency can be significantly improved by using

an SST, which also saves spacings compared to the state-of-the-art approach. This is

because a higher efficiency yields power savings for the owner of the EV charging station,

and a reduced system footprint leads to better utilisation of the charging infrastructure site

[93].

For successful adoption of the SST technology, it is important to point out that

connecting power electronics directly to the MVAC grid line introduces several issues in

terms of safety, protection, and power quality that need careful mitigation while also

complying with the current standards relevant for MV equipment and EV chargers such as

those developed by IEEE, IEC, CHAdeMo and SAE [123–131]. Although the installation

cost of the SST-based ultra-fast charging solution is significantly lower than that of the

LFT, the material cost of the SST is still five times higher than the LFT [132, 133].

However, the relatively smaller size of the MV SST results in lower power losses by half

of the LFT system. The SST weight and volume can even be reduced to nearly one-third

[132]. The overall system efficiency of the SST at 1 MW power is higher than that of the

LFT by 7% (from 91.5% to 98.5%) reducing the power losses from 85 to 15 kW as shown

in [96]. This increase in efficiency yields a reduction in electricity costs.

With a primary focus on the SST conversion stages, Figures 2.5-2.8 below show

four possible topological configurations [103]. Figure 2.5 shows a single-stage SST

topology that involves AC-AC conversion with an isolated HFT link, and a DC-DC

converter interfaced at the EV battery to obtain the desired DC voltage level. An example

of this topology is proposed in [134, 135]. Since there is no dedicated DC-bus on the input

side, this topology may not offer PFC, reactive power compensation, and bidirectional

power flow for V2G applications. This limits the functionality of SST in addition to the

low voltage conversion ratio and switching frequency of this topology despite the simple

control required [136]. Another SST topological configuration that uses a two-stage

conversion with an isolated DC-DC converter and provides an LVDC link is shown in

28

Figure 2.6 [137–139]. With the presence of this DC-link, this SST topology allows for

integrating RESs and ESSs while also performing reactive power compensation [140].

However, types I and II of the SST topological configurations are inappropriate for MV

applications because multi-level modules with complex control cannot be applied at the

high voltage side easily and it is difficult to achieve ZVS. In addition to these major

challenges, high switching losses also lead to lower efficiency in these two topologies.

Type-III SST topology, as shown in Figure 2.7 has a two-stage conversion with a dedicated

PWM rectifier with PFC and an MVDC-link [140–143]. With the use of a resonant

converter, it is possible to achieve ZVS and soft switching [136]. However, due to the

unavailability of an LVDC-link in this topology, the integration of RESs and ESSs at the

LVDC is not possible. For high-power ultra-fast charging interfacing an MVAC directly,

the SST topologies of types I, II, and III are not suitable for this application due to high

switching losses when operating at a high switching frequency, which results in low

efficiency. On the contrary, type IV topology which consists of a three-stage conversion

including both MVDC and LVDC links at the primary and secondary side of the HFT

respectively is illustrated in Figure 2.8 [144, 145]. The first stage consists of a front-end

active rectifier which shapes the input current and provides reactive power compensation

and harmonic elimination while also allowing bidirectional power flow [146–152]. The

second stage consists of HFT and a DAB DC-DC converter to regulate the active power

flow. The third stage includes a DC-DC converter to further stepped-down the voltage is

transferred to the LVDC-link to interface the EV battery for charging at the desired voltage

level. Table-2 below summarises the comparison of the four SST topological

configurations in terms of voltage regulation, modularity implementation size, and cost.

29

Figure 2.5: SST Type-I: Single-Stage SPSS Configuration with no DC-link

Figure 2.6: SST Type-II: Two-Stages SPDS Configuration with an LVDC-link

Figure 2.7: SST Type-III: Two-Stages DPDS Configuration with an MVDC-link

Figure 2.8: SST Type-IV: Three-Stages DPDS with MVDC- and LVDC-Link

30

Table 2.2: Comparison of the SST Topological Configurations for EV Fast Charging [107]

Top

olo

gic

al

Con

figu

rati

on

DC-Link

Regulation

Ad

van

tages

Dis

ad

van

tages

Size Cost

MVDC

-Link LVDC-

Link

Ty

pe-

1

(Fig

ure

2.5

)

Ex

ample

s in

[13

4,

135

]

N/A N/A Simple control

and

simple

modularity

implementation

No PFC

and poor

compensati

on in

reactive

power

Small

because

of the

absence

of a DC-

link

Low as a

result of

the

reduced

size and

filter

Type-

1I

(Fig

ure

2.6

)

Exam

ple

s in

[137

–139

]

N/A Good PFC and

capability to

integrate RESs

and ESSs at the

LVDC-link

High

switching

losses

resulting in

lower

efficiency

Medium

because

of more

power

devices

and

LVDC-

link

required

Moderate

because

of more

power

devices

required

Type-

1II

(Fig

ure

2.7

)

Exam

ple

s in

[140

–142

]

Good N/A

PFC and low

THD

Integration

of RESs

and ESSs

cannot be

implemente

d because

there is no

LVDC-link

Medium

because

of more

power

devices

and

MVDC-

link

required

Medium

as a

result of

more

power

devices

required

Ty

pe-

1V

(Fig

ure

2.8

)

Ex

ample

s in

[14

4, 1

45

]

Very

good

Very

good

Reactive power

compensation,

harmonic

elimination,

and simple

modularity

implementation

Complex

control and

bulky

capacitors

Large

because

of

presence

of

MVDC-

and

LVDC-

links and

more

required

power

devices

High

because

of high

bulky

DC-links

required

with a

large

number

of power

devices

31

Most of the SST-based MVAC grid-connected DC fast chargers proposed in

publications are implemented as single-phase single-port power conversion units that

directly interface to EVs. Nevertheless, these converters can also serve as the central front-

end rectifiers in a DC-connected fast charging configuration with proper modifications.

Moreover, by connecting three identical single-phase power converters in delta or wye

form with a phase-shift of 120 degrees between each phase, three-phase implementations

can be realised. To interface to the MVAC grid directly, the SSTs normally consist of

identical modules as building blocks all linked in cascade at the input to increase the

capability of voltage blocking in order to reach the desired voltage and power levels. The

outputs of these modules are then connected in parallel to provide a large output current at

the desired LVDC suitable for EV charging. Electric Power Research Institute (EPRI) and

Virginia Tech [108, 109] developed an MV fast charger topology consisting of three

modules that are connected in series at the MVAC grid side (2.4 kV) and in parallel at the

EV battery side. Each module of the AC-DC conversion stage is realised by a unidirectional

NPC front-end rectifier with PFC. The internal DC-link of each module operates at 1250

V DC where either Si IGBTs or SiC MOSFETs be used off the shelf. Following the

unidirectional rectification stage, two ISOP PSFBs convert the internal DC-link voltage to

the desired LVDC at the output. Since this topology uses a large number of active

semiconductor switches, the drawbacks of this SST implementation include limited

achievable efficiency and compactness as well as an increase in the overall system cost.

Additionally, the output of the PSFB DC-DC converter is fixed at 450 V DC, therefore, a

subsequent DC-DC stage is necessary to be included to accommodate the EV battery

charging profile. To integrate the EV battery in the design, a six-phase IBC (from the

battery point of view) is implemented in the system, which has an overall efficiency of

almost 96% at 38 kW.

In [110], a multi-level converter is proposed for direct connection to the MVAC

grid based on a three-level NPC topology suitable for a direct connection to a 3.3 or 4.16

kV MVAC grid. This SST topology offers better performance and higher flexibility due to

the presence of a bipolar DC-bus [110]. On the contrary, this topology requires a DC-bus

voltage balancing control, which leads to higher complexity and additional circuitry.

32

Another modular SST topology proposed in [111] included ten modules connected

in series at the MVAC grid side to share an 8 kV MVAC voltage. The first stage of this

topology is a multi-module of front-end rectifiers, where each module has an uncontrolled

diode rectifier bridge accompanied by two unidirectional three-level boost converter phase

legs in parallel, to create an internal MVDC-link rated at 1.4 kV. A DSP controller is used

to regulate the rectifier for PFC with multiple control to ensure low THD and voltage

regulation. The second stage consists of two ISOP half-bridge LLC converters that enable

soft switching. The DC-bus voltage is regulated via a traditional PI controller. To achieve

high efficiency in this design, the control strategy should operate the LLC converters in an

open loop with a 100% duty cycle while the output voltage is regulated by the front-end

rectifier which adjusts the DC-link voltage. However, this controller leads to a narrow

output voltage range that may not be able to accommodate the required EV charging

profile. For this reason, an additional DC-DC converter is required to follow the EV battery

voltage. The system efficiency of this topology is close to 97.5% at a rated load of 25 kW.

A 50 kW MV fast-charging system is developed based on the topology proposed in

[112–115], where three modules are connected in series at the MVAC grid side to share a

2.4 kV voltage. Each module has a single diode bridge to rectify the MVAC input. This

approach improves the system efficiency because it reduces the forward voltage drop on

diodes. PFC is achieved via the three-level boost converter within each module. The

following conversion stage consists of a half-bridge NPC DC-DC converter, an HFT, and

a diode bridge rectifier. In this SST, the half-bridge NPC DC-DC converter further reduces

the size of the HFT. Three loops with PI controllers are the control configuration for this

topology. The main loop regulates the DC bus voltage whereas the voltage balancing loop

maintains the capacitor voltage. The NPC loop controls the LVDC output voltage. This

control technique aims at mitigating input current harmonics by limiting the current THD

below 2%. For this SST system, the efficiency can exceed 97.5% at 50 kW. A similar

modular SST configuration with a similar per phase control scheme of three loops proposed

in [155] was adopted to interface a 12.47 kV MVAC grid for an ultra-fast charging

application rated at 350 kW. This high-power density (1.6 kW/L) solution has a system

efficiency of just over 98%.

33

Another SST design for EV charging is proposed in [116], where a front-end full-

bridge rectifier and a DHB converter are used in the AC-DC and DC-DC conversion stages

respectively. Integrating ESSs into the charging station is realised by a non-isolated DC-

DC boost converter, which is added between the rectification end and the DC-DC

conversion stages. This converter is capable of bidirectional power flow; however, it

utilises more active switches, which yields in low efficiency and poor switch utilisation.

Moreover, compared to unidirectional converters, the control is more complex. This design

was validated with a 140 V AC input voltage using a down-scaled prototype. Another

single-phase IGBT-based SST implementation to interface a 2 kV utility grid using an AFE

full-bridge rectifier with unified voltage balance and an isolated DC-DC current-fed DAB

converter with decentralised control is proposed in [117]. However, the experiment of this

design was verified at a reduced LVAC input voltage rated at 440 V. A similar single-phase

SST design of three ISOP modules was proposed in [118] with an active front-end full-

bridge rectifier and an isolated DAB DC-DC converter in two conversion stages

respectively was constructed with Si IGBTs and validated by an experimental setup with a

3.6-kV input voltage. However, the system efficiency of this converter was reported to be

less than 92%.

Another three-phase SST-based ultra-fast charging system rated at 400 kW with the

interface to a 4.8 or 13.2 kV MVAC grid was implemented by Delta Electronics [119].

Each module of the proposed multi-level topology is rated at 15 kW with 1-kV AC input

voltage considering line-to-neutral voltage. This topology consists of three ISOP modules

for 4.8 kV and nine ISOP modules for a 13.2-kV grid connection. The two conversion

stages included a front-end full-bridge NPC converter and an isolated LLC DC-DC

converter respectively. To the HFT primary side of the LLC converter is a three-level

converter, in order to reduce the stress on the resonant components., whereas the secondary

side is an active full-bridge rectifier to operate in synchronism in order to reduce the losses.

Because of the limitation of the LLC converter to only produce a constant 1 kV DC, this

design requires a subsequent non-isolated DC-DC converter to be connected to the EV

battery. Although this SST utilises 15 kV SiC MOSFETs to increase the system efficiency,

this results in expensive design costs. Another drawback is the complexity in control

required to allow for bidirectional operation due to the limitation of the LLC converter.

34

Each module of this design has an efficiency of 97.3% measured at 15 kW and 1 kV AC

input.

Another modular multi-module SST configuration for EV ultra-fast charging

proposed in [154] utilises a front-end three-level boost (TLB) rectifier circuit digital control

system and a half-bridge LLC DC-DC converter with 1.2 kV SiC devices. The entire

structure of the control system consists of four parts that include a PLL, PWM generators,

feedback control, and an ideal feed-forward loop. The main function of the ideal duty-ratio

feed-forward loop is to improve the input current THD at the zero-crossing. At the 3.8 kV

MVAC side, four modules are serially connected. The LLC transformers are used to

achieve voltage balancing. At 16 kW, the system efficiency is just over 98%.

Another MVAC-connected three-phase SST architecture for an ultra-fast charging

station to simultaneously charge multiple EVs is proposed in [156]. This configuration

utilises a two-level VSC to regulate the MVDC cascaded with an MVDC-LVDC DAB that

regulates the LVDC-link voltage. Each DAB module employs an MFT. Unlike

conventional DC fast charging station structure based on full rated dedicated charging

converters, partial power processing is implemented for independent charging control over

each EV using partial power rated DC-DC converters for charging individual EVs. This

approach eliminates redundant power conversion while processing only a fraction of the

total EV battery charging power. Compared to other Si-based EV fast-charging solutions

reported in the literature, this method reduces the circuit complexity and simplifies the

control strategy. A downscaled laboratory testbed with two charging ports rated at 117 kW.

The maximum power assumed for the charging unit to simultaneously charge 6 EVs is

rated at 702 kW with an efficiency of 95 and energy loss of 2.62 kWh. The control system

implemented in this prototype is a traditional SRF-PLL for synchronization with the three-

phase grid. A rotating dq0 reference frame is used for the grid current control The VSC’s

dedicated controller is employed to exchange active or reactive power with the grid. A

phase-shift modulation scheme is used for the DAB in addition to a dead beat predictive

current control to minimize any transient DC currents in the HF AC-link. To inject a desired

current into the EV battery, a full bridge resonant boost converter is used as the partial

power charger with the input current of the partial rated series element is controlled. To

35

ensure the operation of ZCS of all the active switches, a variable frequency control must

be implemented.

Another three-phase ISOP modular and scalable power conversion configuration

rated at 1.1 MVA is proposed in [156] with 6 SPMs, each consisting of an NPC full-bridge

AFE stage and an isolated DC-DC DAB stage. A three-level NPC full-bridge and a full H-

bridge are used on the 2.15 kV MVDC and 750 V LVDC sides of the DAB converter,

respectively. Compared to other SST-based solutions where a centralised controller is used

to ensure module-level voltage and power balancing, a fully decentralised control is

implemented for the DC-DC stage as a DC transformer based on only local sensor feedback

and the AFE stages based on encoded gate pulses received via optical fibres are controlled

using feedback of only the LVDC output with no communication required with other

modules. Unlike other SSTs where large capacitors are used to suppress double-line

frequency voltage variations on the MVDC-link originating from AC power pulsations

through the SPMs, this configuration requires reduced capacitance size on the MVDC-link.

A grid-side breaker and a pre-charge circuit is used for soft start-up of the system, which

also has a central controller responsible for regulating the LVDC output by dynamically

controlling the grid current. The inherent voltage and power balancing capability is

demonstrated through detailed switching model simulation on PLECS. The efficiency of

the DAB stage is reported to be > 99%.

Another three-phase ISOP SST-based power electronic architecture for ultra-fast

charging three types of EVs with batteries of vastly different voltage and power ratings is

proposed in [157]. This structure comprises of MV delta-connected CHBs as an active

front-end rectifier and QABs utilised an isolated DC-DC conversion stage due to its low

cost and high efficiency. The QAB has four FBs interlinked through the windings of MFTs.

Three sub-modules of the CHB and one QAB form a cell in each phase, where three cells

form a cluster. Three charging ports are derived from the cells of three phases where the

output of the QABs of the cells in each phase are paralleled to form one charging port. The

three-phase QABs’ output voltages are controlled according to the specified EV battery

voltage and the EV model type. Devices for the CHB with a lesser current rating can be

utilised since the total current decreases as a result of the magnitude of zero sequence

36

current. To reduce the reactive current in the MFTs, the turns ratio of the MFTs in the three-

phase clusters are adjusted to match the output voltage of the QAB where all sub-modules’

capacitor voltages of the three phases are equal. The charging power drawn from each port

depends on the number of EVs being charged; thus, the power ratings of the three charging

ports can also be different. This creates an imbalance in the system where cluster power

causes the sub-module DC-link capacitor voltages to deviate from their desired value. This

also leads to drawing unbalanced currents from the grid. In this case, the power needs to

be circulated among the SST clusters by utilising zero sequence current in order to balance

the power among the clusters. A balancing winding is added to each of the MFTs of the

QAB this architecture and is utilised to reduce the unbalance in the delta-connected clusters

by a parallel connection such that a circulating current flows among the transformers of the

three phases. This also reduces the magnitude of the zero-sequence current required to

balance the cluster powers. A 4 kVA scaled-down prototype is presented to verify the

effectiveness of this SST system by interfacing it to 220 V. The simulation model presented

includes a 3.3 kV grid, three sub-modules in each cluster, and three charging ports rated at

500 kW, 300 kW, and 200 kW for Port-1, Port-2, and Port-3 respectively.

A variety of multi-level AC-DC converter topologies, such as the MMC, are

suitable for very high powers (several MWs) and are therefore only applicable to EV ultra-

fast high-power charging stations with multiple charging spots. For conventional LFT-

based charging stations, modularity is not possible as an extension of voltage and power

capabilities requires the replacement of the LFT. The modular design with ISOP

configuration is preferable as it can achieve a better inherent redundancy by adding

additional modules even with using Si LV MOSFETs or IGBTs. With V2G capability, a

bidirectional power flow can also allow the integration of RESs and ESSs to the grid.

Moreover, the size of the passive filters at the MVAC grid side can be reduced by the multi-

level waveform generated by the modular front-end rectifiers. Nevertheless, a large number

of components of switches and associated gate drivers in this modular design can increase

the system size and cost, offsetting the feature brought by smaller passive filters. The

control complexity increases in order to maintain a balanced voltage sharing between the

modules with the input series connection to the MVAC grid. System reliability may get

reduced as a result of the large number of components required [93].

37

With the recent development of SiC MOSFETs with blocking medium voltages of

10–15 kV, a single-module SST converter can now be realised to be directly interfacing

MVAC grid. The most significant advantages of this system implementation are reduced

control complexity and the potential of achieving higher reliability and efficiency of the

system. A 10-kW single-module SST proposed in [120] was designed to interface a 3.6 kV

MVAC input using 13 kV SiC MOSFETs and JBS diodes with an internal MVDC-link

voltage of 6 kV. A similar design with an LCL filter is depicted in [153]. A unipolar

modulation with one leg operating as an unfolding bridge with LF is implemented to reduce

the switching losses of the front-end rectification stage. To further reduce the losses, the

switching frequency of the PWM leg of the H-bridge rectifier is limited to 6 kHz only. A

DHB converter with 13 kV SiC MOSFETs is chosen in this design as the isolated DC-DC

conversion stage with a phase-shift closed-loop control of the DHB involving two control

loops, an inner current loop, and an outer voltage control loop to regulate the output voltage

of 400 VDC. To mitigate the steady-state offsets, the PI controller is used for voltage

harmonics compensation. However, higher-order current harmonics are not included in this

control strategy as they lay beyond the cut-off frequency of the LC filter. The conversion

of sensor output into pulses functions as the main protection system against disturbances

[144]. Soft switching is also realised by turn-on ZVS achieved for all the MOSFETs. The

HFT turns ratio of N = 15 was implemented to convert the MVAC on the primary side into

LVAC at the secondary side. The overall system efficiency measured at 10 kW was 94%.

Another single-module SST with a larger power rating proposed in [121, 122] is

designed to interface a 3.8-kV MVAC input based on 10 kV SiC MOSFETs. A full-bridge

rectifier with a 7 kV internal MVDC-link is used for the front-end conversion stage. Similar

to [120], a unipolar modulation with the triangular current mode is adopted for the rectifier

to reduce the switching losses. However, the switching frequency can be varied from 35 to

75 kHz for the PWM leg. Unlike the limitation of [120], an LC-branch between the

terminals of the two-phase legs is inserted, to achieve a high switching frequency at MV

with soft-switching over the whole line period while also limiting the current harmonics.

The isolated DC-DC conversion stage is implemented using an LLC series resonant

converter with 10 kV SiC MOSFETs half-bridge on the primary side of the HFT. ZVS is

achieved for all MOSFETs of the LLC converter which operates at a fixed frequency to

38

output a regulated voltage of 400 VDC by adjusting the internal DC-link voltage of 7 kV

DC through the rectifier. The system efficiency measured at 25 kW is 99.1%.

Tables 2.3 and 2.4 summarise a comparison of a number of SST-based topologies

and their control techniques discussed in this section for EV ultra-fast charging systems.

Different parameters that are considered in this table include voltage and current

harmonics, overloads, voltage drop under varying loading conditions, DC offset load

unbalances, and protection against disturbances. It can be concluded that most of the

research in the literature focuses primarily on the THD mitigation of input current in order

to meet the IEEE power quality standards, whereas other parameters such as voltage drops

under varying loading conditions are not thoroughly investigated.

39

Table 2.3: Comparison of State-of-the-Art SSTs for EV Ultra-Fast Charging – Part (a)

SS

T T

op

olo

gy

Nu

mb

er o

f P

ha

ses

MVAC

Voltage (L-L

RMS), SST

Rated

Power,

Number of

Cells per

Phase

Converter

Topologies Number of

Components per

Module

Control Strategy

Sim

ula

tio

n

Mo

del

Ex

perim

en

tal

Pro

toty

pe AC-DC

Stage

DC-DC

Stage

Sw

itch

es

Dio

des

Tra

nsf

orm

ers

[11

2] 1 2.4 kV, 50

kW, 3

TLB NPC 12 16 2 Three loops PI

Controller

[15

8]

3

3.3

kV

, 1

MW

, 3

22

0 V

, 4

kV

A, 1

Delta-

connected

CHB

QAB 28 28 3 PLL, PR and PI

Controllers

[1

44]

1 3.6 kV, 10

kW, 1

CHB DHB 8 8 1 PWM

[15

4] 1 3.8 kV, 16

kW, 4

TLB Half-Bridge

LLC Converter

6 16 2 PLL

[12

1, 1

22

] 1 3.8 kV, 25

kW, 1

ITCM LLC Series

Resonant

Converter

10 0 1 Phase Shift

Modulation

[15

6]

3 4.16 kV, 2.1

MW, 6

charging

ports

VSC DAB and a

Current-fed

Resonant Full-

Bridge Boost

Converter

22 8 1 SRF-PLL

[11

1] 1 8 kV, 25 kW 3-level

AFE

LLC

Converter

8 12 2 DSP Controller

[15

5] 3 12.47 kV,

350 kW

3-Level

Boost

Converter

DAB 12 14 1 TPS Controller

[15

7]

3 13.2 kV, 1

MW, 6

NPC DAB 16 4 1 Decentralised for

DAB with BPSM

[11

9]

3

4.8 kV or 13.2

kV, 400 kW

3-level

Dual

NPC

LCL

Resonant

Converter

16 4 1 Complex Control

for LLC Converter

40

Table 2.4: Comparison of State-of-the-Art SSTs for EV Ultra-Fast Charging– Part (b)

SS

T T

op

olo

gy Capabilities and Advantages Limitations and

Disadvantages

Pro

toty

pe

Sy

stem

Eff

icie

ncy

[11

2]

Unidirectional power flow, low current THD

below 2%, PFC, high power quality, and

high efficiency with double pulse test

No protection against s overloads

or disturbances in system

96.6%

[15

8]

PFC and Power balancing using zero

sequence current and balancing winding

Requires increasing the window to

accommodate the additional

winding

97.7%

[1

44]

Bidirectional power flow, low voltage THD

~ 3%, AC systems decoupling, steady state

and voltage drop analysis and has protection

via conversion of sensor output into pulses

No control for steady state DC off-

set load unbalances 95.2%

[15

4]

PFC, low THD at zero current crossing, and

Voltage regulation, input current regulation,

voltage balancing

Not reported 98.4%

[12

1, 1

22

]

Bidirectional power flow, PFC, and current

THD according to the IEEE 519 Standard,

Calorimeter loss distribution and efficiency

measurement

No protection against system

disruptions and overloads, and no

control for DC off-set load

unbalances

99.1%

[15

6]

Low losses, ZVS or ZCS operation Mo modularity. suited only for

applications with a low input

voltage and high output voltage

95 %

[11

1]

PFC, low THD for both current and voltage,

and voltage regulation against both load and

source

No control for DC off-set load

unbalances due to mismatching of

LLC transformers

97.5%

[15

5]

High efficiency, PFC, low current THD,

modular design, voltage regulation, and

double pulse test

High cost due to many expensive

SiC MOSFETs required

98.1%

[15

7]

Balancing of module level voltage and

power flow utilizing complete decentralized

control, has protection using a grid-side

breaker and a pre-charge circuit soft start-up

No analysis available for THD,

PFC and ZCS/ZVC

Not

reported

[11

9]

Modular design with bidirectional power

flow, low THD and PFC.

Fixed output voltage and power,

high cost, complex control, poor

switch utilisation

96.5%

41

2.4 Viable Multi-level Converters for the MV ISOP DPSS SST

High-power electronic converters can operate at various voltage levels; HV, MV,

and LV. The classic IGBT-based 2-level converter configuration can be used for LV

applications. For MV and HV applications, there are two possible options, either using:

• 2-level converters or few cells using MV Si semiconductor switches, or WBG

(GaN or SiC) devices with high blocking voltage capability, connected in series.

• Multi-level converters or a large number of cells with LV SiC or Si devices.

Each multi-level converter consists of multiple power semiconductor switching

devices and capacitive voltage sources, which are utilised to generate a voltage waveform

of multi-steps. This stepped voltage waveform is produced by switching the power

semiconductor devices in such a way that the capacitive voltage sources are added to the

desired voltage. A multi-level converter has a defined number of levels which is equal to

the number of constant voltage values that can be produced between the output terminal

and the neutral. With at least three different voltage levels, the converter can be classified

as multi-level. For instance, if each phase of the converter generates three different voltage

levels, then it is called a three-level converter. With the current advancement of MV SiC

devices which many types already exist in the market, multi-level converters represent an

attractive solution for high-power applications including ultra-fast charging for EVs due to

their advantages in terms of output power quality and filtering requirements. In addition to

their high-power ratings and increased efficiency, they have reduced harmonic content,

lower common-mode voltages, and possible fault-tolerant operation. A number of

topologies for multilevel converters have been mentioned in publications, with some

configurations boasting bidirectional power flow operation. Four main modular multi-level

topologies of the most widely MV grid-tied converters used in industry, considered for

each conversion stage of the DPSS SST system proposed in this thesis, are introduced, and

categorised as follows:

42

2.4.1 Multi-level Converters for the AC-DC Conversion Stage:

1) Flying Capacitor Converter

The FC converter consists of several conventional two-level VSCs, but with some

modifications, where each level is connected one over the other with flying capacitors

that are utilised to clamp the voltage across the devices to a fraction of the total DC

voltage, but where the load cannot be directly connected to the neutral. In order to obtain

zero voltage level in this topology, the load is connected to the positive or negative bar,

through the flying capacitor with opposite polarity with respect to the DC-link. Besides

its modular structure which can easily be extended to achieve higher voltage levels and

power rates, the FC has other advantages and disadvantages as summarised in Table 2.5.

2) Transistor-Clamped Converter

The TCC, also known as the NPP has the same structure as the FC, but bidirectional

switches are utilised instead of the flying capacitors. This topology allows for a

controllable path for the currents and better control of the power loss distribution [159].

3) Modular Multi-level Converter

The MMC, also known as M2C, was introduced in the early 2000s and has been

implemented in several industrial applications. Formed by connecting several identical

modules, the MMC topology consisting of an AC/DC converter and a floating capacitor,

in series to obtain a single or three-phase output voltage [159]. The module switches are

utilised to connect or bypass their respective capacitor to the total array of capacitors in

the converter leg in order to produce the multilevel waveform.

4) Cascaded H-Bridge Converter

The CHB rectifier consists of a series connection of several single-phase full-bridge

(HB) converters. Each HB cell consists of four switches to enable independent DC

voltage at the load and represents two voltage source phase legs; whose line-to-line

voltage equals that HB’s output. A single HB cell can generate three different output

voltages as a result. The output voltages of the individual HB cells can be combined to

43

form different output voltage levels, this increases the total converter output voltage and

power rating.

As the emphasis has been placed on the modularity of these converter topologies,

a modular system is a system comprising of identical building blocks of similar sub-

systems for the aim to the scalability of service and effectively reduce manufacturing

costs while also providing optional degrees of redundancy, by implementing a control

that can bypass defective modules [168].

2.4.2 Isolated Bidirectional Converters for the DC-DC Conversion Stage:

With the wide range of available isolated topologies such as the flyback, Cúk and

forward converters that feature simple circuit design and a low number of switches, these

classic converters suffer from the poor transformer and switch utilisation. In particular, the

Cúk converter has drawbacks such as suffering from hard switching and requiring two

inductors and two blocking capacitors with large current handling capacity. It also has

unevenly distributed switch stresses. These limitations make the isolated flyback, forward

and Cúk topologies not suitable for the isolated DC-DC conversion stage of the MV DPSS

SST. Four possible topology candidates for the bidirectional DC-DC converter are:

1) Single-Phase Dual Active Bridge

This DAB consists of two full bridges; one on the primary side and another one on

the secondary side, with an HFT in between. Leakage inductance is added to the HFT

primary side as energy storage and to adjust the shape of the flowing current waveform.

2) Three-Phase Dual Active Bridge

The three-phase DAB has three half-bridges on both the primary and secondary

sides of the HFT. Three inductors are added to the primary side of the HFT to be used for

energy storage. Either three single-phase HFTs or one three-phase HFT can be used in the

circuit.

44

3) Bidirectional Isolated Push-Pull Converter

The Bidirectional Isolated Push-Pull has a centre-tapped transformer with two

windings on the secondary side and one output inductor. The output inductor operates at

double the switching frequency of the semiconductor switching devices. The transformer

is poorly utilised and requires a higher power rating because each winding conducts only

during half of the switching period.

4) LLC Resonant Converter

This resonant converter generates nearly sinusoidal transformer currents resulting

in low switching losses. This allows for operating at higher switching frequencies and

higher power densities. This converter topology has a capacitor in series with the

transformer leakage inductance. This capacitor blocks the DC current and prevents

saturation of the HFT, whose primary and secondary sides are both connected to a full-

bridge circuit.

Table 2.6 compares these four topologies and describes their key features and major

drawbacks.

45

Table 2.5: Comparison of Modular Multi-level AC-DC Converter Topologies [159–167]

To

po

log

y

Nu

mb

er o

f S

wit

ch

es

per

Mo

du

le

Vo

lta

ge

Ba

lan

ce

Co

ntr

ol

Major Advantages Major Disadvantages

FC

8

Com

ple

x

• The several capacitors allow the

converter to ride through deep voltage

sags and short power outages.

• Can control both the real and reactive

power.

• Provides switch combination

redundancy for balancing different

voltage levels.

• Higher output levels require a large

number of capacitors making the

converter more bulky, expensive, and

difficult to package.

• Requires high switching frequencies to

keep the capacitors balanced.

• Requires a complex start-up control

for pre-charging the capacitors to the

same voltage level.

• Poor switch utilisation and efficiency.

TC

C

12

Com

ple

x

• Requires only half the number of

switches to handle half the voltage

compared to the FC allowing double the

switching frequency and a better output

waveform for the same current.

• Simple control of the power switches’

gates since only one transistor is

switched at once: proportional relation

between the transistor turn-on state and

the output voltage.

• Requires a voltage balancing strategy.

• Requires a large number of transistors.

46

MM

C

8

Co

mp

lex

• Highly scalable for MV and HV

levels.

• Low harmonic content.

• Low filter requirements.

• Does not require additional capacitors

for the HVDC-link as each module has

its own capacitor.

• Increasing the converter levels yields

in a decrease in the module switching

frequency without compromising the

power quality.

• Requires a complex control to pre-

charge the capacitors and balance the

average value of the voltage across each

sub-module capacitor. C

HB

4

Sim

ple

• Can generate more output voltage

levels than the FC. This allows the

CHB to have lower switching

frequencies for the same output voltage

waveform.

• Can operate at lower switching

frequencies allowing for air cooling and

higher fundamental output frequency

without derating and without the use of

an output filter.

• Allows for fully modularised layout

to easily reach MV by adding more

cells to each phase.

• Easy packaging as each level of the

converter has the same structure.

• Does not require additional clamping

diodes or voltage balancing capacitors.

This results in smaller size and lower

cost.

• Allows for soft switching, thus, does

not require bulky and lossy snubber

circuits.

• Simple balance control of the DC

capacitor voltages since the average

charge of each capacitor over one line

cycle equals zero.

• The maximum voltage of each H-

bridge DC-link is limited by the voltage

rating of its power switching devices.

This limits the CHB from generating a

higher voltage at the DC-link.

47

Table 2.6: Comparison of Isolated Bidirectional DC-DC Converter Topologies [169]

To

po

log

y

Nu

mb

er o

f

Sw

itch

es p

er

Mo

du

le

Major Advantages Major Disadvantages

Sin

gle

-Ph

ase

DA

B

8 • Has the fewest passive components.

• Comparatively very good

efficiency.

• Operates with evenly shared

currents in the power switches.

• Has soft switching properties.

• Possibility for large RMS DC

capacitor currents to occur

especially on the secondary side of

the HFT.

Th

ree-P

ha

se D

AB

12 • Smaller RMS DC current compared

to the single-phase DAB.

• Can employ components (switches,

inductors, and HFT) with lower

ratings compared to the single-phase

DAB.

• Does not require extra inductors.

• Achieves good overall efficiency.

• Requires a large number of

switches and inductors which leads

to higher losses.

• Operating within wide power and

voltage ranges leads to high

conduction and switching losses,

and thus low efficiency.

Bid

irect

ion

al

Pu

sh-P

ull

Co

nv

erte

r

6 • Can handle high current with

reduced inductor requirements.

• Fewer switches required.

• Requires a complex HFT design

but with ineffective utilisation.

LL

C R

eso

na

nt

Co

nv

erte

r

8 • Can operate at higher switching

frequencies and higher power

densities.

• Has good efficiency.

• Requires large sizes of inductor

and capacitor.

• As the actual switching frequency

varies significantly with the

supplied voltage and the load, in the

case of no load, it is impossible to

control this converter since this

situation requires infinite switching.

48

2.5 Control Strategies and Modulation Techniques for Multi-level Converters

2.5.1 Control Strategies for Multi-level Converters

There are different novel control strategies and techniques which have been applied

to various power electronic converter topologies, with the aim to improve the power

converter steady-state and transient performances, fault ride-through capabilities,

reliability, and efficiency. With the advancements of DSP and microcontroller

technologies, more sophisticated control techniques in comparison with the classical linear

control methods have been implemented [170, 171]. Figure 2.9 provides an overview of

the control classifications and methods applicable to multi-level converters.

Linear control is the most popular control technique for multi-level converters

because it is well established in the literature. It can be implemented in natural, stationary,

or synchronous reference frames [171]. In the natural reference frame, three PI error

compensators can be utilised in the linear control to derive the required voltage which the

power converter aims to generate in order to obtain the desired output current. Additional

feed-forward corrections or PLL algorithms can be utilised to compensate for the current

amplitude and phase errors, especially for cases with utility voltage disturbances [171].

Alternative linear control options can be used to convert the phase currents into a rotating

synchronous reference frame (direct and quadrature components (d-q) to obtain two DC

equivalent currents which allow currents to be controlled using two PI compensators to

ultimately reduce the error on the fundamental components to zero. In a stationary

reference frame (α-β), the implementation of linear control is possible using variable-

frequency generators to produce the reference voltages. The key advantage that linear

controllers based on PI compensators offer is that they can produce good reference tracking

performances. However, they may have a limitation in their dynamic response, especially

when compared with more sophisticated control methods, which can provide faster

transient response [171–173]. To overcome the limitation of PI controllers in terms of

reference tracking error and harmonic rejection, linear control with PR compensators has

also been implemented for multi-level converters in natural [174] and stationary [175]

reference frames without using feed-forward compensations [176].

49

To control the phase currents to the desired references, a feedback control loop as

a hysteresis control is typically utilised with 2-level hysteresis comparators [171]. In

addition to its good dynamic performance, hysteresis control has been successfully applied

to multi-level converters [177–181] due to its simplicity and robustness to maintain the

switching frequency constant by varying the tolerance band of the hysteresis control

comparator although the switching frequency relies primarily on the AC voltage and the

load parameters [171].

More advanced control approaches have also been proposed in publications as

potential methods to overcome the limitations of traditional control techniques. For

instance, neural network [182], Fuzzy logic [183, 184], sliding mode [185] and MPC and

DBC predictive control techniques [186–190] have attracted significant research interest

for power converter applications. DBC has been applied to current control in rectifiers

[191] and DC-DC converters [192]. DBC control provides a faster dynamic than is possible

using a discrete-time control as it employs the discretised system model to calculate the

optimal voltage reference value that the converter must apply to track the desired current

reference with zero error at the next sampling instant. However, DBC is very sensitive to

model parameter errors and delays in the measured variables, and it is also difficult to

include non-linearity and other constraints. Similarly, MPC uses a discretised system

model to predict the system behaviour for every possible converter state. MPC requires a

suitable modulation technique may if considering a continuous control set [170].

Nevertheless, considering the finite number of output states of the power converter, FCS-

MPC [193–195] is usually considered because of its robustness and simple implementation

due to the absence of a modulator. A different approach has been applied for the output

current control in power control in active front-end rectifiers [196, 197]. However, the lack

of a modulator is the main drawback of FCS-MPC since the controller can select only from

a limited number of output voltages vectors of the converter. Besides, the cost function

minimisation algorithm requires high computational effort [170, 186, 187]. FCS-MPC has

been applied to several converter topologies and applications [188, 196, 198, 199] and more

advanced schemes which include modulation techniques inside the FCS-MPC algorithm

have been proposed [200–202]. In all these publications, the duty cycles are calculated by

solving an optimisation problem to determines the optimal control action in order to track

50

the desired reference with minimal error. For multidimensional optimisation problems,

multi-objective control can become rather complex since a solution to a must be

determined.

2.5.2 Modulation Techniques for Multi-level Converters

Several modulation strategies and techniques have been developed for multi-level

converter topologies, which can be classified depending on the switching frequency they

produce for operating the semiconductor switching devices as can be seen from Figure-

2.10 below [203]. With the aim to improve the converter modularity, reliability, efficiency,

and waveforms quality, implementing such modulation techniques take advantage of the

increased degrees of freedom provided by the higher number of possible switching states

provided by the multi-level converter topologies [204].

Multilevel modulation methods are required because of the inherent complexities of

multi-level converters due to a large number of power semiconductor switching devices.

Modulation techniques can be categorised based on the domain in which they operate into

two types: voltage level-based algorithms and space vector-based algorithms.

Of the most highly adopted voltage level-based algorithms are the PWM modulation

techniques, which operate in the time domain, due to their simplicity, high performance,

fixed switching frequency, and easy implementation in both digital and analogue hardware

[205]. Carrier phase-shifted PWM (CPS-PWM) is a multi-carrier-based sinusoidal PWM

that can be implemented for multi-level converters such as the CHB, where each CHB cell

is assigned with two carrier signals which are modulated independently using the same

reference signal. In order to generate the stepped multi-level waveform, a phase shift across

all the carriers is introduced [206]. The switching frequency of each cell in an n-level

converter is n times lower than the converter output frequency.

Level-shifted PWM (LS-PWM) is another multicarrier-based sinusoidal PWM that can

be obtained by arranging the carriers in shifts. In this modulation technique, each carrier

represents a possible output voltage level of the converter [159].

51

Figure 2.9: Control Strategies for Multi-level Converters

Figure 2.10: Classification of Multi-level Modulation Techniques for Multi-level Converter

52

The LS-PWM can be classified depending on the consecutive arrangement of

carrier signals as follows [49]:

• Phase Disposition PWM (PD-PWM), where all carrier signals are arranged

in vertical shifts with respect to each other.

• Phase Opposition Disposition PWM (POD-PWM), where the positive

carrier signals are arranged in phase with each other, but in opposite phase

with the negative carrier signals.

• Alternate Phase Opposition Disposition PWM (APOD-PWM), where each

consecutive carrier signal is in the opposite phase with its predecessor.

On the other hand, space vector-based algorithms are modulation techniques where

the reference voltage is represented by a reference vector to compute the switching

times and states instead of using a phase reference in the time domain. Since they have

redundant vectors, space vector algorithms can generate the same phase-to-neutral

voltage, which can be utilised to enhance the multi-level converter properties. Such

properties include minimizing the switching frequency, controlling the DC-link voltage

when floating cells are in use, enhancing the voltage spectrum, and reducing the

common-mode DC output voltage and the effect of over-modulation of output currents.

Space vector modulation techniques are not widely used in the industry because they

require more hardware than PWM carrier-based techniques. Space vector modulation

requires at least three stages: a stage to select the vectors for modulation, a stage to

compute the duty cycle, and a stage where the sequence for the vectors is produced

[206]. SVM can be classified into two categories: 2D and 3D.

The 2D-SVM works by transferring the three-phase voltages of the multi-level

converter to the α-β plane while determining the nearest vector to the reference vector

to produce the switching sequence and their duty cycles. On the other hand, the 3D-

SVM is used for unbalanced systems or if a zero sequence or triple harmonics are

present in the system. In this case, the state vectors are no longer located in the α-β

plane; however, the α-β plane is extended into the third dimension with a γ axis in order

to calculate the state vectors under these conditions, The 3D-SVM modulation

technique is applicable for all applications that provide a 3D vector control.

53

The single-phase modulation (1DM) is another SVM that utilises a simple

algorithm to determine the switching sequence and corresponding times by generating

the reference phase voltage as an average of the nearest phase-voltage levels. The 1DM

requires post-processing to select one stage between the possible redundant states,

therefore, this technique is independent of the chosen topology [206].

Table 2.7 summarises the high switching frequency modulation techniques which

can be used to select the most suitable technique for the AC-DC conversion stage of

the DPSS SST system.

Table 2.7: Comparison of High-Frequency Modulation Techniques for Multi-level Converters

Mo

du

lati

on

Tec

hn

iqu

e

Alg

ori

thm

Ha

rdw

are

Req

uir

emen

ts Remarks

PS

-PW

M

Sim

ple

Minimal • Each converter cell is assigned with a pair of carrier signals for easy

control to distribute the power evenly among the cells across the

entire modulation index. • The devices can operate at a lower

switching frequency resulting in lower losses.

• This technique allows a reduction in the input current THD.

LS

-PW

M

Sim

ple

Minimal • Better than the PS-PWM in terms of harmonic cancellation

properties.

• Suffers from uneven power distribution among the cells resulting

in distortion in the input current of the multi-level converter circuits.

2D

-SV

M

Co

mp

lex

Extensive • Uses simple calculations.

• Only applicable for balanced three-phase balanced systems.

3D

-SV

M

Co

mp

lex

Extensive • Can be used for balanced and unbalanced three-phase systems

with or without neutral or triple harmonics and for balancing DC-

link capacitor voltages.

• Useful for compensating the zero sequence in active power filters.

1D

M

Sim

ple

Extensive • Its computational costs are low.

• Independent of topology and the number of phases and levels.

• Equivalent performance to that of the 2D-SVM and 3D-SVM.

54

2.6 Modelling Approaches and Simulation Software Tools for SSTs

Besides the complexity of the actual designs of the SST, analysing its performance as

a component of an actual power system raise huge difficulties. That is why computer-based

simulation is considered a reasonable alternative. Several types of SST have been

modelled, simulated, and tested to be analysed. There are basically three main model types:

detailed switching models, average models, and steady-state models. Table 2.8 reviews a

selection of two-stage SST models demonstrated in publications.

Table 2.8: Review of Simulation Models for Two-Stage SSTs

SST Configuration Modelling

Approach

Simulation Software

Platform/Tool

References

Three-phase, two-stage, multilevel, bidirectional

Single-phase, two-stage, two-level, bidirectional

Single-phase, two-stage, multilevel, bidirectional

Single-phase, two-stage, two-level, bidirectional

Single-phase, two-stage, multilevel, bidirectional

Single-phase, two-stage, two-level, bidirectional

Single-phase, two-stage, two-level

Single-phase, two-stage, multilevel, bidirectional

Single-phase, two-stage, multilevel, bidirectional

Average model

Switching model

Switching model

Average model

Average model

Switching model

Switching model

Switching model

Switching model

MATLAB/Simulink

MATLAB/Simulink

MATLAB/Simulink

MATLAB/Simulink

MATLAB/PLECS

MATLAB/PLECS

SPICE

PSIM

PSIM

[207]

[208]

[209]

[210]

[211]

[212]

[213, 214]

[215]

[216]

There are currently very few steady-state models for power flow calculations of

SSTs. OpenDSS has been implemented for SST modelling in [217]. This simulation model

can be used to analyse the impact of the SST on distribution system performance. However,

DSMs are widely available because they generally require using very small time-step sizes

(< 1 μs). This implies that longer simulation times limit the size of the system model to be

practically analysed. MATLAB/Simulink is the most popular simulation tool for this type

of model due to its powerful EMT solvers. DAM can be used as an alternative to mitigate

the small time-step limitation of the DSM. DAM approximates the behaviour of the power

converter by applying the moving average operator at the switching frequency to the DSM

where the switching effects are eliminated from the model, but the dynamic performance

55

is preserved for simulation. DAMs can reproduce the transient behaviour of the DSM with

high accuracy but using a larger time step size. This enables the implementation of transient

models in real-time simulation platforms like OPAL-RT-LAB.

An average model of the SST presented in [218] was validated by comparing results

from those with the detailed switching model [219, 220]. PSCAD/EMTDC has been

utilised in [221] to simulate a three-phase SST system model including substation and

loads. Stability analysis of a modular SST has been modelled using dynamic phasor as

presented in [222]. The phasor modelling technique significantly reduces the simulation

time compared to EMT and DAM modelling. A detailed implementation of a three-phase

SST model using DigSilent Power Factory, based on the DAM technique is demonstrated

in [223]. Several case studies under different operating conditions of a bidirectional

MV/LV SST are presented in [224] where the model was developed using

MATLAB/Simulink. Real-time simulation of SST models using RTDS is proposed in

[225]. This DAM was tested and validated by comparing its performance to that of DSM

and a cycle-by-cycle average model built-in MATLAB and PLECS [226]. An intelligent

control platform for real-time simulation of the multi-level converter with energy

management schemes has been demonstrated with both hardware design and software

structure at FREEDM [227]. A new protection technique for SST has been verified by HIL

testing in [228]. Another performance testing for SST based on the Xilinx Zynq-7000 with

FPGA technology is proposed in [229]. There are also other simulation implementations

of the SST, in Simplorer, Multisim/Labview, EMTP/ATP SPICE and SABER software

platforms for applications other than fast charging for EVs.

2.7 Summary

This chapter introduced the classifications of charging mechanisms and industry

standards and provided a comprehensive review of the SST configurations and topologies

for ultra-fast charging applications with state-of-the-art technologies. For the chosen two-

stage DPSS SST structure, this chapter compared possible multi-level rectifiers and DC-

DC converters with advantages and drawbacks. Several control strategies and modulation

techniques applicable for multi-level power converters were investigated. Different

modelling approaches with several examples applied for SSTs were also briefly reviewed.

56

Chapter 3. Power Circuit Design

This chapter presents the proposed UFCSEV architecture and the associated MVAC

host system. The selection of the modular multi-level SST converter topologies and the

design of the circuit parameters are also described in detail.

To examine how the SST-based high-power conversion system behaves under certain

conditions for the UFCSEV application specified, a realistic system-level simulation model

needs to be derived first. Constructing the system model requires determining specific

values of several parameters, such as the MVAC line voltage, the switching frequencies,

and the ratings of passive components of the converters in both conversion stages. This

objective is typically accomplished through a detailed step-by-step design process. Because

this research study is focused on the dynamic performance of the SST-based conversion

system, a first-order design that offers an approximate estimation of the parameters’ values

is presented in this chapter. Other factors such as losses and design optimisation methods

are also considered. This chapter aims to present how the essential parameter values

required for the design of the SST-based conversion system are determined.

The first section of this chapter provides an overview of the requirements,

specifications, and assumptions made for the first-order design. The second section gives

a brief description of MVAC grid selection, and the filters required to minimise waveform

distortions. The third and fourth sections describe the analysis for the parameter selection

of the CHB and the DAB converter topologies selected. The design process, the equations

and optimisation of parameters’ selection of the converters are also delineated. The last

section presents the overall power circuit of the SST-based high power conversion system

with further discussions on its modularity.

3.1 System Requirements, Specifications and Assumptions

The calculations for the preliminary design of the SST-based high power

conversion system are based on the requirements and specifications set initially for this

thesis in accordance with the nominal and standard values. Other system parameters that

57

are not specified or cannot be computed directly, from stipulated values of the first-order

design, will be selected based on the requirements and assumptions outlined below.

3.1.1 Requirements

The fundamental requirement is that the SST-based high power conversion system

should operate at an MVAC level on the input side and at an LVDC level on the output

side. Moreover, the SST-based high power conversion system should be capable of

supplying an output active power of 1.5 MW for the UFCSEV. This research study also

attempts to address other requirements including the followings:

1) Fast response of the transient and dynamic effects for analysis based on

Electromagnetic Transient (EMT) simulation.

2) Four-quadrants power transfer operation modes to manage the output voltage

and current in all of the four-quadrant areas.

3) Total harmonic distortion content is compliant with IEEE standards.

3) The calculated parameters should allow for practical implementation of the SST-

based high power conversion system for future system scalability and

customisation.

3.1.2 Specifications

The essential parameters that need to be initially specified for the SST-based high

power conversion system developed in this thesis are as follows:

• MVAC Grid Voltage Level (Line-to-Line, RMS), VMVAC (LL) = 27.6 kV

• Nominal Grid Frequency, fg = 60 Hz

• Rated Output Active Power, Pcharging-rated = 1.5 MW

• Maximum LVDC Output Voltage Level, VDC_charging-max = 1000 VDC

58

While a higher power rating is better to achieve much faster charging, the selection

of 1.5 MW as the rating of the charging power in this SST design is based on the highest

power rating available in commercially available chargers to illustrate the model with a

realistic MW range. As of today, Proterra’s EB charger rated at 1.5 MW is the highest

power rating available in the market [89]. A higher charging voltage will minimise the

charging cable size to carry heavy currents for this 1.5 MW charging, the DC voltage

charging which is the rated output voltage of the proposed SST is selected in compliance

with the highest voltage rating of both IEC 61851 and SAE J1772 standards in accordance

with Mode-4 and Level-3 charging voltage, respectively. To reduce the cable size and

cooling requirements as well as the power losses over the conductor, I2R, a low current

rating is usually desired in the design which also requires increasing the charging voltage

to reach the rated power.

It is also of high importance to determine the voltage rating of the high-power

electronic semiconductor switches available for the selected converter topologies. This will

allow for specifying the restrictions for voltage levels and will also aid in specifying the

required number of H-Bridges in the CHB AC-DC rectifier as well as the number of

modules of the DAB conversion stage.

3.1.3 Assumptions

Due to the limitation of available equations in the literature to easily obtain certain

design parameters, assumptions will allow for simple calculation and approximation of

values for such parameters. For this research study, the following assumptions were

realised for simulation purposes, unless specified otherwise:

• The system components are presumably lossless.

• The semiconductor power switches turn on and off instantaneously.

• The passive components of the power circuit operate within the linear region only;

therefore, phenomenon such as saturation is avoided.

59

For maximum power transfer, it is assumed that the SST-based high power

conversion system required should be capable of power transfer in all four quadrants: for

both active and reactive power flow. As only the rated active power is given in the

specifications for the SST-based high power conversion system, the assumption made in

this research is that at unity power factor operation, the rated active power equals the

maximum apparent power. This assumption can be described in the following equation:

𝑆𝑚𝑎𝑥 = Pcharging-rated ; for PF = 𝑐𝑜𝑠 (𝜑) = 1 (3.1)

Rewriting Equation (3.1) yields:

|𝑆| = √𝑃2 + 𝑄2 ≤ | Pcharging-rated | (3.2)

Figure 3.1: Power Triangle Diagram

The desired area to operate the SST-based high power conversion system in all four

quadrants is shown in the highlighted (shaded) areas below:

60

Figure 3.2: Four-Quadrant Operating Area of the SST-based High Power Conversion System

The optimal solution for the SST charger is to enable transmitting the active and

reactive powers bidirectionally between the power grid and the EV battery. G2V operates

when the energy is provided from the power grid to the EV battery whereas V2G operates

when the EB transfers energy to the power grid, especially for ancillary services such as

peak shaving and frequency regulation [232]. To support the power grid with reactive

power, the mode of V4G is utilised and accompanied simultaneously with G2V or V2G

operation modes, while the EV battery functions as static var compensators [233, 281]. The

EV battery can be charged and discharged according to the transmission direction of the

active power. The coordination of operation mode scenarios for this bidirectional system

with the full control region as shown in the x-y axes of the PQ plane of Figure 3.2, can be

divided into eight operation modes according to the direction of P and Q power transfer,

are as follows:

(I) G2V operation mode.

(II) V2G operation mode.

(III) Inductive V4G operation mode.

61

(IV) Capacitive V4G operation mode.

(V) G2V combined with the inductive V4G operation mode; where the main

power grid provides the positive active/reactive power to the EV battery.

(VI) V2G combined with the inductive V4G operation mode; where the EV

battery delivers the active power to the power grid.

(VII) V2G along with the capacitive V4G operation mode; where the EV battery

operates as a static var generator to compensate the reactive power.

(VIII) G2V along with the capacitive V4G operation mode; where the EV battery

operates as a static var generator to compensate the reactive power.

The positive directions of P and Q represent the power being delivered from the

main power grid to the EV battery.

The inductive/capacitive operation refers to positive/negative Q power during the

power transfer. The inductive operation modes occur when the grid current lags behind the

same-phase voltage by 90° in. On the contrary, the grid current leads its voltage by 90° in

the capacitive operation modes.

3.2 Proposed SST System Architecture with Modular Configuration

The proposed system architecture of an SST-based high-power system with two-

conversion stages is presented in Figure 3.3 below.

Figure 3.3: Architecture of the Proposed SST-based High Power Conversion System

62

The best advantage of this system architecture is that it has no issues with the

asymmetrical operation due to the connection of each module of the DC-DC stage

conversion stage to each module of the AC-DC rectification stage that is connected to a

three-phase MVAC grid. The proposed SST-based EV charging system configuration with

the selected converter topologies is shown below in Figure 3.4.

Figure 3.4: Configurational Topology of the Proposed DPSS SST-based Charging System

For a modular design with multiple modules, the grid connection to the MVAC line

is implemented by connecting the inputs of all CHB modules in series while the output end

of the SST system is connected in parallel to the EV battery side as ISOP modular multi-

module SST. The proposed SST-based high-power ultra-fast charging system

configuration is illustrated in Figure 3.5 below. Employing ISOP in this configuration

results in a multi-cell SST system which consists of multi-level CHB rectifier modules

connected in series to interface the MVAC grid with a grid filter. The CHB rectification

stage converts the MVAC to MVDC constructing an MVDC-link where ESSs or RESs can

be linked. The second conversion stage consists of single-phase DAB converter modules

with independent galvanic isolation HFTs. This isolated conversion stage converts the

MVDC voltage from the MVDC-link to an LVDC level. The output terminals of all DAB

modules are then connected in parallel to interface the EV battery. This parallel connection

allows for high levels of DC current to flow and a constant output voltage to meet the

desired EV battery specifications for ultra-fast charging. The grid filter is placed before the

proposed SST configurational topology with the aim to alleviate the harmonic distortions

of the input current and voltage waveforms generated by the SST-based conversion system.

63

Figure 3.5: Configuration of the Proposed Modular ISOP SST-based High-Power Charging System

The internal structure of a single converter cell from Figure 3.5 is presented in

Figure 3.6 below.

Figure 3.6: Fundamental Structure of a Single Converter Cell of the Proposed SST

64

3.3 MVAC Grid Distribution Feeder Voltage Level and Filter Selections

Since the standard voltage level for Toronto Hydro for customer-owned distribution

substation with feeders that typically feeds a conventional transformer which steps the

MVAC down to an LVAC is rated at 27.6 kV (line-to-line, RMS) with a nominal frequency

of 60 Hz, the proposed UFCSEV system is to be fed directly from a three-phase 27.6 kV

distribution substation feeder, available as a lateral overhead line, by replacing the isolation

low-frequency service transformer [234]. This 27.6 kV is configured as a grounded star

(wye) configuration to be the input voltage of the MVAC-MVDC stage of the SST-based

high power conversion system of the UFCSEV as shown in Figure 3.7 and Figure 3.8.

The UFCSEV is to be connected to bus B1 on the feeder as indicated in Figure 3.7 above

where Bx: Bus x, Lx: Line x, Mx: Load x, and Tx: Transformer x. The MVAC distribution

feeder chosen is 10 km long and its overhead line (selecting line type 336 AL427 from

Table 3.1 below [235]) has: R1=1.696 , X1=3.809 , R0=4.689 , and X0=12.808 .

This is simply because this line type has the minimum impedance value in comparison to

the other four types tabulated in Table 3.1. This is important for efficiency improvement

as a low impedance (especially resistance) results in a low voltage drop and thus low power

losses, I2R, over the line.

Table 3.1: MVAC Feeder Overhead Line Parameters

Line Type R1

[ohms/km]

X1

[ohms/km]

B1

[uS/km]

R0

[ohms/km]

X0

[ohms/km]

B0

[uS/km]

Summer

Rating

[A]

Winter

Rating

[A]

10ASR427 0.5523 0.4852 3.6 0.9644 1.461 1.92 321 321

40ASR427 0.2697 0.4637 4.12 0.6071 1.4052 1.86 452 452

30ASR427 0.348 0.468 3.76 0.702 1.322 0 100 100

4 ASR-48 1.3515 0.5106 3.55 1.7778 1.7066 1.72 172 172

336 AL427 0.1696 0.3809 4.33 0.4689 1.2808 1.9 655 655

65

Figure 3.7: Single-line Diagram of the MVAC Distribution Feeder

Figure 3.8: Three Phase Star Connection from the MVAC Feeder to the UFCSEV

The high-frequency switching effects of the power electronic switches in the SST-

based high power conversion system cause its voltage and current waveforms to be

accompanied by distortions. This distortion yields an efficiency reduction in the conversion

66

system due to power losses, oscillations in the rotating machines, line cables, and

capacitors, and heating in the power equipment [236].

The Total Harmonic Distortion (THD) is the total distortion caused by a waveform

and is defined as the ratio between the RMS value of all the harmonics to the RMS value

of the fundamental harmonic [236]. The Total Demand Distortion (TDD) is another term

used in harmonics analysis and its calculation is the same as the THD. However, the value

of TDD is calculated under full load conditions only, whereas the THD can be determined

under any condition. As the current varies depending on the load, the TDD can be utilised

to provide a clear definition of the current distortion in the power conversion system. The

IEEE standards, as in the IEEE 519-1992 [236], provide recommendations for distortion

levels for improved power quality. Thus, the distortion levels for which the SST-based high

power conversion system are designed according to this standard definition. Table 3.2

below specifies the recommended limits for the voltages and currents. The ratio of the

short-circuit current to the load current is assumed to be smaller than 20 because the short

circuit current at the PCC is unknown. This assumption ensures compatibility of the SST-

based high power conversion system with any value of short-circuit current. In order to

allow the SST-based high power conversion system to operate at a safe level even below

the IEEE recommended limits, the distortion limit for the design of the SST system will be

set to 80% of the IEEE recommended values. It can be seen from Table 3.2 that even

harmonics are limited to 25% of the odd harmonic limit.

Table 3.2: IEEE Standards for Current Distortion Limits for odd Harmonics in percent of IL [236]

ISC / IL h < 11 11 ≤ h < 17 17 ≤ h < 23 17 ≤ h < 23 35 ≤ h TDD

< 20 4 2 1 0.6 0.3 5

20 < 50 7 3.5 2.5 1 0.5 8

50 < 100 10 4.5 4 1.5 0.7 12

100 < 1000 12 5.5 5 2 1 15

> 1000 15 7 6 2.5 1.4 20

67

The SST-based high power conversion system is to be connected to the MVAC grid

through a filter for the two following functions [238]:

1) Allowing control of the active and reactive power between the MVAC grid and

the SST-based high power conversion system.

2) Reducing the harmonic distortion generated by the SST-based high power

conversion system.

There are three types of filters, which are the most commonly used in power

electronics [49, 238]:

a) L-filter is the most basic filter, which has an inductor that provides damping of

‒20 dB over the whole range. To sufficiently attenuate the harmonic distortion

content, this filter must be used for power converters operating at high

switching frequencies.

b) LC-filter utilises a shunt capacitor to obtain an attenuation of ‒40 dB. This

filter is typically suited for configurations where the load impedance across the

capacitor is relatively high and above the switching frequency.

c) LCL-filter provides an attenuation of ‒60 dB for frequencies higher than the

filter’s resonance frequency (fr). This filter achieves low harmonic distortion

levels with smaller passive elements at lower switching frequencies. Due to

resonance; however, this filter is susceptible to causing distortions to the

dynamic and steady-state current waveforms.

Figure 3.9 below shows the schematic diagrams of the three filter types.

Figure 3.9: Schematic Diagrams of Filters: (a) L-filter (b) LC-filter (c) LCL-filter

68

The SST-based high power conversion system requires one filter to couple the

MVAC-MVDC CHB rectifier to the MVAC grid. A simple L-filter is selected for coupling

the CHB to the MVAC grid due to two main reasons [239]:

1. The converter circuit structure of the CHB with a large number of H-Bridges and

its modulation scheme requires a high switching frequency. The increased

number of H-Bridges can effectively result in a more sinusoidal waveform for

voltage and current. With these two properties, the harmonic distortion content

gets reduced and thus requires smaller filters. Proper filtering operation is

ensured by selecting an appropriate high effective switching frequency.

Selecting a small size of the L-filter ensures a low voltage drop on the inductor.

2. Since high-voltage capacitors are expensive, a filter with a capacitor is avoided

for a more economical design, and thus not included in the CHB filter.

The SST-based high power conversion system contains an MVDC-link,

between the CHB rectifier and the isolated DAB converter consisting of two

parallel capacitors. The DAB modules also have capacitors to the LVDC end to

smoothen the output voltage fed to the terminals of the EV battery as shown below.

Figure 3.10: The SST Converter Topology with the DC Links’ Capacitors

69

Since the rectified voltage from the MVAC-MVDC CHB to the MVDC-LVDC

DAB across the MVDC-bus is not normally constant, capacitor-based filters are therefore

utilised in order to obtain a smooth DC voltage at the MVDC-link as well as at the output

of each module of the DAB converter. A capacitor of an infinite value would yield a

constant voltage at the DC-link [240]. In practice; however, only a finite value of the

capacitance is possible for the filter design allowing a small voltage ripple. The peak-to-

peak voltage ripple in the DC-link is limited up to 10% in practice [241]. The minimum

capacitance for DC smoothing filter for the rectified sinusoidal waveforms from the CHB

rectifier to the DAB converter can be determined using the following equation [240]:

𝐶𝐴𝐶/𝐷𝐶_𝑚𝑖𝑛 =𝑃

2𝜋𝑓𝑔∗ 𝑉𝐷𝐶 ∗ ΔV (3.3)

where CAC/DC_min is the minimum capacitance value for the rectifier’s DC voltage with

sinusoidal ripple, P is the power that flows through the DC-link, fg is the grid sinusoidal

frequency, VDC is the DC-link voltage of the rectifier, ΔV is the peak-to-peak voltage ripple

of the MVDC-link.

To smoothen the voltage waveforms produced as a result of the switching actions

of the DAB converter, additional capacitors are required on both of its sides. The minimum

capacitance for the DAB DC-DC converter capacitors can be calculated according to [242]

as follows:

𝐶𝐷𝐶/𝐷𝐶_𝑚𝑖𝑛 =50∗𝑃

𝑉𝐷𝐶2 ∗ 𝑓𝑠𝑤

(3.4)

where CDC/DC_min is the minimum capacitance value for the DC-DC converter, P is the

power that flows through the DC-link, fsw is the switching frequency of the DC-DC

converter, VDC is the DC-link voltage.

70

3.4 Cascaded H-Bridge MVAC-MVDC Rectifier

The AC-DC stage, also known as the rectification stage of the SST system, consists

of an input L-filter and multiple AC-DC converter cells with an output filter capacitance to

each H-Bridge cell. This section outlines the selection of the converter topology and

components’ parameters.

To directly interface a 27.6 kV MV grid feeder, either series connections of power

semiconductor switches or multi-level converters have to be implemented [50]. To avoid

issues with voltage sharing among individual power switches, employing multi-level

converters can generate multi-level output voltage waveforms with improved harmonic

performance. Cascading of the rectifier cells is therefore a feasible approach to interface

the SST to the MV grid. This approach also results in reduced filtering requirements

compared to a conventional two-level approach [160].

3.4.1 Power Converter Circuit Topology and Components

The CHB rectifier is responsible for converting MVAC to a rectified MVDC

voltage and is often required to operate at unity power factor.

After reviewing the most relevant high-power converter topologies that are widely

used in the industry, multilevel modular-based converters topologies are the most popular

topologies in MV applications because of their benefits to directly interface with MVAC

grids. Among the high potential benefits of the available topologies, that still have not been

fully applied for ultra-fast charging solutions is to employ the CHB rectifier as it is a very

economically viable option compared to other choices owing to its industry ubiquity. Due

to its simple voltage balance control and modular structure which are its main advantages

compared to other potential AC-DC multi-level converters as analysed in Table 2.5, the

CHB is obviously the most suited topology for the AC-DC conversion stage of the SST

system. With proper control strategies and modulation techniques, the SST-based EV

charging system configuration with this CHB topology makes the three phases of the power

conversion system deliver the same power at all times without any asymmetrical issues.

71

Another main feature of employing the CHB in the SST-based high power

conversion system is its modularity; it can easily reach MV by adding more power cells to

each phase of the three-phase MVAC grid. This particular power converter topology can

cope with any grid voltage by increasing the number of cascaded cells and can be scaled to

higher voltage levels easily. Off-the-shelf CHB converter is commercially available in the

market for different MVAC grid voltage levels: 3.3 kV (three cells per phase), 6.6 kV (six

cells per phase), and 11 kV (eleven cells per phase) [243].

The CHB rectifier is composed of a series of connections of several single-phase

full-bridge converters (HBs) referred to as cells. Each one of these cells, realised by

MOSFETs, enables an independent DC voltage, as shown in Figure 3.12. An output

capacitance-based filter is connected to each H-Bridge cell. In order to achieve the desired

DC voltage waveform at the DC-link, a control circuit is connected to each H-Bridge cell

by switching its semiconductor devices on and off.

Figure 3.11: Three-Phase Representation of Cascaded Rectifier Topology within the Proposed SST

System Configuration

72

Figure 3.12: Single-Phase Representation of Cascaded H-Bridge MVAC-MVDC Rectifier Topology

Figure 3.13: Simple Circuit Diagram of Single-Phase Connection from MVAC Grid to the CHB

where Sx is the semiconductor switch consisting of a SiC MOSFET and an anti-parallel

diode, and CCHB is the CHB capacitor at the MVDC-link.

73

Considering the fundamental frequency equivalent circuit of the phase stack shown

in Figure 3.13 with constant phase current amplitude, the required voltage amplitude of

VCHB1 varies with the power factor which depends on the phase angle between the phase

voltage and the phase current, due to the voltage drop across the L-filter inductance, LCHB.

As can be seen in Figure 3.14, the worst-case operating point at the highest VCHB1 voltage

amplitude requirement occurs in the capacitive case (φ = 90°) which limits the maximum

feasible filter inductance, LCHB1, for a given total voltage at the MVDC-link.

The required output voltage, Vi, of the CHB rectifier and can be calculated from:

Vi = M · ∑VMVDC (3.5)

where ∑VMVDC is the total voltage at the MVDC-link.

The power transfer between the MVAC grid and the CHB can be analysed by

considering the fundamental harmonics using the single-phase representation shown in

Figure 3.12 above. This representation replaces the CHB rectifier circuit with the VCHB1 as

a single AC-voltage source. The vector relationship of the power circuit parameters is

illustrated in Figure 3.14 and Figure 3.15.

Figure 3.14: Representation of the Relationship between the required Rectified Output Voltage

Amplitude of the CHB and the Phase Angle between the MVAC Grid Voltage and Current [259]

74

Figure 3.15: Vector Representation of the Relationship between the Voltages and Current at Unity

PF (a) Arbitrary Current (b) Power flow from CHB to MVAC Grid (c) Power flow from MVAC

Grid to CHB

Using the vector analysis, the equations of the power flow between the MVAC grid

and the CHB can be derived as follows:

𝑃 = 3 ∗ 𝑉MVAC−ph ∗ 𝐼MVAC−ph ∗ cos(φ)

= 3 ∗ 𝑉MVAC−ph ∗𝑉CHB1∗sin(δ)

2𝜋𝑓𝑔𝑟𝑖𝑑∗ 𝐿𝐶𝐻𝐵 (3.6)

𝑄 = 3 ∗ 𝑉MVAC−ph ∗ 𝐼MVAC−ph ∗ sin( φ)

= 3 ∗ 𝑉MVAC−ph ∗𝑉MVAC−ph− 𝑉CHB1∗ cos (δ)

2𝜋𝑓𝑔𝑟𝑖𝑑∗ 𝐿𝐶𝐻𝐵 (3.7)

75

where P and Q are the active and reactive power flowing between the MVAC grid and the

CHB respectively, φ is the impedance angle between the voltage and current of the MVAC

grid, and δ is the angle between the MVAC grid voltage and the AC input voltage to the

CHB rectifier.

The amplitude of the phase current flowing through the L-filter can be determined

from the following formula:

I𝑴𝑽𝑨𝑪−𝒑𝒉 =√2 ∗ 𝑃ph

𝑉𝑴𝑽𝑨𝑪_𝑳𝑳/√3 (3.8)

From Equation (3.8), the RMS value and the rectified average value of the phase

current can be calculated from:

I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑅𝑀𝑆 =I𝑴𝑽𝑨𝑪−𝒑𝒉

√2 and I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 =

2∗ I𝑴𝑽𝑨𝑪−𝒑𝒉

𝜋 (3.9)

where Pph is the active power at each phase which equals 500 kW. The values of parameters

VMVAC-ph and fg are fixed by the host MVAC grid system as selected in Section 3.3.

However, the value of IMVAC-ph is determined by the SST charging system load. To adjust

the amount of active and reactive power flowing through the SST conversion system, the

angle φ needs to be adjusted accordingly by adjusting the voltage VCHB1 or angle δ. Also,

adjusting the active and reactive power flow between the MVAC grid and the CHB can be

achieved by adjusting the modulation index given in the two following equations:

MCHB =√2 ∗ 𝑉CHB1

𝑁𝐶𝐻𝐵∗ 𝑉MVDC (3.10)

MCHB =√2 ∗ 𝑉MVAC_LL

√3∗ ∑ 𝑉MVDC (3.11)

Since each CHB cell generates the same VMVDC value, the total MVDC-link voltage is split

among the cascaded rectifier cells. Without loss of generality, this calculation assumes

unity power factor operation and a power flow from the MVAC grid to the EV battery.

76

The parameters that are required to construct the simulation model of the CHB

rectifier are:

• Number of H-Bridges, NCHB

• MVDC-Link Voltage, VMVDC

• C-Filter Capacitance at the MVDC-link, CCHB

• Switching Frequency, fCHB

• L-Filter Inductance for the MVAC Grid, LCHB

3.4.2 Number of H-Bridges and MVDC-Link Voltage

Since the CHB rectifier is comprised of several H-Bridges connected in cascade,

an increase of H-Bridges’ number leads to a better waveform [239]. Nevertheless, adding

one H-Bridge cell requires an additional DAB converter module with its HFT. This yields

in increasing the overall conversion system size and volume, control complexity, and total

cost. Therefore, the number of H-Bridge cells of the CHB is to be kept to a minimum.

Considering the recent advances in SiC power semiconductor technology which

have resulted in 4H-SiC IGBTs with MV blocking voltage ratings [244, 245], conventional

single-cell two-level or three-level converter topologies based on 10 kV [246] or 15 kV

[247] power switching devices could be alternatively considered for the SST system.

However, single-cell SST based on HV semiconductor devices suffers from the high dv/dt

and di/dt values required to limit switching losses.

Significant efficiency and power density gains can be achieved by replacing using

SiC devices instead of LV Si IGBTs in the multi-cell SST system. Only LV SiC power

modules are limited to blocking voltages up to 3300 V are currently available in the market

as discrete products [248–250]. Hence, SiC MOSFET power modules will prevail in the

foreseeable future. Moreover, in order to limit the susceptibility to cosmic-ray-induced

failures, only about 50 % to 60 % of the power semiconductor switching devices’ rated

77

blocking voltage can be used in an application [251, 252]. Therefore, the cascaded CHB

rectifier cells system can be realised using few cells employing 3.3 kV MOSFETs, but also

using a large number of CHB cells based on LV Si IGBTs such as 1200 V IGBT. The trade-

offs considering efficiency, power density, and reliability aspects which have to be

considered for the selection of the optimum number of cascaded cells for the 27.6 kV grid

voltage with the optimum power MOSFET blocking voltage [253, 254], where switching

losses and conduction losses are also considered.

As can be seen from Figure 3.16 below, if the number of cascaded cells is high, the

required blocking voltage of the power semiconductor device is low. Since the phase

current passes through more bipolar power semiconductors connected in series as in the

cascaded topology, the conduction losses increase, and the total voltage drop across the

switches increases. Moreover, since the switching energies of the power switch with

blocking voltage increase, high switching losses are generated, especially when using high

switching frequencies. Thus, if the design considers using power semiconductor devices

with higher blocking voltages, the switching losses are significant. On the other hand, the

design is dominated by conduction losses if it is based on lower blocking voltages.

Figure 3.16: Factors for Trade-offs of Selecting the Optimum Number of CHB Rectifier Cells [259]

78

The output voltage of the CHB rectifier at the MVDC-link is bounded by two values:

1. The lower limit of voltage across the MVDC-link is set by the ripples.

The voltage ripple across the MVDC-link is set to be limited to 10% only. If the

voltage drop over the L-filter inductor is assumed to be zero, the peak AC voltage

amplitude over each H-Bridge cell should be a maximum of 95% of the MVDC-

link voltage. In order to avoid any overlap of the MVDC voltage ripple and the AC

voltage, the AC voltage supplied to each H-Bridge cell is to be kept below 95%.

2. The upper limit of voltage across the MVDC-link is set by the blocking

voltage rating of the switching device.

The value of the MVDC-link voltage cannot be larger than the rated blocking

voltage value of the available SiC MOSFET switching device. In practice, the upper

value of the MVDC-link voltage is limited to 80% of the rated SiC MOSFET

blocking voltage, considering a safety margin of 20%.

These limitations can be represented in the drawings of Figure 3.17 below.

Figure 3.17: Representation of MVDC-Link Voltage Limitations: (a) Lower Limit (b) Upper Limit

79

where VMVAC-ph_peak is the peak voltage of VMVAC-ph, VMOSFET_peak is the peak voltage

across the MOSFET switch, and Margin VMVDC is the margin between the maximum and

minimum MVDC-link voltage.

As can be seen from Figure 3.17, there is a margin between VMVDC_max and

VMVDC_min. This margin can be utilised to select the MVDC-link voltage level such that an

optimal value of the HFT winding ratio of the DAB converter is achieved.

Since the maximum MVDC-link voltage value is limited by the rated MOSFET

blocking voltage value, which can be calculated as follows:

VMVDC_max = 80%

105% ∗ VMOSFET_rated (3.12)

The minimum MVDC-link voltage is limited by the peak phase voltage of the

MVAC grid and the number of H-Bridge cells. Equation (3.13) below can be used to

calculate this voltage:

𝑉MVDC_min = 100%

95% ∗

√2 𝑉MVAC_ph

𝑁CHB (3.13)

The number of H-Bridge cells can be calculated using the following equation:

𝑁CHB = 𝑖𝑛𝑡 (100%

95%∗

√2 𝑉MVACph

𝑉MVDC_max ) (3.14)

where int is the function that rounds the value between the brackets upwards to the next

highest integer. This equation illustrates the equivalence of determining the optimum

number of cascaded converter cells considering the optimum switch blocking voltage.

3.4.3 C-Filter for the CHB Rectifier Cells

The capacitance value of the C-filter, required to obtain a smooth voltage at the

MVDC-link, can be determined using Equation (3.3) above. Assuming that the power

flowing from the MVAC grid to the CHB rectifier is evenly distributed among the three

80

phases and many H-Bridge cells, the rectified power per phase, per one H-Bridge cell can

be determined as follows:

PCHB1-ph = 1

3

𝑃𝑐ℎ𝑎𝑟𝑔𝑖𝑛𝑔_𝑟𝑎𝑡𝑒𝑑

𝑁𝐶𝐻𝐵 (3.15)

The required capacitance value for a given voltage ripple criterion depends mainly

on the capacitor current of a specific cell, which can be calculated from the phase current,

the modulation index function, and the constant DC current. For this SST design, identical

cells with the same blocking voltage and filter capacitance are assumed.

The capacitances of the CHB cells are selected such as to result in a peak-to-peak

voltage ripple of 10 %, which is mainly a ripple at twice the grid frequency This is to buffer

the difference between the AC-side power that is proportional to sin2 (2π fg t) and the DC-

side power, which is constant. Setting the MVDC-link voltage ripple to 10% maximum,

Equation (3.12) can be substituted into Equation (3.3), which yields Equation (3.16) below

which can be used for the capacitor selection for CHB cells:

𝐶𝐶𝐻𝐵_𝑚𝑖𝑛 =

13

𝑃𝑐ℎ𝑎𝑟𝑔𝑖𝑛𝑔_𝑟𝑎𝑡𝑒𝑑

𝑁𝐶𝐻𝐵

2𝜋𝑓𝑔𝑟𝑖𝑑 ∗ (0.1 ∗ 𝑉𝑀𝑉𝐷𝐶) ∗ 𝑉𝑀𝑉𝐷𝐶

=𝑃𝑐ℎ𝑎𝑟𝑔𝑖𝑛𝑔_𝑟𝑎𝑡𝑒𝑑

0.6 𝜋 𝑓𝑔 ∗ 𝑁𝐶𝐻𝐵 ∗ 𝑉𝑀𝑉𝐷𝐶2 (3.16)

For designs based on different blocking voltages of the switching devices, the total

energy buffering capability of a phase stack at twice the grid frequency does not primarily

rely upon the number of CHB cells as additional current components at the respective

switching frequency lead to slight differences in the capacitance requirements.

By averaging the values of polypropylene foil capacitors of various capacitance and

voltage ratings provided in the datasheets from different manufacturers, the capacitor

volume can be estimated from the capacitance value and the DC voltage of each CHB cell

by assuming a constant volume per stored energy of 6.3 cm3 /J which corresponds to an

energy density of 0.16 J/cm3 as reported in [258].

81

3.4.4 L-filter and Switching Frequency for the CHB Rectifier

Considering the variable number of cascaded CHB cells that can generate an output

voltage waveform with multiple levels, an L-filter inductor, LCHB is required to limit the

current harmonics injected into the power grid. Based on the THD caused by the CHB

rectifier, the values of the carrier or switching frequency fCHB and the inductor of the L-

filter LCHB can be determined. The higher the switching frequency is, the lower is the

harmonic distortion. However, increasing the switching frequency has a drawback as the

switching losses increases as a result. Selecting a higher inductance value for the LCHB

reduces the THD; however, this increases the inductor voltage drop as well as its size and

cost.

The required switching frequency for each cell mainly depends on the number of

CHB cells. The reference impedance and inductance can be determined from:

𝑍B = 𝑉𝑀𝑉𝐴𝐶_𝐿𝐿

2

P𝒄𝒉𝒂𝒓𝒈𝒊𝒏𝒈_𝒓𝒂𝒕𝒆𝒅 and 𝐿B =

𝑍B

2𝜋𝑓g (3.17)

If the allowable maximum relative peak-to-peak ripple of the phase-current is given

by δIpp = ∆Ipp

IMVAC−ph , then for a single two-level H-bridge rectifier modulated with unipolar

PWM, where the output frequency of the H-bridge is twice the MOSFET switching

frequency, due to interleaved operation of the two bridge legs, the maximum current ripple

during a half period of the grid current occurs when the modulation index is MCHB = ½

[259]. Therefore, the required switching frequency for a given maximum peak-to-peak

current ripple can be calculated from:

𝑓sw_2L = ∑ 𝑉𝑀𝑉𝐷𝐶

8∗ 𝐿f 𝐿B ∆Ipp (3.18)

For multiple H-Bridge cells connected in a cascade where CPS-PWM is employed,

the magnitude of the steps in the output voltage is reduced to (∑VMVDC)/NCHB. To

determine when the highest switching distortion happens, the control structure, scheme and

modulation techniques of the CHB rectifier should considered.

In this design, the CHB rectifier is modulated using the PWM with phase-shifted

carriers, known as the PS-PWM modulation scheme where each H-Bridge cell of the CHB

82

is assigned two carrier signals with a frequency of fCHB. As a result of the CPS-PWM

modulation scheme, the effective switching frequency of the CHB rectifier can be

calculated as follows [255, 256]:

𝑓𝐶𝐻𝐵−𝑒𝑓𝑓𝑒𝑐𝑡𝑖𝑣𝑒 = 2 ∗ 𝑁CHB ∗ 𝑓𝐶𝐻𝐵 (3.19)

where fCHB-effective is the effective switching frequency of the CHB rectifier, and fCHB is the

frequency of the carrier signal to the MOSFET switches of the CHB rectifier.

∆Ipp = ∑ 𝑉𝑀𝑉𝐷𝐶

8∗ 𝐿f ∗ 𝑓sw_2L =

(∑𝑉𝑀𝑉𝐷𝐶)/𝑁𝐶𝐻𝐵

8∗ 𝐿f ∗ 𝑁𝐶𝐻𝐵∗ 𝑓CHB (3.18)

where fCHB is the switching frequency per H-Bridge leg required to achieve the same

current ripple in the same L-filter inductor, which can be reduced based on the following:

𝑓CHB = 𝑓sw_2L

𝑁𝐶𝐻𝐵2

(3.19)

The switching frequency decreases with the number of CHB cells squared, which

corresponds with the findings published in [260].

Considering the trade-offs shown in Figure 3.16, by using CPS-PWM and many

cascaded rectifier cells, the number of voltage levels and the effective switching frequency

seen by the LCHB inductor are increased, and hence the required switching frequency per

cell and the filtering LCHB inductor value can be reduced. To address the reliability concerns

that might arise when the number of cells is high, using a fewer number of cascaded cells

with power switches of higher blocking voltages could reduce the number of available

voltage levels of the CHB. In this case, either a larger filter, LCHB and/or higher switching

frequencies are required to keep the harmonic content of the grid current within limits [255,

256]. Since the VCHB1 voltage shown in Figure 3.14 above is limited by the total MVDC-

link voltage; ∑VMVDC, there is an upper limit for the filter inductance, LCHB. If the

capacitive operating point should be reachable at nominal current and MCHB_max = 1, the L-

filter inductance is constrained by:

𝐿CHB ≤ 𝐿CHB,𝑚𝑎𝑥 = ∑VMVDC − √2/3 𝑉MVAC_LL

2𝜋𝑓g ∗ I𝑴𝑽𝑨𝑪−𝒑𝒉 (3.20)

where MCHB_max is the maximum modulation index value.

83

Due to the stringent requirements set by IEEE [236], the harmonic distortion levels

are imposed for frequencies above the 35th harmonic, which is at 2100 Hz for a grid

frequency of 60 Hz. From Equation (3.17), a switching frequency of 1050 Hz will produce

distortions above the 35th harmonic. For analysis, the harmonics above the 35th will be

determined first because the suggested distortion level for every harmonic above the 35th

is the same. When both the fCHB and LCHB values are found to reduce the distortion for

harmonics above the 35th to the desired levels, the next step is to determine if this

combination of values also reduces the individual distortion levels below the 35th harmonic.

When the THD is below the desired levels, that combination of fCHB and LCHB values is

suited for the design of the CHB rectifier. Appendix C demonstrates a flowchart of this

optimisation process [49].

It should be noted that several combinations of fCHB and LCHB values could result

in distortion levels compliant with the IEEE standards. In such practical cases, the most

suitable selection for the CHB rectifier design is to select a combination of values that are

suitable based on other factors such as the switching losses as well as the size and weight,

and voltage drop of the LCHB inductor.

3.5 Dual Active Bridge MVDC-LVDC Converter

A single-phase DAB full-bridge DC-DC converter is selected for this conversion

stage due to its overall high efficiency and the fewest passive components it contains

compared to other viable bidirectional isolated DC-DC converter as can be seen from Table

2.6, which makes it a perfect candidate for soft switching properties as well as achieving

evenly shared currents in the switching devices. Soft switching in power electronics means

that the switching devices turn on and off at either zero voltage or at zero current. This

yields to neglectable switching losses, increased efficiency at high switching frequencies,

and smaller dimension size of the HFT [263].

84

3.5.1 Power Converter Circuit Topology and Components

The number of DAB DC-DC converter modules is equal to the number of H-Bridge

cells of the CHB rectifier where each DAB module is connected to a single H-Bridge cell

from the CHB, that is: NDAB = NCHB

For simplicity, this conversion stage can be divided in three parts in order:

• A DC-AC converter

• An HFT in between the DC-AC converter and the AC-DC converter

• An AC-DC converter

The purpose of the HFT in this topology is to meet the galvanic isolation

requirement. It also allows large conversion ratios of voltage and current between the input

and the output of the DAB converter. Size reduction is obtained using the HFT in

comparison with the LFT. Additionally, the HFT assists in ensuring a sinusoidal AC

current shape with low harmonic distortion as well as PFC and achieving soft-switching

conditions over the whole AC module voltage. It also helps in keeping the AC-side voltage

within the limits of the blocking voltage capability of the power MOSFET switching

devices. Previous studies show that for non-isolated EV chargers, a person gets electrically

shocked especially during direct coupling between the EV charger to the EV battery, while

for isolated EV chargers with no connection from the neutral to the ground, this is not the

case. The output side of the UFCSEV has to be designed as an unearthed DC power supply

(IT system) with insulation monitoring [272, 273]. Earthing of such station could be

designed using grounding standards and methods reported in [230, 231]. IEC 61851-23

[129] standard recommends the isolation requirements between the AC distribution grid

and the EV battery, this safety requirement can be met by the galvanic isolation provided

by the HFT meets the requirement for UFCSEV between the MVAC distribution grid and

the EV battery.

The DAB DC-DC power circuit schematic is shown in Figure 3.18. The outputs of the

DAB modules are all connected in parallel for a fixed voltage and increased current at the

output to the EV battery.

85

The parameters required to construct the DAB converter model are:

• HFT Turns-Ratio, nHFT

• Leakage Inductance, LDAB

• C-Filter Capacitances: CDAB1 at the MVDC-Link and CDAB2 at the LVDC-Link

• Switching Frequency, fDAB

Figure 3.18: Multiple Module Topology of the DAB MVDC-LVDC Converter

3.5.2 HFT

In this design, the phase shift modulation technique is utilised to control the power flow

between the high-voltage side and the low-voltage side of the HFT. Figure 3.19 below

shows the equivalent circuit diagram of the HFT to be used for analytical purposes [261].

86

Figure 3.19: Equivalent Circuit Schematic of the HFT

Figure 3.20: Simplified Circuit Schematic of HFT

The small series resistances and large parallel branches can be neglected which

results in a simplified circuit as depicted in Figure 3.20. This allows for summation of both

leakage inductances as in the following equation [262]:

𝐿𝐷𝐴𝐵 = 𝐿𝐷𝐴𝐵1 + 𝐿𝐷𝐴𝐵2 ∗ 𝑛HFT2 (3.21)

where VDAB1_AC is the primary side voltage of the HFT, VDAB2_AC is the secondary side

voltage of the HFT, RDAB1 is the resistance of the HFT primary winding, RDAB2 is the

resistance of the HFT secondary winding, LM is the magnetizing inductance of the HFT,

LDAB1 is the leakage inductance of the HFT primary winding, LDAB2 is the leakage

inductance of the HFT secondary winding, RM is the magnetic core resistance of the HFT,

LDAB is the referred primary leakage inductance of the HFT, IL-DAB is the current flowing

through the inductor LDAB [263].

87

Besides providing the required galvanic isolation, the HFT provides voltage

matching between the high-voltage side and the low-voltage side of the DAB converter.

The leakage inductance, 𝐿𝐷𝐴𝐵 of the HFT is used as an instantaneous energy storage device

[265]. The relationship between the high-voltage side and low-voltage side defines the

turns-ratio of the HFT, which can be calculated from:

𝑛HFT = 𝑉𝑀𝑉𝐷𝐶

𝑉𝐿𝑉𝐷𝐶 (3.22)

The value of 𝑛HFT depends primarily on the ratio of the DC-links’ values which are

determined by the requirements of the CHB rectifier and the EV battery respectively. For

standardised design, it is preferable to have 𝑛HFT with a small numerator and denominator

[265]. For instance, it is more preferred to have a turns-ratio value of 2/3 than that of

315/994. To simplify the turns-ratio design, the following equations can be used:

G = 𝑉𝑀𝑉𝐷𝐶

GCD (𝑉𝑀𝑉𝐷𝐶 , 𝑉𝐿𝑉𝐷𝐶) 𝑥

𝑉𝐿𝑉𝐷𝐶

GCD (𝑉𝑀𝑉𝐷𝐶 , 𝑉𝐿𝑉𝐷𝐶) =

𝑉𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

(GCD (𝑉𝑀𝑉𝐷𝐶 , 𝑉𝐿𝑉𝐷𝐶))2 (3.23)

for VMVDC_min ≤ VMVDC ≤ VMVDC_max and VLVDC_min ≤ VLVDC ≤ VLVDC_max

where G is the optimum value of the turns-ratio 𝑛HFT, GCD is the greatest common divisor,

VMVDC_min and VLVDC_min are the minimal values of the VMVDC and VLVDC respectively, and

VMVDC_max and VLVDC_max are the maximum values of the VMVDC and VLVDC, respectively.

The optimal turns-ratio of the HFT occurs at the minimal value of G, where Equation (3.22)

becomes:

𝑛HFT = 𝑉𝑀𝑉𝐷𝐶 @G−min

𝑉𝐿𝑉𝐷𝐶 @G−min (3.24)

where VMVDC@G-min is the voltage VMVDC at the minimum value of G, and similarly

VLVDC@G-min is the voltage VLVDC at the minimum value of G.

88

3.5.3 Leakage Inductance and Switching Frequency for the DAB Converter

Since the phase shift modulation scheme is applied for the DAB converter, the

phase shift is adjusted between the voltage VDAB1_AC and VDAB2_AC as can be seen from

Figure 3.21. If power losses are neglected, the active power transferred through the MVDC-

LVDC DAB converter can be calculated as follows [265]:

𝑃DAB_rated =n𝐻𝐹𝑇 ∗ 𝑉𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

2 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝐿𝐷𝐴𝐵 ∗ d𝐷𝐴𝐵 (1 – d𝐷𝐴𝐵) (3.25)

and the duty cycle is based on half the switching period as:

d𝐷𝐴𝐵 = (𝑡𝑜𝑛−𝐷𝐴𝐵) / (𝑇𝑠−𝐷𝐴B/2)

= 2 * 𝑡𝑜𝑛−𝐷𝐴𝐵 * fDAB (3.26)

and the rated power per DAB module can be simply determined assuming that the power

is evenly distributed among the multiple DAB modules as follows:

𝑃DAB_module = 𝑃𝐷𝐴𝐵_𝑟𝑎𝑡𝑒𝑑

3 ∗ 𝑁𝐷𝐴𝐵 (3.27)

where PDAB_rated is the rated power transferred through the DAB converter, VMVDC is the

input voltage of the DAB on the CHB side, VLVDC is the output voltage of the DAB on the

EV battery side, PDAB-module is the rated power of each DAB module, NDAB is the number of

modules of DAB, ton-DAB is the time-delay before the low-voltage of the DAB H-Bridge is

switched on, Ts-DAB is the switching period of the DAB.

Selecting an effective switching frequency for the DAB converter requires a

detailed design. Depending on the HFT characteristics, power-switching devices

(MOSFETs), and the desired efficiency, an optimal switching frequency can be

determined. Due to the complexity of detailed design and optimisation to determine the

switching frequency, the scope of this research study is to employ previous research results.

Since most publications reported in [266-271] use a switching frequency of 20 kHz for the

DAB converter for high-power ratings from 1 kW to 1 MW, this frequency will be utilised

as the switching frequency of the DAB converter of the SST system. Since this is applicable

for a large range of power ratings, a frequency of 20 kHz is high enough to prevent the

HFT and external inductors from generating acoustic noise [270].

89

Figure 3.21: Phase Shift Waveform Representation of the Input and Output Voltages of the HFT

The leakage inductance of each DAB module can be determined using this formula:

LDAB =nHFT ∗ V𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

2 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝑃𝐷𝐴𝐵−𝑚𝑜𝑑𝑢𝑙𝑒 ∗ d𝐷𝐴𝐵 (1 – d𝐷𝐴𝐵) (3.28)

The maximum power the DAB can transfer happens when the duty cycle dDAB = 0.5. This

yields to:

LDAB =nHFT ∗ V𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

8 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝑃𝐷𝐴𝐵_𝑚𝑜𝑑𝑢𝑙𝑒 (3.29)

However, the value of LDAB is restricted to a maximum of 80% of the maximum value of

LDAB for sufficient bandwidth of the duty cycle dDAB, thus, Equation (2.29) yields to:

LDAB_max =nHFT ∗ V𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

10 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝑃𝐷𝐴𝐵_𝑚𝑜𝑑𝑢𝑙𝑒 (3.30)

where LDAB-max is the maximum leakage inductance of the HFT required to operate the

DAB converter, PDAB-rated is the rated power flowing through the DAB converter module.

As can be seen from Equation (3.23), LDAB_max is inversely proportional to the maximum

transferable power through the DAB converter module, when other parameters are fixed.

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3.5.4 DAB Operation with Soft Switching

The DAB topology was selected among all isolated bidirectional DC-DC converter

topologies for its soft-switching capabilities where the MOSFET switches turn on and off

at either zero voltage or at zero current. The operating range of the DAB has to be in a

certain region in order to take advantage of the soft-switching properties [274, 275]. DC

conversion ratio is a parameter introduced in [263] in order to identify that region. This

ratio is also known as the normalised output voltage which can be calculated from the

following equation:

DC conversion-ratio =n𝐻𝐹𝑇 ∗ 𝑉𝐿𝑉𝐷𝐶

𝑉𝑀𝑉𝐷𝐶 (3.31)

The variation of dDAB can cause the DAB converter to shift from the soft switching

region to the hard switching region, as can be seen from Figure 3.22 and Figure 3.23. Since

the hard switching region does not occur at zero voltage or zero current, which introduces

unwanted switching losses, therefore, this region is to be avoided [49].

Figure 3.22: DAB Output Power versus Duty Cycle [263]

91

Figure 3.23: DC Conversion-Ratio versus Output Current of the DAB [263]

From Figure 3.22 and Figure 3.23, the per unit output current of the DAB can be calculated

using:

I𝐿𝑉𝐷𝐶(p. u. ) = 𝐼𝐿𝑉𝐷𝐶

2π 𝑓𝐷𝐴𝐵∗ 𝑉𝑀𝑉𝐷𝐶∗n𝐻𝐹𝑇 ∗ 𝐿𝐷𝐴𝐵 (3.32)

𝑅 = 𝐷𝐶−𝑟𝑎𝑡𝑖𝑜 (p.u.)

𝐼𝐿𝑉𝐷𝐶 (p.u.) (3.33)

The DC conversion-ratio, DC-ratio, should ideally be equal to one, in order to avoid

the hard switching region as can be seen from Figure 3.23 and Figure 3.24. Keeping the

voltage values on both sides of the DAB as constant as possible provides a full range of

soft-switching operations [49].

92

3.5.5 C-Filters for the DAB Modules

The DAB converter is to also employ two capacitance-based filters, one at the side

of the CHB rectifier (to further smooth out the voltage ripple across the MVDC-link) and

the other one on the EV battery side. The capacitance value of the capacitor on the CHB

rectifier side can be calculated from:

𝐶𝐷𝐴𝐵1 =50 ∗ 𝑃𝐷𝐴𝐵_𝑚𝑜𝑑𝑢𝑙𝑒

𝑓𝐷𝐴𝐵 ∗ 𝑉𝑀𝑉𝐷𝐶2 (3.34)

Similarly, the capacitance value of the C-filter on the EV battery side can be determined

using the following equation:

𝐶𝐷𝐴𝐵2 = 𝐶𝐿𝑉𝐷𝐶 =50 ∗ 𝑃𝐷𝐴𝐵_𝑚𝑜𝑑𝑢𝑙𝑒

𝑓𝐷𝐴𝐵 ∗ 𝑉𝐿𝑉𝐷𝐶2 (3.35)

where 𝐶𝐷𝐴𝐵1 is the C-filter capacitance at the input of the DAB and 𝐶𝐷𝐴𝐵2 is the C-filter

capacitance at the output of the DAB.

CDAB1 is to be connected in parallel at the MVDC-link with the capacitor C-filter capacitor

of the CHB, CCHB. Since CCHB is employed to smooth out the voltage ripples caused by the

switching actions of the CHB, the CDAB1 is also utilised to further reduce the voltage ripples

caused by the switching actions of the DAB converter. Since the voltage ripple over CCHB

operates at a much lower frequency than that over CDAB1, a low-frequency capacitance is

utilised in practical cases for the CCHB while a high-frequency capacitance is implemented

for the CDAB1.

To simplify the analysis in this design, CCHB and CDAB1 are added together to obtain

a total capacitance at the MVDC-link between each H-bridge cell and DAB module as:

𝐶MVDC-Link = 𝐶𝐶𝐻𝐵 + 𝐶𝐷𝐴𝐵1 (3.36)

93

3.6 EV Battery Model

A Li-ion electrochemical BESS is utilised for this research study for the EV battery

for the proposed UFCSEV by selecting a very popular Li-ion battery available in the market

which has the highest nominal cell capacity of 3450 mAh and a nominal cell voltage of

3.60 V as given in the datasheet [276]. For simulation purposes, an electrical-based model

is constructed by implementing the dynamic model proposed in [277-279]. This battery

model is comprised of a controlled-voltage source, which is connected in series with

internal resistors RC and RD for charge and discharge cycles, respectively. In this model,

the controlled-voltage source is dependent on the battery SoC. The charge and discharge

characteristics of the selected battery are independently represented in this model.

However, this model does not take into consideration the effect of temperature and self-

discharge of the selected Li-ion battery, which is also assumed to have no memory effect.

Figure 3.24: Model of the Li-ion EV Battery [277-279]

where Q is the capacity of the EV battery in Ah, IEV is the current flowing through the EV

battery in A, VEV is the voltage across the EV battery in V, RC is the internal resistor in the

charge cycle, RD is the internal resistor in the discharge cycle, 𝐸𝑜 is the constant voltage of

94

the EV battery in V; K is the polarization constant in (V/Ah), C is the polarisation voltage

slope in (V/Ah), 𝑖 is the battery current in A, 𝑖∗ is the filtered battery current in A, t is the

charge or discharge time, 𝑖𝑡 = ∫𝑖 𝑑𝑡 is the battery charge in Ah, 𝐴𝑏 is the exponential zone

amplitude, B is the exponential zone time constant inverse calculated as (𝐴ℎ −1 ), 𝑃𝑜𝑙𝑟𝑒𝑠 is

the polarisation resistance, and u(t) is the charge or discharge mode. For the charge mode,

𝑢(𝑡) = 1, whereas for the discharge mode, 𝑢(𝑡) = 0.

Using the model shown in Figure 3.24, the EV battery SoC during the charging and

discharging processes can be estimated by the following formula [280]:

𝑆𝑜𝐶 = 𝑄𝑜−∫ η 𝐼𝐸𝑉 dt

𝑄 (3.37)

where 𝑄𝑜 is the initial stored charge at the battery in Ah and 𝜂 is the battery efficiency. The

efficiency of the EV battery depends primarily on the charging current and the battery

voltage. The charging efficiency (𝜂𝑐ℎ) and discharging efficiency (𝜂𝑑𝑖𝑠) of the EV battery

can be calculated from the two following equations [3.7]:

η𝑐ℎ = 𝑉𝑂𝐶

𝑉𝑂𝐶 – 𝑅𝐶 𝐼𝐸𝑉 (3.38)

η𝑑𝑖𝑠 = 𝑉𝑂𝐶 − 𝑅𝐷 𝐼𝐸𝑉

𝑉𝑂𝐶 (3.39)

where 𝑉𝑜𝑐 is the open-circuit voltage of the EV battery.

The parameters required to construct the EV battery model are determined from the

charge and discharge curves of the Li-ion battery available in the datasheet [3.43] based on

the procedures reported in [277-278]. The EV battery has a low-pass filter for the current

which is utilised to account for the dynamics of the battery. The polarisation resistance is

different for the charge mode when (𝑢(𝑡) = 1) and the discharge mode when (𝑢(𝑡) = 0),

which can be calculated from [278]:

Pol𝑟𝑒𝑠 = 𝐾 𝑄

𝑄 – 𝑖𝑡 (1 − 𝑢(𝑡)) + 𝐾

𝑄

𝑖𝑡 – 0.1𝑄 (𝑢(𝑡)) (3.40)

The polarisation voltage slope C can be determined from the discharge curve slope

in the linear region, which represents the effect of SoC on the open-circuit voltage of the

EV battery. As can be seen from the discharge curves depicted in Figure 3.26, the initial

95

voltage of the cell terminal of the EV battery varies according to the discharge rate. Due to

the presence of the internal resistance in the EV battery, the initial voltage, at zero discharge

capacity, decreases as the discharge rate increases, which is in accordance with Figure 3.25:

ε = V + I . R (3.41)

where 𝜀 is the terminal voltage in V, V is the open-circuit voltage in V, I is the current

flowing through the battery cell in A, and R is the internal resistance of the battery cell in

Ω. The internal resistance of the battery cell for the discharge and charge cycles are

determined from Figure 3.26 and Equation (3.41) to be 0.085 Ω and 0.114 Ω, respectively.

Figure 3.25: Characteristics of the Charge and Discharge of the Li-ion Battery Cell [276]

The cells of the EV battery need to be stacked together in series and parallel to build

the required battery capacity of 564 kWh for the selected EV: Nova Bus LFSe+ [83]. Table

3.3 below shows the required number of battery cells to be stacked together with the

equivalent resistance for the series and parallel connections for the internal resistance.

96

Table 3.3: Design Parameters of the EV Battery

EV

Battery

Capacity

Number of Battery

Cells (Series x

Parallel)

Nominal

Voltage

Current at 1 C

Charge/Discharge

Rate

Internal Resistances

RC RD

564 kWh 278 x 162 1000 V 580 A 0.085 Ω 0.0114 Ω

3.7 Overall Power Circuit Model of the Modular SST System

Based on the design results shown in Table 5.2, the CHB rectifier requires 10 H-

Bridge cells per phase, totalling 30 CHB cells for the three-phase cascaded connection to

the 27.6 kV distribution feeder. Moreover, one DAB converter module is connected at the

MVDC-link on the side of each H-Bridge cell. A total of 30 DAB modules are constructed

in the whole structure of the SST system model. All DAB modules are connected in parallel

at the LVDC which leads to a fixed voltage at the EV battery side and an increase in power

results in an increase in current flows. The total number of MOSFET switching devices is

360. Figure 3.26 shows the modular structure of the SST topology proposed for the 1.5

MW UFCSEV. Since there are 30 CHB-DAB couples, the proposed topological

configuration is expandable for any voltage level on the CHB rectifier side. A higher or

lower MVAC grid voltage simply requires an increase or decrease in the number of CHB

cells and DAB modules, respectively. Besides its voltage scalability, the SST’s rated power

is also scalable. Since the power on the MVAC grid side is equally distributed among the

CHB-DAB modules, an increase of the SST modules or simply increasing their power

density and handling capabilities provides an overall higher power capability to withdraw

from the MVAC grid to charge the EV battery.

97

Figure 3.26: Topological Configuration of the Modular Structure of the Proposed SST System

The overall system-level model constructed on Simulink is shown in Figure 3.27.

This simulation was first constructed on MATLAB/Simulink and is based on a

time-domain detailed switching model using EMT discrete with a step size simulation of

200 ns to study the transient and dynamic performances of the SST system using

measurement blocks to monitor the simulation results of each converter module at the two

stages and observing the charging output electrical quantities at the load being the EV

battery model.

98

Figure 3.27: System-Level Simulink Model of the Overall Power Circuit of the SST

3.8 Summary

In this chapter, the detailed procedures, and equations for the first-order design of the

SST system were presented while taking into account practical implications such as the

safety margins, harmonic distortions, ripple, and soft switching. To make the design

procedure applicable at any specified power, voltage, or current level, the design formulae

are expressed in a general form. The overall SST power circuit illustrates the modularity

of the selected converter topologies, which allows for further scalability and customisation

to any voltage level and any power rating.

99

Chapter 4. Control System Design and Modulation Scheme

Implementation

This chapter presents the control strategies, schemes, structures, and modulations

techniques utilised in order to keep the proposed SST system operating at the desired

setpoint, especially for the main purpose of the UFCSEV.

For the simulation intended to be carried out in this thesis, the mode in which the SST

system operates is the first quadrant operation (I) mode, where the SST needs to be

controlled properly to provide active power mainly for EV charging. Each conversion stage

of the SST system has specific tasks to keep the MVAC current, the MVAC voltage, the

MVDC voltage, or the LVDC voltage at a constant level. The main objectives of

controlling the power converters at the two-stage SST system during operation are:

For the CHB rectifier: control the MVDC-link between the CHB and DAB constant

(at 2500 V DC) while also maintaining a voltage balance across all cells of the three-phases.

For the DAB converter: control the LVDC side voltage and current at the desired EV

battery specifications constant (i.e. at 1000 V DC maximum charging voltage and 1500

A of charging current at rated charging power).

The overall control scheme for the CHB and DAB converters is based on feedback

controllers used to improve the dynamic behaviour of the SST with high accuracy by

actively monitoring the controlled parameter being measured so as to adjust the duty cycle

in order to obtain the desired steady-state value corresponding to the pre-defined reference

value. In this linear control scheme, the feedback controllers implemented utilise the PI

compensators due to their simplicity for implementation in simulation as well as in practice

[283]. Besides these PI controllers, an extra controller is required for proper operation of

the SST system as well as for grid monitoring in order to derive certain characteristics

about the power grid under both normal and abnormal conditions [284]. This controller is

based on the PLL algorithms to determine the MVAC grid frequency, its angular

frequency, and the RMS value of the supply voltage to the main control loops.

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4.1 Monitoring System for the Grid based on a Three-Phase PLL

There are several techniques to detect the grid phase by deriving this information based

on the supply voltage zero-crossing detection, arctangent calculation, or PLL algorithms

[284]. Since the PI compensators introduce a steady-state error when operating in the abc-

frame to control the MVAC grid waveforms, those waveforms must be transformed to the

dq0-frame [285, 286]. Transforming the abc-frame to the dq0-frame requires information

about the MVAC grid voltage, in particular the value of the phase angle θg.

For detecting the grid voltage phase angle, the PLL is one of the most widely used

approaches to extracting the phase angle as it demonstrates a robust technique compared

to the other methods because it has better disturbance and noise rejection [284]. For grid-

connected applications, several PLL structures have been presented in the literature [287–

289]. The control system designed in this thesis is based on the classic PLL algorithms by

employing a rotating reference frame, to distinguish between single-phase and three-phase

structures.

The control scheme of the three-phase PLL used for grid monitoring is shown in the

block diagram of Figure 4.1, which includes three blocks namely, the coordinate

transformation from a natural to a rotating reference frame, the PLL algorithm, and the

RMS and frequency measurement systems [290, 291]. The MVAC grid voltage is first

transformed from its natural abc-frame to the stationary αβ-frame using the Clarke

transformation block. The grid voltage is then transformed from the αβ-frame to the dq0-

frame by using an initial estimate of the angular frequency ωo, which is set to 2π times the

nominal grid frequency, which is equal to 120π for 60 Hz, which can be integrated to derive

the grid voltage phase angle, θg. This PLL scheme is also able to extract the grid frequency

fg, from ωg, when appropriately scaled and filtered using an LPF to eliminate the high order

harmonics. The dq0 transformation generates the quadrature component (Vq), which is

compared with the pre-defined reference value for the error signal. The error signal is then

regulated to zero using the PI control compensators in order to synchronise the d-axis of

the synchronous reference frame to the MVAC voltage vector. Until the PLL produces a

phase angle equal to that of the input, then the error signal becomes zero. The values of the

grid frequency and the amplitude of the grid voltage can also be extracted by the PLL.

101

The RMS voltage can also be obtained by the PLL which calculates the absolute value

of the voltage vector in a stationary reference frame which is then divided by √2 to give

the RMS value of the grid voltage. This measurement is performed under non-distorted

grid conditions. In the case where high order harmonics are present on the grid voltage

measurement, an LPF is required for harmonics rejection. However, in the case of an

unbalanced grid voltage, the negative sequence generated on the three-phase grid voltage

system cannot be filtered; therefore, improvements to the PLL algorithm to extract the

positive sequence angle are needed [292].

The built-in PLL block available on MATLAB/Simulink library cannot be used in the

SST control system because its tests have shown unsatisfactory simulation results found in

Section 5.1. This traditional block contains an averaging block used to remove the voltage

ripples using a buffer that stores, for a specified period of time, the value of the voltage

waveform. However, this buffer has technical issues under transient behaviour which result

in unacceptably long computational times. This is because the simulation step size gets

reduced but MATLAB/Simulink has to adjust the size of the buffer dynamically. Thus, the

PLL shown in Figure 4.1 is utilised instead of the built-in block on MATLAB/Simulink.

Figure 4.1: Three-Phase Phase-Locked Loop Structure for Grid Monitoring

where ωg = 2πfg and fg is the grid frequency which is equal to 60 Hz, θg is the grid voltage

phase angle, Kp and Ki are the PI compensator gains of the PI controller.

102

4.2 Control and Modulation for the MVAC-MVDC Conversion Stage

When the power flows from the MVAC grid to the CHB rectifier, the CHB has to

provide a constant output voltage at the MVDC-link. The voltage-mode control (also

known as duty cycle control) consists of a single control loop to adjust the duty cycle

directly as a response to the changes in the voltage output of the CHB. The key advantage

of the voltage-mode control is that it has low requirements in hardware design and reacts

quickly to output voltage disturbances. However, when disturbances happen in the input

voltage, a feed-forward loop is required because the voltage-mode controller reacts rather

slowly in this case since these disturbances have to propagate from the input side to the

output voltage side before they can be measured and adjusted by the controller. On the

other hand, the current-mode control (also known as the current-programmed mode or

current-injected mode) with feed-back methods of two loops: an inner current loop and an

outer voltage loop, is used to generate a constant voltage at the MVDC-link are

implemented for the proposed SST system [293-298]. As can be seen from the control

structure shown in Figure 4.2, the MVDC-link voltage is indirectly controlled by the

current loop, whereas the current is controlled directly. The output voltage of the CHB is

measured and compared to the desired value defined for the reference MVDC. An error

signal is generated as a result of the difference between these two values to produce a

reference current value, which is then compared to the actual current value to finally

generate a duty cycle. This requires a complex control system due to the very robust wide-

bandwidth output voltage control. The current-mode control is utilised in this study because

of its robustness to adjust the MVDC-link voltage properly.

Figure 4.2: Current-Mode Closed-Loop Feedback Controller for the CHB Rectifier

103

The values of the PI controllers can be found by using the mathematical expression

of transfer functions in control theory. In this control system, the open-loop transfer

function comprises of a small-signal transfer function, Gss, and the sampling delay, Tsm.

This sampling delay is caused by the limitation of sampling actions of the DSPs and

microcontrollers, which are to be utilised in order to implement the control scheme. The

closed-loop transfer function can be derived by combining the PI compensator transfer

function, HPI together with the open-loop transfer function, and is expressed as:

𝑇𝑐losed-loop = 𝐻𝑃𝐼 ∗ 𝑇𝑠𝑚 ∗ 𝐺s𝑠 (4.1)

Since the DSP and microcontroller devices have constraints on not permitting the

sampling frequency to be too high. For practical cases, sampling is typically allowed to be

twice per the modulation period. The sampling delay considered in deriving the closed-

loop transfer function of this controller can be roughly estimated using the switching

frequency fsw, by the following equation [294]:

T𝑠𝑚 = 𝑒− 𝑠

1

2𝑓𝑠𝑤 (4.2)

To ensure the control system is stable, the closed-loop transfer function requires

positive values for both the phase margin and the gain margin [301]. The gain margin is

defined as the magnitude at which the phase crosses -180o, whereas the phase margin is

determined at the cut-off frequency 𝑓𝑐𝑢𝑡, from the formula below [293]:

ph𝑎𝑠𝑒 𝑚𝑎𝑟𝑔𝑖𝑛 = 180° + ∠𝑇𝑐𝑙osed-loop (𝑗2𝜋𝑓𝑐𝑢𝑡) (4.3)

The cut-off frequency is the frequency where the magnitude of the loop gain crosses

0dB, so the magnitude is unity or 0 dB:

|𝑇 (𝑗2𝜋𝑓𝑐𝑢𝑡)| = 0 dB = 1 (4.4)

where T is the transfer function of the open-loop or the closed-loop.

The controller bandwidth depends primarily on the maximum cut-off frequency;

which equals half the switching frequency because of the sampling delay. The PI

compensator can be generally described in terms of the lag frequency, flag which should

104

have a value that is much lower than the cut-off frequency, 𝑓𝑐𝑢𝑡. The interference of the

integrator at the cut-off frequency can be avoided as follows:

H𝑃𝐼(𝑠) = H∞ ∗ (1 +2𝜋𝑓𝑙𝑎𝑔

𝑠) (4.5)

where H∞ is the gain at s ⸻> ∞.

The PI control compensator is commonly expressed in terms of the proportional

gain Kp and the integral gain Ki as follows:

H𝑃𝐼(𝑠) = H∞ (𝐾𝑝 +𝐾𝑖

𝑠) (4.6)

The magnitude value of the PI compensator can be calculated using equations (4.1)

and (4.4) from the following:

|H∞| = |1

𝑇𝑠𝑚(j2π𝑓𝑐𝑢𝑡)∗𝐺𝑠𝑠(j2π𝑓𝑐𝑢𝑡)∗(1+2𝜋𝑓𝑙𝑎𝑔

𝑠) | (4.7)

Then the PI-compensators of the controller can be constructed as:

H𝑃𝐼 = −sign∠T(j2π𝑓𝑐𝑢𝑡) ∗ H∞ ∗ (1 +2𝜋𝑓𝑙𝑎𝑔

𝑠) (4.8)

The negative sign of the transfer function of the open-loop is utilised as a correction

factor for the absolute values determined from Equation (4.7).

For voltage balance across all three phases, the MVDC-voltages are summed together and

then averaged to be compared to the desired reference value of the MVDC, VMVDC* which

is set to 2500 V DC. Voltage balancing is required to handle any imbalances that may occur

in the system due to device losses or negative sequence voltages. The PI controller

compensates for the error generated, and then the output value is fed to the inner current-

loop as a decoupled current control scheme shown in Figure 4.3, which includes interphase

balancing control to balance the average MVDC link voltages between the three phases.

Besides regulating the overall MVDC-link voltage, the power factor can be corrected.

Moreover, the PLL algorithm shown in Figure 4.1 is implemented to synchronise the

control signals with the grid phase angle, θg.

105

Figure 4.3: Decoupled Current Control Scheme for Three-Phase Single Cell of the CHB Rectifier

As can be seen from Figure 4.3, the Park transformation block converts the three-

phase signals into the d-q rotating reference frame as given by the following matrix:

[𝑑𝑞] =

2

3 [

𝑐𝑜𝑠(𝜃𝑔) 𝑐𝑜𝑠 (𝜃𝑔 −2𝜋

3) 𝑐𝑜𝑠(𝜃𝑔 +

2𝜋

3)

−𝑠𝑖𝑛(𝜃𝑔) −𝑠𝑖𝑛 (𝜃𝑔 −2𝜋

3) −𝑠𝑖𝑛(𝜃𝑔 +

2𝜋

3)] [

𝐴𝐵𝐶] (4.9)

where θg is the angle between the A and d axes for the q-axis alignment or the angle between

the A and d axes for the d-axis alignment, ω is the rotational speed of the d-q reference

frame, and t is the time, in s, from the initial alignment.

Figure 4.4 shows the alignment of the A-phase vector to the d-axis for a balanced ABC and

dq0 system where A, B, and C are the components of the three-phase system in the ABC

reference frame, d and q are the components of the two-axis system in the rotating reference

frame, and 0 is the zero component of the two-axis system in the stationary reference frame.

106

Figure 4.4: ABC and dq0 Frames with A-axis and the d-axis initially aligned

The PI controllers can easily control the signals within the d-q reference frame,

using the θg obtained from the PLL block, where the MVAC grid side voltage and current

measurements are transformed to the d-q reference frame. In the d-q reference frame, the

d component is utilised to control the active power flow, whereas and the q component

pertains to the reactive power flow. Combined with the sinusoidal phase-shifted PWM

carries as the selected modulation technique for this controller, setting the dq components’

parameters of the controller can also provide control for PFC aiming at a unity power

factor, which prevents any possible penalties incurred from the local grid utility for low

power factor. For G2V applications with unidirectional power flow, the q-axis current

command, Iq_MVAC*, is set zero. This corresponds to a unity power factor which also avoids

any related power loss. The decoupling factor, ωLCHB takes into consideration the MVAC

grid side L-filter inductance between the MVAC grid connection and the CHB rectifier

input. The d-axis voltage and q-axis voltage commands are generated to be transformed

back to the ABC reference frame by an inverse Park transformation block for the final

three-phase voltage commands.

107

To balance the average voltage across the 10 MVDC-link capacitors in each phase,

two levels of balancing control are implemented in this control. First, the three-phase

voltages are controlled by the interphase balancing control where an average MVDC

voltage between phases is obtained as already shown in Figure 4.3. Another balancing

control is the intraphase balancing, which is implemented to balance the voltages of each

H-bridge cell of the CHB rectifier within one phase. In order to achieve the desired control

objectives, voltage measurements of the 10 MVDC-link capacitor, MVAC grid side phase

voltages, and MVAC grid side phase currents are taken as feedback signals. Figure 4.5

provides the block diagram of the voltage balance scheme for the multi-level CHB in which

the voltage equalising among all CHB cells is realised. A voltage command is set to the

desired overall MVDC-link voltage, VMVDC* = 2500 V, which is to be compared with the

sum of all ten MVDC-link capacitors. The balancing control is selected to be a single PI

stage utilised as a voltage regulator. This control avoids any steady-state errors as compared

to the cascaded proportional controllers implemented in [302, 303] that use the average

MVDC-link voltage and active current, Id_MVAC, as integral action, which has been found

in this study susceptible to errors.

Figure 4.5: Voltage Balancing Control Scheme for the Multi-level CHB Rectifier

108

To achieve balance on the individual level of each CHB cell, active current is

distributed within each phase by adjusting the amount of time each H-bridge is active:

V𝑀𝑉𝐷𝐶_𝑖𝑛 =1

𝑛(𝑉𝑀𝑉𝐷𝐶_𝑖𝑛 + 𝑉𝑀𝑉𝐷𝐶_𝑖𝑛 + ⋯+ 𝑉𝑀𝑉𝐷𝐶_𝑖𝑛) 𝑓𝑜𝑟 𝑛 = 1… N𝐶𝐻𝐵 (4.10)

The average voltage at the MVDC-link of each phase is calculated by averaging the

MVDC-link voltages of the three phases:

V𝑀𝑉𝐷𝐶_𝑎𝑣𝑒𝑟𝑎𝑔𝑒 =1

3(𝑉𝑀𝑉𝐷𝐶_𝐴 + 𝑉𝑀𝑉𝐷𝐶_𝐵 + 𝑉𝑀𝑉𝐷𝐶_𝐶) (4.11)

where I is either phase A, B or C

To avoid conflicting controls, the intraphase balancing controller is purposely

under-tuned compared to the controller of the interphase balance. In this case, intraphase

is seen as the outer voltage loop, whereas the interphase balance is seen as the inner current

loop. For the interphase balancing control, the error signal is then fed to the PI controller

with a balancing signal that is multiplied by cos(θ), with θ being the phase obtained from

the PLL block. This is to align the individual PS-PWM modulation signals in phase or 180

out of phase with the summed voltage commands of the previous levels of control.

The PS-PWM carries-based modulation technique is implemented in the MVAC-

MVDC CHB rectification stage, to generate the gate signals for the CHB rectifier’s

MOSFETs as it is the most appropriate modulation scheme for cascaded multi-level

converters given the key advantages described in Table 2.7. The PS-SPWM method carries

are based on sine-triangle PWM which considers the number of CHB cells within a single

phase as can be seen from the modulation waveforms example of a single-phase CHB cells

shown in Figure 4.6 below. Each triangular carrier waveform is assigned for one CHB cell.

The PWM carrier waveforms operate at the selected CHB switching frequency but are

staggered in phase by 2π/NCHB. This interleaving of the PWM carrier waveforms generates

the “effective” switching frequency of 2NCHBfsw. To generate the gate signals for each

phase in unipolar modulation, the sinusoidal PWM signals are adjusted to be equal and

opposite signal to be superimposed on the PWM carrier waveforms. In the case of a voltage

imbalance within a phase, each CHB cell has its own modulation signal that varies in

109

magnitude. The resulting PWM modulation signal redirects the active current to or from

their respective capacitor at the MVDC-link. To handle any voltage imbalances, this same

procedure is then applied for the remaining two phases with the sinusoidal PWM

modulation signal being phase shifted by ±2π/3 and varied in magnitude [304, 305].

Figure 4.6: Carrier Signals of the CHB Cells for Phase-A based on Phase Shift Sinusoidal

Pulse Width Modulation (PS-SPWM)

The MVAC phase current can be adjusted by increasing or decreasing the

magnitude of the PS-PWM modulation signal without imposing any phase shift. This

approach is then applied for each of the other two phases B and C, by substituting θ with θ

– 2π/3 and θ + 2π/3, respectively. Since each phase acts as a single-phase CHB cell

operating under unipolar modulation technique, there is a significant second harmonic at

120 Hz, which can make the MVDC feedback signal appear sinusoidal, degrading the CHB

rectifier performance. The performance of the PI controller in a practical design can be

improved by applying a low-pass or notching filter to the feedback signals of each phase

[304, 305].

The transfer function for the outer voltage-loop of the CHB rectifier control can be

derived by developing a dynamic averaged model in order to approximate the original

110

system by averaging the effect of the fast-switching circuit while preserving the low-

frequency behaviour of the converter [293, 294]. The averaged model has to be linearised

around a quiescent operation point, in which the harmonics of the modulation or excitation

frequency are neglected. A small-signal model is then derived using the average model to

obtain the required transfer functions, which are then utilised to adjust the gains of the PI

controllers to obtain stability. This section deals with obtaining the small-signal model of

the CHB and its closed-loop current control using the three-phase dq transformation to

control the voltage at the MVDC-link of the SST system.

To construct an averaged switch model of the CHB rectifier, the switch network is

to be replaced with its averaged switch network in order to obtain a complete averaged

circuit of the converter. The switch network is comprised of one switch or more and diode

pairs, while its averaged switch model contains a controlled voltage and current source.

The average model removes the high-frequency components of the switching leaving only

the fundamental frequency. The switching function is averaged over one period and then

replaced with an averaged switch model with an operator, which can be expressed as [293,

297, 298]:

𝑑 = 1

𝑇𝑠∫ 𝑆(𝜏) 𝑑𝜏

𝑡+𝑇𝑠

𝑡 (4.12)

where d is the average switching function or the duty cycle, Ts is the fundamental period,

and S(τ) is the switching function.

The averaged model of a single H-Bridge cell in a single-phase circuit is shown in

Figure 4.4 where the H-Bridge switching devices are replaced with a controlled voltage

source on the MVAC grid side and a controlled current source on the MVDC-link side,

whereas the other power circuit components remain unchanged.

Using the averaging operator of Equation (4.12), the controlled voltage source and

controlled current source of the DAM, shown in Figure 4.7, are expressed by:

𝐕 𝑀𝑉𝐷𝐶 = (

1

𝑇𝑠∫ 𝑆(𝜏) 𝑑𝜏

𝑡+𝑇𝑠

𝑡) ∗ V𝑀𝑉𝐷𝐶 = 𝑑𝑉𝑀𝑉𝐷𝐶 (4.13)

𝐈 𝑀𝑉𝐷𝐶−𝐶𝐻𝐵 = (1

𝑇𝑠∫ 𝑆(𝜏) 𝑑𝜏

𝑡+𝑇𝑠

𝑡) ∗ I𝑀𝑉𝐴𝐶 = 𝑑𝐼𝑀𝑉𝐴𝐶 (4.14)

111

Figure 4.7: Averaged Model of a Single H-Bridge Cell of the CHB Rectifier in Single-Phase

The same approach can be applied for the CHB rectifier with multiple cells of NCHB,

where the averaging operator is applied for the voltage and current equations below for the

three-phase circuit of the CHB rectifier shown in Figure 4.8. The average voltage and

current equations are expressed as follows:

𝐕 𝐶𝐻𝐵−𝑖 = ∑ (d𝑖𝑛−𝐶𝐻𝐵

N𝐶𝐻𝐵

𝑛=1∗ V𝑖𝑛_𝑀𝑉𝐷𝐶

) (4.15)

𝐈 𝑖𝑛_𝑀𝑉𝐷𝐶−𝐶𝐻𝐵 = d𝑖𝑛−𝐶𝐻𝐵 ∗ I𝑀𝑉𝐴𝐶𝑖 𝑓𝑜𝑟 𝑛 = 1… N𝐶𝐻𝐵 (4.16)

where I is either phase A, B or C, 𝐕𝐶𝐻𝐵−𝑖 is the MVAC generated by phase I across the

CHB, V𝑖𝑛𝑀𝑉𝐷𝐶 is the voltage on the MVDC-link side of the nth H-bridge cell, din is the

average switching function for the nth H-bridge cell in phase I, and 𝐈𝑀𝑉𝐴𝐶𝑖 is the MVAC

current flowing from phase i.

112

Figure 4.8: Averaged Model of the Three-Phase Circuit of the CHB Rectifier with NCHB Cells

As can be seen from Figure 4.8, this model is still too complicated to derive the

controller transfer functions. In this case, the following assumptions are considered for

further simplifications:

1) The voltages of the MVDC-links of all CHB cells are the same:

𝐕𝑀𝑉𝐷𝐶 = V𝐴𝑛_𝑀𝑉𝐷𝐶 = V𝐵𝑛_𝑀𝑉𝐷𝐶 = V𝐶𝑛_𝑀𝑉𝐷𝐶 𝑓𝑜𝑟 𝑛 = 1… N𝐶𝐻𝐵 (4.17)

where VMVDC is the average voltage on the MVDC-link side of each cell of the CHB.

2) The load of each CHB cell is the same, thus the MVAC currents flowing

from all three phases are the same.

𝐑𝐿 = R𝐿−𝐴𝑛 = R𝐿−𝐵𝑛 = R𝐿−𝐶𝑛 𝑓𝑜𝑟 𝑛 = 1… N𝐶𝐻𝐵 (4.18)

|𝐈𝑀𝑉𝐴𝐶| = |𝐈𝑀𝑉𝐴𝐶_𝐴| = |𝐈𝑀𝑉𝐴𝐶_𝐵| = |𝐈𝑀𝑉𝐴𝐶_𝐶| 𝑓𝑜𝑟 𝑛 = 1… N𝐶𝐻𝐵 (4.19)

113

where RL is the load of each CHB cell, and |IMVAC| is the amplitude of the MVAC phase

current.

3) Since each voltage across the MVDC-link is assumed to be equal, the duty

cycles in the same phase are assumed to be all equal.

These assumptions allow the controlled voltage sources can be replaced with only

one controlled voltage source that is NCHB times the value of a single controlled voltage

source; therefore, the simplified averaged model is shown in Figure 4.9 below.

Figure 4.9: Simplified Averaged Model of the Three-Phase CHB Rectifier with NCHB Cells

To derive the transfer functions that are required to tune the CHB PI control system

compensator gains from the simplified averaged model shown in Figure 4.9, the small-

signal model is utilised by formulating the equations for the MVAC and MVDC side of the

CHB rectifier using Kirchhoff’s Voltage Law as follows:

114

N𝐶𝐻𝐵 ∗ 𝐕𝑀𝑉𝐷𝐶 ∗ [

𝐝𝐴−𝐶𝐻𝐵

𝐝𝐵−𝐶𝐻𝐵

𝐝𝐶−𝐶𝐻𝐵

] + 𝐋𝐶𝐻𝐵𝑑

𝑑𝑡 [

𝐈𝑀𝑉𝐴𝐶𝐴

𝐈𝑀𝑉𝐴𝐶𝐵

𝐈𝑀𝑉𝐴𝐶𝐶

] + 𝐑𝐶𝐻𝐵 [

𝐈𝑀𝑉𝐴𝐶𝐴

𝐈𝑀𝑉𝐴𝐶𝐵

𝐈𝑀𝑉𝐴𝐶𝐶

] + [

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝐴

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝐵

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝐶

] = 0 (4.20)

[𝐝𝐴𝑛−𝐶𝐻𝐵 𝐝𝐵𝑛−𝐶𝐻𝐵 𝐝𝐶𝑛−𝐶𝐻𝐵] [

𝐈𝑀𝑉𝐴𝐶𝐴

𝐈𝑀𝑉𝐴𝐶𝐵

𝐈𝑀𝑉𝐴𝐶𝐶

] − 𝟑𝐂𝑀𝑉𝐷𝐶𝑑

𝑑𝑡 𝐕𝑀𝑉𝐷𝐶 −

3

𝐑𝐿 𝐕𝑀𝑉𝐷𝐶 = 0 𝑓𝑜𝑟 𝑛 = 1…𝐍𝐶𝐻𝐵 (4.21)

Since the controller is based on PI compensators, Equations (4.20) and (4.21) are

to be rewritten in the dq-domain using the Park transformation [299] as follows:

N𝐶𝐻𝐵 ∗ 𝐕𝑀𝑉𝐷𝐶 ∗ [𝐝𝑑−𝐶𝐻𝐵

𝐝𝑞−𝐶𝐻𝐵] + 𝐋𝐶𝐻𝐵

𝑑

𝑑𝑡 [𝐈𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞

] − [0 𝐋𝐶𝐻𝐵ω𝑔

−𝐋𝐶𝐻𝐵ω𝑔 0] [

𝐈𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞

] + 𝐑𝐶𝐻𝐵 [𝐈𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞

] − (𝐕𝑀𝑉𝐴𝐶−𝑝ℎ_𝑑

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ_𝑑) (4.22)

[𝐝𝑑𝑛−𝐶𝐻𝐵 𝐝𝑞𝑛−𝐶𝐻𝐵] [𝐈𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞

] − 𝟑𝐂𝑀𝑉𝐷𝐶𝑑

𝑑𝑡 𝐕𝑀𝑉𝐷𝐶 −

3

𝐑𝐿 𝐕𝑀𝑉𝐷𝐶 = 0 𝑓𝑜𝑟 𝑛 = 1…𝐍𝐶𝐻𝐵 (4.23)

In order to construct the small-signal model, the time-varying signals of Equations

(4.22) and (4.23) are to be linearised around a quiescent operating point. This can be

achieved by giving the time-varying variable x a quiescent value X added with a

superimposed small perturbation ; that is 𝑥 = 𝑋 + , as to be applied to Equations (4.22)

and (4.23) as follows [293]:

N𝐶𝐻𝐵 ∗ (𝐕𝑀𝑉𝐷𝐶 + 𝑣𝑀𝑉𝐷𝐶) ∗ [𝐃𝑑−𝐶𝐻𝐵 + d𝑑−𝐶𝐻𝐵

𝐃𝑞−𝐶𝐻𝐵 + d𝑞−𝐶𝐻𝐵

] + 𝐋𝐶𝐻𝐵𝑑

𝑑𝑡 [𝐈𝑀𝑉𝐴𝐶𝑑

+ 𝑖𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞+ 𝑖𝑀𝑉𝐴𝐶𝑞

] − [0 𝐋𝐶𝐻𝐵ω𝑔

−𝐋𝐶𝐻𝐵ω𝑔 0] [

𝐈𝑀𝑉𝐴𝐶𝑑+ 𝑖𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞+ 𝑖𝑀𝑉𝐴𝐶𝑞

] +

𝐑𝐶𝐻𝐵 [𝐈𝑀𝑉𝐴𝐶𝑑

+ 𝑖𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞+ 𝑖𝑀𝑉𝐴𝐶𝑞

] − [𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝑑

+ 𝑣𝑀𝑉𝐴𝐶−𝑝ℎ𝑑

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝑑 + 𝑣𝑀𝑉𝐴𝐶−𝑝ℎ𝑑 ] = 0 (4.24)

[𝐃𝑑−𝐶𝐻𝐵 + d𝑑−𝐶𝐻𝐵 𝐃𝑞−𝐶𝐻𝐵 + d𝑞−𝐶𝐻𝐵] [𝐈𝑀𝑉𝐴𝐶𝑑

+ 𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞+ 𝑀𝑉𝐴𝐶𝑞

] − 𝟑𝐂𝑀𝑉𝐷𝐶𝑑

𝑑𝑡 (𝐕𝑀𝑉𝐷𝐶 + 𝑀𝑉𝐷𝐶) −

3

𝐑𝐿(𝐕𝑀𝑉𝐷𝐶 + 𝑀𝑉𝐷𝐶) = 0

(4.25)

The quiescent value of the duty cycle for a given current can be found by

considering only the DC terms of Equation (4.24). This yields to the equation below, which

will be utilised for the decoupling between the dq0-frame:

[𝐃𝑑−𝐶𝐻𝐵

𝐃𝑞−𝐶𝐻𝐵] = −

𝐑𝐶𝐻𝐵−[0 𝐋𝐶𝐻𝐵ω𝑔

−𝐋𝐶𝐻𝐵ω𝑔 0][

𝐈𝑀𝑉𝐴𝐶𝑑

𝐈𝑀𝑉𝐴𝐶𝑞]+ [

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝑑

𝐕𝑀𝑉𝐴𝐶−𝑝ℎ𝑑

]

𝐍𝐶𝐻𝐵 ∗ 𝐕𝑀𝑉𝐷𝐶

(4.26)

115

The small-signal model can be formed by using the first-order AC terms of

Equations (4.24) and (4.25) and neglecting the second-order terms. Using Laplace

transform domain with the operator s Equations (4.24) and (4.25) are expressed as below:

N𝐶𝐻𝐵(𝐕𝑀𝑉𝐷𝐶 ∗ d𝑑−𝐶𝐻𝐵) + N𝐶𝐻𝐵(𝑀𝑉𝐷𝐶 ∗ 𝐃𝑑−𝐶𝐻𝐵) + (𝐬𝐋𝐶𝐻𝐵 + 𝐑𝐶𝐻𝐵) ∗ 𝑀𝑉𝐴𝐶_𝑑 – (𝐋𝐶𝐻𝐵ω𝑔 ∗ 𝑀𝑉𝐴𝐶𝑞) − 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑑 = 0 (4.27)

N𝐶𝐻𝐵(𝐕𝑀𝑉𝐷𝐶 ∗ d𝑞−𝐶𝐻𝐵) + N𝐶𝐻𝐵(𝑀𝑉𝐷𝐶 ∗ 𝐃𝑞−𝐶𝐻𝐵) + (𝐬𝐋𝐶𝐻𝐵 + 𝐑𝐶𝐻𝐵) ∗ 𝑀𝑉𝐴𝐶_𝑞 – (𝐋𝐶𝐻𝐵ω𝑔 ∗ 𝑀𝑉𝐴𝐶𝑑) − 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑞 = 0 (4.28)

(𝐃𝑑−𝐶𝐻𝐵 ∗ 𝑀𝑉𝐴𝐶𝑑) + (d𝑑−𝐶𝐻𝐵 ∗ 𝐈𝑀𝑉𝐴𝐶_𝑑) + (𝐃𝑞−𝐶𝐻𝐵 ∗ 𝑀𝑉𝐴𝐶𝑞

) + ( d𝑞−𝐶𝐻𝐵 ∗ 𝐈𝑀𝑉𝐴𝐶𝑞 ) − (𝟑𝐂𝑀𝑉𝐷𝐶 +

3

𝐑𝐿)𝑀𝑉𝐷𝐶 = 0

(4.29)

The control-to-output current transfer function for the d-frame of the current

decoupled controller can be derived from Equations (4.27–4.29) by keeping only the

variables that are of interest and setting all other AC variations to zero as follows:

G𝐼𝑑𝑑−𝐶𝐻𝐵 =𝑀𝑉𝐴𝐶_𝑑

d𝑑−𝐶𝐻𝐵 (4.30)

by applying these conditions: d𝑞−𝐶𝐻𝐵 = 𝑀𝑉𝐷𝐶 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑑 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑞 = 0 , Equation (4.27)

becomes:

N𝐶𝐻𝐵(𝐕𝑀𝑉𝐷𝐶 ∗ d𝑑−𝐶𝐻𝐵) + (𝐬𝐋𝐶𝐻𝐵 + 𝐑𝐶𝐻𝐵) ∗ 𝑀𝑉𝐴𝐶_𝑑 – (𝐋𝐶𝐻𝐵ω𝑔 ∗ 𝑀𝑉𝐴𝐶𝑞) = 0 (4.31)

The transfer function of the control-to-output-current for the d-frame is then

expressed by using Equations (4.29–4.31) as follows:

G𝐼𝑑𝑑−𝐶𝐻𝐵 =𝑀𝑉𝐴𝐶_𝑑

d𝑑−𝐶𝐻𝐵= −

(N𝐶𝐻𝐵∗𝐕𝑀𝑉𝐷𝐶)∗(𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵)

(𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵)2+ (ω𝑔2∗L𝐶𝐻𝐵

2) (4.32)

The transfer function for the control-to-output-current in the q-frame is the same of

that in the d-frame and has the same final equation shown below:

G𝐼𝑑𝑞−𝐶𝐻𝐵 =𝑀𝑉𝐴𝐶_𝑞

d𝑞−𝐶𝐻𝐵= −

(N𝐶𝐻𝐵∗𝐕𝑀𝑉𝐷𝐶)∗(𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵)

(𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵)2+ (ω𝑔2∗L𝐶𝐻𝐵

2) (4.33)

where d𝑑−𝐶𝐻𝐵 = 𝑀𝑉𝐷𝐶 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑑 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑞 = 0

The transfer function for the output-current-to-voltage of the MVDC-link can be

derived from (4.29) by setting the AC variation of the duty cycle and MVAC grid voltage

in the dq-frame to zero as well as removing the load RL:

116

G𝑉𝐼𝑑−𝐶𝐻𝐵 =𝑀𝑉𝐷𝐶

𝑀𝑉𝐴𝐶_𝑑 (4.34)

by applying these conditions: d𝑑−𝐶𝐻𝐵 = d𝑞−𝐶𝐻𝐵 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑑 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑞 = 0, Equation (4.29)

becomes:

(𝐃𝑑−𝐶𝐻𝐵 ∗ 𝑀𝑉𝐴𝐶_𝑑) + (𝐃𝑞−𝐶𝐻𝐵 ∗ 𝑀𝑉𝐴𝐶_𝑞 ) − (𝟑𝐬𝐂𝑀𝑉𝐷𝐶 ∗ 𝑀𝑉𝐷𝐶) = 0 (4.35)

Also, by applying these conditions: d𝑑−𝐶𝐻𝐵 = d𝑞−𝐶𝐻𝐵 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑑 = 𝑀𝑉𝐴𝐶−𝑝ℎ−𝑞 = 0, to Equation

(4.27) to find the value of 𝑀𝑉𝐴𝐶_𝑞:

𝑖𝑀𝑉𝐴𝐶_𝑞 = −L𝐶𝐻𝐵 ∗ ω𝑔

𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵∗ (𝑖𝑀𝑉𝐴𝐶𝑑

) − 𝐍𝐶𝐻𝐵∗ 𝐃𝑞−𝐶𝐻𝐵

𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵∗ (𝑀𝑉𝐷𝐶) (4.36)

The final transfer function for the output-current-to-voltage of the MVDC-link controller

can be expressed by using Equations (4.30–4.31) as follows:

G𝑉𝐼𝑑−𝐶𝐻𝐵 =𝑀𝑉𝐷𝐶

𝑀𝑉𝐴𝐶_𝑑 =

(𝐃𝑑−𝐶𝐻𝐵

) ∗(𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵) – (𝐃𝑞−𝐶𝐻𝐵

∗ L𝐶𝐻𝐵∗ ω𝑔)

𝐍𝐶𝐻𝐵 ∗ ((𝐃𝑞−𝐶𝐻𝐵

))2+ 3𝐬𝐂𝑀𝑉𝐷𝐶 (𝐬𝐋𝐶𝐻𝐵+𝐑𝐶𝐻𝐵)

(4.37)

When controlling the current flowing from the MVAC grid to the desired value by

the CHB rectifier cells, the voltage at the MVDC-link VDAB1 is controlled by the DAB

converter modules and therefore is assumed to be constant. The three-phase MVAC grid

current flowing through the L-filter inductor LCHB of each phase is measured and

transformed to the dq-frame using the Park transform block which converts the time-

domain current components of ABC reference frame to direct, quadrature, and zero (dq0)

components in a rotating reference frame. This modelling block can also preserve the active

and reactive powers with the SST powers in the abc reference frame by implementing an

invariant version of the Park transform. For a balanced system, the zero component is equal

to zero. The dq0 current values are then compared with the desired dq0-value which are

predefined in this model and are shown with an asterisk. The error signal is fed to the PI

controller, which has compensators that are properly selected using the transfer functions

derived from the averaged models described above. The desired current value can be

generated at ideally zero error, or a very small error is sufficient for that [293, 295].

The closed-loop transfer functions for the single-level CHB currents by taking into

account the sampling delay can be found from:

117

T𝑠𝑚−𝐶𝐻𝐵−1𝑛 = 𝑒− 𝑠

1

2𝑓𝐶𝐻𝐵 (4.38)

𝑇Idd-CHB-1n = 𝐻 Idd-CHB-1n ∗ 𝑇𝑠𝑚-CHB-1n ∗ 𝐺 Idd-CHB (4.39)

𝑇Idq-CHB-1n = 𝐻 Idq-CHB-1n ∗ 𝑇𝑠𝑚-CHB-1n ∗ 𝐺 Idq-CHB (4.40)

For each H-Bridge cell, the theoretical cut-off frequency fcut is at half the switching

frequency fCHB; but the achievable fcut is much lower due to the sampling delay.

The current-loop, shown in Figure 4.2, serves as an intermediate step between the

voltage-loop and the duty cycle, and therefore its closed-loop transfer function from

equation (4.39) has to be added to that of the voltage-loop, to Equation (4.41) below. To

avoid any interference between the inner-current-loop as a result of the operation of the

outer-voltage-loop, the fcut for the PI compensator of the outer-voltage-loop is selected to

be nearly 1/10th of the fcut of the inner-current-loop.

T𝑉𝐼𝑑−𝐶𝐻𝐵−1𝑁 = H𝑉𝐼𝑑−𝐶𝐻𝐵−1𝑁 ∗ G𝑉𝐼𝑑−𝐶𝐻𝐵 ∗ T𝐼𝑑𝑑−𝐶𝐻𝐵−1𝑛

T𝐼𝑑𝑑−𝐶𝐻𝐵−1𝑛+1 (4.41)

4.3 Control and Modulation for the MVAC-LVDC Conversion Stage

Since the DAB modules are connected between the CHB cells in series and the EV

battery in parallel, voltage control is required to maintain the VMVDC and VLVDC as constant

to their rated value as possible. The voltage which is controlled by the DAB is determined

by the mode it is operating in. Depending on the SST operation, the DAB is responsible

for keeping the VLVDC at a constant value when operating in G2V charging, or the DAB

would be responsible for keeping the VMVDC constant when the SST operates in V2G. The

focus of this section would be on the G2V operation where the DAB controller should be

primarily controlling the VLVDC.

The closed-loop current-mode control scheme with an inner current-loop and an

outer-voltage-loop implemented for the DAB converter is shown in Figure 4.10 below.

118

Figure 4.10: Current-Mode Closed-Loop Feedback Controller for the DAB Converter

Using the same approach utilised to derive the DAM of the CHB rectifier in Section

4.2, the dynamic averaged model of a single module of the DAB converter is shown in

Figure 4.11 below. However, since the DAB is to be operated in high frequency, using this

model results in increased computational time for a long period of simulating multi-kHz

waveforms. For system-level dynamic simulations, the currents and voltages of the HFT

are of less importance to be considered compared to other SST system waveforms. In this

case, only the input and output voltages of the DAB converter are considered in deriving a

mathematical averaged model in order to speed up the simulations. Assuming the DAB

converter is lossless, the relationship between the primary and secondary powers as the

input and output parameters can be determined by the power balance as follows:

𝑃DAB1 = 𝑃DAB2 ⇔ VMVDC I𝐷𝐴𝐵1 = VLVDC I𝐷𝐴𝐵2 (4.42)

Where PDAB1 is the input power to the DAB supplied from the CHB side through

the MVDC-link, which can be calculated using [300]:

𝑃DAB1 =n𝐻𝐹𝑇 ∗ 𝑉𝑀𝑉𝐷𝐶 ∗ 𝑉𝐿𝑉𝐷𝐶

2 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝐿𝐷𝐴𝐵 ∗ d𝐷𝐴𝐵 (1 – d𝐷𝐴𝐵) (4.43)

where dDAB is the duty cycle of the DAB, and PDAB2 is the output power of the DAB

to be transferred to the EV battery side through the LVDC-link.

The input and output currents of the DAB can be found from Equation (4.42) and

(4.43) as follows:

IDAB1 =n𝐻𝐹𝑇 ∗ 𝑉𝐿𝑉𝐷𝐶

2 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝐿𝐷𝐴𝐵 ∗ d𝐷𝐴𝐵 (1 – d𝐷𝐴𝐵) (4.44)

119

IDAB2 =n𝐻𝐹𝑇 ∗ 𝑉𝑀𝑉𝐷𝐶

2 ∗ 𝑓𝐷𝐴𝐵 ∗ 𝐿𝐷𝐴𝐵 ∗ d𝐷𝐴𝐵 (1 – d𝐷𝐴𝐵) (4.45)

Since the values of the input current flowing to the DAB and the output current

flowing out of the DAB are linked to the opposite side of the HFT by means of the voltage

value, an averaged model using these two equations is shown in Figure 4.11.

As can be seen from Figure 4.11, this model does not contain enough parameters

to construct a small-signal model to derive the transfer functions. The state-space averaging

is an alternative approach to deriving the small-signal model of the DAB converter, which

can be derived as linear combination independent inputs. In this state-space, the physical

state of the DAB energy storage elements, such as capacitor voltages and inductor currents

are described. The description of state-space is the first step to construct the state-space

averaged model such that each switching interval is derived and multiplied with the duty

cycle for that interval [293].

When the SST system operates in G2V for charging the EV battery, the DAB

behaves as a buck converter where the power flows from the MVDC side to the LVDC

side. Figure 4.12 shows the HFT voltage waveforms of the HFT of the DAB module.

Figure 4.11: Dynamic Averaged Model of a Single Module of the DAB Converter

120

Figure 4.12: Voltage Waveforms of the DAB HFT with the Operation States of MOSFETs

Figure 4.13 below shows the equivalent circuit of the DAB model shown in Figure

4.11 during t0 with the parameters transferred to the secondary side of the HFT. For period

t1, the equivalent circuit diagram of the DAB model is shown in Figure 4.14.

Figure 4.13: Equivalent Circuit of the Dynamic Averaged Model of the DAB Module for period t0

121

Figure 4.14: Equivalent Circuit of the Dynamic Averaged Model of the DAB Module for period t1

where LDAB’’ = LDAB/ ηHFT 2 and RDAB’’ = RDAB/ ηHFT 2

For analysis, further simplifications of Figures 4.13 and 4.14 by reducing the

circuits to simplified circuits as shown in Figure 4.15 and Figure 4.16 below. Since the

voltage waveforms in the transformer are symmetrical, only one-half of the waveform is

considered for the analysis.

Figure 4.15: Simplified Circuit Diagram of Figure 4.13

Figure 4.16: Simplified Circuit Diagram of Figure 4.14

122

where LDAB is the HFT leakage inductance, and CLVDC is the capacitor placed at the

LVDC-link, both elements act as energy storage.

From Figure 4.15 and Figure 4.16, Kirchhoff’s voltage and current laws are applied

to derive the mathematical equations of each circuit parameters as follows:

−𝑉𝐷𝐴𝐵1_𝐴𝐶

n𝐻𝐹𝑇 + 𝐿𝐷𝐴𝐵

′′ 𝑑

𝑑𝑡 (𝐼𝐷𝐴𝐵2) + 𝑅𝐷𝐴𝐵

′′ 𝐼𝐷𝐴𝐵2 − 𝑉𝐿𝑉𝐷𝐶 = 0 (4.46)

𝐶𝐿𝑉𝐷𝐶𝑑

𝑑𝑡(𝑉𝐿𝑉𝐷𝐶) +

𝑉𝐿𝑉𝐷𝐶

R𝐿2 + 𝐼𝐷𝐴𝐵2 = 0 (4.47)

−𝑉𝐷𝐴𝐵1_𝐴𝐶

n𝐻𝐹𝑇 + 𝐿𝐷𝐴𝐵

′′ 𝑑

𝑑𝑡 (𝐼𝐷𝐴𝐵2) + 𝑅𝐷𝐴𝐵

′′ 𝐼𝐷𝐴𝐵2 + 𝑉𝐿𝑉𝐷𝐶 = 0 (4.48)

𝐶𝐿𝑉𝐷𝐶𝑑

𝑑𝑡(𝑉𝐿𝑉𝐷𝐶) +

𝑉𝐿𝑉𝐷𝐶

R𝐿2 − 𝐼𝐷𝐴𝐵2 = 0 (4.49)

The state-space variables for the current IDAB2 flowing through the inductance LDAB

and the capacitor voltage VLVDC over CLVDC are expressed as:

𝑑

𝑑𝑡𝑥 = 𝐀1𝑥 + 𝐁1𝑢 ⇔ d

dt [𝐼𝐿𝑉𝐷𝐶𝑉𝐿𝑉𝐷𝐶

] =

[

−𝑅𝐷𝐴𝐵

′′

𝐿𝐷𝐴𝐵′′

1

𝐿𝐷𝐴𝐵′′

−1

𝐶𝐿𝑉𝐷𝐶 −

1𝑅𝐿2𝐶𝐿𝑉𝐷𝐶]

[𝐼𝐿𝑉𝐷𝐶𝑉𝐿𝑉𝐷𝐶

] + [

1

n𝐻𝐹𝑇𝐿𝐷𝐴𝐵′′

0]𝑉𝐷𝐴𝐵1_𝐴𝐶

(4.50)

𝑑

𝑑𝑡𝑥 = 𝐀2𝑥 + 𝐁2𝑢 ⇔ d

dt [𝐼𝐿𝑉𝐷𝐶𝑉𝐿𝑉𝐷𝐶

] =

[ −

𝑅𝐷𝐴𝐵′′

𝐿𝐷𝐴𝐵′′

− 1

𝐿𝐷𝐴𝐵′′

1𝐶𝐿𝑉𝐷𝐶

−1

𝑅𝐿2𝐶𝐿𝑉𝐷𝐶]

[𝐼𝐿𝑉𝐷𝐶𝑉𝐿𝑉𝐷𝐶

] + [

1

n𝐻𝐹𝑇𝐿𝐷𝐴𝐵′′

0]𝑉𝐷𝐴𝐵1_𝐴𝐶

(4.51)

Equations (4.50) and (4.51) are the state-space equation for Figures 4.15 and 4.16,

respectively. The small-signal model for the DAB converter can be derived by substituting

these two equations in the general formula given by [293] as:

𝑠 = 𝐴 + 𝐵 + (𝐴1 – 𝐴2) 𝑋 + (𝐵1 – 𝐵2 )𝑈 (4.52)

where is the small AC variation of the state-space variables, is the small AC

variation of the independent variables, X is the quiescent value of the state-space variables,

U is the quiescent value of the independent variables, 𝑑 is the small AC variation of the

duty cycle. Also, by simplifying Equations (4.50) and (4.51), a matrix is utilised to

formulate A1, A2, B1, and B2 to be substituted in Equation (4.52) as follows [293]:

123

𝐴 = D𝐷𝐴𝐵A1 + (1 − D𝐷𝐴𝐵) A2 ⇔ 𝐴 =

[

−𝑅𝐷𝐴𝐵

′′

𝐿𝐷𝐴𝐵′′

2𝐷𝐷𝐴𝐵−1

𝐿𝐷𝐴𝐵′′

−2𝐷𝐷𝐴𝐵+1

𝐶𝐿𝑉𝐷𝐶 −

1𝑅𝐿2𝐶𝐿𝑉𝐷𝐶]

(4.53)

𝐵 = D𝐷𝐴𝐵B1 + (1 − D𝐷𝐴𝐵) B2 ⇔ 𝐵 = [

1

n𝐻𝐹𝑇𝐿𝐷𝐴𝐵′′

0] (4.54)

where DDAB is the quiescent value of the duty cycle. The small-signal model for the

DAB operating as a buck converter can be derived from Equations (4.50-4.54) which

results in:

𝑆 [𝑖𝐿𝑉𝐷𝐶

𝐿𝑉𝐷𝐶] =

[

−𝑅𝐷𝐴𝐵

′′

𝐿𝐷𝐴𝐵′′

2𝐷𝐷𝐴𝐵−1

𝐿𝐷𝐴𝐵′′

−2𝐷𝐷𝐴𝐵+1

𝐶𝐿𝑉𝐷𝐶 −

1𝑅𝐿2𝐶𝐿𝑉𝐷𝐶]

[𝑖𝐿𝑉𝐷𝐶

𝐿𝑉𝐷𝐶] + [

1

n𝐻𝐹𝑇𝐿𝐷𝐴𝐵′′

0] 𝐷𝐴𝐵1_𝐴𝐶 +

[ 2V𝐿𝑉𝐷𝐶

𝐿𝐷𝐴𝐵′′

−2I𝐿𝑉𝐷𝐶𝐶𝐿𝑉𝐷𝐶 ]

𝑑𝐷𝐴𝐵 (4.55)

For deriving the transfer functions, Equation (4.55) expressed by line-by-line

equations yields:

𝑆𝑖𝐿𝑉𝐷𝐶 = −𝑅𝐷𝐴𝐵

′′

𝐿𝐷𝐴𝐵′′

𝑖𝐿𝑉𝐷𝐶 + 2𝐷𝐷𝐴𝐵−1

𝐿𝐷𝐴𝐵′′

𝐿𝑉𝐷𝐶 + 1

n𝐻𝐹𝑇𝐿𝐷𝐴𝐵′′

𝐷𝐴𝐵1_𝐴𝐶 + 2V𝐿𝑉𝐷𝐶

𝐿𝐷𝐴𝐵′′

𝑑𝐷𝐴𝐵 (4.56)

𝑆𝐿𝑉𝐷𝐶 = −2𝐷𝐷𝐴𝐵+1

𝐶𝐿𝑉𝐷𝐶 𝑖𝐿𝑉𝐷𝐶 −

1𝑅𝐿2𝐶𝐿𝑉𝐷𝐶

𝐿𝑉𝐷𝐶 − 2I𝐿𝑉𝐷𝐶𝐶𝐿𝑉𝐷𝐶

𝑑𝐷𝐴𝐵 (4.57)

Using Equations (4.59) and (4.57), the two transfer functions required to tune the

PI compensators of the DAB controller are as follows:

G𝐼𝑑−𝐷𝐴𝐵 = 𝐿𝑉𝐷𝐶

𝐷𝐴𝐵=

2V𝐿𝑉𝐷𝐶

(s𝐿𝐷𝐴𝐵′′ +𝑅𝐷𝐴𝐵

′′ )=

2V𝐿𝑉𝐷𝐶

n𝐻𝐹𝑇−2 (sL𝐷𝐴𝐵+R𝐷𝐴𝐵)

(4.57)

G𝑉𝐼−𝐷𝐴𝐵 = 𝐿𝑉𝐷𝐶

𝑖𝐿𝑉𝐷𝐶=

R𝐿2(−2𝐷𝐷𝐴𝐵+1)

(sR𝐿2∗C𝐿𝑉𝐷𝐶)+1 (4.57)

where G𝐼𝑑−𝐷𝐴𝐵 is the transfer functions of the control-to-output-current, with the

condition: 𝐿𝑉𝐷𝐶= 𝐷𝐴𝐵1_𝐴𝐶 = 0

and G𝑉𝐼−𝐷𝐴𝐵 is the transfer function of the output-current-to-LVDC-link-voltage,

with the condition: 𝑑𝐷𝐴𝐵=𝐷𝐴𝐵1_𝐴𝐶 = 0

124

There are different modulation techniques for the DAB presented in the literature,

where each of these techniques has a certain operating range of input voltage, output

voltage, and load in which the DAB converter results in the lowest losses. As the DAB

MVDC-LVDC conversion stage expects to receive a constant input voltage from the

MVAC-LVDC CHB rectification stage via the MVDC-link, each of the DAB modules is

expected to deliver a constant output voltage at the LVDC-link. This results in the DAB

operating at a constant input-output voltage ratio. The load of the DAB, which is in this

research study the EV battery, is the only operating parameter that changes depending on

the specifications of charging voltage and the C-rate at which the EV battery is being

charged. The three main modulation techniques applicable for the DAB converter

mentioned in [306-308] are the followings:

• Phase Shift (Rectangular) Modulation:

This modulation technique works by switching the primary and the secondary side

at a fixed duty cycle of 50%. Then, the angle between the primary and secondary switching

waveforms is adjusted to control the power transfer between both sides.

• Trapezoidal Modulation:

This technique includes a blanking time added to the primary switching voltage to

reduce the turn-off switching losses. This approach causes half the number of switches

(four switches) to switch off under zero-voltage conditions. Nevertheless, a higher RMS

current is required for adding this blanking time in order to transfer the same amount of

power, which leads to reduced efficiency in the DAB, due to higher conduction losses

across the switches [306-308].

• Triangular Modulation:

This technique is a special case of trapezoidal modulation, which utilises the phase

shift or blanking time to cause one edge of the switching voltage at the primary to overlap

with the secondary switching voltage. This results in a triangular current, with two switches

only turning off under non-zero-voltage conditions. While this technique allows for further

reduction of the turn-off losses, the larger current peak increases the conduction losses

[306-308].

125

Table 4.1 briefly compares the main advantages and disadvantages of these

modulation techniques. As can be seen from Table 4.1, the advantages of the phase shift

rectangular modulation technique outweigh the higher turn-off losses encountered by this

technique. Besides the simple implementation and lower RMS currents result in lower

component ratings, the phase shift rectangular modulation technique is selected for the

DAB converter control to achieve the highest power possible while sharing the losses

symmetrically on all switches of the DAB.

Table 4.1: Comparison of Modulation Techniques for the DAB Converter [306-308]

Modulation

Technique

Advantages Drawbacks

Phase Shift

(Rectangular)

• Simple algorithm

• Has the highest power transfer

possible compared to the other

two modulation techniques due to

the RMS circuit current which are

the lowest.

• Symmetrical share of the losses

on all switches

• ZVS during turn-on of the

switches

• Requires eight commutations.

• Negative current on the DC side reduces

power transfer, this results in lower

efficiency.

• High losses at low power levels are

caused by reactive power when no active

power is transferred.

• Turning off the switches occurs under

non-zero-voltage conditions, which yields

in switching losses.

Trapezoidal • Higher voltage range

• Lower switching losses

• Complicated algorithm.

• Higher conduction losses

• Unable to operate under no-load

conditions.

• Unsymmetrical losses if the primary

voltage differs from the secondary

voltage.

Triangular • Lowest switching losses

compared to the other two

techniques.

• Suitable when the primary and

secondary voltage ratios are

different from the HFT turns-ratio

• Complicated algorithm

• Switching losses occur in the same two

switches.

• Inefficient utilisation of the period for

power transfer.

• Highest RMS current compared to the

other two techniques.

126

Figure 4.17: Waveforms of DAB Operation with the Rectangular Phase Shift Modulation Technique

4.4 EV Battery Controller

Since the DAB converter interfaces directly with the EV battery to provide charging

voltage and current as predefined by the EV’s BMS, there are three control techniques that

this DAB can deliver charging power to the EV battery, namely: Constant Current (CC),

Constant Voltage (CV), and Constant Current Constant Voltage (CCCV). Since the CC

and CV techniques require the charger to supply a current/voltage level as specified by the

BMS throughout the charging process with protection against overvoltage or overcurrent

for the EV battery, the most viable solution for this application is to implement the CCCV

approach. Besides allowing for overvoltage and overcurrent protection, the CCCV process

is achieved by employing CC charging during the initial charging phase to protect against

overcurrent, especially in typical ultra-fast charging cases where a large amount of

charging current is required. Until the EV battery’s SoC reaches a predefined level,

normally 80% or 90% maximum, it switches to CV charging to protect the EV battery

against overvoltage. This process also allows the charging current to decrease

exponentially [309]. Figure 4.18 shows the typical current and voltage profiles for the

charging process with the CCCV control.

127

Figure 4.18: Waveforms of the Charging Profiles using CCCV Method for the EV Battery

Another ultra-fast charging technique proposed by [310] used to increase the charge

acceptance and provide a more accurate SOC estimation, the EV battery can also be

charged with current pulses that can be negative discharging and/or with variable frequency

However, since this research area is still not confirmed whether this pulse charging is

actually beneficial for EV batteries, thus, it is not adopted in this thesis.

The CCCV technique is implemented in the controller of the DAB which aims to

provide a constant output current and provide a constant output voltage as requested by the

BMS of the EV battery, while also allowing a seamless transition between CC mode and

CV mode as requested by the BMS of the EV battery. This controller is assumed to be

insensitive to other variables of the EV battery which is satisfied by assuming the LVDC

voltage as the output voltage for the DAB is relatively constant at all times during operation

under normal grid conditions. This controller utilises a cascaded control structure where

the inner-current-loop and outer-voltage-loop for controlling the charging current and

charging voltage, respectively. This structure is explained in detail in section 4.3.

In practice, the purpose of the voltage control in the CCCV charging process is to

hold the output voltage constant immediately before the mode transition; therefore, it is not

necessary to move to another voltage set-point. In MATLAB/Simulink, this can be simply

128

achieved by adding an SHBs to each of the controllers of the DAB modules, which is also

initiated by the mode switching signal. It should be noted that employing a feed-forward

technique could improve the performance of CCCV controller hardware, by alleviating the

stress on the voltage controller. In addition, the feed-forward component term is a constant

input DC bias, need not be considered in the design process because it does not affect the

performance of the PI compensators of the controller and, which is another big advantage

of this mechanism.

4.5 Summary

This chapter described in detail the control strategies and modulation techniques

that were implemented for the proposed SST for the UFCSEV system. For both the CHB

rectification stage and DAB conversion stage, closed-loop feedback controllers are

employed based on the current-mode scheme which has an inner-current-loop and an outer-

voltage-loop.

Voltage balancing schemes for the CHB rectifier were implemented in order to

balance the voltages across the capacitors of each CHB cell in the MVDC-link side. This

scheme prevents any uneven DC voltages in the CHB in this controller. Most importantly

voltage balances for the three phases of the multi-cell CHB are implemented by taking into

account the phase angle difference between phases A, B, and C using the phase angle signal

data from PLL block, which is utilised for grid monitoring. This balancing scheme is of

most importance to ensure an evenly distributed power among all the CHB cells while

preventing any possible damage to the power circuit components caused by voltage

unbalance. Phase shift PWM based on sinusoidal, and triangle carrier signals are selected

for switching the power MOSFETs while also considering the number of CHB cells within

a single phase.

For the DAB MVDC-LVDC conversion stage, each DAB module is controlled by

adjusting the duty cycle calculated from the predefined reference values of the output

129

voltage and current at the LVDC-link, which can be monitored by the BMS of the EV

battery to specify the required charging voltage level and current rate. The CCCV charging

protocol is employed in this control scheme by assuming the MVDC-link voltages as the

input of the DAB constant during the whole operation and the turns-ratio of the HFT is also

assumed constant. The rectangular phase shift modulation technique was implemented for

the DAB converter in order to ensure ZVC during the turn-on period of the power

MOSFETs.

Dynamic averaged modelling with small-signal and state-space averaging were

derived in order to derive the open-loop and closed-loop transfer functions. This approach

is implemented to determine the PI compensator gains of the controllers of the MVAC-

MVDC CHB cells as well as the MVDC-LVDC DAB modules.

130

Chapter.5 Results and Analysis

This chapter presents the parameters’ values of the power circuits components of

the SST system. Further analysis on the parameters’ selections based on standardised sizes

as well as rough cost estimations of the power components is also delineated based on off-

the-shelf power components.

Simulation results of the voltages, currents, and powers of the UFCSEV system in

an ideal grid condition are also presented. Various disturbances in the MVAC grid side are

implemented to investigate the SST behaviour as well using MIL real-time simulation.

5.1 Design Parameters of the SST System and Cost Estimations

5.1.1 UFCSEV System Specifications

As specified in the first section of Chapter 3, the specifications of the ultra-fast

charging system for the design of the SST-based high power conversion system are

summarised in Table 5.1 below.

Table 5.1: UFCSEV System Specifications

Parameter Name Symbol Value

Rated Charging Power Pcharging_rated 1.5 MW

MVAC Grid Voltage (Line-Line_RMS) VMVAC_LL 27.6 kV

Nominal Grid Frequency fg 60 Hz

Maximum DC Charging Voltage VDC_charging-max 1000 V

131

5.1.2 CHB Parameters

The power switching devices available in the market as discrete components have

blocking voltage ratings of 600, 750, 1200, 1700, and 3300 V based on IGBT and MOSFET

switching devices with anti-parallel diodes. Since selecting a large number of H-Bridge

cells increases the control complexity and total cost of the CHB rectifier, a low number of

cells is desired. The chosen values of the number of H-Bridge cells and the voltage range

of the MVDC-link are highlighted in Table 5.5 below.

Table 5.2: Switching Devices’ Ratings, Number of CHB Cells, and MVDC Voltages

Rated

Voltage

(Vswitch-rated)

Number of

CHB Cells per

Phase (NCHB)

Minimum Voltage at

the MVDC-Link

(VMVDC-min)

Maximum Voltage

at the MVDC-Link

(VMVDC-max)

600 V 52 456.18 V 457.14 V

750 V 42 564.79 V 571.43 V

1200 V 26 912.36 V 914.29 V

1700 V 19 1248.49 V 1295.24 V

3300 V 10 2372.14 V 2514.29 V

Since 3300 V of blocking voltage results in the lowest number of CHB cells to

interface with the 27.6 kV MVAC grid, the type of switching device selected is SiC-based

MOSFET with the capability to handle an MV voltage level of up to 3300 V. Several

manufacturers of semiconductor power devices, such as GeneSiC, Wolfspeed, Mitsubishi

and Hitachi, ROHM, which have demonstrated their capability to fabricate, and package

SiC power MOSFETs for targeted application in the MV voltage range. However,

challenges still complicate their commercialisation, due to the factors regarding technology

maturity level, device and packaging availability, and potential issues such as EMI. At the

132

time of writing this thesis, the 3300V SiC MOSFET device availability and procurement

of the devices are limited to engineering samples. While still many of the 3300 V and

higher blocking voltage levels of SiC MOSFET under development, for this research study,

3300 V SiC-based MOSFETs (G2R120MT33J for the CHB cells and G2R50MT33-CAL

for the DAB modules) which have been very recently commercialised in the market as a

discrete component are selected for the main switches of the proposed SST system. Based

on the datasheets given in [311, 312], this MOSFET can be implemented for applications

such as MV-grid-connected EV ultra-fast chargers, which also justifies this selection.

Moreover, the final value of the MVDC-link voltage is selected from Table 5.4

below. The final values of the CHB converter’s power circuit parameters are calculated

using Equations (3.6 – 3.20) are presented below in Table 5.2. The values of the L-filter

inductor and switching frequency are determined using the optimisation process described

in the flowchart in Appendix C. The selection of the switching frequency, fCHB, is based on

the findings reported in [282] from the figure of efficiency versus power density for the

two-stage converter module with an AC-DC H-bridge module connected to a DC-DC DAB

converter for various switching frequencies. Since a lower switching frequency

corresponds to a higher efficiency, 10 kHz is selected in this case study as the switching

frequency for the CHB for improved efficiency. Moreover, this selection is also justified

based on the proportional relationship between the switching losses and switching

frequency. In addition to higher efficiency consideration, such that the switching losses are

minimised by selecting a lower value of switching frequency, THD mitigation is also taken

into consideration, and thus the final selection of the filter inductance value, LCHB, is based

on the lowest attainable THD from simulation and FFT analysis.

133

Table 5.3: CHB Parameters and Values

Parameter Name Symbol Value

Number of CHB Cells per

Phase

NCHB 10

Voltage at MVDC-Link VMVDC-link 2500 V

L-Filter Inductance LCHB 1.27 mH

C-Filter Capacitance ** CCHB 212.2 μF

Switching Frequency fCHB 10 kHz

** minimum value

For the C-filter capacitor of the CHB from the calculation shown in Table 5.3, the

nearest standard value is 220 μF is selected.

5.1.3 DAB Parameters

The calculated values of the DAB converter parameters are presented below in

Table 5.4. Assuming that the power is distributed equally amongst all the DAB modules,

the rated power of each module is calculated using Equation (3.25). The turns ratio of the

HFT is selected by choosing the minimum values of both the nominator and denominator

of Equation (3.24). The maximum leakage inductance of the HFT is computed according

to Equation (3.28). The required capacitances of the C-filters of the DAB are calculated

using Equation (3.34) and Equation (3.36). The calculated value of the 𝐶𝐷𝐴𝐵1 is 20 μF.

𝐶MVDC-Link = 𝐶𝐶𝐻𝐵 + 𝐶𝐷𝐴𝐵1 = 220 +20 = 240 μF, however, the standardised off-the-shelf

capacitor value selected is 3300 μF following the optimisation process of this capacitor

value as shown in Appendix B ensuing the ripple of the MVDC-link voltage is below 5%

based on the simulation. The same approach applied for the capacitor across the LVDC-

134

link, which is selected as off-the-shelf standard value of 2200 μF following the optimisation

process to ensure less than 5% ripple as demonstrated in Appendix D. These capacitor’s

values have been optimised to obtain smooth voltage waveforms with low ripples.

The selection of the leakage inductance is based on the simulation of the current

flowing through the HFT while ensuring ZCS. Moreover, the selection of the switching

frequency of the DAB is based on the findings reported in [69] which compared three

different values of 20 kHz, 50 kHz and 100 kHz and the estimated the efficiency of the

DAB is 98.52%, 97.93% and 96.12% respectively. As there is a proportional relationship

between the switching losses and switching frequency, the lowest possible value of 20 kHz

is selected aiming for higher efficiency.

Table 5.4: DAB Parameters and Values

Parameter Name Symbol Value

Number of Modules NDAB 10

Rated Power of each DAB module PDAB-module 50 kW

HFT turns-ratio nHFT 5:2

Voltage at DC-Link VMVDC 2500 V

Output Voltage VLVDC 1000 V

Leakage Inductance * LDAB 625 μH

C-Filter Capacitance on the MVDC-link

side**

CMVDC 240 μF

C-Filter Capacitance on the LVDC-Link

side **

CLVDC 125 μF

Switching Frequency fDAB 20 kHz

* maximum value

** minimum value

135

According to Equation (3.42) and the ranges of MVDC-link voltages (VMVDC-min

and VMVDC-max) calculated in Table 5.2, Table 5.5 shows the minimum value of G for the

given range of VMVDC while setting VLVDC constant as it is the maximum DC-charging

voltage for the EV battery. The value of 2500 V puts VMVDC in the middle of its extremes.

The associated value of 2:5 for the nHFT with VLVDC = 1000 V is selected.

Table 5.5: DC-Link Voltages and Turns-Ratios of HFT

VMVDC VLVDC G nHFT

2380 1000 23800 238/100

2400 1000 60 12/5

2420 1000 6050 121/50

2440 1000 1525 61/25

2460 1000 6150 123/50

2480 1000 1550 62/25

2500 1000 10 5/2

136

5.1.4 Cost Estimation of Power Circuit Devices and Components of the SST

System

Table 5.6 below shows an estimation of the costs of the SST power circuit

components and devices, taking into account as of today’s maximum cost

approximation as well as availability to purchase from suppliers in Canada for to

be bought online from widely known e-commerce websites for power electronics.

With the current research and development advancements, the MV SiC

MOSFETs and MV capacitors would reduce in the next couple of years.

Table 5.6: Cost Estimates of Power Circuit Devices and Components

Device or

Component

Required

Quantity

Cost per One

Item in USD

Subtotal References

3300 V SiC MOSFET 360 $100 $36,000 [311 - 313]

HFT 30 $15 $450 [314]

3300 μF Capacitors 30 $300 $9,000 [315]

2200 μF Capacitors 30 $200 $6,000 [315]

5.6 μH Inductors 30 $20 $600 [316]

1.27 mH Inductors 3 $40 $120 [316]

Total Cost $52,170.00

Compared to the conventional fast charging systems that include a traditional LFT

which costs approximately $60,000 alone, along with the off-board or pantograph DC-fast

charger’s power circuit component that could cost at least $128,000 for 350 kW of power

only as reported in [96], it is believed that the proposed SST system could reduce the capital

cost of the UFCSEV power circuit components by at least 60%. By also considering the

efficiency, modularity, control capability as well as high power density for an MW range

of charging power, the SST is comparatively very cost-effective.

137

5.2 Performance Evaluation of the UFCSEV under Various Scenarios

Figure 5.1: Voltage and Current Waveforms of the three-phase MVAC Grid at rated Charging

Power and Ideal Grid Condition

Figure 5.1 above represents the three-phase voltage and current waveforms of the

MVAC grid as the input voltage and current to the SST system at the rated charging power

of 1.5 MW, where the phase voltages VA, VB, and VC and their phase voltage amplitude

equals: VA = 𝑉𝑚 cos(𝜔0𝑡), VB = 𝑉𝑚𝑐𝑜𝑠 [𝜔0𝑡 − 2𝜋/3 ] and VC = 𝑉𝑚 𝑐𝑜𝑠 [𝜔0𝑡 − 4𝜋/3 ],

where 𝑉m = 𝑉MVAC-LL x √2 / √3 where 𝑉MVAC-LL is the nominal line-to-line phase voltage

root-mean-square (RMS) value which equals to 27.6 kV and 𝑉𝑚 is the phase-to-neutral

voltage amplitude which equals to 22.5353 kV. The waveforms of the active and reactive

power that is delivered from the MVAC grid to the SST at rated charging power are shown

in Figure 5.2 below. After running the simulation at 0 second, the input active power of the

grid reached the required 1.5 MW rated value following the command of the controller in

about 0.016 second as the transient response to the steady-state value. This is accomplished

by adjusting the values of the predefined references of the Vd*, Id*, Vq* and Iq* of the abc-

138

dq0 transformation in the PLL control system. While the reactive power is set to 0 in this

case study, the simulation shows very small variations in a fraction of less than 10-11. Since

this is very small, it is neglected and thus assumed as 0 VAR.

Figure 5.2: SST Input Active and Reactive Power Waveforms at Rated Charging Power and Ideal

Grid Condition

The THD is analysed using the Fast Fourier Transform function on

MATLAB/Simulink. The waveforms and their respective THD of the input MVAC grid

current as well as the VCHB are shown in Figures 5.3 and 5.4 below. The analysis shows a

THD of 2.45% for the input current considering the high switching frequency of 10 kHz

selected for the CHB rectifier cells. This is within the recommended IEEE standards for

harmonics above 35th order. The THD for the VCHB is 5.95%. This is comparatively higher

than aimed for due to voltage sparks in the first positive cycle of the waveform period

which occurs due to the grid filter since the inductor resists the change by producing a

voltage between its leads in opposing polarity to the change. If considering the other cycles

after the first half, the THD is below 1%.

139

As can be seen from the sinusoidal waveforms, the input voltage and current

waveforms to the SST are in phase, which corresponds to a unity power factor as only

active power is being drawn from the MVAC grid to the UFCSEV.

Figure 5.3: Harmonics Distortion of Input Current to the SST

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Figure 5.4: Harmonics Distortion of Input Voltage to the SST

141

The output voltage and current of each CHB cell are shown in Figure 5.5 below.

As can be seen, the controller for the CHB rectifier successfully regulated the MVDC-

link at 2500 V with a ripple of less than 5% as set in the first-order design.

The output current corresponds to the voltage of the CHB for an output power of

50 kW per cell totalling an output power delivered to the DAB converter of 1.5 MW.

Figure 5.5: MVDC-Link Voltage (Top) and Output Current (Bottom) of each CHB Cell at the rated

Charging Power

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The output voltage and current of the DAB converter to the EV battery are shown

in Figure 5.6 below. As can be seen, the controller for the DAB converter successfully

regulated the LVDC-link at 1000 V of smooth charging voltage with a ripple of less than

10% as set in the first order design.

The total output current of the DAB modules connected in parallel amounts to 1.5

kA for a total charging power of 1.5 MW being delivered to the EV battery.

Figure 5.6: Output Current and Voltage of the DAB Converter to the EV Battery at the rated

Charging Power

The primary and secondary voltage waveforms of the HFT are shown in Figure

5.7.

To further investigate the dynamic performance of the proposed SST, disturbances

conditions at the grid between 0.2 and 0.5s are applied and the resultant waveforms are

shown in Figures 5.8 – 5.11.

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Figure 5.7: Waveforms of HFT Primary and Secondary Voltage in Ideal Grid Condition at the rated

Charging Power

Figure 5.8: Waveforms of the Input Voltage and Current from the MVAC to the SST with

disturbances conditions at the grid between 0.2 and 0.5 s

144

Figure 5.9: Comparison of the Grid Frequency Measurements using the proposed PPL versus the

built-in MATLAB PLL

145

Figure 5.10: The dq components of the MVAC grid affecting the CHB controller during the

disturbances between 0.2 and 0.5 s

146

Figure 5.11: The MVAC Grid Voltage LL RMS measurement from the proposed PLL showing the

affected disturbances between 0.2 and 0.5 s

To further validate the proposed PLL compared to the built-in PLL on

MATLAB/Simulink, the following simulation waveforms (shown in Figures 5.12 – 14)

imply the accuracy of the proposed PLL and is therefore utilised for the proposed SST.

Figure 5.12: The MVAC Grid Voltage LL RMS measurement from the proposed PLL during ideal

grid conditions

147

Figure 5.13: Phase angles’ measurements of the MVAC grid voltages during ideal grid condition

using the proposed PLL

148

Figure 5.14: Simulation Results of the MVAC – 3 Phase with LLLG Fault Analysis

a) Voltages b) Currents c) Grid Frequency using the built-in MATLAB PLL

149

Figure 5.15 below shows the developed model of the proposed SST-based

UFCSEV including the power circuits and control systems as well as the EV battery.

Figure 5.15: Overall Simulation Model of the SST-based UFCSEV

The pulsing signals applied to the gates of each MOSFET device of both the CHB

cells and DAB modules from the duty cycle generated by the controllers are shown in

Figure 5.16-5.17 below. The characteristics of the battery model is shown in Figure 5.18.

Figure 5.16: Pulsing signals for the CHB MOSFETs:

Top: Switches 1&4 Bottom: Switches 2&3

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Figure 5.17: Pulsing signals for DAB MOSFETS using Phase-Shift Modulation:

a) Switches 1&4 b) Switches 2&3

c) Switches 5&8 d) Switches 6&7

Figure 5.18: Li-ion Battery Characteristics for the EV Battery Model used on MATLAB/Simulink

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Using the Powerful 564 kWh of on-board LFSe+ EB [83] with modular battery

capacity value for the EV battery model to simulate the UFCSEV proposed in this thesis,

the following figures show the EV battery’s SoC and energy by applying the rated charging

power 1.5 MW of SST. In this scenario, the minimum SoC and maximum SoC values are

controlled within 20% and 90% respectively, in order to prevent degradation of the EV

battery while being charged. As can be seen from Figure 5.18, charging at the SST’s rated

charging power of 1.5 MW, takes approximately 13 minutes and 32 seconds to go from

30% SoC to 90% SoC of the 564 kWh EB capacity. This is considered much faster charging

rate compared to a conventional DC-fast charging station, due to a much higher power.

Figure 5.19: EV’s Charging Profile with SoC limits

The time-domain dynamic analysis using the phasor modelling technique derived and

implemented in this case was adopted from [232] which is able to simulate the UFCEV

system on MATLAB/Simulink/ RT-LAB much faster for a timescale of several minutes.

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5.3 Efficiency Analysis

Since the system-level simulation-based model designed in this thesis assumed that

the power circuit devices, i.e. SiC MOSFETs are lossless, the efficiency of the SST

depends primarily on the efficiency of the semiconductor switching devices selected.

To analyse the efficiency of the MOSFET selected, both conduction losses and

switching losses are taken into account and their calculations are illustrated below.

5.3.1 Conduction Losses

In general, the characteristic of VDS versus IDS (or, for the anti-parallel diodes, VF

versus IF) of bipolar power semiconductors can be approximated by the linear model shown

in Figure 5.20 below as:

VDS (IDS) = VDS,0 + r · IDS where Vsw,0 = VDS,0 (5.1)

Figure 5.20: Forward Characteristic Approximation of a MOSFET (or Diode)

by Vsw,0 and r

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The total forward voltage drop at rated current flowing through the semiconductor

switch, VDS (Irated); therefore, consists of the two partsVDS,0 and VDS,r = r · Irated.

Employing the fundamental concepts of semiconductor physics in [293], the total

forward voltage drops at rated current, the VDS,0 and VDS,r scale with the blocking voltage

(VMosfet-rated) can be estimated roughly by: VDS (IDS-rated) = VDS,0 + r · IDS-rated

Since the current flowing into one of the H-Bridges equals the phase current flows

through two MOSFETs per cell at any instant in time. The first step to calculate the

conduction loss is to assume here that the characteristics of MOSFETs and diodes are the

same. For each phase stack-based on the MOSFET with a blocking voltage of 3300 V, the

total conduction losses at the rated current, Irated, can be calculated as follows [259]:

Pconduction_loss = 2 · (VDS,0 · I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 + r · I2MVAC-ph-RMS) (5.2)

By substituting the values from Equations (3.8) and (3.9), Pph = 500 kW,

I𝑀𝑉𝐴𝐶−𝑝ℎ = 14.7916 𝐴 , I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑅𝑀𝑆 = 10.45924 A and I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 =

9.416625 A , and from the datasheets [5.1, 5.2]: VDS,0 =3.5 V and r = 120 m Ω at an

operating temperature of T = 25°C, into Equation (5.2), the conduction loss for per H-

Bridge per phase = 92.17134 W.

Since there is one H-Bridge per CHB cell and two H-Bridges per DAB module, the

total conduction losses for the three-phase with 10 cells and 10 modules system = 3 x 10 x

3 x 92.17134 W = 8,295.42 W.

Since the number of cells is inversely proportional with the rated blocking voltage

of the MOSFET, the reduction of the forward voltage drop with the blocking voltage is not

very significant; therefore, high conduction losses must be expected for designs based on

lower blocking voltages.

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5.3.2 Switching Losses

The switching losses depend on the blocking voltage with low complexity and can

be expressed by the switching energies of the MOSFET/diode which are approximated by

considering the blocking voltage utilisation, u = VMVDC/ VMosfet-rated to scale linearly with

the switched current and with the applied DC voltage. Then, using a normalised switching

energy, Ksw = Esw / Irated for u which is typically specified in the datasheet, and with [Ksw]

= mJ/A, the switching losses of a specific MOSFET can be expressed by considering the

switching energy of a certain transition which can be determined from Ksw as

Esw = Ksw · Isw · u / 0.5 with [Esw] = mJ (5.3)

Since each bridge leg in a CHB cell is operated at a fixed switching frequency, fCHB

of 10 kHz, where the ratio between switching frequency and the fundamental frequency is

quite high for normal PWM operation, and since there is a linear dependency between

switched current and resulting switching energies is assumed from Equation (5.3), the turn-

off losses during half a grid period can be estimated based on the bridge leg’s average

current, I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 , as [259]:

Poff,leg = Koff · 1

1000000I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 (

𝑢

0.5) · fCHB (5.4)

where the factor 1/1000000 is required to compensate for the μJ/A unit of Koff. Each

of the three switching energies is dissipated once per H-bridge leg during one switching

cycle (although not in the same device). The overall switching losses of an H-bridge cell

of the CHB based on MOSFETs with a blocking voltage 3300 V, can therefore be

calculated from:

Psw_CHB = 2 x Ksw · 1

1000000I𝑀𝑉𝐴𝐶−𝑝ℎ−𝑎𝑣𝑒 (

𝑢

0.5) · fCHB (5.5)

where Ksw = Koff + Kon and from the datasheet: Esw_CHB = Eoff + Eon = (501 +168)

μJ , the switching losses of an H-bridge cell of the CHB = 20.2727 W and for all CHB cells

in the three-phases: the total CHB switching losses = 3 x 10 x 190.9 = 608.1818 W

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Similarly, using Esw_DAB = Eoff + Eon = (687+304) μJ, the switching losses of an H-bridge

module of the DAB can be calculated from:

Psw_DAB = 2 x Ksw · 1

1000000I𝑀𝑉𝐷𝐶−𝑎𝑣𝑒 (

𝑢

0.5) · fDAB (5.5)

For the DC-AC H-bridge of the DAB, the switching losses = 60.0606 W.

For the DC-AC H-bridge of the DAB, the switching losses = 24.0242 W.

The total switching losses of the DAB = 3 x 10 (84.08484) = 2522.54527 W.

It can be noted that the switching frequency is inversely proportional with V3Mosfet-

rated, which indicates that the high switching losses occur for designs utilising

semiconductor switching devices with high blocking voltage ratings.

5.3.3 Overall Efficiency of the SST

The overall efficiency of the SST can be determined by the following equation:

𝜂 = P𝑜𝑢𝑡𝑝𝑢𝑡

P𝑖𝑛𝑝𝑢𝑡 % =

P𝑖𝑛𝑝𝑢𝑡 − P𝑡𝑜𝑡𝑎𝑙_𝑙𝑜𝑠𝑠𝑒𝑠

P𝑖𝑛𝑝𝑢𝑡 % (5.6)

The total losses of the SST considering the losses of the semiconductor switches only is:

P𝑡𝑜𝑡𝑎𝑙_𝑙𝑜𝑠𝑠𝑒𝑠 = P𝑐𝑜𝑛𝑑𝑢𝑐𝑡𝑖𝑜𝑛_𝑙𝑜𝑠𝑠𝑒𝑠 + P𝑠𝑤𝑖𝑡𝑐ℎ𝑖𝑛𝑔_𝑙𝑜𝑠𝑠𝑒𝑠 = 8,295.42 + (608.1818 +

2522.54527) = 11,426.147 W.

Since the input power into the SST system is the rated active charging power of 1.5 MW,

using Equation (5.6), the overall efficiency of the SST system is:

𝜂 = P𝑐ℎ𝑎𝑟𝑔𝑖𝑛𝑔_𝑟𝑎𝑡𝑒𝑑 − P𝑡𝑜𝑡𝑎𝑙_𝑙𝑜𝑠𝑠𝑒𝑠

P𝑐ℎ𝑎𝑟𝑔𝑖𝑛𝑔_𝑟𝑎𝑡𝑒𝑑% =

1500 𝑘𝑊 − 11.426147 𝑘𝑊

1500 𝑘𝑊 % = 99.2383 %

The overall system efficiency of the SST at 1.5 MW charging power is higher than

that of the LFT-based system by 7.738% (from 91.5% to 99.2383%) reducing the power

losses from 85 kW as reported in [96] to 11.426 kW in this SST System. As a result of this

efficiency yields a significant reduction in electricity costs and energy savings.

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Chapter 6. Conclusions and Recommendations

6.1 Summary of Results

This research study aimed to design a realistic simulation-based model of an SST-

based high-power conversion for ultra-fast charging rated at 1.5 MW as a dedicated charger

for one connected EV with a large battery capacity, such as an EB or heavy-duty vehicle

without partial processing for multiple EVs. A two-stage DPSS ISOP configurational

topology is proposed with an MVAC-MVDC rectification stage using CHB cells followed

by an MVDC-LVDC conversion stage using DAB modules. A total of ten CHB cells in

each phase of the three-phase system is directly connected to a dedicated 27.6 kV

distribution feeder. The power circuit for the case study contained a total of 360 MOSFETs.

Based on the review analysis performed in this thesis, it is believed that the selected

converter topologies outperform all other topologies available today for multi-level

modular converter structure with a high level of modularity. The selected architecture,

converter topologies, and modulation schemes offer high flexibility and control

capabilities. The multi-level CHB rectifier is modulated using phase-shift PWM

modulation. Besides its modular structure, the CHB can handle higher voltages and it is

easy to implement voltage balancing control, reactive power compensation and THD

reduction. The DAB is modulated using the rectangular phase-shift modulation technique

with high efficiency during the EV charging operation. This topology operates smoothly at

a fixed voltage level at the MVDC- and LVDC-links with the phase shift modulation.

Mathematical models based on dynamic averaged modelling and state-space as well as

small-signal models are derived in order to construct the controllers of the SST system.

This technique is also utilised in order to reduce the computational time of simulations.

This thesis is divided into several chapters to concentrate on a certain part of the

research to meet the thesis objectives. A comprehensive review of literature on SST-based

ultra-fast charging and other related topics revealed the SST offers much better

performance with control capabilities than the conventional LFT. The SSTs are expected

to be widely implemented in various applications at MV and HV levels and power in the

MW ranges. Due to the recent advances in the integration of RESs and ESSs to the utility

157

networks, V2G will be a key role in a smart grid in the near future. This will liberate the

electricity market which would be more complex as a result. The SST has the potential to

play a key role in providing new ways for controlling electricity routing and also in adding

functionalities to the distribution systems such as smart protection against faults and

enhanced power quality through the injection of currents with very low harmonic contents.

To efficiently and rapidly manage the changing dynamic loads of ultra-fast

charging, the SST offers the most viable solution available today to dynamically adjust the

charging power and energy distribution in the power grid. The resulting power circuit

shows that the proposed SST system based on the CHB-DAB couple topology is extremely

modular. To interface with an increased voltage level on the MVAC grid side of the SST,

the number of CHB cells has to be simply increased by connecting new cells in series.

Both of the CHB and DAB converters are independently controlled based on the

current-mode control scheme with feedback signals such that the controllers keep the

converter parameter at the desired value constant. The voltage balancing scheme ensures

an equal voltage of the MVDC-link among all the CHB cells. The SST performance is

validated using real-time simulation results.

The SST model focused on time-domain detailed switching simulations for

voltages, currents, and power flowing within the UFCSEV and is successfully validated

using MIL real-time simulation on MATLAB/Simulink/RT-LAB. A secondary

study is performed to analyse the efficiency of the SST system based on the conduction

and switching losses at the MOSFET semiconductor switches selected in this study using

real data from the datasheets of the power MOSFETs.

The overall conclusion of this study can be summarised by confirming that the

proposed SST topological configuration with its controllers that are presented in this thesis

are capable of solving the challenges encountered in delivering high-power charging. Thus,

it is appealing for future implementation especially for EVs with large battery capacities

such as heavy-duty vehicles, where the focus is laid on system compactness due to the lack

of excessive filtering and LFTs, utilising the proposed ISOP CHB-DAB high-frequency

SST with integrated ESSs between at the MVDC-link without the need of additional high-

power chargers for partial processing that may result in an unbalanced system.

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6.2 Contributions

The novelty of the proposed versatile topological configuration is the combination of

CHB and DAB without a third conversion stage which has not been utilised in three-phase

two-stage high-frequency DPSS SST architectures to the best knowledge of the author,

especially for ultra-fast charging applications with SiC MOSFETs. This modular design

features key advantages such as redundancy, easy scalability to higher voltage and power

levels, a very low charging current ripple, current and voltage control capability, soft

switching over a wide range of input and output voltage variations, bidirectional power

flow for ultra-fast charging of EVs with V2G and V4G capabilities. These features imply

evident offered advantages compared to the conventional power conversion concepts. A

framework of the UFCSEV model-based design with detailed steps for MIL real-time

simulation is also presented with step-by-step systematic approaches for the design

processes of both the CHB and DAB circuits and their controllers. Suitable controllers for

this SST are implemented to properly regulate the currents, voltages, and power flow from

the SST to the EV battery while taking into account the THD, PFC, power balance across

all modules and voltage ripple in accordance with IEEE standards considering high power

quality. Off-the-shelf components sizes as realistic values for the parameters utilising

datasheets of commercially available SiC MOSFETs and standard values of passive

components were selected in order to make the hardware design of the system proposed in

this study feasible and quick in implementation in practice. Approximate cost estimation

of the SST power circuit components is also shown. Efficiency analysis considering the

conduction and switching losses of the semiconductor MOSFET devices is also outlined.

6.3 Limitations

While this thesis proposed an SST topology and implemented the most appropriate

control schemes and modulations methods validated by real-time simulations, there are

certain aspects of the SST system which have not been covered in this research study due

to time restraints. The simulation results presented are for G2V charging application only.

Constructed on MATLAB/Simulink and integrated with RT-LAB, the developed model is

limited to the capabilities of these software tools. Furthermore, the efficiency analysis did

not cover the power losses in HFTs due to the varying values of the core hysteresis, core

eddy current, and winding losses of various products from various manufacturers.

159

6.4 Future Works and Recommendations

Even after the end of a thesis work, several new challenges, questions and

stimulating ideas arise. Indeed, several future research directions can be proposed. Towards

real-scale implementation, additional control schemes to achieve V2G and V4G for power

transfer in other quadrants should be developed. In order to achieve better performance of

this SST system, more advanced control such as MPC and Neural Network algorithms and

techniques with feed-forward loops should be developed. Proper protections schemes and

devices such as switchgear, circuit breakers and disconnects, or other smart protection

devices should be investigated, especially in ultra-fast charging applications. This is

because the controllers implemented for this SST system are not perfectly strong enough

to sustain short-circuit conditions or asymmetric grid conditions by maintaining the desired

voltages and currents. Such disturbances’ conditions would lead to permanent damage of

the SST components as well as other connected systems. A possible solution could be

implementing an intelligent algorithm in order to ensure a reliable operation by restoring

the grid currents to their safe operation point. Also a comparison between star- and delta-

connected SST should be investigated. A laboratory hardware prototype of the SST should

be constructed and operated under nominal conditions for practical analysis. EMI and

oscillating behaviour issues should also be taken into consideration. The developed SST

model should then be refined until it perfectly predicts the behaviour of the nominal

laboratory prototype. The model should be further developed to predict the SST behaviour

under worst-case conditions; fault-ride short circuit conditions using Hardware-in-the-

Loop (HIL) testing. The SST design should be improved until worst-case behaviour meets

the specifications until reliability and production yield are acceptable. Another research

area to investigate is implementing a start-up charging procedure of the SST capacitors.

This is because the capacitors at the MVDC- and LVDC- links in this research study were

assumed to be charged initially at a voltage level equal to their rated values. Moreover,

inrush currents were not considered in this study. Therefore, protection measures should

be considered for future studies in order to avoid large inrush currents when starting the

SST. Finally, given the large number of hardware elements, studies on the failure rates and

reliability of such SST structures with integrated ESSs are of great importance, in

association with fault diagnosis techniques and implementations of redundancy schemes.

160

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APPENDICES

Appendix A: Framework of the Research Study

184

Appendix B: Flowchart of the Systematic Design Procedure of the CHB

185

Appendix C: Optimisation Flowchart for the Selection of fCHB and LCHB

186

Appendix D: Flowchart of the Systematic Design Procedure of the DAB

187

Appendix E: Design Process of the Control System for the SST

188

Appendix F: Flowchart of the CCCV Charging Method