Modeling of HVDC IGBT in Pspice

Serving an ultimate goal for converter station EMC studies

JIN YANG

Master’s Degree ProjectStockholm, Sweden

September 2015

TRITA-EE 2015:67

Modeling of HVDC IGBT in Pspice

Serving an ultimate goal for converter station EMC studies

Jin Yang

School of Electrical Engineering

Royal Institute of Technology

Supervisor: Daniel Månsson

Examiner: Martin Norgren

Commissioned by ABB AB Power Systems in Ludvika HVDC

Supervisor: Jing Ni, Sanchit Singh

Manager: Raul Montano

Abstract

An IGBT/diode model with more accurate characteristics than simple switchis required to serve for EMC issues from converter valve. The purpose of thismaster thesis is to develop an IGBT and diode model to achieve both accu-rate transient behavior and fast simulation time during single pulse switchingtest circuit for the 4.5 kV and 2.0 kA StakPakTM IGBT module. A gate unitwhich resembles the ABB gate unit is implemented to obtain a good agreementbetween simulation and measurement. For demonstration and verification, theIGBT/diode model is applied in a simplified arm simulation of full scale ABBGeneration 4 HVDC-VSC converter station and capable of a half cell consistingof 8 series-connected IGBTs and their anti-paralleled diodes. The arm simula-tion results are analyzed further for converter station EMC studies.

Convergence issue is the most important problem in the whole process of modelimplementation and application. To guarantee the convergence in simulationsome characteristics such as the tail voltage at the end of turn-off is disregarded.But overall, the model is validated and adopted successfully.

Sammanfattning

En IGBT-/diodmodell med mer exakta egenskaper an en enkel switch kravs foratt hantera EMC-problem fran omvandlarventilen. Syftet med denna magis-teruppsats ar att utveckla en IGBT- och diodmodell for att uppna bade nog-grant overgaende beteende och snabb simuleringstid under enkelpulsomkop-plingstestkrets for 4,5 kV och 2,0 kA-StakPak IGBT-modulen. En grindenhetsom liknar ABB-grindenheten implementeras for att fa god overensstammelsemellan simulering och matning. For demonstration och verifiering, tillampasIGBT-/diodmodellen i en forenklad armsimulering av en fullskalig ABB Genera-tion 4 HVDC-VSC-omvandlarstation och med kapacitet for en halvcell bestaendeav 8 seriekopplade IGBT och deras anti-parallellkopplade dioder. Resultatenfran armsimuleringen analyseras vidare for EMC-studier av omvandlarstatio-nen.

Konvergensfragan ar det viktigaste problemet i hela processen for modellimple-mentering och -tillampning. For att garantera konvergensen i simulering ignor-eras vissa egenskaper sasom svansspanningen vid slutet av avstangning. Mentotalt sett, valideras och antas modellen framgangsrikt.

Keywords

StakPakTM IGBT module, IGBT behavioral model, Single pulse test circuit,Generation 4

Acknowledgment

First of all, I would like to express my sincere gratitude to my supervisors atABB, Jing Ni and Sanchit Singh, as well as my manager Raul Montano, for theirinstructive advices and help in my model implementation and thesis writing.

Secondly, Im also indebted to my supervisor at KTH, Daniel Mansson, who hasput his considerable time and support into the completion of this thesis.

Last but not the least, Id like to thank my colleagues, teachers and friends.Without their help and encouragement, it would be much harder for me tofinish this thesis.

List of Figures

2.1 A hierarchical structure of StakPak IGBT module. . . . . . . . . 42.2 The single pulse test circuit in Pspice. . . . . . . . . . . . . . . . 5

3.1 The diode reverse recovery current during turn-off switching. . . 8

4.1 Darlington circuit of IGBT. . . . . . . . . . . . . . . . . . . . . . 104.2 The structure of Hammerstein-like IGBT model. . . . . . . . . . 114.3 The typical output characteristics of an IGBT. . . . . . . . . . . 124.4 The capacitance extraction of IGBT model. . . . . . . . . . . . . 144.5 The structure of alternative Hammerstein-like IGBT model. . . . 164.6 ABM block to implement the turn-off time delay. . . . . . . . . . 17

5.1 The Pspice schematic of static characteristics circuit. . . . . . . . 185.2 Static characteristic of collector current versus gate-emitter volt-

age at constant collector-emitter voltage of 15 V. . . . . . . . . . 195.3 Static characteristic of collector current versus collector-emitter

voltage for a series of constant gate-emitter voltage at 9 V, 11 V,13 V and 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.4 The Pspice schematic of single pulse test circuit with rectangularvoltage source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.5 Simulation results under standard operation mode with voltagesource driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.6 The Pspice schematic of single pulse test circuit with constantcurrent source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.7 Simulation results under standard operation mode with currentsource driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.8 The Pspice schematic of single pulse test circuit with ABB gateunit model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.9 Turn-on simulation results under standard operation mode withABB gate unit model: collector-emitter voltage and collector cur-rent. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.10 Turn-off simulation results under standard operation mode withABB gate unit model: collector-emitter voltage and collector cur-rent. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.11 Simulation results of diode reverse recovery under standard op-eration mode with ABB gate unit model. . . . . . . . . . . . . . 29

5.12 Turn-on comparison under standard operation mode with ABBgate unit model in frequency domain. . . . . . . . . . . . . . . . 31

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5.13 Turn-off comparison under standard operation mode with ABBgate unit model in frequency domain. . . . . . . . . . . . . . . . 32

6.1 Turn-on simulation results under 3.6 kV and 1.2 kA mode withABB gate unit model: collector-emitter voltage and collector cur-rent. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.2 Turn-off simulation results under 3.6 kV and 1.2 kA mode withABB gate unit model: collector-emitter voltage and collector cur-rent. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.3 Simulation results of diode reverse recovery under 3.6 kV and1.2 kA mode with ABB gate unit model. . . . . . . . . . . . . . . 35

6.4 Turn-on comparison under 3.6 kV and 1.2 kA mode with ABBgate unit model in frequency domain. . . . . . . . . . . . . . . . 36

6.5 Turn-off comparison under 3.6 kV and 1.2 kA mode with ABBgate unit model in frequency domain. . . . . . . . . . . . . . . . 37

7.1 The example of STP function in capacitance Ccg. . . . . . . . . . 38

8.1 The simplified arm simulation composition of the full scale LightG4 converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.2 Single pulse test results of collector-emitter voltage and collectorcurrent with voltage source driving under standard operation mode. 43

8.3 Voltage and current Waveforms for IGBT and diode models com-pared with simple switches and diodes in time domain. . . . . . . 44

8.4 Stray current waveforms for IGBT and diode models comparedwith simple switches and diodes in time domain. . . . . . . . . . 45

8.5 Stray current waveforms for IGBT and diode models comparedwith simple switches and diodes in frequency domain. . . . . . . 46

8.6 Stray current waveforms including extra damper for IGBT anddiode models compared with simple switches and diodes in fre-quency domain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

B.1 MOSFET channel threshold voltage (VTH) increases from 6.5 Vto 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

B.2 Process transconductance parameter (kp) increases from 0.68 Sto 1.2 S. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

B.3 Current gain of BJT transistor (β) increases from 150 to 280. . . 59B.4 MOSFET channel threshold voltage (VTH) increases from 6.8 V

to 7.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60B.5 Approximated turn-on voltage of the p + /n− junction (VD) in-

creases from 0.6 V to 0.8 V. . . . . . . . . . . . . . . . . . . . . . 60B.6 Process transconductance parameter (kp) increases from 0.68 S

to 1 S. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61B.7 Current gain of BJT transistor (β) increases from 170 to 250. . . 61B.8 Gate resistance (Rg) increases from 0.7 Ω to 1.2 Ω. . . . . . . . . 62B.9 Diode diffusion transit time (ttdi) increases from 8× 10−7 s to

2.5× 10−6 s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62B.10 On-state resistance of h1 block (r1on) increases from 38 Ω to 310 Ω. 63B.11 Current gain of BJT transistor (β) increases from 130 to 250. . . 63B.12 Stray inductance (LS) increases from 70 nH to 150 nH. . . . . . . 64

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B.13 Ratio of IC after and before the fast decay at turn-off (α) in-creases from 0.1 to 0.3. . . . . . . . . . . . . . . . . . . . . . . . . 64

B.14 On-state resistance of h1 block (R1on) increases from 38 Ω to 310 Ω. 65B.15 Off-state resistance of h1 block (r1off) increases from 35 Ω to 270 Ω. 65B.16 Stray inductance (LS) increases from 50 nH to 150 nH. . . . . . . 66B.17 Diode minority carrier lifetime (taud) increases from 0.5 µs to 4 µs. 66B.18 On-state resistance of h1 block (R1on) increases from 40 Ω to 150 Ω. 67B.19 Off-state resistance of h1 block (R1off ) increases from 40 Ω to

150 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67B.20 Turn-off resistance of h2 block (R2off ) increases from 30 Ω to 110 Ω. 68

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List of Tables

5.1 Scope of influence of different parameters on the dynamic behavior. 235.2 The entire parameter set extracted with the ABB gate unit model. 27

6.1 Parameter variation from table 5-2 for 3.6 kV and 1.2 kA opera-tion mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

9.1 Differences/Similarities between lumped charge model and newmodel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

9.2 Advantages/disadvantages of lumped charge model and new model. 499.3 Advantages/disadvantages of all the simulations from previous

chapters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

iv

List of Symbols

a0, a1, a2 Polynomial factors for correction functions f1 n.u.b0, b1, b2 Polynomial factors for correction functions f2 n.u.C1 Paralleled capacitance of h1 block in IGBT model FC2 Paralleled capacitance of h2 block in IGBT model FCce IGBT collector-emitter capacitance FCcg IGBT collector-gate capacitance FCge IGBT gate-emitter capacitance FCies IGBT input capacitance FCoes IGBT output capacitance FCres IGBT reverse transfer capacitance FCj0 Junction capacitance at zero bias in diode model Ff1, f2 correction functions in IGBT model n.u.fC Point where the capacitance becomes linear (SPICE capac-

itance model parameter) in diode modeln.u.

IC IGBT collector current AiD Diode instantaneous forward current AIDC IGBT DC collector current AIload Load current in single pulse test circuit AIS Diode saturation current Ak Process transconductance coefficient in IGBT model SLS Stray inductance in single pulse test circuit HLL Load inductance in single pulse test circuit Hmj Junction capacitance grading coefficient in diode model n.u.n Diode emission coeffcient n.u.qE , qM , TM Three diode substitution variables n.u.R1on On-state resistance of h1 block in IGBT model ΩR1off Off-state resistance of h1 block in IGBT model ΩR2on On-state resistance of h2 block in IGBT model ΩR2off Off-state resistance of h2 block in IGBT model ΩRCE Series resistor between gate and emitter in alternative

IGBT model structureΩ

RG Gate resistance in single pulse test circuit ΩRL Load resistance in single pulse test circuit ΩRS Stray resistance in single pulse test circuit ΩRS Series resistance in diode model Ωtau Minority carrier lifetime in diode model sttd Diffusion transit time in diode model s

v

U1 IGBT voltage variables of instantaneous DC collector cur-rent IC

A

U2 IGBT conduction component of the collector current IC AU3 IGBT voltage variables of instantaneous dynamic collector

current IC

A

U4 IGBT displacement component of the collector current IC AVCE IGBT collector-emitter voltage VvD Diode instantaneous forward voltage VVD IGBT approximated turn-on voltage of the p+/n− junction VVG Simple voltage source gate unit VVGE IGBT gate-emitter voltage VVj Junction built-in potential in diode model VVS Voltage supply in single pulse test circuit VVth Diode instantaneous threshold voltage VVTH MOSFET channel threshold voltage Vα IGBT ratio of the collector current after and before the fast

decay at turn-offn.u.

β IGBT current gain of BJT n.u.τ Diode lifetime sτrr Diode reverse recovery time constant s

vi

List of Abbreviations

ABB Asea Brown Boveri Ltd.BJT Bipolar Junction TransistorEMC Electromagnetic CompatibilityGTO Gate Turn Off (thyristor)HVDC High Voltage Direct CurrentIGBT Insulated-Gate Bipolar TransistorLight ABB name of HVDC-VSC converterMATLAB MATrix LABoratoryMOSFET Metal-Oxide Semiconductor Field-Effect TransistorPSCAD Power System Computer Aided DesignPspice Personal Computer Simulation Program with Integrated

Circuit EmphasisStakPak a family of high power IGBT press-packs and diodes in an

advanced modular housingVSC voltage source converter

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Contents

List of Symbols v

List of Abbreviations vii

1 Introduction 11.1 Main motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Main objective and model review . . . . . . . . . . . . . . . . . . 11.3 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Basis for the project development 42.1 StakPak IGBT module . . . . . . . . . . . . . . . . . . . . . . . . 42.2 Single pulse test circuit . . . . . . . . . . . . . . . . . . . . . . . 5

3 Diode model 73.1 Model description . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.2 Parameter extraction . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 IGBT model 104.1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . 104.2 DC model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.3 Dynamic model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.3.1 Model of capacitors . . . . . . . . . . . . . . . . . . . . . 134.3.2 Model of block h1 and block h2 . . . . . . . . . . . . . . . 154.3.3 Model of time delay block . . . . . . . . . . . . . . . . . . 16

5 Simulation results 185.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.1.1 IC versus VGE . . . . . . . . . . . . . . . . . . . . . . . . 195.1.2 IC versus VCE . . . . . . . . . . . . . . . . . . . . . . . . 19

5.2 Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . 205.2.1 Voltage driving . . . . . . . . . . . . . . . . . . . . . . . . 205.2.2 Current driving . . . . . . . . . . . . . . . . . . . . . . . . 245.2.3 Complex ABB gate unit model . . . . . . . . . . . . . . . 255.2.4 Frequency domain results . . . . . . . . . . . . . . . . . . 30

6 Different operation modes 33

7 Convergence issues 387.1 Useful convergence solutions . . . . . . . . . . . . . . . . . . . . . 38

viii

8 Application in arm simulation for demonstration 41

9 Discussion 48

10 Conclusion 51

11 Future work 52

Appendix A Pspic schematics 55A.1 IGBT model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55A.2 Diode model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Appendix B Parametric analysis 58B.1 Parametric analysis for collector current versus gate-emitter volt-

age at constant collector-emitter voltage of 15 V. . . . . . . . . . 58B.2 Parametric analysis for collector current versus collector-emitter

voltage for a series of constant gate-emitter voltage at 9 V, 11 V,13 V and 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

B.3 Parametric analysis for turn-on transient with voltage sourcedriving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

B.4 Parametric analysis for turn-off transient with voltage sourcedriving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

B.5 Parametric analysis for turn-on and off transient with currentsource driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

ix

Chapter 1

Introduction

1.1 Main motivation

Two main aspects are included in EMC requirements: the emission issues, i.e.electromagnetic interference to the environment generated from the device dur-ing normal operation cannot exceed certain limits; the apparatus has a certaindegree of immunity (EMI), called electromagnetic sensitivity, to the electromag-netic interference in the environment.

As known, ABB needs to be able to meet all customers’ requirements regardingto high frequency conducted and radiated electromagnetic emissions, and makesure that the equipment we install does not break during the 30 years’ lifetimeof the HVDC station under interference. For these reasons we need accurateand validated high frequency simulation models, especially a good IGBT/diodemodel, for correct switching so as to reflect the electromagnetic exchange be-tween converter station and the interference in the environment.

Before a proper IGBT/diode model was developed, in HVDC simulations forEMC, IGBTs and diodes were represented as simple switches and diodes inPspice library. These models do not have accurate dynamic behaviors, for ex-ample, reverse recovery and realistic current and voltage derivatives. So sadlythey made the EMC results deviate much more than expected and customerscomplain about it. The background for this thesis is, therefore, directly relatedto the need to represent the semiconductors more accurately without sacrificingsimulation speed and convergence.

1.2 Main objective and model review

The insulated-gate bipolar transistor (IGBT) is a three-terminal power semi-conductor device primarily used as an electronic switch, which has high effi-ciency and fast switching. It combines the simple gate-drive characteristics ofMOSFET device with the high-current and low-saturation-voltage capability ofbipolar transistors.

IGBT is regularly used in HVDC-VSC converter application. It is often con-

1

nected with complex busbar, capacitor and snubber circuit. Traditionally theyare modelled as lumped parameters in circuit simulation softwares such asPSCAD. Now, since more and more issues are related to the coupling or mu-tual effect/high frequency/transient effect, a better or so-called hybrid modelis needed. This thesis is looking for an IGBT model for 4.5 kV and 2.0 kAStakPakTM IGBT module that can be used in simulations involving a full scaleconverter for EMC System Studies. The model needs to be runnable (fast andstable), and be able to capture the basic behavior of currents and voltages duringcommutation events in both time and frequency domains. Speed and stabilityare more important than high accuracy. Thus, several goals need to be achieved:enable series connection, fast simulation time, correct di/dt and dv/dt duringswitching.

In order to obtain an accurate and realistic IGBT model, literature reviewis done and many different types of models are investigated. One of the firstwidely-accepted models, Hefner model [1] [2], is a physics model which has goodaccuracy and implemented in Saber [3] and Spice environments [4]. Afterwards,Lauritzen introduced a model based on Lumped Charge Approach [5] which hasbeen successfully used for many power device models: diode [6] [7], GTO [8],and IGBT [9]. The main disadvantages of these models are complexity, time-consuming parameter extraction (in order to get an accurate agreement betweenthe datasheet and the model simulation) and long simulation times.

In previous thesis work [10], modeling of IGBT modules with parasitic elementsevaluation is done in Pspice based on Lauritzens lumped charge method. Thisflexible PSpice model is applicable to different IGBT modules with differentvoltage and current ratings by accordingly adjusting the parameters. Withthis model, Muhammad Nawaz has developed a platform for 4.5 kV and 2.0 kAStakPakTM IGBT module [11] [12], whose results show a good agreement withexperiment data and good prediction on the switching losses. However, limita-tion was found within this platform which does not allow for series connectionas well as simulations involving multiple occurrences of this model.

In this thesis, a behavioral model is developed. This model is more accurate thana simple switch but at the same time it is less complex than the physics-basedmodel. Behavioral models presented in [13] [14] using Hammerstein-like modelis what we seek for, consisting of a dc part for the static behavior and a dynamicpart for the transient behavior. In the thesis work by Henrik Hollander [15], anadopted model from [13] [14] is implemented in MATLAB with the design of gateunit in simulink. In this thesis, it is improved in Pspice environment and testedin single pulse test circuit simulations to see the dynamic performance. However,here the modeling of gate unit is not our interest, so the test circuit is drivenfirst by a simple voltage source then a simple current source and finally usingan ABB gate unit built by Muhammad Nawaz [12]. A method for parameterextraction is outlined by Hsu et al [16]. The behavior of this improved behavioralIGBT model much resembles the data from measurements, even though somedrawbacks were clear, such as the lack of time delay at turn-off and sharp voltagedrop at the end of turn-on.

Simulation results show quite good agreement with measurements for 2.8 kV

2

supply voltage and 2.0 kA load current operation points. Later, the parameterset is adapted for other operating modes which are relevant to EMC studies inconverter station and give satisfactory performance as well.

1.3 Structure

Chapter 2 describes the StakPakTM IGBT power module as well as compositionof the single pulse switching test circuit. Chapter 3 and 4 describe the diodeand IGBT model respectively. The results of single pulse test circuit simulationis shown in chapter 5 while the parametric analysis is presented meanwhilein order to investigate the influence of each model and circuit parameter ondevice behavior. Examples of other operation modes for the IGBT module arepresented in chapter 6. Chapter 7 then introduces how to aid the convergencein model implementation in Pspice environment. Afterwards, this model is putinto a simplified arm simulation to observe its series-connection performance inconverter station, which is illustrated in chapter 8. The minimum requirementis to achieve at least 8 IGBT in series together with their free-wheeling diodesi.e. a half cell. Finally, the discussion, conclusion as well as ideas regarding topossible future work are given in chapter 9, 10 and 11.

3

Chapter 2

Basis for the projectdevelopment

2.1 StakPak IGBT module

ABB StakPakTM K Series Press-Pack IGBT with voltage rating of 4.5 kV andcurrent rating of 2.0 kA is what being investigated in this thesis.

Figure 2.1: A hierarchical structure of StakPak IGBT module.

The StakPakTM IGBT module is expensive with complex packaging and madefor series connection. ABB is the only supplier as well as customer of it innowadays power semiconductor market. Each sub-module consists of six IGBTsand six diodes in parallel and the six sub-modules are connected in parallel toconstitute the entire IGBT module. Therefore, a total of 36 IGBTs and 36diodes are embedded in the StakPakTM IGBT module. An advantage is thatthe number of sub-modules can be adjusted from two to six to follow differentrequirements for HVDC-VSC converter applications.

4

ABB Generation 4 HVDC-VSC Converter (HVDC Light) is a cascaded two-levelconverter with much lower converter losses than previous generations. It has6 valve arms in total, one of each containing 36 cells, the interval structure ofone cell is illustrated in figure 2.1. Inside each cell there are 16 series-connectedIGBT power modules, but for simplicity every power module is represented byonly one single IGBT and corresponding diode in the figure.

Similarly, in the full scale converter simulation, constructing a complete modelfor a whole power module is unnecessary from both simulation time and costpoints of view. Therefore, the single pulse test circuit for testing the IGBTmodel feasibility is only conducted in the IGBT die level, not the sub-moduleor module level. A pair of paralleled IGBT and its free-wheeling diode replacean entire StakPakTM module. The working principle of test circuit is explainedin detail in chapter 2.2.

2.2 Single pulse test circuit

It is common to use the single pulse switching test circuit to observe the be-havior, especially the switching behavior of an IGBT. The circuit consists of avoltage supply VS , a stray resistance RS and inductance LS , a load resistanceRL and inductance LL, one upper and lower paralleled IGBT and diode as wellas their gate units. The upper IGBT and the lower diode are usually disre-garded since they are always in off state and do not have much impact on thesimulation results. Therefore, the figure below which shows the structure of thetest circuit uses dashed line to represent their inexistence, only the upper free-wheeling diode and the lower IGBT remained. The simplification can not onlyreduce the complexity of the circuit but also alleviate the convergence problem.

Figure 2.2: The single pulse test circuit in Pspice.

It can be seen that when lower IGBT turned on, current is flowing through the

5

load inductance to the IGBT while the diode is in reverse off state, as the blueloop shows. Then the IGBT is turned off and the load current commutes fromthe IGBT back to the diode, following the red loop. Since we are not focusing onhow the gate unit works, a simple voltage source is applied in the figure, whichcan be replaced by other gate units as well to control the IGBT switching.

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Chapter 3

Diode model

3.1 Model description

Since anti-parallel diode is also a key component in the StakPakTM IGBT powermodule, the diode model is important in obtaining correct transient character-istics. A simple way to model the diode is to regard it as blocking in the reversedirection and the current as a function of the voltage drop in the forward direc-tion, as described by the Schottky diode equation below:

ID = IS [eqVkT − 1] (3.1)

However, this equation neglects the reverse recovery of diode, which accountsfor the overshoot of collector current IC at the end of turn-off in the single pulsetest simulation. To include the reverse recovery, a better model derived fromsemiconductor charge transport equations is extended from the basic charge-control diode model.

In order to achieve the high level injection of carriers in the drift region, ahigh voltage p− i− n configuration is used for power diodes. According to [6],the original simple charge-control diode model only contains one storage node,so if the charge node becomes exhausted during reverse conduction, the diodewill immediately turn to blocking. In our thesis, to model the reverse recoverycaused by charge diffusion from the center of i region, a lumped charge methodis used for the existence of diffusion current. Then, when being subjected to areverse voltage, additional free charges will be left in this region and have tobe removed before the diode turned off. Therefore, a simple diode model withreverse recovery can be described by the equations below [6]:

iD =qE − qMTM

(3.2)

0 =dqMdt

+qMτ

+(qE − qM )

TM(3.3)

qE = ISτ [exp(vDnVth

)− 1] (3.4)

7

where qE , qM are two substitution variables which represent two excess storedcharges q0, q2, TM is the substitution variable which represents the approximatediffusion time across the region q2, IS is the diode saturation current, τ is thelifetime, n is the emission coefficient, iD is the diode current and vD is the diodevoltage. The steady-state DC forward I-V characteristics can be derived from(3.2) (3.3) (3.4) as:

iD =IS

1 + TM

τ

[exp(vDnVth

)− 1] (3.5)

If TM is set to be zero, the equation is same as Schottky diode equation (3.1).

3.2 Parameter extraction

Two measurement setups have to be considered for parameter extraction: astatic I-V characteristic and a turn-off switching.

Iterative approach is used to fit the parameters, as explained later in chapter 4,until the agreement with measurements achieves the accuracy. The waveformof diode reverse recovery current at inductive load turn-off switching is roughlyshown in figure 3.1 [15].

Figure 3.1: The diode reverse recovery current during turn-off switching.

To extract the parameters TM and τ , the constants T0, T1, IRM , di/dt as wellas the point p are supposed to be derived from the figure above, among whicha = di/dt is the slope of the line from t = 0 to t = T1. Thus, i(t) = IF +(di/dt)tduring the linear part.

Equation (3.6) describes the depletion of qM during the straight line from t = 0to t = T1, when the diode has low impedance. At t = T1, qE(T1) = 0, v(T1) = 0,equation (3.7) describes the diode current when the recovery starts. Equation

8

(3.8) is the reverse current after t = T1 i.e. when the current is no longerdependent on the diode voltage and diode has high impedance. Equation (3.9)is modified from equation (3.6) at t = T1 by substituting qM (T1) = IRMTM andT0 = T1−IRM/(di/dt). The reverse recovery time constant τrr can be measureddirectly from point p in figure 3.1, while lifetime τ obtained by equation (3.9)with a measurement of T1 and IRM . TM is then calculated from 1/τrr = 1/τ +1/TM . More detailed process of parameter extraction can be found in [6] and[15].

qM (t) = aτ [T0 + τ − t− τ exp(− tτ

)], for t < T1 (3.6)

I(T1) = −IRM = −qM (T1)

TM, for t = T1 (3.7)

i(t) = −IRM exp(− t− T1τrr

), for t > T1 (3.8)

IRM = a(τ − τrr)[1− exp(−T1τ

)] (3.9)

The other two parameters, n and IS , are obtained from the figure of steady-stateDC forward I-V characteristics.

9

Chapter 4

IGBT model

4.1 General description

Darlington representation with a MOSFET as the driver and a BJT as the out-put is used here to represent the IGBT in figure 4.1 [13]. Therefore, the transfercharacteristic is similar to that of the MOSFET, and the output characteristicis consistent with that of the BJT, but the input is changing from current tovoltage.

Figure 4.1: Darlington circuit of IGBT.

The IGBT is regarded as the black box with three external nodes visible. Themain structure of the behavioral model is shown in figure 4.2(a) [14], when figure4.2(b) [14] shows the Hammerstein-like structure of collector current, which iscomposed by two voltage-controlled current sources.

10

(a) Main structure of the behavioral model.

(b) Hammerstein like structure of IC .

Figure 4.2: The structure of Hammerstein-like IGBT model.

The model consists of two parts, static part and dynamic part. The equationsthat describe MOSFET in both linear and saturation regions and the equationsthat describe BJT in active region are used to model the static part. Sincethe model needs to reflect high-level injection associated with IGBT and thevoltage drop in the extrinsic part of the IGBT, correction functions f1 andf2 are introduced instead other more complicated ways that based on physicsmodel [17].

4.2 DC model

The typical output characteristics of our target IGBT is shown in figure 4.3 [20],according to datasheet.

11

Figure 4.3: The typical output characteristics of an IGBT.

In the DC model, the DC collector current IDC = f(VCE , VGE) is modeled andadapted from empirical MOSFET I-V characteristics:

IDC =

kf2[(VGE − VTH)(f1VCE − VD)− (f1VCE−VD)2

2 ], if VCE < VGE + VD − VTHkf2

(VGE−VTH)2

2 , if VCE > VGE + VD − VTH0, if VGE ≤ VTH or VCE < VD

(4.1)

where f1 and f2 are presented in polynomial forms to extend the MOSFET I-Vcharacteristics for entire IGBT:

f1 = a0 + a1VGE + a2V2GE (4.2)

f2 = b0 + b1VGE + b2V2GE (4.3)

VTH is the MOSFET channel threshold voltage, VD is the approximated turn-onvoltage of the p+/n− junction and k = (1+β)kp is the process transconductanceparameter where β is the current gain of BJT. The six constants a0 - a2 and b0 -b2 can be extracted from three saturation data points (VGE , VCE(sat), IC(sat))from the I-V curves of datasheets or measurements, according to two sets ofequations below:

f1VCE(sat) = VGE − VTH + VD (4.4)

IC(sat)

f2= k(VGE − VTH)2 (4.5)

Therefore, with given k, VD and VTH , a total of six equations can be obtained,the first three from (4.4) are solved to get a0 - a2 while next three from (4.5)result in b0 - b2.

12

4.3 Dynamic model

In order to model the nonlinearities in IGBT transient waveforms, linear dy-namic blocks in standard Hammerstein model become nonlinear by involvingnonlinear elements (capacitors) in figure 4.2(a), and the dynamic blocks areachieved through RC low-pass filters in figure 4.2(b) which have different timeconstants at turn on and turn off.

4.3.1 Model of capacitors

Nonlinear capacitors include the collector emitter capacitance Cce, the collectorgate capacitance Ccg and the gate emitter capacitance Cge. Figure 4.4(a) [14]shows an equivalent IGBT model that includes these capacitances between theterminals. To extract them, three capacitance curves for the input capacitanceCies, the output capacitance Coes and the reverse transfer capacitance Cres areobtained from datasheet.

In the experiments to test dynamic characteristics for a real IGBT, the inputcapacitance Cies is measured between the gate and emitter terminals with thecollector shorted to the emitter for AC signals. The output capacitance Coesis measured between the collector and emitter terminals with the gate shortedto the emitter for AC voltages. And the reverse transfer capacitance Cres ismeasured between the collector and gate terminals with the emitter connectedto ground.

13

(a) Equivalent IGBT model including capacitors between terminals.

(b) Typical capacitances vs. collector-emitter voltage.

Figure 4.4: The capacitance extraction of IGBT model.

Coes and Cres are both highly dependent on the collector emitter voltage asshown in figure 4.4(b) [20], dropping quickly from over 100 nF to below 10 nF,which can be directly fitted by polynomial functions, look-up tables, or by someassumed nonlinear functions. Here polynomial functions are used for accuratelyapproximate the nonlinear variation:

Cres(VCE) = Cres,0(1 + VCE)−kres + Cres,high (4.6)

Coes(VCE) = Coes,0(1 + VCE)−koes + Coes,high (4.7)

Since Cies is almost independent on VCE , it is assumed as constant in ourmodel. Cies, Coes and Cres are combinations of Cce, Ccg and Cge. Conversely,the transformation from Cies, Coes and Cres to Cce, Ccg and Cge can be doneby equations below:

14

Cce = Coes − Cres (4.8)

Ccg = Cres (4.9)

Cge = Cies − Cres (4.10)

Thus, Cce, Ccg and Cge are all nonlinear models which have nonlinear capaci-tances versus collector emitter voltage.

4.3.2 Model of block h1 and block h2

From figure 4.2 we can see the collector current IC consists of a conductioncomponent and a displacement component, U2 and U4, which are voltage vari-ables with current units. In figure 4.2(b), U1 = f(VCE , VGE) which represents

the instantaneous DC collector current and U3 = CCE(VCE)d(VCE)dt which is the

current through CCE are followed by RC low-pass filter block h1 and h2 respec-tively, to obtain the conduction component U2 and displacement componentU4.

Block h1 models the dynamics of the collector current IC during the constant

collector voltage switching test (e.g. d(VCE)dt = 0) when the collector terminal is

connected directly to a DC source without load. Block h2 models the dynamics

of the collector current IC (e.g. d(VCE)dt 6= 0) when a resistive load is connected

to the collector terminal. With them, the transient behavior of the IGBT canbe described more precisely. The parameters R1, C1, CX in h1 and R2, C2 inh2 have different values at turn-on and turn-off. R1, C1, CX represent the fastdecay of IC at the beginning of turn-off and R2, C2 represent the redistributioncurrent as well as non-quasi-static time delay [18] [19].

Based on the process of parameter extraction in [16], normally, C1, C2 are chosenas constant. During the constant collector voltage switching test, with fixed C1,R1 and CX are modeled as below:

R1 =

R1on, for VGE > VTHR1off , for VGE ≤ VTH

(4.11)

CX =

0, for VGE > VTH

( 1−αα )C1, for VGE ≤ VTH

(4.12)

where α means the ratio of the collector current after and before the fast decayat turn-off transients.

Similarly, with fixed C2, R2 is modeled as below:

R2 =

R2on, for turn on transientR2off , for turn off transient

(4.13)

15

where turn-on transient is when VGE > VTH , dVCE/dt < 0 and turn-off tran-sient is when VGE > VTH , dVCE/dt > 0 or VGEVTH , dVCE/dt < 0.

An initial parameter set is obtained from the measurement setups in [16], thensome iterative simulations are done and the results are used to compare withmeasurement data to further optimize the extracted parameters and improvethe agreement with the measurements.

Besides the model in figure 4.2, an alternative model is shown in figure 4.5 [14]with Hammerstein like structure of displacement component V4 replaced by aseries capacitor and resistor, CCE and RCE . RCE is necessary here to representthe non-quasi-static time delay of block h2.

In this case, with the assumption RCECCE ≈ R2C2, RCE is obtained by RCE ≈R2C2/CCE , which also has different values at turn-on and turn-off transients.

(a) Main structure of the alternative model.

(b) Hammerstein like structure of IC .

Figure 4.5: The structure of alternative Hammerstein-like IGBT model.

4.3.3 Model of time delay block

Since the behavior model consists of only capacitors and voltage-controlled cur-rent sources in main structure, it is unable to capture the turn-off time delay dueto the insufficiency of gate-emitter capacitance Cge. In the initial part of turn-off, when the gate terminal receives the turn-off signal from driver, Cge startsto discharge and gate-emitter voltage VGE starts to drop, the slope of whichdepends on the value of capacitance. With discharging, VGE will be lowered toa constant level and remain at this level while the collector-emitter capacitanceCce is charged to the full blocking voltage.

The turn-off time delay is the time from receiving turn-off signal to VGE drop-ping to the constant level, which relates to the slope of VGE dropping at theinitial part of turn-off. Since the value of Cge is only several nF during thatperiod, the discharge is very quick, making the slope almost vertical and thetime to reach the constant level too short. Therefore, to aid this problem, thevalue of Cge needs to be increased at the initial part of turn-off.

16

Many ways to implement the additional capacitance block Cge parallel weretried, one of the most useful is to connect a GVALUE block (shown in fig-ure 4.6) in parallel with Cge to produce the time delay. Only when VGE > VTHand DDT (VGE) < 0 (i.e. the dropping period of VGE) the capacitance blockCge parallel has positive value. During other period it equals to zero.

Figure 4.6: ABM block to implement the turn-off time delay.

Some trials have been done to find the suitable value of Cge parallel. With a valueof approximately 1 µs, the time delay much more resembled the simulation forreal IGBT. However, convergence problem always came in series connection andcould not be avoided. Because of the convergence issue brought by Cge parallel,the idea to achieve a good accuracy of the time delay was given up. Furthermore,the effect of accurate and inaccurate time delay in the simulations of EMCstudies can be accounted for as long as a same time delay is used for all theIGBTs.

17

Chapter 5

Simulation results

First of all, according to the calculation process described in chapter 3 and4, followed by comparison with single pulse data of StakPakTM 4.5 kV and2.0 kA IGBT power module, all the IGBT, diode and circuit parameters can beextracted in order to fit different characteristics.

The DC characteristic is first presented in chapter 5.1 then the single pulseswitching test circuit is simulated with simple voltage gate in chapter 5.2.1.Afterwards, the simple current source gate as well as complex gate unit built in[12] which much resembles the real ABB one is implemented in chapter 5.2.2 and5.2.3 to see the IGBT/diode performance with more accurate driving strategy.

5.1 DC characteristics

Before the dynamic behavior investigation, the static characteristics of collectorcurrent versus gate-emitter voltage at constant collector-emitter voltage, andcollector current versus collector-emitter voltage for a series of constant gate-emitter voltage, are investigated. Besides, the forward I-V characteristic ofdiode model is simulated.

Figure 5.1 shows the setup circuit for static characteristics, gate and collectorare both connected to a constant voltage source.

Figure 5.1: The Pspice schematic of static characteristics circuit.

18

5.1.1 IC versus VGE

The first test is IC versus VGE which varies from 7 V to 14 V when VCE is fixed at15 V. From figure 5.2, the comparison between the measurement data presentedin datasheet [20] and the simulation, a good agreement can be obtained whichindicates the good accuracy of the parameter set.

Figure 5.2: Static characteristic of collector current versus gate-emitter voltage atconstant collector-emitter voltage of 15 V.

Parametric analysis is run among all the model parameters to get analyticaltrend of the static behavior, from which the parameters mostly affect the staticcharacteristic of the IGBT model is the MOSFET channel threshold voltage,process transconductance parameter and the current gain of BJT transistor.The parametric sweep in appendix B.1 shows the way to tune the parametersto fit different operation modes or devices with different voltage and currentratings. The suitable applicability of these parameters can be observed as well.

5.1.2 IC versus VCE

The second test is IC versus VCE at a range of 0 V to 6 V when VGE is fixed atfour different values: 9 V, 11 V, 13 V and 15 V. Similarly, the comparison of thischaracteristic is given in figure 5.3. The simulation has satisfactory agreementwith the measurement at middle-high current levels and in low current level thecharacteristic could be improved by sacrificing the accuracy at high collector-emitter voltage level, which is superfluous since the model will be applied inhigh collector-emitter level.

One thing that needs to be considered is that such a parameter set that givesagreement for static behavior may bring unfair agreement for dynamic behavior.Additionally, since in my thesis the aim of this model is to serve for EMC studies

19

in switching simulation, dynamic behavior obtains most attention and has thepriority at tuning the parameters compared to static behavior. Therefore, laterwhen tuning a specific parameter set for single pulse switching simulation, thevalues of some parameters are changed from here and the accuracy of the staticbehavior is sacrificed.

Figure 5.3: Static characteristic of collector current versus collector-emitter voltagefor a series of constant gate-emitter voltage at 9 V, 11 V, 13 V and 15 V.

Same parametric analysis is conducted for all the model parameters and theresults is presented in appendix B.2. As can be seen, besides the three parame-ters discussed above, the approximated turn-on voltage of the p+ /n− junctionalso has impact on the conducting point from off-state to conducting state.Since these parameters has big influence on the dynamic behavior as well, theyhave to be extracted again later based on the dynamic measurement data. Thestatic characteristic will be sacrificed since according to goals of simulation themismatch can be neglected to some extent.

5.2 Dynamic characteristics

5.2.1 Voltage driving

A rectangular pulse voltage source is used first to control the IGBT gate, whichhas −5 V low voltage level and 15 V high voltage level. However, since in Pspicethe source is not a fully ideal step-shaped rectangular pulse but a trapezoidalpulse instead, a rise and fall time of 100 ns must be considered. Besides, in thesimulation the IGBT is turned on at 1 µs and turned off at 21 µs.

The basic case, 2.0 kA and 2.8 kV, is the standard operation mode for StakPakTM

IGBT module. It is used as a reference for comparison with other operation

20

modes in order to show the influence of some parameters on the IGBT behaviorand further optimize the design of IGBT model. Load current is also regardedas the diode free-wheeling current that is the initial current flowing through theload inductor realized by defining the IC parameter. The Pspice schematic ofsingle pulse test circuit with rectangular voltage source is shown in figure 5.4and the simulation results are presented in figure 5.5.

Figure 5.4: The Pspice schematic of single pulse test circuit with rectangular voltagesource.

21

(a) Source voltage pulse (dotted line), gate-terminal voltage (solid line) and currentthrough gate terminal (dashed line).

(b) Collector-emitter voltage (solid line) and collector current (dashed line).

Figure 5.5: Simulation results under standard operation mode with voltage sourcedriving.

The transition has similar behavior with a real IGBT power module. Therefore,the validation of the work of IGBT model can be obtained qualitatively, as wellas the diode model given by the reverse recovery current at IGBT turn-on. Inaddition, it is obvious that the gate terminal has capacitive behavior and theshape of voltage waveform is related to the value of gate resistor.

To improve the agreement between simulation and measurement, parametersneed to be tuned so parametric analysis must be done to invest which parametershave obvious impact on dynamic behavior, including all the circuit parameters(e.g. stray inductance and gate resistance) and IGBT/diode model parameters.Appendices B.3 and B.4 show some examples of parametric analysis for turn-onand turn-off, respectively.

A table is given to illustrate which parameters have influence on the turn-ontransient and which affect turn-off. As seen, the gate resistance, diode diffusiontransit time, on-state resistance of h1 block and the current gain of BJT transis-tor all can influence turn-on. Meanwhile, the stray inductance, ratio of IC afterand before the fast decay at turn-off, on-state as well as off-state resistance ofh1 block all have great impact on turn-off. None of the diode parameters affectturn-off behavior.

22

Table 5.1: Scope of influence of different parameters on the dynamic behavior.

Parameter Scope Parameter ScopeRg Turn on & off tau Turn onLS Turn on & off ttd Turn onkp Turn on & off R1on Turn on & offβ Turn on & off R1off Turn off

VTH Turn on & off R2off Turn offα Turn off

23

5.2.2 Current driving

Since the IGBT device is controlled by charge in nature, to reproduce a betterand more practical driving strategy, a step pulse current source is adopted.When the stimulus current is constant, the rate of charge injecting depends onthe current value. Once the charge injected into gate reaches the threshold,IGBT is switched from off to on state. Thus, if corresponding voltages andcurrents have good behavior, the model could be more strictly verified.

Based on [12], two anti-paralleled current sources are necessary, as in the stan-dard operating mode in figure 5.6. One responsible for injecting charges intogate i.e. turn-on transition, and another responsible for extracting charges out ofgate i.e. turn-off transition. A rise and fall time of 10 ns as well as a magnitudeof 6 A is used for both current sources.

Since there is no constraint on gate terminal voltage as in voltage source driving,to get the correct high and low clamping gate voltage, two Zener diodes are putback to back in series with breakdown voltage of 15 V for upper one and 5 Vfor lower one. An initial value of gate node voltage is set by part IC for thesimulator to do the initial bias point calculation.

Parameters have to be adjusted accordingly due to the change of the drivingmethod in this chapter and simulation results are given in figure 5.7.

Figure 5.6: The Pspice schematic of single pulse test circuit with constant currentsource.

24

(a) Source current pulse (dotted line), current through diodes (solid line) and gateterminal voltage (dashed line).

(b) Collector-emitter voltage (solid line) and collector current (dashed line).

Figure 5.7: Simulation results under standard operation mode with current sourcedriving.

From the gate terminal, it can be seen that the charging and discharging ofgate-emitter voltage i.e. the capacitive behavior of the IGBT, is reproducedsuccessfully, which means the current driving is also reliable in simulation andcan replace the voltage source driving. Note that the charging speed varies withthe magnitude of current pulse: higher the current is, faster the switching is.

Once again, parametric analysis is conducted with examples in appendix B.5to roughly show the impact of different model and circuit parameters. Someof them such as stray inductance have influence on both turn-on and off whilesome affect only turn-on (e.g. diode minority carrier lifetime) or turn-off (e.g.on and off state resistance of h1 block).

5.2.3 Complex ABB gate unit model

To better obtain and the model behavior and fit the measurements, a morerealistic gate unit could be implemented to replace the simple voltage or currentsource driving. A complex ABB gate unit model based on current drivingstrategy has been developed in [12]. Figure 5.8 is the single pulse test circuitschematic with the complex gate unit model.

25

Figure 5.8: The Pspice schematic of single pulse test circuit with ABB gate unitmodel.

Since only the switching of IGBT is concerned, many parts of the gate unit (e.g.supply voltage regulators and optical interfaces) have no need to be considered.Through the feedback of collector-emitter and gate-emitter voltages, paralleledcurrent sources are controlled to turn on or turn off independently, makingthe total of output current of the gate unit automatically allocated to differentlevels. A detailed description of the gate unit can be found in [12].

Correct high and low clamping gate voltage is crucial for the IGBT to performcorrect dynamic behavior. First the same principle as in the real ABB gate unitis tried, by controlling a two-level voltage source connected to the gate. But itturns out that other methods have to be considered since the digital controlleris very complex and time-consuming to be implemented in Pspice, the mostfeasible way is using Zener diodes as in chapter 5.2.2. The high voltage clampingat 15 V succeed with the first Zener diode, but a second one for the low voltageclamping at −5 V failed with unavoidable convergence problems. Therefore, thelow voltage clamping is only −1 V in this gate unit model.

26

Table 5.2: The entire parameter set extracted with the ABB gate unit model.

(a) IGBT parameters.

Parameter Value Pspice name Parameter Value Pspice namekp 1 V kp Cge1 30 nF Cge1β 170 beta Coes,0 340 nF Coes0

VTH 7 V Vth koes 1.57 koesVD 0.7 V Vd Coes,high 10.4 nF Coeshigha0 1.73 p0 Cies 220 nF Ciesa1 0.21 p1 C1 1 nF c1a2 0.01 p2 R1on 62.1040 Ω r1onb0 4.23 q0 R1off 51.1062 Ω r1offb1 0.49 q1 α 0.14864 alphab2 0.02 q2 C2 1 nF c2

Cres,0 400 nF Cres0 R2on 50 Ω r2onkres 1.56 kres R2off 50 Ω r2off

Cres,high 3.2 nF Creshigh

(b) Diode parameters.

Parameter Value Pspice nameIS 5.158× 10−9 A isaturazionetau 2.101 56× 10−6 s taudCj0 0 nF cj0dmj 0.5 mjdRs 220× 10−6 Ω rsdVj 1 V vjdn 2.64 ndiodottd 1.2917× 10−6 s ttdifc 0.5 fcdiode

(c) Circuit parameters.

Parameter Value Pspice nameRg 0.1 Ω RgLS 150 nF LsRS 100 mΩ RsLL 250 µF LlRL 1 mΩ RlVS 2800 V VceIload 2000 A IC

All the IGBT, diode and circuit parameters with the ABB gate unit model arepresented in table 5.2(a), (b) and (c). This parameter set is extracted fromsingle pulse clamped inductance switching at basic case: 2.8 kV supply voltageand 2.0 kA load current, combined with static DC characteristics of collectorcurrent versus gate-emitter voltage and collector-emitter voltage.

Note that in the block of Cge in figure 4.2, to fix the low derivative of collectorcurrent at turn-off, an additional IF function is applied so when the gate-emitter

27

voltage is below the constant level, Cge is decreased to Cge1 to faster dischargeleading to a higher derivative. Once the entire parameter set has already beenaccurately extracted, the simulation results with complex ABB gate unit areshown in figure 5.9 and figure 5.10, compared with single pulse test measurementdata.

Figure 5.9: Turn-on simulation results under standard operation mode with ABBgate unit model: collector-emitter voltage and collector current.

Figure 5.10: Turn-off simulation results under standard operation mode with ABBgate unit model: collector-emitter voltage and collector current.

28

A good agreement between simulation and measurement can be observed, es-pecially for turn-on. However, in simulation there is an apparent time leadat turn-off, because of the small gate-emitter capacitance, which causes rapiddecrease of gate-emitter voltage at initial part of turn-off. But it can be disre-garded since what we concerned is the derivative rather than the accurate timeto start turn-off, and the time difference can be estimated and predicted.

In addition to the IGBT voltage and current variations at switching, the diodereverse recovery characteristic is also investigated and presented in figure 5.11.

The big oscillation in measurement is something unwanted and comes fromdiode turn-off where the charges suddenly disappear in a snappy way. Themeasurement tried to make the diode softer during reverse recovery to minimizeoscillation, which has not been successful at all conditions. It can be triggeredby a snappy diode due to the internal chip structure giving capacitive behaviortogether with the mechanical layout giving inductances. Especially at colddevice (room temperature), high voltage and low current it still appear on the4.5 kV and 2.0 kA StakPakTM IGBT power module.

A physical behavior simulation tool is mandatory in order to model this bigoscillation. Therefore, it is disregarded in my simulation.

Figure 5.11: Simulation results of diode reverse recovery under standard operationmode with ABB gate unit model.

29

5.2.4 Frequency domain results

To see the frequency content of the IGBT and diode model, time domain sim-ulation results are transformed into frequency domain by fast fourier transform(FFT) in MATLAB.

FFT represents the frequency composition of the time signal in a block of timedata points. In FFT computation, a periodic time frame signal is assumed inevery data block so as to identify the frequency content of the measured signal.However, when computing a non-periodic signal a leakage yields in the frequencyspectrum, causing the signal energy smearing out over a wide frequency rangerather than a narrow range and the amplitude lower than expected value. Toidentify the frequency content becomes much more difficult with the leakage.

A window function is used to correct the leakage, by multiplying with the timedata block and forcing the time signal to be periodic. Hann window function ischosen since it has good frequency resolution, good spectral leakage, fair ampli-tude accuracy and best for random signal type [21]. A special weighting factoris also needed to recover the correct FFT signal amplitude after windowing.

Below is the collector-emitter voltage and collector current comparison betweensimulation and measurement at both turn-on and turn-of in figure 5.12 and 5.13.

The simulation obtains really good agreement with measurement especially inthe range from 10 kHz to 1 MHz, after which there is a slight difference whichstill does not go beyond the maximum applicability limit. Around 10 MHz a bigand continuous oscillation starts in the measurement resulting from the high-frequency interference during experiment. This interference is generated fromthe environment and apparatus which is kind of hard to reproduce in Pspicesimulator. However, since in EMC studies the frequency range concerned is onlyfrom 10 kHz to 10 MHz, the high-frequency interference part over 10 MHz canbe disregarded.

30

(a) Collector-emitter voltage.

(b) Collector current.

Figure 5.12: Turn-on comparison under standard operation mode with ABB gateunit model in frequency domain.

31

(a) Collector-emitter voltage.

(b) Collector current.

Figure 5.13: Turn-off comparison under standard operation mode with ABB gateunit model in frequency domain.

32

Chapter 6

Different operation modes

In order to test the possibility of this model being applied to different IGBTmodules with different voltage and current ratings in the future, first we needto evaluate the performance of the model under different operation modes for4.5 kV and 2.0 kA StakPakTM IGBT module. Simulations with varying loadcurrent and supply voltage, Iload and VS , have been performed in the samesingle pulse test circuit. One more operating mode example is given in thischapter: 3.6 kV and 1.2 kA.

Table 6.1: Parameter variation from table 5-2 for 3.6 kV and 1.2 kA operation mode.

Parameter Old value New value Pspice nameRg 1.2917× 10−6 s 6.2917× 10−6 s ttdiLS 2800 V 3600 V VceRS 2000 A 1200 A IC

To fit the measurements well, the process of accordingly adjusting the param-eters is repeated again as in chapter 5.2.3. Above are all the parameters thatchanged from the 2.8 kV and 2.0 kA operation mode.

33

Figure 6.1: Turn-on simulation results under 3.6 kV and 1.2 kA mode with ABB gateunit model: collector-emitter voltage and collector current.

Figure 6.2: Turn-off simulation results under 3.6 kV and 1.2 kA mode with ABB gateunit model: collector-emitter voltage and collector current.

34

Figure 6.3: Simulation results of diode reverse recovery under 3.6 kV and 1.2 kAmode with ABB gate unit model.

35

(a) Collector-emitter voltage.

(b) Collector current.

Figure 6.4: Turn-on comparison under 3.6 kV and 1.2 kA mode with ABB gate unitmodel in frequency domain.

36

(a) Collector-emitter voltage.

(b) Collector current.

Figure 6.5: Turn-off comparison under 3.6 kV and 1.2 kA mode with ABB gate unitmodel in frequency domain.

From both the time and frequency domain simulation results, it is verified thatunder 3.6 kV and 1.2 kA mode, the models still have similar dynamic behavior asreal IGBTs and diodes, which gives a strong confirmation to extend the powerapplication range of the models in future work.

37

Chapter 7

Convergence issues

There are always initial oscillations at collector current IC and collector-emittervoltage VCE when simulation starts in single pulse test circuit, only after sometime the oscillations can disappear and the waveform can back to normal con-dition. The reason is, at t = 0, the derivative of current and voltage increasesuddenly from zero to a very high value. Since the current through nonlinearcapacitors equals to the capacitance times derivative of voltage drop, it changesdramatically during the beginning of simulation, introducing extra oscillations.

To avoid these initial oscillations, the high derivative at t = 0 has to be elimi-nated, therefore, a STP function which suppress a value until a given amountof time has passed [22] is applied with the following expression in each ABMblock.

STP (TIME − 2000 ps) =

0, T IME ≤ 2000 ps1, T IME > 2000 ps

(7.1)

As the Ccg block shows below, before 2000 ps the derivative always equals tozero so the high derivative of current and voltage at the beginning is removedfrom simulation.

Figure 7.1: The example of STP function in capacitance Ccg.

7.1 Useful convergence solutions

If the circuit fails to converge, first the circuit topology and connectivity aswell as modeling of circuit components (e.g. semiconductors and behavioralmodeling expressions) should be checked, then the setting of Pspice options.

38

In Pspice options, there are a lot of parameters which can influence and de-termine the accuracy of the simulation results. By changing their values, theconvergence of the implemented circuit can be improved.

Consider our specific IGBT and diode models, the following convergence strate-gies are applied to aid the convergence:

• Taking strong nonlinearities and multiple cross references between differentblocks into account, a big resistor is placed in parallel with each ABM block toensure a DC path and the bias point (DC) convergence.

• Set reasonable values for parasitic circuit parameters, e.g. stray inductanceand resistance.

• Set the rise and fall time of stimuli to be 100 ns, avoid too high derivativevalues.

• Set realistic model parameters for semiconductors, e.g. junction built-in po-tential of diode.

• The output of all behavioral modeling expressions must be within the range+/- 1e10, since the voltage and currents in Pspice are limited to this range.

• Restrict behavioral modeling expressions. Use the LIMIT function to keepoutput within realistic bounds, not over the limited range.

• Relax the RELTOL restriction from the default value 0.001 to 0.05. It couldbring the loss of the relative accuracy of voltages and currents, but given thatthe loss is not considerable and instead it will increase the simulation speed by10% to 50%, therefore, it is recommended in this case. However, set RELTOLto a value either less than 0.001 or more than 0.05 is not recommended, sinceextra convergence problems may arise.

• Relax the ABSTOL restriction from the default value 1 pA to 1 µA. This willaid the convergence a lot since 1 pA for absolute branch current tolerance is toostrict in power electronics circuit, and the accuracy doesnt need to be that high.

• Relax the VNTOL restriction from the default value 1 µV to 10 µV. Since withdefault value there is always convergence problem in transient analysis, said thatthe time step is smaller than minimum allowable step size, the absolute nodevoltage tolerance has to be relaxed.

• SET IL4 from default value 10 to 100. This increases the number of transientiterations the simulator attempts at each time point before it gives up.

• Adjust the maximum time step size to 0.01 microseconds or smaller, forcing thesimulator to have a constant time step value. Some step values can effectivelyavoid certain non-converge points.

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• Tick on GMIN stepping to improve the convergence.

• Tick on preordering to reduce the matrix fill-in.

• Use AutoConverge when above-mentioned solutions are not enough to solveall the convergence problems.

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Chapter 8

Application in armsimulation fordemonstration

Now with the behavioral model developed in this thesis, accuracy has beenachieved. To test the created models in series connection, a much more simplifiedarm simulation is adopted instead of the full scale Light Generation 4 convertersimulation. Only one of all the six arms in the converter is involved in thesimulation which contains 36 cells. A figure of the simplified arm simulationcomposition is drawn in figure 8.1.

From the figure all the cells except cell 9 disregard the IGBTs and diodes. Thesecells are assumed to be bypassing the cell capacitor and hence only representedby an inductor. In switch 1 of cell 9, 8 simple switches and 8 anti-paralleledsimple diodes are substituted by corresponding IGBT and diode models. Whilein switch 2, only 8 series connected diodes are included.

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Figure 8.1: The simplified arm simulation composition of the full scale Light G4converter.

A shield is included in each cell to smooth out the electrical field towards thegrounded potential surfaces. There are stray capacitances from these shieldsto the ground. When we switch the semiconductors, we get a very fast changein the current and voltage i.e. high derivatives. This leads to high-frequencyharmonics in the current. Without stray capacitances to ground, the currentsthrough source voltage and terminate resistor should be same after switching.However, with stray capacitances, which acts as low impedance path for thesehigh-frequency currents flowing to ground, the currents through source voltageand terminate resistor are not same anymore.

In a real HVDC converter station we minimize the current flowing through straycapacitances by using some damping circuit. Therefore, by measuring the straycurrent at the main path in the simulation, that is the current difference betweenvoltage source and terminate resistor, the performance of semiconductor modelsare well evaluated.

Inside switch 1, the 8 IGBTs are driven by simple voltage source gate in chapter5.2.1. At first we were trying to use the complex gate unit model in chapter5.2.3, but unfortunately the simulation time is infinitely long, therefore, thesimple voltage source gate is a better choice. By adjusting parameters, thesingle pulse test simulation which fits the measurement best is shown in figure8.2 with simple voltage gate under standard operation mode.

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(a) Turn-on.

(b) Turn-off.

Figure 8.2: Single pulse test results of collector-emitter voltage and collector currentwith voltage source driving under standard operation mode.

Figure 8.3 shows the turn-on and turn-off waveforms across one IGBT in switch1 of cell 9. The comparison is between IGBT and models of this thesis againstthe simple switches and diodes used prior to this thesis. Figure 8.4 presentsthe difference between current through voltage source and through terminateresistor i.e. the stray current. Figure 8.5 gives the results of stray current infrequency domain.

43

(a) Turn-on.

(b) Turn-off.

Figure 8.3: Voltage and current Waveforms for IGBT and diode models comparedwith simple switches and diodes in time domain.

Obviously, with simple switch and diode the switching finishes instantaneouslywith unfeasible infinite current and voltage derivatives. With the IGBT/diodemodels in this thesis the derivatives are much closer to the measurement. Mean-while, the significant peak brought by bypassing inductor at turn-off is elimi-nated by new models. Reverse recovery characteristic and the overshoot ofcurrent at turn-on transient are introduced as well by new models.

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(a) Turn-on.

(b) Turn-off.

Figure 8.4: Stray current waveforms for IGBT and diode models compared withsimple switches and diodes in time domain.

Modeling semiconductors correctly is important, since the stray current is stronglyaffected by the way of modeling. Obviously the simple switch and diode givehigher amplitude and less damped currents while new models give lower ampli-tude and more damped currents through stray capacitances. It is also concludedthat switching goes back to static state more quickly under new models withmore stable performance.

Furthermore, turn-on has smaller stray current than turn-off after switching.

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(a) Turn-on.

(b) Turn-off.

Figure 8.5: Stray current waveforms for IGBT and diode models compared withsimple switches and diodes in frequency domain.

Above gives the amplitude of stray current at the valve arm in frequency do-main. The amplitude with simple switch and diode are much higher than withIGBT and diode models, especially around the neighbor of 1 MHz. In the highfrequency region it is obvious that simple switch and diode result in more se-vere disturbance which does not exist in real measurements and will lead toinaccurate EMC analysis.

To observe the improvement more clearly, an extra damper of 80 pF is added

46

in each cell to further damp the high-frequency harmonics and obtain a muchsmaller stray current at main path as in figure 8.6. Again, turn-on has betterdamping performance than turn-off.

Now, we can say that the new IGBT and diode models achieve series-connection,simulation speed, convergence and enough accuracy at the same time.

(a) Turn-on.

(b) Turn-off.

Figure 8.6: Stray current waveforms including extra damper for IGBT and diodemodels compared with simple switches and diodes in frequency domain.

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Chapter 9

Discussion

The tail voltage at the end of turn-on is absent in this IGBT model, instead arather sharp voltage drop is observed as in the comparison figure 5.14. Sometrials has been done to smooth the drop and lower its derivative, however, con-sidering the possible convergence issue brought into series connection, it is notworthy to include a big capacitor to introduce the tail voltage. An underesti-mation of switching losses will also occur because normally there are some taillosses in the real IGBT. However, since the accurate power losses in the semi-conductors do not play a significant role in the EMC studies, the tail voltagecan be disregarded.

Another drawback is the too sharp current peak during turn-on compared tothe measurement, an inductor is recommended to be added between emitterand collector to smooth the sharp current peak. But no matter how big theinductor is the peak cannot be improved well. We have not found a proper wayto obtain an apparently more flat overshoot yet.

Compared to the behavioral IGBT model, the diode model is a physical onebased on the lumped charge method which has a really good reverse recoverybehavior during IGBT switching.

To directly see what is good and what is limited, the new modeling way is com-pared back with lumped charge models in Muhammd Nawaz’s IGBT platformin different aspects as shown in table 9.1 and 9.2.

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Table 9.1: Differences/Similarities between lumped charge model and new model.

Lumped charge model New model

Differences

Physical model based onlumped charge approach

Behavioral model

17 parameters for IGBT 25 parameters for IGBTIn the charge level In the voltage/current level

Charge equations embeddedinto the equivalent circuit,

31 equations in total

Darlington representationwith a DC part

and a dynamic part

Extract parameters through:DC I-V characteristics;

inductance load switching plot;gate charge plot

Extract parameters through:DC I-V characteristics;

capacitance curves;Vce switching test

with/without resistive load

SimilaritiesImplement a complex ABB gate unit model with ABS blocks

Use the same physics-based simple diode modelwith reverse recovery (by Lauritzen [6])

Table 9.2: Advantages/disadvantages of lumped charge model and new model.

Lumped charge model New model

Simulationspeed

Slow,infinitely long simulation timefor simplified arm simulation

Fast,less than 20 minutes

for simplified arm simulation

Seriesconnection

Convergence failswhen series connection,

even for a half cell

Enable series connectionfor at least 8 IGBTs

and their anti-parallel diodesParameterextraction

Complex experiments andtime-demanding calculation

Easy experiments andsimple post-process of data

Accuracy

Highly accurate,given the physical structure

and the equation sets

Less accurate,but enough for EMC studieswhere speed and convergence

are most important

Precise time delay at turn-offLack of time delay at turn-off

which is not concerned

Precise tail currents/voltagesLack of tail voltage

and too sharp current peakApplication

rangeWidely validated To be investigated

From the two tables above, the benefits of new model are obvious but at the sametime its limitation needs attention as well. In order to enable series connectionand solve convergence issue some minor parts of dynamic behavior are sacrificedand disregarded. Therefore, in application which requests high accuracy ratherthan simulation speed and no multi-occurrence required, the model might not besuitable and instead Muhammads physical one obtains better results. Moreover,it applies only to power electronic devices, and for other types of semiconductor

49

devices besides StakPakTM 4.5 kV and 2.0 kA IGBT power module, parametershave to be tuned once again and the use needs further validation.

For model users in the future, three things to be noticed: for every differentoperation mode, the parameter set has discontinuity and extraction has to berepeated even within one specific device; the temperature dependence is notconsidered in the model building and testing; the accuracy does not support theloss calculation and estimation for power modules.

Furthermore, in this thesis work, all the simulations that have been conductedas well as their pros and cons are summarized in table 9.3.

Table 9.3: Advantages/disadvantages of all the simulations from previous chapters.

Single pulse simulation

AdvantagesSimple structure,

an easy way to test IGBT/diode modelcorrectness and accuracy

DisadvantagesCannot reproduce the actual switching behavior

and disturbances in real converter stationSimplified arm simulation for demonstration

AdvantagesNecessary for testing the ability of series connection

and the general EMC performance of the converter station

DisadvantagesComplicated,

high requirements for IGBT/diode model(not too advanced and at the same time not too simple)

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Chapter 10

Conclusion

With previous physical IGBT and diode model based on Lauritzen lumpedcharge method which built by Muhammad Nawaz, the process to extract pa-rameter set for IGBT and diode in 4.5 kV and 2.0 kA StakPakTM IGBT moduleis too time-consuming and tedious for engineers to apply and adapt. And thecomplicated internal composition makes the simulation of full scale Light Gen-eration 4 converter for EMC studies always fail with convergence issue.

In this report, a simpler behavioral IGBT model is created which captures thebasic behaviors of currents and voltages at commutation events in both timeand frequency domain very well, especially when driven by the complex ABBgate unit. The convergence is tested and verified in a simplified arm simulation,achieving 8 IGBTs in series connection with anti-paralleling diodes. Therefore,the IGBT model is highly recommended to be applied in the Light Generation4 converter EMC simulation, considering the reduction of stray current as well.Parametric sweep is also performed among all the circuit and model parame-ters in order to investigate their influence on the device behavior and limits ofapplicability, for future use in other types of semiconductor devices in additionto StakPakTM 4.5 kV and 2.0 kA power module.

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Chapter 11

Future work

The manual parameter extraction procedure can be adjusted to become anautomatic procedure which save the time and lessen the workload at the sametime. And the accuracy can be improved by ameliorating the internal structureof the IGBT model e.g. fixing the tail voltage at turn-off and the too sharpcurrent peak at turn-on.

The performance of the complex ABB gate unit model can be improved, such asthe negative clamping, to be better consistent with the experimental behavior.

Last but not the least, the application range of the IGBT model is supposed tobe investigated, to maximize the use in the future, not only for Light Generation4 converter system, but also for Generation 5.

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Bibliography

[1] A. R. Hefner, “An improved understanding for the transient operation ofthe power insulated gate bipolar transistor (igbt),” in Power ElectronicsSpecialists Conference, 1989. PESC ’89 Record., 20th Annual IEEE, Jun1989, pp. 303–313 vol.1.

[2] ——, “An investigation of the drive circuit requirements for the power insu-lated gate bipolar transistor (igbt),” Power Electronics, IEEE Transactionson, vol. 6, no. 2, pp. 208–219, Apr 1991.

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[5] C. Ma, P. Lauritzen, P.-Y. Lin, I. Budihardjo, and J. Sigg, “A system-atic approach to modeling of power semiconductor devices based on chargecontrol principles,” in Power Electronics Specialists Conference, PESC ’94Record., 25th Annual IEEE, Jun 1994, pp. 31–37 vol.1.

[6] P. O. Lauritzen and C. Ma, “A simple diode model with reverse recovery,”Power Electronics, IEEE Transactions on, vol. 6, no. 2, pp. 188–191, Apr1991.

[7] C. Ma and P. Lauritzen, “A simple power diode model with forward andreverse recovery,” Power Electronics, IEEE Transactions on, vol. 8, no. 4,pp. 342–346, Oct 1993.

[8] C. Ma, P. Lauritzen, and J. Sigg, “A physics-based gto model for circuitsimulation,” in Power Electronics Specialists Conference, 1995. PESC ’95Record., 26th Annual IEEE, vol. 2, Jun 1995, pp. 872–878 vol.2.

[9] P. O. Lauritzen, G. Andersen, and M. Helsper, “A basic igbt model witheasy parameter extraction,” in Power Electronics Specialists Conference,2001. PESC. 2001 IEEE 32nd Annual, vol. 4, 2001, pp. 2160–2165 vol. 4.

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Appendix A

Pspic schematics

A.1 IGBT model

55

56

A.2 Diode model

57

Appendix B

Parametric analysis

B.1 Parametric analysis for collector current ver-sus gate-emitter voltage at constant collector-emitter voltage of 15 V.

Figure B.1: MOSFET channel threshold voltage (VTH) increases from 6.5 V to 8 V.

58

Figure B.2: Process transconductance parameter (kp) increases from 0.68 S to 1.2 S.

Figure B.3: Current gain of BJT transistor (β) increases from 150 to 280.

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B.2 Parametric analysis for collector current ver-sus collector-emitter voltage for a series ofconstant gate-emitter voltage at 9 V, 11 V,13 V and 15 V.

Figure B.4: MOSFET channel threshold voltage (VTH) increases from 6.8 V to 7.3 V.

Figure B.5: Approximated turn-on voltage of the p + /n− junction (VD) increasesfrom 0.6 V to 0.8 V.

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Figure B.6: Process transconductance parameter (kp) increases from 0.68 S to 1 S.

Figure B.7: Current gain of BJT transistor (β) increases from 170 to 250.

61

B.3 Parametric analysis for turn-on transientwith voltage source driving.

Figure B.8: Gate resistance (Rg) increases from 0.7 Ω to 1.2 Ω.

Figure B.9: Diode diffusion transit time (ttdi) increases from 8 × 10−7 s to2.5 × 10−6 s.

62

Figure B.10: On-state resistance of h1 block (r1on) increases from 38 Ω to 310 Ω.

Figure B.11: Current gain of BJT transistor (β) increases from 130 to 250.

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B.4 Parametric analysis for turn-off transientwith voltage source driving.

Figure B.12: Stray inductance (LS) increases from 70 nH to 150 nH.

Figure B.13: Ratio of IC after and before the fast decay at turn-off (α) increasesfrom 0.1 to 0.3.

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Figure B.14: On-state resistance of h1 block (R1on) increases from 38 Ω to 310 Ω.

Figure B.15: Off-state resistance of h1 block (r1off) increases from 35 Ω to 270 Ω.

65

B.5 Parametric analysis for turn-on and off tran-sient with current source driving.

Figure B.16: Stray inductance (LS) increases from 50 nH to 150 nH.

Figure B.17: Diode minority carrier lifetime (taud) increases from 0.5 µs to 4 µs.

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Figure B.18: On-state resistance of h1 block (R1on) increases from 40 Ω to 150 Ω.

Figure B.19: Off-state resistance of h1 block (R1off ) increases from 40 Ω to 150 Ω.

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Figure B.20: Turn-off resistance of h2 block (R2off ) increases from 30 Ω to 110 Ω.

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