24
of Sheet Date: Title: Ver: A B C D 1 2 3 4 D C B A 4 3 2 1 Sheet Size: B Rev: Drawn By TDI DNP PC4 TDO TDI TDO TDI BF PWR 5V 24 Linear Flash Linear Flash USB host Headers and SDRAM DDR 266 PS2 1 Audio AC97 Platform Flash SystemACE 2 line Character LCD VGA 64 bit LVDS Expansion Header Mouse PS2 Keybrd Differential SMA Clocks 100MHz Xtal Optional USER Xtal UART DDR 266 SDRAM 10/100/1000 PHY RJ45 Magnetics ZBT SRAM Circuit for Analog DVM USB Peripheral 2 USB Peripheral 1 USB XC95144XL CPLD 3.3V@3A 2.5V@3A 1.8V@150mA IIC EEPROM [email protected] 1.2V@6A Jack Power Supply SX35 LX15, FX12, SX25 LX25, LX40, LX60 320 User IOs up to 448 User IOs 10 Banks 8 Banks Virtex 4 FPGA Device Banks TDO CFGTDO TSTTDI SysACE PlatFlash FPGA CPLD PC4 DNP CFGTDI TSTTDO TDI Expansion JTAG Chain TDO Compatibility and Available IOs GPIO 1.0 B 8/19/2004 ML401/2/3 Block Diagram

ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

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Page 1: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

TDI

DNP

PC4

TDOTDI TDOTDI

BF

PWR5V

24

Linear Flash

Linear Flash

USB host

Headers and

SDRAMDDR 266

PS2

1

AudioAC97

PlatformFlash

SystemACE

2 lineCharacter LCD

VGA

64 bit LVDS Expansion Header

MousePS2

Keybrd

Differential SMA Clocks

100MHzXtal

OptionalUSERXtal

UART

DDR 266SDRAM

10/100/1000 PHYRJ45 Magnetics

ZBT SRAM

Circuit forAnalog DVM

USB Peripheral 2

USB Peripheral 1

USB

XC95144XL

CPLD

3.3V@3A

2.5V@3A

1.8V@150mA

IICEEPROM

[email protected]

1.2V@6A

Jack

Power Supply

SX35

LX15, FX12, SX25

LX25, LX40, LX60

320 User IOs

up to 448User IOs

10 Banks

8 Banks

Virtex 4

FPGA Device Banks

TDOCFGTDOTSTTDI

SysACE PlatFlash FPGA CPLD

PC4

DNP

CFGTDITSTTDO

TDI

Expansion

JTAG Chain

TDO

Compatibility and Available IOs

GPIO

1.0

B

8/19/2004

ML401/2/3 Block Diagram

Page 2: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

IO_L1P_GC_LC_4_AF12IO_L1N_GC_LC_4_AE12IO_L2P_GC_LC_4_AC10IO_L2N_GC_LC_4_AB10IO_L3P_GC_LC_4_AB17IO_L3N_GC_LC_4_AC17IO_L4P_GC_LC_4_AF11

IO_L4N_GC_VREF_LC_4_AF10IO_L5P_GC_LC_4_AE14IO_L5N_GC_LC_4_AE13IO_L6P_GC_LC_4_AE10IO_L6N_GC_LC_4_AD10

IO_L7P_GC_VRN_LC_4_AD17IO_L7N_GC_VRP_LC_4_AD16IO_L8P_GC_CC_LC_4_AD12IO_L8N_GC_CC_LC_4_AD11

VN_SM_AF15VP_SM_AF16

IO_L1P_D31_LC_1_F14IO_L1N_D30_LC_1_F13IO_L2P_D29_LC_1_F12IO_L2N_D28_LC_1_F11IO_L3P_D27_LC_1_F16IO_L3N_D26_LC_1_F15IO_L4P_D25_LC_1_D14

IO_L4N_D24_VREF_LC_1_D13IO_L5P_D23_LC_1_D15IO_L5N_D22_LC_1_E14IO_L6P_D21_LC_1_C11IO_L6N_D20_LC_1_D11IO_L7P_D19_LC_1_D16IO_L7N_D18_LC_1_C16

IO_L8P_D17_CC_LC_1_E13IO_L8N_D16_CC_LC_1_D12

HSWAPEN_0_G16CCLK_0_G14D_IN_0_G12

PROGRAM_B_0_H15INIT_0_G15CS_B_0_G11DONE_0_H14

RDWR_B_0_H12VBATT_0_Y16

M2_0_W14PWRDWN_B_0_W13

TMS_0_Y11M0_0_W15TDO_0_Y13TCK_0_W12M1_0_Y15

DOUT_BUSY_0_Y14TDI_0_Y12TDN_0_G13TDP_0_H13

IO_L1P_D15_CC_LC_2_AA14IO_L1N_D14_CC_LC_2_AB14

IO_L2P_D13_LC_2_AC12IO_L2N_D12_LC_2_AC11IO_L3P_D11_LC_2_AA16IO_L3N_D10_LC_2_AA15IO_L4P_D9_LC_2_AB13

IO_L4N_D8_VREF_LC_2_AA13IO_L5P_D7_LC_2_AC14IO_L5N_D6_LC_2_AD14IO_L6P_D5_LC_2_AA12IO_L6N_D4_LC_2_AA11IO_L7P_D3_LC_2_AC16IO_L7N_D2_LC_2_AC15IO_L8P_D1_LC_2_AC13IO_L8N_D0_LC_2_AD13

IO_L1P_GC_CC_LC_3_B15IO_L1N_GC_CC_LC_3_B14IO_L2P_GC_VRN_LC_3_A12IO_L2N_GC_VRP_LC_3_A11

IO_L3P_GC_LC_3_C15IO_L3N_GC_LC_3_C14IO_L4P_GC_LC_3_B13

IO_L4N_GC_VREF_LC_3_B12IO_L5P_GC_LC_3_A16IO_L5N_GC_LC_3_A15IO_L6P_GC_LC_3_A10IO_L6N_GC_LC_3_B10IO_L7P_GC_LC_3_B17IO_L7N_GC_LC_3_A17IO_L8P_GC_LC_3_C13IO_L8N_GC_LC_3_C12

B

Added 50ohm for protection

(Feedback)

24

DCI

FPGA Banks 0,1,2,3,4

2 BF

(Feedback)

FPGA_BANK4

3.3V VCC0

FPGA_BANK3

2.5V VCC0

3.3V VCC0

FPGA_BANK0

Configuration

FPGA_BANK1

3.3V VCC0

FPGA_BANK2

3.3V VCC0

Optional

(Feedback)

In case FPGA and PLAT Flashor CPLD drive CCLK

SYS_MON_VP0SYS_MON_VN0

DDR_BA1DDR_A13

SRAM_FLASH_D18SRAM_FLASH_D19SRAM_FLASH_D20

PLATFLASH_CPLD_CCLK

B15B14A12A11C15C14B13B12A16A15A10B10B17A17C13C12

U1

FPGA_CS_B

FPGA_CCLKFPGA_DIN

12

47R

R184

LCD_DB5

SYSCLK_100MHZ

SRAM_CLK

MOUSE_CLKPHY_RXC_RXCLK

MOUSE_DATA

GPIO_LED_3

DDR_BA0

USERCLK

DDR_CK1_P

SYSACE_CLK

21

R219

1K

AA14AB14AC12AC11AA16AA15AB13AA13AC14AD14AA12AA11AC16AC15AC13AD13

U1

G16G14G12H15G15G11H14H12Y16W14W13Y11W15Y13W12Y15Y14Y12G13H13

U1

AF15AF16F14F13F12F11F16F15D14D13D15E14C11D11D16C16E13D12

U1

AF12AE12AC10AB10AB17AC17AF11AF10AE14AE13AE10AD10AD17AD16AD12AD11

U1

GPIO_LED_2

12

DNP

R221

12

1K

R220

LCD_RWLCD_RS

NC

NCFPGA_PROM_CPLD_TMS

FPGA_VBATT

FPGA_DONE

FPGA_M2

FPGA_M0

FPGA_DOUT_BUSYFPGA_TDI

SRAM_FLASH_D11

SRAM_FLASH_D0

FPGA_M1

FPGA_TDO

FPGA_PROG_BFPGA_INIT

FPGA_PROM_CPLD_TCK

SRAM_FLASH_D15SRAM_FLASH_D14SRAM_FLASH_D13SRAM_FLASH_D12

SRAM_FLASH_D10SRAM_FLASH_D9SRAM_FLASH_D8SRAM_FLASH_D7SRAM_FLASH_D6

SRAM_FLASH_D4SRAM_FLASH_D3SRAM_FLASH_D2SRAM_FLASH_D1

SRAM_FLASH_D5

LCD_DB7LCD_DB6

LCD_DB4

NC

SRAM_FLASH_D16SRAM_FLASH_D17

SRAM_FLASH_D21SRAM_FLASH_D22SRAM_FLASH_D23SRAM_FLASH_D24SRAM_FLASH_D25SRAM_FLASH_D26SRAM_FLASH_D27SRAM_FLASH_D28SRAM_FLASH_D29SRAM_FLASH_D30SRAM_FLASH_D31

AUDIO_BIT_CLK

21

R222

DNP

SMA_DIFF_CLK_IN_NSMA_DIFF_CLK_IN_P

DDR_CK1_NDDR_CK1_P

21

R223

4.7K

USB_CS_N

LCD_E

FLASH_AUDIO_RESET_N

IIC_SCLIIC_SDA

PHY_TXCLK

AUDIO_SDATA_IN

FPGA_DIN

Page 3: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

0402

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

IO_L1P_5_C17IO_L1N_5_D17IO_L2P_5_C20IO_L2N_5_B20IO_L3P_5_B18IO_L3N_5_A18IO_L4P_5_D20

IO_L4N_VREF_5_D19IO_L5P_5_E17IO_L5N_5_F17IO_L6P_5_C21IO_L6N_5_B21IO_L7P_5_C19IO_L7N_5_D18

IO_L8P_CC_LC_5_A24IO_L8N_CC_LC_5_A23

IO_L17P_5_G19IO_L17N_5_F19IO_L18P_5_E23IO_L18N_5_E22IO_L19P_5_F20IO_L19N_5_E20IO_L20P_5_C26

IO_L20N_VREF_5_C25IO_L21P_5_D23IO_L21N_5_C23IO_L22P_5_H20IO_L22N_5_G20

IO_L23P_VRN_5_G22IO_L23N_VRP_5_G21

IO_L24P_CC_LC_5_F24IO_L24N_CC_LC_5_F23IO_L9P_CC_LC_5_G18IO_L9N_CC_LC_5_G17

IO_L10P_5_B24IO_L10N_5_B23IO_L11P_5_F18IO_L11N_5_E18IO_L12P_5_E21

IO_L12N_VREF_5_D21IO_L13P_5_A20IO_L13N_5_A19IO_L14P_5_D22IO_L14N_5_C22IO_L15P_5_A22IO_L15N_5_A21IO_L16P_5_D24IO_L16N_5_C24

IO_L25P_CC_LC_5_D26IO_L25N_CC_LC_5_D25

IO_L26P_5_H22IO_L26N_5_H21IO_L27P_5_E25IO_L27N_5_E24IO_L28P_5_G24

IO_L28N_VREF_5_G23IO_L29P_5_F26IO_L29N_5_E26IO_L30P_5_H24IO_L30N_5_H23IO_L31P_5_G26IO_L31N_5_G25IO_L32P_5_H26IO_L32N_5_H25

IO_L1P_6_D10IO_L1N_6_C10IO_L2P_6_D9IO_L2N_6_C8IO_L3P_6_A8IO_L3N_6_A7IO_L4P_6_D8

IO_L4N_VREF_6_D7IO_L5P_6_F10IO_L5N_6_E10IO_L6P_6_A6IO_L6N_6_A5IO_L7P_6_E9IO_L7N_6_F9

IO_L8P_CC_LC_6_B6IO_L8N_CC_LC_6_C6

IO_L17P_6_E7IO_L17N_6_D6IO_L18P_6_E6IO_L18N_6_E5IO_L19P_6_F7IO_L19N_6_G7IO_L20P_6_C2

IO_L20N_VREF_6_C1IO_L21P_6_H8IO_L21N_6_H7IO_L22P_6_D3IO_L22N_6_E4

IO_L23P_VRN_6_G6IO_L23N_VRP_6_G5

IO_L24P_CC_LC_6_E3IO_L24N_CC_LC_6_E2IO_L9P_CC_LC_6_G10IO_L9N_CC_LC_6_G9

IO_L10P_6_F8IO_L10N_6_G8IO_L11P_6_B7IO_L11N_6_C7IO_L12P_6_C5

IO_L12N_VREF_6_D5IO_L13P_6_A9IO_L13N_6_B9IO_L14P_6_A3IO_L14N_6_B3IO_L15P_6_A4IO_L15N_6_B4IO_L16P_6_C4IO_L16N_6_D4

IO_L25P_CC_LC_6_D2IO_L25N_CC_LC_6_D1

IO_L26P_6_E1IO_L26N_6_F1IO_L27P_6_F4IO_L27N_6_F3IO_L28P_6_G4

IO_L28N_VREF_6_G3IO_L29P_6_H6IO_L29N_6_H5IO_L30P_6_G2IO_L30N_6_G1IO_L31P_6_H4IO_L31N_6_H3IO_L32P_6_H2IO_L32N_6_H1

VTTDDR

VTTDDR

B

24

DCIOptional

BF

FPGA Bank 5, 6

3

FPGA_BANK5

2.5V VCC0

FPGA_BANK6

2.5V VCC0

1 2R2

47R

DDR_LOOPDDR_A7

DDR_CKEDDR_CS_N

GPIO_LED_1GPIO_LED_0

PHY_RXER

PHY_TXCTL_TXEN

PHY_RXD4

PHY_TXC_GTXCLK

PHY_TXD2

PHY_TXD3PHY_TXD4PHY_TXD5PHY_TXD6

PHY_TXER

DDR_A6DDR_A5DDR_A10

DDR_A4

DDR_A11

DDR_A12

DDR_DM0

DDR_D1

DDR_D25DDR_D8

DDR_D22DDR_D10DDR_D0

DDR_DQS1DDR_DQS2DDR_D23DDR_D19DDR_D16DDR_D15

DDR_D12

DDR_D21DDR_DM3

DDR_D13DDR_D14

DDR_DQS3

DDR_D3DDR_D31

DDR_D7DDR_DM1

DDR_D5DDR_D30DDR_D26

SMA_DIFF_CLK_OUT_NSMA_DIFF_CLK_OUT_P

PHY_MDCKEYBOARD_CLK

DDR_D28

DDR_D2DDR_D29

PHY_RXD2

PHY_RXD0

PHY_TXD0

PHY_COL

PHY_CRSPHY_RXCTL_RXDV

PHY_RXD7PHY_RXD6PHY_RXD5

PHY_RXD3

PHY_RXD1

USB_RESET_N

1

2

C4000.22UF

DDR_A0

VGA_HSYNC

AUDIO_SDATA_OUTAUDIO_SYNC

GPIO_LED_N2 1

R4

0R

PHY_TXD1

PHY_TXD7

120R

R14 2 1R8

0R

120R

R72 1R24

0R

120R

R102 1R11

0R

120R

R9 PHY_INT2 1

R23

0R

120R

R222 1R21

0R

VGA_B3VGA_B4VGA_B5VGA_B6

PHY_MDIO

D10C10D9C8A8A7D8D7F10E10A6A5E9F9B6C6E7D6E6E5F7G7C2C1H8H7D3E4G6G5E3E2G10G9F8G8B7C7C5D5A9B9A3B3A4B4C4D4D2D1E1F1F4F3G4G3H6H5G2G1H4H3H2H1

U1

C17D17C20B20B18A18D20D19E17F17C21B21C19D18A24A23G19F19E23E22F20E20C26C25D23C23H20G20G22G21F24F23G18G17B24B23F18E18E21D21A20A19D22C22A22A21D24C24D26D25H22H21E25E24G24G23F26E26H24H23G26G25H26H25

U1

DDR_CAS_NDDR_RAS_N

12

DNP

R225

DDR_WE_N

DDR_DM2

DDR_D9

DDR_D11

DDR_D4

DDR_A1

DDR_A9

DDR_A3DDR_A2

DDR_D17

DDR_D27

DDR_D6

DDR_D20

DDR_DQS0

DDR_A8

21

R224

DNP

VGA_B7

VGA_G3VGA_G4VGA_G5VGA_G6VGA_G7VGA_R3VGA_R4VGA_R5VGA_R6VGA_R7FPGA_CPU_RESETGPIO_SW_NGPIO_LED_CGPIO_SW_CGPIO_LED_WGPIO_SW_WGPIO_LED_SGPIO_SW_SGPIO_LED_EGPIO_SW_E

PHY_RESET

DDR_D18

DDR_D24

2

1 C3910.047UF

VGA_VSYNC

KEYBOARD_DATA

DDR_LOOP

Page 4: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC3V3

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

IO_L25P_CC_SM1_LC_7_AD19IO_L25N_CC_SM1_LC_7_AC19

IO_L26P_SM2_7_AA19IO_L26N_SM2_7_AA20IO_L27P_SM3_7_Y17IO_L27N_SM3_7_AA17

IO_L28P_7_AB20IO_L28N_VREF_7_AC20IO_L29P_SM4_7_AC18IO_L29N_SM4_7_AB18IO_L30P_SM5_7_AF21IO_L30N_SM5_7_AF22IO_L31P_SM6_7_AF18IO_L31N_SM6_7_AE18IO_L32P_SM7_7_AE21IO_L32N_SM7_7_AD21

IO_L17P_7_AF19IO_L17N_7_AF20IO_L18P_7_Y19IO_L18N_7_W19IO_L19P_7_AF23IO_L19N_7_AE23IO_L20P_7_Y20

IO_L20N_VREF_7_Y21IO_L21P_7_AA18IO_L21N_7_Y18IO_L22P_7_AF24IO_L22N_7_AE24

IO_L23P_VRN_7_AE20IO_L23N_VRP_7_AD20

IO_L24P_CC_LC_7_AC21IO_L24N_CC_LC_7_AB21

IO_L1P_7_V21IO_L1N_7_V22IO_L2P_7_W25IO_L2N_7_W26IO_L3P_7_W21IO_L3N_7_W22IO_L4P_7_W23

IO_L4N_VREF_7_W24IO_L5P_7_W20IO_L5N_7_V20IO_L6P_7_Y25IO_L6N_7_Y26IO_L7P_7_AB24IO_L7N_7_AB25

IO_L8P_CC_LC_7_AA24IO_L8N_CC_LC_7_Y24IO_L9P_CC_LC_7_AC25IO_L9N_CC_LC_7_AC26

IO_L10P_7_AB26IO_L10N_7_AA26IO_L11P_7_AD25IO_L11N_7_AD26IO_L12P_7_Y22

IO_L12N_VREF_7_Y23IO_L13P_7_AC22IO_L13N_7_AB22IO_L14P_7_AB23IO_L14N_7_AA23IO_L15P_7_AD22IO_L15N_7_AD23IO_L16P_7_AC23IO_L16N_7_AC24

IO_L25P_CC_LC_8_AF8IO_L25N_CC_LC_8_AF7

IO_L26P_8_AA8IO_L26N_8_Y8IO_L27P_8_Y10

IO_L27N_8_AA10IO_L28P_8_AC7

IO_L28N_VREF_8_AB7IO_L29P_8_AC9IO_L29N_8_AB9IO_L30P_8_AE6IO_L30N_8_AD6IO_L31P_8_AF9IO_L31N_8_AE9IO_L32P_8_AD8IO_L32N_8_AC8IO_L17P_8_AF4IO_L17N_8_AE4IO_L18P_8_AD3IO_L18N_8_AC3IO_L19P_8_AF6IO_L19N_8_AF5IO_L20P_8_AA7

IO_L20N_VREF_8_Y7IO_L21P_8_AA9IO_L21N_8_Y9IO_L22P_8_AD5IO_L22N_8_AD4

IO_L23P_VRN_8_AE7IO_L23N_VRP_8_AD7

IO_L24P_CC_LC_8_AC6IO_L24N_CC_LC_8_AB6

IO_L1P_8_W2IO_L1N_8_W1IO_L2P_8_V6IO_L2N_8_V5IO_L3P_8_W7IO_L3N_8_V7IO_L4P_8_W4

IO_L4N_VREF_8_W3IO_L5P_8_W6IO_L5N_8_W5IO_L6P_8_Y2IO_L6N_8_Y1

IO_L7P_8_AA4IO_L7N_8_AA3

IO_L8P_CC_LC_8_Y4IO_L8N_CC_LC_8_Y3IO_L9P_CC_LC_8_Y6IO_L9N_CC_LC_8_Y5

IO_L10P_8_AB1IO_L10N_8_AA1IO_L11P_8_AC4IO_L11N_8_AB4IO_L12P_8_AB3

IO_L12N_VREF_8_AB2IO_L13P_8_AC5IO_L13N_8_AB5IO_L14P_8_AC2IO_L14N_8_AC1IO_L15P_8_AF3IO_L15N_8_AE3IO_L16P_8_AD2IO_L16N_8_AD1

B

24 BF

FPGA Bank 7, 8

4

Enable DCI

(Feedback)

FPGA_BANK8

3.3V VCC0

FPGA_BANK7

3.3V or 2.5V VCC0

SRAM_BW3SRAM_BW2

SRAM_BW1SRAM_BW0

SRAM_FLASH_A13

SRAM_FLASH_A11

SRAM_FLASH_A15SRAM_FLASH_A14

SRAM_FLASH_A18SRAM_FLASH_A17SRAM_FLASH_A16

SRAM_FLASH_A20SRAM_FLASH_A19

SRAM_FLASH_A12

SRAM_FLASH_A10SRAM_FLASH_A9SRAM_FLASH_A8SRAM_FLASH_A7

SRAM_FLASH_A6SRAM_FLASH_A5

SRAM_FLASH_A4

SRAM_FLASH_A3SRAM_FLASH_A2

SRAM_FLASH_A1SRAM_FLASH_A0

VCCO_7

AF8AF7AA8Y8Y10AA10AC7AB7AC9AB9AE6AD6AF9AE9AD8AC8AF4AE4AD3AC3AF6AF5AA7Y7AA9Y9AD5AD4AE7AD7AC6AB6W2W1V6V5W7V7W4W3W6W5Y2Y1AA4AA3Y4Y3Y6Y5AB1AA1AC4AB4AB3AB2AC5AB5AC2AC1AF3AE3AD2AD1

U1

AD19AC19AA19AA20Y17AA17AB20AC20AC18AB18AF21AF22AF18AE18AE21AD21AF19AF20Y19W19AF23AE23Y20Y21AA18Y18AF24AE24AE20AD20AC21AB21V21V22W25W26W21W22W23W24W20V20Y25Y26AB24AB25AA24Y24AC25AC26AB26AA26AD25AD26Y22Y23AC22AB22AB23AA23AD22AD23AC23AC24

U1

HDR2_16HDR2_14

12

DNP

R290

12

49.9R

R165

HDR2_4HDR2_2HDR1_64HDR1_62

HDR1_60HDR1_58HDR1_56HDR1_54HDR1_52HDR1_50

HDR1_46

HDR1_42

HDR1_38

HDR1_30HDR1_28HDR1_26HDR1_36HDR1_34HDR1_24HDR1_22HDR1_20

HDR2_8

HDR1_14HDR1_12HDR1_10HDR1_8

HDR1_4

21

R166

49.9R

HDR2_10HDR2_12

HDR1_40

HDR1_44

HDR1_32

HDR1_18

HDR1_16HDR2_6

FPGA_CCLK

21

R228

DNP

HDR2_34_SYS_MON_VN7HDR2_36_SYS_MON_VP7HDR2_38_SYS_MON_VN6

HDR2_42_SYS_MON_VN5HDR2_44_SYS_MON_VP5HDR2_46_SYS_MON_VN4HDR2_48_SYS_MON_VP4

HDR2_52HDR2_54_SYS_MON_VN3

HDR2_58_SYS_MON_VN2HDR2_56_SYS_MON_VP3

HDR2_62_SYS_MON_VN1HDR2_64_SYS_MON_VP1

HDR2_60_SYS_MON_VP2

HDR2_28

HDR1_2

HDR1_6

HDR1_48

HDR2_18HDR2_20HDR2_22HDR2_24HDR2_26

HDR2_30HDR2_32

HDR2_40_SYS_MON_VP6

HDR2_50

21

R289

DNP

SRAM_ADV_LD_NSRAM_CE1_NFLASH_CE2

USB_INT

UART_SOUTUART_SINSRAM_FLASH_WE_NSRAM_FLASH_OE_N

SYSACE_MPIRQSYSACE_MPCESYSACE_MPA06SYSACE_MPA05SYSACE_MPA04SYSACE_USB_D15SYSACE_USB_D14SYSACE_USB_D13SYSACE_USB_D12SYSACE_USB_D11SYSACE_USB_D10SYSACE_USB_D9SYSACE_USB_D8SYSACE_USB_D7SYSACE_USB_D6SYSACE_USB_D5SYSACE_USB_D4SYSACE_USB_D3SYSACE_USB_D2SYSACE_USB_D1SYSACE_USB_D0SYSACE_MPA03SYSACE_A2_USB_A1SYSACE_A1_USB_A0SYSACE_MPWE_USB_WR_NSYSACE_MPOE_USB_RD_NSRAM_CLKVGA_CLK

BUS_ERROR_1

Page 5: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC3V3

IO_L17P_9_N21IO_L17N_9_N20IO_L18P_9_P25IO_L18N_9_P24IO_L19P_9_P23IO_L19N_9_P22IO_L20P_9_R26

IO_L20N_VREF_9_R25IO_L21P_9_P20IO_L21N_9_P19IO_L22P_9_R24IO_L22N_9_R23

IO_L23P_VRN_9_R22IO_L23N_VRP_9_R21

IO_L24P_CC_LC_9_T24IO_L24N_CC_LC_9_T23

IO_L1P_9_J21IO_L1N_9_J20IO_L2P_9_J23IO_L2N_9_J22IO_L3P_9_K22IO_L3N_9_K21IO_L4P_9_J26

IO_L4N_VREF_9_J25IO_L5P_9_L19IO_L5N_9_K20IO_L6P_9_L21IO_L6N_9_L20IO_L7P_9_K24IO_L7N_9_K23

IO_L8P_CC_LC_9_K26IO_L8N_CC_LC_9_K25IO_L9P_CC_LC_9_M19IO_L9N_CC_LC_9_N19

IO_L10P_9_L24IO_L10N_9_L23IO_L11P_9_M25IO_L11N_9_M24IO_L12P_9_L26

IO_L12N_VREF_9_M26IO_L13P_9_M21IO_L13N_9_M20IO_L14P_9_M23IO_L14N_9_M22IO_L15P_9_N25IO_L15N_9_N24IO_L16P_9_N23IO_L16N_9_N22

IO_L25P_CC_LC_9_R20IO_L25N_CC_LC_9_R19

IO_L26P_9_T26IO_L26N_9_U26IO_L27P_9_U23IO_L27N_9_V23IO_L28P_9_U25

IO_L28N_VREF_9_U24IO_L29P_9_U22IO_L29N_9_U21IO_L30P_9_T21IO_L30N_9_T20IO_L31P_9_U20IO_L31N_9_T19IO_L32P_9_V26IO_L32N_9_V25

IO_L17P_10_N7IO_L17N_10_M7IO_L18P_10_P5IO_L18N_10_P4IO_L19P_10_P8IO_L19N_10_N8IO_L20P_10_R4

IO_L20N_VREF_10_R3IO_L21P_10_P7IO_L21N_10_P6IO_L22P_10_R2IO_L22N_10_R1

IO_L23P_VRN_10_R6IO_L23N_VRP_10_R5

IO_L24P_CC_LC_10_U1IO_L24N_CC_LC_10_T1

IO_L1P_10_J7IO_L1N_10_J6IO_L2P_10_J5IO_L2N_10_J4IO_L3P_10_K7IO_L3N_10_K6IO_L4P_10_J2

IO_L4N_VREF_10_J1IO_L5P_10_L7IO_L5N_10_L6IO_L6P_10_K5IO_L6N_10_K4IO_L7P_10_K3IO_L7N_10_K2

IO_L8P_CC_LC_10_L4IO_L8N_CC_LC_10_L3IO_L9P_CC_LC_10_M8IO_L9N_CC_LC_10_L8

IO_L10P_10_L1IO_L10N_10_K1IO_L11P_10_M2IO_L11N_10_M1IO_L12P_10_M4

IO_L12N_VREF_10_M3IO_L13P_10_M6IO_L13N_10_M5IO_L14P_10_N3IO_L14N_10_N2IO_L15P_10_N5IO_L15N_10_N4IO_L16P_10_P3IO_L16N_10_P2

IO_L25P_CC_LC_10_R8IO_L25N_CC_LC_10_R7

IO_L26P_10_T4IO_L26N_10_T3IO_L27P_10_T7IO_L27N_10_T6IO_L28P_10_U3

IO_L28N_VREF_10_U2IO_L29P_10_V4IO_L29N_10_U4IO_L30P_10_V2IO_L30N_10_V1IO_L31P_10_T8IO_L31N_10_U7IO_L32P_10_U6IO_L32N_10_U5

B

24 BF

FPGA Bank 9, 10

5

FPGA_BANK9

3.3V VCC0 3.3V VCC0

FPGA_BANK10

Enable DCI

K1L1

M1M2

M3M4

M5M6

N2N3

N4N5

P2P3

M7N7

P4P5

N8P8

J6J7

R3R4

P6P7

R1R2

R5R6

T1U1

R7R8

T3T4

T6T7

U2U3

U4V4

J4J5

V1V2

U7T8

U5U6

K6K7

J1J2

L6L7

K4K5

K2K3

L3L4

L8M8

U1

GPIO_DIP_SW1FLASH_BYTE_N

NC

VGA_B2VGA_B1

VGA_G2VGA_G1

VGA_R2VGA_R1

SRAM_DQP2SRAM_DQP1

21

R230

49.9R

12

49.9R

R229

NCNCNCNC

NCNCNCNCNCNCNCNC

FLASH_A0FLASH_A23

SYSACE_MPA002 1

R245

4.7K 124.7K

R243

SRAM_FLASH_A21

N21N20P25P24P23P22R26R25P20P19R24R23R22R21T24T23J21J20J23J22K22K21J26J25L19K20L21L20K24K23K26K25M19N19L24L23M25M24L26M26M21M20M23M22N25N24N23N22R20R19T26U26U23V23U25U24U22U21T21T20U20T19V26V25

U1

CPLD_IO_6

SRAM_FLASH_A22

SRAM_ZZSRAM_MODE

NCNCNCNC

NCNCNCNC

SYSACE_MPBRDY

GPIO_DIP_SW8GPIO_DIP_SW7GPIO_DIP_SW6GPIO_DIP_SW5GPIO_DIP_SW4GPIO_DIP_SW3GPIO_DIP_SW2

CPLD_IO_5

VGA_G0

VGA_BLANK_N

BUS_ERROR_2VGA_SYNC_NVGA_PSAVE_N

VGA_B0

VGA_R0

CPLD_IO_4CPLD_IO_3

CPLD_IO_1CPLD_IO_2

SRAM_DQP3

SRAM_DQP0

2 1R242

4.7K

2 1R244

4.7K

124.7K

R246

124.7K

R249

124.7K

R2482 1

R247

4.7K

2 1R252

4.7K2 1R251

4.7K

124.7K

R25012

4.7K

R255

124.7K

R2542 1

R253

4.7K

124.7K

R258

2 1R257

4.7K

2 1R256

4.7K

124.7K

R259

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NCNC

NC

Page 6: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC3V3

VCC3V3

VCC1V2

VCC2V5

GND_B1GND_P1

GND_AE1GND_A2GND_B2

GND_AE2GND_AF2GND_C3GND_J3GND_V3GND_F6GND_N6

GND_AA6GND_C9

GND_AD9GND_M10GND_N10GND_P10GND_R10GND_K11GND_M11GND_N11GND_P11GND_R11GND_U11GND_E12GND_K12GND_L12GND_N12GND_P12GND_T12GND_U12GND_AB12GND_A13GND_J13GND_K13GND_L13GND_M13GND_N13GND_P13GND_R13GND_T13GND_U13GND_V13GND_AF13GND_A14GND_J14GND_K14GND_L14GND_M14GND_N14GND_P14GND_R14GND_T14GND_U14GND_V14GND_AF14GND_E15GND_K15GND_L15GND_N15GND_P15GND_T15GND_U15GND_AB15GND_K16GND_M16GND_N16GND_P16GND_R16GND_U16GND_M17GND_N17GND_P17GND_R17GND_C18GND_AD18GND_F21GND_P21GND_AA21GND_J24GND_V24GND_AD24GND_A25GND_B25GND_AE25GND_AF25GND_B26GND_N26GND_AE26

VCC2V5

VCC2V5

VCC3V3

VCC3V3

VCC2V5

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCINT_J10

VCCINT_J11

VCCINT_J16

VCCINT_J17

VCCINT_K10

VCCINT_K17

VCCINT_K18

VCCINT_K9

VCCINT_L10

VCCINT_L11

VCCINT_L16

VCCINT_L17

VCCINT_L18

VCCINT_L9

VCCINT_M12

VCCINT_M15VCCINT_R12

VCCINT_R15

VCCINT_T10

VCCINT_T11

VCCINT_T16

VCCINT_T17

VCCINT_T18

VCCINT_T9

VCCINT_U10

VCCINT_U17

VCCINT_U18

VCCINT_U9

VCCINT_V10

VCCINT_V11

VCCINT_V16

VCCINT_V17

VCCO_0_J15VCCO_0_V12

VCCO_10_K8

VCCO_10_L2

VCCO_10_L5

VCCO_10_N1

VCCO_10_R9

VCCO_10_T2

VCCO_10_T5

VCCO_10_U8

VCCO_1_E11VCCO_1_E16VCCO_2_AB11VCCO_2_AB16VCCO_3_B11VCCO_3_B16

VCCO_4_AD15VCCO_4_AE11

VCCO_5_B19

VCCO_5_B22

VCCO_5_E19

VCCO_5_F22VCCO_5_F25

VCCO_5_H18

VCCO_5_H19VCCO_5_J19

VCCO_6_B5

VCCO_6_B8VCCO_6_E8

VCCO_6_F2

VCCO_6_F5

VCCO_6_H10VCCO_6_H9VCCO_6_J8

VCCO_7_AA22

VCCO_7_AA25

VCCO_7_AB19VCCO_7_AE19

VCCO_7_AE22

VCCO_7_V19

VCCO_7_W17VCCO_7_W18

VCCO_8_AA2VCCO_8_AA5

VCCO_8_AB8

VCCO_8_AE5

VCCO_8_AE8

VCCO_8_V8VCCO_8_W8

VCCO_8_W9

VCCO_9_K19

VCCO_9_L22

VCCO_9_L25

VCCO_9_M18

VCCO_9_P26

VCCO_9_T22

VCCO_9_T25

VCCO_9_U19

VREFN_SM_AE15VREFP_SM_AE16AVDD_SM_AF17AVSS_SM_AE17

VCCAUX_M9VCCAUX_N9VCCAUX_P9

VCCAUX_H11VCCAUX_W10

VCCAUX_W11VCCAUX_J12VCCAUX_V15VCCAUX_H16VCCAUX_W16VCCAUX_H17VCCAUX_N18VCCAUX_P18VCCAUX_R18

B

SYS_MON_VREFN_AVSS

24 BF

2-3 = 2.5V1-2 = 3.3V

Bank 7 ExpansionConnector Voltage

FPGA Ground and Power

FPGA_GNDFPGA_PWR

6

SYS_MON_VREFN_AVSS

J10

J11

J16

J17

K10

K17

K18

K9

L10

L11

L16

L17

L18

L9

M12

M15R12

R15

T10

T11

T16

T17

T18

T9

U10

U17

U18

U9

V10

V11

V16

V17

J15V12

K8

L2

L5

N1

R9

T2

T5

U8

E11E16AB11AB16B11B16

AD15AE11

B19

B22

E19

F22F25

H18

H19J19

B5

B8E8

F2

F5

H10H9J8

AA22

AA25

AB19AE19

AE22

V19

W17W18

AA2AA5

AB8

AE5

AE8

V8W8

W9

K19

L22

L25

M18

P26

T22

T25

U19

AE15AE16AF17AE17M9N9P9

H11W10

W11J12V15H16W16H17N18P18R18

U1

GND_SYSMON

GND_SYSMON

B1P1AE1A2B2AE2AF2C3J3V3F6N6AA6C9AD9M10N10P10R10K11M11N11P11R11U11E12K12L12N12P12T12U12AB12A13J13K13L13M13N13P13R13T13U13V13AF13A14J14K14L14M14N14P14R14T14U14V14AF14E15K15L15N15P15T15U15AB15K16M16N16P16R16U16M17N17P17R17C18AD18F21P21AA21J24V24AD24A25B25AE25AF25B26N26AE26

U1

2 31

J16

SYS_MON_AVDDSYS_MON_VREFP

VCCO_7

Page 7: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

VCC3V3 VCC3V3

VCC3V3

VCC3V3

VCC3V3

VCC3V3

GND

EOH

OUT

VCC

OSC_SMT

VCC3V3

P2

P1

P3

P4

Pushbutton

A

VCC3V3

PARTS=1LEVEL=STD

CFD08CFD02CFD09

VCCL_15

MPIRQMPCEMPA06MPA05MPA04MPD15MPD14MPD13MPD12MPD11MPD10MPD09MPD08MPD07MPD06MPD05MPD04MPD03MPD02MPD01MPD00MPA03MPA02MPA01MPA00MPWEMPOE

CFGINIT

CFGPROG

CFGADDR0

CFGADDR1

CFGADDR2

CLK

STATLED

ERRLED

TSTTMS

CFA07

CFA05

CFWAITCFA02

73_VCCH

92_VCCH

91_GND

100_GND

75_GND

83_GND

64_GND

54_GND

46_GND

GND_120

GND_136

GND_129

GND_144

GND_9

GND_18

GND_26

VCCL_25

MPBRDY

VCCH_109

VCCH_1

VCCL_10

57_VCCL

99_VCCL

94_VCCL

84_VCCL

VCCH_17

55_VCCH

37_VCCH

VCCH_128

CFCD2CFD10

CFCD1CFD03CFD11CFD04CFD12CFD05CFD13CFD06CFD14CFD07CFD15CFCE1CFCE2CFA10

CFD01

CFA00

CFOECFA09CFA08CFWE

CFA06

CFA03

CFREGCFA01

CFD00

CFA04

CFGRSVD

GND_111

CFGMODEPIN

POR_RESET

POR_TEST

GND_35

VCCL_126

RESET_N

POR_BYPASS

GND_110

GND_112

TSTTDO

TSTTCK

TSTTDI

CFGTCK

CFGTMS

CFGTDO

CFGTDI

(DIE DOWN)TQFP144SYSTEMACE

VCC3V3

VCC2V5

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

3_D0427_D112_D03

49_D1048_D0923_D0247_D0822_D01

20_A0044_REG19_A0118_A0242_WAIT17_A0316_A0415_A0514_A0637_RDY/BSY12_A0736_WE11_A0810_A099_OEI8_A1032_CE27_CE1I31_D156_D0730_D145_D0629_D134_D0528_D12

50_GND

38_VCC13_VCC

46_BVD1

21_D00

45_BVD240_VS2

26_CD1

25_CD2

41_RESET39_CSEL

35_IOWR34_IORD

33_VS124_WP

43_INPACK

1_GND

SHIELD

B

24 BF

Silkscreen"System ACE""Status LED"

Silkscreen"System ACE""Error LED"

"SYSACE RESET"

System ACE

Combined

to FPGA

FPGA & CPUPC4 Connector

7

From CPLD

=OR Failsafe Mode Enabled

SysACE Failsafe Mode Jumpers

NC

NC

3272

4948234722

204419184217161514371236111098

327

316

305

294

28

150

3813

46

21

4540

26

25

4139

3534

332443

52

51P113

ACEFLASH

21

R41

4.7K

SYSACE_RESET_N

SYSACE_ERR_LED

FPGA_PROG_B

SYSACE_RESET_N

7811

15

414243444547484950515253565859606162636566676869707677

7879

868788

93959698

132

135

140141

73

92

91

100

7583645446

120

136

129

14491826

25

39

1091

10

57

99

94

84

17

55

37

128

1312

103104105106107113114115116117118119138121

6

4

123125130131

134

139

3142

5

137

133

111

89

72

74

35

126

33

108

110

112

97

101

102

808582

81

U2

PKG_TYPE=TQ144DEVICE=XCCACE-TQ144I

SYSACE_ERR_LED

1

2

10UFC1

2

1 C53

0.1UF

21R33

120R

FPGA_TDO2 1

R183

DNP

2

1

3

4

SW2

21

R37

1K

21DS2

GREEN

21DS1

RED

NC

NC

1 2

25.5R

R422

1

3

4

X2

1

10

1112

1314

2

34

56

78

9

J20

21R35

4.7K

21

R39

1K

12

1K

R38

12

4.7K

R36

1

2

0.1UF

C52

2

1 C49

0.1UF

1

2

0.1UF

C48

2

1 C47

0.1UF

1

2

0.1UF

C50

2

1 C51

0.1UF

2

1 C59

0.1UF

1

2

0.1UF

C60

2

1 C61

0.1UF

1 2

160R

R34

12

1K

R40

NCNCNCNCNC

NC

1 2

0.1UF

C385

PROM_TDIFPGA_PROM_CPLD_TMS

FPGA_PROM_CPLD_TCK

NC

SYSACE_CFGMODEPIN

SYSACE_MPBRDY

SYSACE_CFGADDR2

SYSACE_CFGADDR1

SYSACE_CFGADDR0

FPGA_INIT

SYSACE_MPOE_USB_RD_NSYSACE_MPWE_USB_WR_NSYSACE_MPA00SYSACE_A1_USB_A0SYSACE_A2_USB_A1SYSACE_MPA03SYSACE_USB_D0SYSACE_USB_D1SYSACE_USB_D2SYSACE_USB_D3SYSACE_USB_D4SYSACE_USB_D5SYSACE_USB_D6SYSACE_USB_D7SYSACE_USB_D8SYSACE_USB_D9SYSACE_USB_D10SYSACE_USB_D11SYSACE_USB_D12SYSACE_USB_D13SYSACE_USB_D14SYSACE_USB_D15SYSACE_MPA04SYSACE_MPA05SYSACE_MPA06SYSACE_MPCESYSACE_MPIRQ

SYSACE_CFCD2SYSACE_CFD10SYSACE_CFD09SYSACE_CFD02SYSACE_CFD08SYSACE_CFD01SYSACE_CFD00SYSACE_CFA00SYSACE_CFREGSYSACE_CFA01SYSACE_CFA02SYSACE_CFWAITSYSACE_CFA03SYSACE_CFA04SYSACE_CFA05SYSACE_CFA06SYSACE_CFRDBSYSYSACE_CFA07SYSACE_CFWESYSACE_CFA08SYSACE_CFA09SYSACE_CFDESYSACE_CFA10SYSACE_CFCE2SYSACE_CFCE1SYSACE_CFD15SYSACE_CFD07SYSACE_CFD14SYSACE_CFD06SYSACE_CFD13SYSACE_CFD05SYSACE_CFD12SYSACE_CFD04SYSACE_CFD11SYSACE_CFD03SYSACE_CFCD1

SYSACE_TDI

SYSACE_CLK

1 2

J29

21

J30FPGA_PROG_B

12

4.7K

R267

SYSACE_ERR_LED

NC

Page 8: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

DIP_SW6

DIP6_1

DIP12_2DIP11_2DIP10_2

DIP8_2DIP9_2

DIP1_1DIP2_1DIP3_1DIP4_1DIP5_1

DIP7_2

VCC1V8

VCC3V3

VCC3V3

VCC3V3

D7_48D6_47

GND_46VCCO_45D5_44D4_43

DNC_42DNC_41DNC_40DNC_39VCCO_38DNC_37

VO48

GND_36DNC_35

VCCINT_34D3_33D2_32

GND_31VCCO_30D1_29D0_28

REV_SEL1_27REV_SEL0_26

EN_EXT_SEL_B_25VCCJ_24GND_23TDO_22

DNC_1GND_2DNC_3VCCINT_4BUSY_5CF_B_6GND_7VCCO_8CLKOUT_9CEO_B_10OE/RESET_B_11CLK_12CE_B_13DNC_14VCCINT_15DNC_16GND_17DNC_18TDI_19TCK_20TMS_21

DP3T_SWITCH

SHIELD

SOT23-5

GND

B

A

Y

VCC

SN74LVC1G86

VCC3V3

VCC3V3

VCC1V8

VCC3V3 VCC3V3

VCC1V8

SOT23-5SN74LVC1G126

GND

A

OE

Y

VCC

VCC3V3

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

B

Plat FLASHPlat FLASH

SysACE/CPLDSysACE/CPLDSysACE/CPLD

OPEN

OPEN

OPENOPENOPEN

Short

OPEN

SHORTSHORT

D0/DIN

111

10 00

0

00

0

m2m0

24 BF

Platform Flash

Platform Flash

System ACE / Platform Flash / CPLD FlashConfiguration Switch

Toggles connection from Plat Flash D0 to SRAM D0

8

Config and Mode DIP switches

01

11 1

SysACE/CPLD

Plat FLASH

Plat FLASH

Cfg Switch

Stuff with 0 ohm if no Plat Flash

Silkscreen:SysACE Config, Mode pins

PLATFLASH_CPLD_CCLK

NCSYSACE_CFGMODEPIN

12

3.3K

R167

SYSACE_CFGADDR1

3

2

1

4

5

U38

FPGA_DOUT_BUSYFPGA_PROG_B

NC

NC

FPGA_PROM_CPLD_TCK

NC

NC

NC

FPGA_INITNC

PLAT_FLASH_CE_N

FPGA_PROM_CPLD_TMS

PROM_TDI

FPGA_TDI

NCNCNCNC

NC

NC

SRAM_FLASH_D7SRAM_FLASH_D6

SRAM_FLASH_D5SRAM_FLASH_D4

SRAM_FLASH_D2

SRAM_FLASH_D1FPGA_DIN

1 2

0.1UF

C381

SYSACE_CFGADDR0SYSACE_CFGADDR1

1

2

0.1UF

C277

2 1R231

DNP1

2

0.1UF

C275

1

2

0.1UF

C272

12

3.3K

R195

CPLD_PROG

21

R192

4.7K

FPGA_M0

FPGA_M2

SRAM_FLASH_D0_EN

SRAM_FLASH_D0_EN

SRAM_FLASH_D0_EN

SRAM_FLASH_D0

FPGA_DIN

3

2

1

4

5

U40

12

4.7K

R194

21

R168

4.7K

9 10

11

4321 5

678

12SW12

48474645444342414039383736353433323130292827262524

2322

123456789

101112131415161718192021

U3

XCF32P-V048

PLAT_FLASH_CE_N

21

R185

4.7K

12

R191

4.7K

21

4.7K

R190

12

R189

4.7K

21

4.7K

R188

12

R187

4.7K

21

4.7K

R186

SYSACE_CFGADDR2

FPGA_M0FPGA_M1FPGA_M2

12

DNP

R193

2

1 C276

0.1UF

1

2

0.1UF

C274

2

1 C273

0.1UF

2

1 C279

0.1UF

SRAM_FLASH_D3

SYSACE_CFGADDR0

6

121110

89

12345

7

SW13

Page 9: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC5

PJ-002AH

GND

OE

OUT

VCC

OSC

VCC3V3

VCC3V3

GND

OE

OUT

VCC

OSC

CON_SMA_ST

CON_SMA_ST

CON_SMA_ST

P2

P1

P3

P4

Pushbutton

NC

1

3

NC

1

3

SHLD1SHLD2

SHLD3SHLD4

GPI-152-3013

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC2V5

CON_SMA_ST

B

24 BF

Battery Holder

Differential Clock Out from FPGA

CPU RESEt

Differential Clock In to FPGA

Power JackPower Switch

SMA Connectors, Power Switch,Battery, Oscillators, Reset

9

Mounting Holes

1

M6

1

M5

1

M4

1

M3

1

M2

1

M11

2

3

4

5

J10

SMA_DIFF_CLK_OUT_P

SMA_DIFF_CLK_OUT_N

SMA_DIFF_CLK_IN_P

SMA_DIFF_CLK_IN_N

B1

NCNC

NC

1 623 4

5

78

109

SW9

USERCLK

FPGA_CPU_RESET

FPGA_VBATT

2

1

3D1

3

1

2

D2

SYSCLK_100MHZ

2

1

3

4

SW10

5

4

3

2

1

J9

5

4

3

2

1

J8

5

4

3

2

1

J7

4

1

5

8

X1

21R198

25.5R

12

4.7K

R196

1 2

25.5RR197

8

5

1

4

X6

1

32

J24NC

1 2

0.1UF

C386

1 2

0.1UF

C387

Page 10: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

DIP4_2

DIP8_1

DIP7_1

DIP6_1

DIP5_1

DIP4_1

DIP3_1

DIP2_1

DIP1_1

DIP_SW8

DIP1_2

DIP2_2

DIP3_2

DIP8_2

DIP7_2

DIP6_2

DIP5_2

VCC2V5

VCC2V5

1_G 2_S

3_D

0

VCC2V5

VCC2V5

VCC2V5

VCC2V5

P2

P1

P3

P4

Pushbutton

VCC3V3

P2

P1

P3

P4

Pushbutton

P2

P1

P3

P4

Pushbutton

P2

P1

P3

P4

Pushbutton

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC3V3

P2

P1

P3

P4

Pushbutton

1_G 2_S

3_D

0

P2

P1

P3

P4

Pushbutton

VCC2V5

VCC3V3

VCC2V5

B

24

FPGA PROG

BF

Buttons, LEDs, Switches

10

North

South

Center EastWest

LED 0 LED 1 LED 2 LED 3

GPIO LEDs and Buttons

21

GREEN

DS211

LED0603

21

GREEN

DS204

LED0603

BUS_ERROR_1

21

DS12

GREEN

GPIO_LED_C

21

R58

25.5R

GPIO_LED_EGPIO_LED_W

12

25.5R

R61

GPIO_LED_NGPIO_LED_S

GPIO_SW_W

GPIO_SW_E

GPIO_SW_S

GPIO_SW_N

GPIO_SW_C

4

3

1

2

SW421

DS11

GREEN

12

4.7K

R45

21

DS3

GREEN

12

25.5R

R57

21

DS13

GREEN

21

25.5R

R60

12

25.5R

R59

21

DS14

GREEN

1 2

3 Q8

BUS_ERROR_2

4

3

1

2

SW6

FPGA_PROG_B

FPGA_DONE

12 L

ED0603

DS205

RED

FPGA_INIT

12

25.5R

R56

GPIO_LED_0GPIO_LED_1GPIO_LED_2GPIO_LED_3

GPIO_DIP_SW8

GPIO_DIP_SW7

GPIO_DIP_SW6

GPIO_DIP_SW5

GPIO_DIP_SW4

GPIO_DIP_SW3

GPIO_DIP_SW2

GPIO_DIP_SW1

124.7K

R175

2 1R172

4.7K

21

DS15

GREEN

21

R48

4.7K

2

1

3

4

SW7

12

4.7K

R47

2

1

3

4

SW5

21

R46

4.7K

2

1

3

4

SW3

21

R44

4.7K

12

GREEN

DS4

21

DS5

GREEN

12

GREEN

DS6

124.7K

R1732 1

R174

4.7K

2 1R176

4.7K

124.7K

R1772 1

R178

4.7K

124.7K

R179

12

4.7K

R171

21

R169

120R

12

4.7K

R170

2

1

3

4

SW8

21

RED

DS206

LED0603

21

R200

160R

12

160R

R199

12

25.5R

R233

12

25.5R

R234

12

25.5R

R235

12

330R

R239

21

R238

120R

1 2

3 Q5

13

8

7

6

5

4

3

2

116

15

14

9

10

11

12

SW1

Page 11: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

1_G

2_S

3_D

0

VCC5VCC3V3

HDR_2x32

HDR1x32

HDR_2x32

1_G

2_S

3_D

0

HDR1x32

VCC2V5

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

B

Matched Length Traces

24 BF

Expansion Headers

11

Differential Pairs

Matched Length Traces

Independent signals

HDR1_64HDR1_62HDR1_8HDR1_58HDR1_44HDR1_48HDR1_14HDR1_20HDR1_46HDR1_56HDR1_54HDR1_16HDR1_18HDR1_34HDR1_6HDR1_30HDR1_4HDR1_24HDR1_60HDR1_10HDR1_22HDR1_40HDR1_38HDR1_50HDR1_12HDR1_26HDR1_32HDR1_52HDR1_2

HDR1_42HDR1_28

HDR2_40_SYS_MON_VP6HDR2_38_SYS_MON_VN6

HDR2_30HDR2_44_SYS_MON_VP5HDR2_42_SYS_MON_VN5

HDR2_22HDR2_24

HDR2_48_SYS_MON_VP4HDR2_46_SYS_MON_VN4HDR2_64_SYS_MON_VP1HDR2_62_SYS_MON_VN1HDR2_16HDR2_14HDR2_36_SYS_MON_VP7HDR2_34_SYS_MON_VN7HDR2_52HDR2_50HDR2_56_SYS_MON_VP3HDR2_54_SYS_MON_VN3HDR2_60_SYS_MON_VP2HDR2_58_SYS_MON_VN2

HDR2_12HDR2_6

HDR2_10

HDR2_18

HDR2_4HDR2_26

NC

NC

NC456

32313029282726

987

3

252423222120

2

19181716151413121110

1

J3

IIC_SDA

1

2

3Q6

525355 56

1

1011 1213 1415 1617 1819

2

2021 2223 2425 2627 2829

3

3031 3233 3435 3637 3839

4

4041 4243 4445 4647 4849

5

50

67 89

51

63

585759 6061 62

54

64

J6

1

10111213141516171819

2

202122232425

3

789

26272829303132

654

J4

64

54

62616059

57 58

63

51

9876

50

5

49484746454443424140

4

39383736353433323130

3

29282726252423222120

2

19181716151413121110

1

565553

52

J5

HDR2_2

HDR2_28

HDR2_20

HDR2_8

3

2

1

Q7

IIC_SCL

FPGA_PROM_CPLD_TCKEXPANSION_TDOCPLD_TDOGPIO_LED_NGPIO_SW_NGPIO_LED_CGPIO_SW_CGPIO_LED_WGPIO_SW_WGPIO_LED_SGPIO_SW_SGPIO_LED_EGPIO_SW_EGPIO_LED_0GPIO_LED_1GPIO_LED_2

FPGA_PROM_CPLD_TMS

GPIO_LED_3NC HDR2_32

HDR1_36

Page 12: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC5

VCC3V3

VCC3V3

VCC5

SN74CBTD3384

1B5

2OE_N

1B11A1

1OE_N

1B21A21B31A31B41A4

1A52A1 2B1

2B22B3

GNDVCC

2B42B5

2A22A32A42A5

VCC2V5

VCC2V5

VCC2V5

VCC5

VCC5

CONN_MD6_SH

VCC

GND

CLK

NC2

NC6

DATA

SHLDA

SHLDB MNT

DCD

RXD

TXD

GND

DSR

RTS

CTS

RI

DTR

SHLD

CONN_MD6_SH

VCC

GND

CLK

NC2

NC6

DATA

SHLDA

SHLDB MNT

1_G

2_S

3_D

0

VCC5

VCC5

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

A0 VCCWP

A2VSS

A1

SDASCL

TSSOP8

ROUT2

RIN1

VCC

C2-

C1+

DOUT1C1-

V- DIN1ROUT1

V+

C2+

GND

DIN2DOUT2RIN2

1_G

2_S

3_D

0

1_G

2_S

3_D

0

1_G

2_S

3_D

0

VCC5

VCC3V3

B

24 BF

LCD, PS2, UART, IIC EEPROM

12

DTE (Serial Host)

LCD Header and Level Shifter

IIC EEPROM

2 31

J27

LCD_DB7LCD_DB6LCD_DB5LCD_DB4

NCNC

NCNCNCNC

NCNCNC

21

FB0805

FB2

UART_SOUT

12

4.7K

R72

2

10.1UF

C280

IIC_SDAIIC_SCL

USB_SERIAL_RX

UART_SIN

2

1

0.1UF

C66

1

2

C2810.1UF

1

10111213

23456789

16

1415

U15

LCM-S01602DTR

1

2

3

R1

LCD_ELCD_RWLCD_RS

LCD_VEE 3

2

1

Q4

1

2

3Q3

1

2

3Q2

MOUSE_DATA

MOUSE_CLK

KEYBOARD_DATA

KEYBOARD_CLK

1

345

1110

14

7

15

13

8

12

9

2

6

16

U12

MAX3232CPWR

123 6

5

8

4

7

U9

24LC04B-I/STNC

12

4.7K

R64

21

R62

3.3K

2

1470PF

C63

1

2

C62

470PF

1 2FB1

FB0805

3

2

1

Q1

4 3 526 198 7

J18

21

R71

10K

1

2

0.1UF

C69 2

1 C68

0.1UF

1

2

C67

0.1UF

12

10K

R70

1

2

3

5

6

7

8

9

4

11

10

P3

2

1 C70

0.1UF

21

R63

3.3K

21

R65

4.7K

12

4.7K

R69

12

3.3K

R68

1 2FB4

FB080578 9 16 2 534

J17

21

FB0805

FB3

2

1

470PF

C65

1

2

C64470PF

12

3.3K

R672

1R66

4.7K

NC

NC

NC

NC

NC

10

13

23

1

546798

1114 15

1619

1224

2023

17182122

U39

12

4.7K

R263

USB_SERIAL_TX

12FB11

FB0805

NCNCNC

Page 13: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

VCC2V5

VCC2V5

VCC2V5

VCC2V5

K?

K?

K?

K?

K?

K?

K?

VTTDDR VTTDDR

VCC2V5

VSSQ3

VSSQ2

VSSQ1

VSSQ0

VSS2

VSS1

VSS0

VSSQ4

VDDQ3

VDDQ2

VDDQ1

VDDQ0

VDD2

VDD1

DM1

DQS1

A13DQ12

DQ14DQ13

DQ15DQ9

DQ10DQ8

DQ11DQ4

DQ6DQ5

DQ7

DQ2

A6

DQ0

DQ3 A0

A11A2

A10/AP

A3

A9

A4

A8

A5

A7A1

A12

DM0

DQS0

BA0

WECAS

RAS

CSCKEDQ1

CKCK

VREF

VDD0

VDDQ4

BA1

DDR SDRAM64Mx16x4

VSSQ3

VSSQ2

VSSQ1

VSSQ0

VSS2

VSS1

VSS0

VSSQ4

VDDQ3

VDDQ2

VDDQ1

VDDQ0

VDD2

VDD1

DM1

DQS1

A13DQ12

DQ14DQ13

DQ15DQ9

DQ10DQ8

DQ11DQ4

DQ6DQ5

DQ7

DQ2

A6

DQ0

DQ3 A0

A11A2

A10/AP

A3

A9

A4

A8

A5

A7A1

A12

DM0

DQS0

BA0

WECAS

RAS

CSCKEDQ1

CKCK

VREF

VDD0

VDDQ4

BA1

DDR SDRAM64Mx16x4

K?

VTTDDR

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By2413 BF

DDR Memory

Matched Length Nets

B

NC

DDR_D16

1 2R73

47R

DDR_D15

DDR_D11

DDR_A10

DDR_DM1

DDR_A4

DDR_A9DDR_A8

4321

5678

RP14

DDR_A5

DDR_A13

58

52

12

6 66

48

34

64

55

15

9 3 33

18

4751

1760

6362

6556

5754

59

8

1110

135

37

2 7 29

4131

28

32

40

35

39

36

3830

42

2016

26

2122232444

4

4546

49

161

27

TSOP66HYB25D256160BT-7F

U5

1

2

C82

0.1UF

1

2

C80

0.1UF

1

2

C790.1UF

2

10.1UF

C781

2

C770.1UF

2

10.1UF

C761

2

C740.1UF

58

52

12

6 66

48

34

64

55

15

9 3 33

18

4751

1760

6362

6556

5754

59

8

1110

135

37

2 7 29

4131

28

32

40

35

39

36

3830

42

2016

26

2122232444

4

4546

49

161

27

TSOP66HYB25D256160BT-7F

U4

2

10.1UF

C75

2

10.1UF

C731

2

C720.1UF

2

1

100UF

C302

B

1

2 B

C301

100UF

2

1

100UF

C300

B

2

10.1UF

C4081

2

C4070.1UF

2

1

0.1UF

C71 1

2 B

C38

100UF

2

1

100UF

C39

B

1

2 B

C40

100UF

2

1

100UF

C41

B

4321

5678

RP4

47R

4321

5678

RP5

47R

8765

1234RP6

47R

8765

1234RP7

47R

4321

5678

RP8

47R

4321

5678

RP12

4321

5678

RP11

4321

5678

RP10

4321

5678

RP9

4321

5678

RP16

4321

5678

RP15

4321

5678

RP13

8765

1234RP3

47R

8765

1234RP2

47R4321

5678

RP1

47R

2

1

0.1UF

C81

1

2

C421

0.1UF

2

1

0.1UF

C422

1

2

C423

0.1UF

2

1

0.1UF

C424

DDR_CS_N

DDR_RAS_NDDR_CAS_NDDR_WE_N

DDR_BA1DDR_BA0

DDR_A3DDR_A2DDR_A1DDR_A0

DDR_DQS3

DDR_DM3

DDR_D30DDR_D29DDR_D28DDR_D27DDR_D26DDR_D25DDR_D24

DDR_DQS2

DDR_DM2

DDR_D23

DDR_D20DDR_D19DDR_D18DDR_D17

DDR_D22

DDR_D0DDR_D1DDR_D2

DDR_D3DDR_D4DDR_D5DDR_D6

DDR_DM0

DDR_D8DDR_D9DDR_D10

DDR_D12DDR_D13DDR_D14

DDR_DQS1

DDR_CKE

DDR_CK1_NDDR_CK1_P

DDR_A6DDR_A7

DDR_D21

DDR_D31

DDR_A11DDR_A12

DDR_D7DDR_DQS0

NC

Page 14: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

LEVEL=STDPARTS=1

DEVICE=M88E1111

PKG_TYPE=BCC_96

AVDD_32

AVDD_35

AVDD_36

AVDD_40

AVDD_45

AVDD_78

CLK125

COL

COMA

CONFIG0

CONFIG1

CONFIG2

CONFIG3

CONFIG4

CONFIG5

CONFIG6

CRS

DVDD_1

DVDD_10

DVDD_15

DVDD_57

DVDD_6

DVDD_62

DVDD_67

DVDD_71

DVDD_85

GTXCLK

HSDACN

HSDACP

INT

LED_DPLX

LED_LINK10

LED_LINK100

LED_LINK1000

LED_RX

LED_TX

MDC

MDIN_0

MDIN_1

MDIN_2

MDIN_3

MDIO

MDIP_0

MDIP_1

MDIP_2

MDIP_3

N/C

RESET

RSET

RXCLK RXD0

RXD1

RXD2

RXD3

RXD4

RXD5

RXD6

RXD7

RXDVRXER

RXN

RXP

SEL_OSC

TCN

TCP

TDI

TDO

TMS

TRST

TXCLK

TXD0

TXD1

TXD2

TXD3

TXD4

TXD5

TXD6

TXD7

TXEN

TXER

TXN

TXP

VDDOH_52

VDDOH_66

VDDOH_72

VDDOX_26

VDDOX_48

N/C_13

VDDO_21

VDDO_5

VDDO_88

VDDO_96

VSSC

XTAL1

XTAL2

TCK

VCC1V2

VCC1V2

VCC1V2

VCC2V5

VCC2V5

VCC2V5

VCC2V5

VCC2V5

VCC2V5

VCC2V5

VCC2V5

04020402

0402

0402

0402

0402

A

A

A

0402

0402

FB0805

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

A

XTAL_SMD

B

BF

10/100/1000 PHY

14 24

X3

25MHZ

1

2

22PFC104

2

1C10322PF

NC

PHY_LED_TX

NC

NC

PHY_RXD2

PHY_RXD0

PHY_RXD1PHY_RXD[0:3]

PHY_RXD3

PHY_TXD2

PHY_TXD0

PHY_TXD3

PHY_TXD[0:3]

PHY_TXD1

PHY_TXCLK

PHY_TXER

PHY_TXC_GTXCLK

PHY_TXCTL_TXEN

PHY_LED_RX

1 2

49.9R

R269

21R270

49.9R

21R80

4.7K

1

2

10UFC377

21FB10

PHY_AVDD0

PHY_CRS

NC

NC

PHY_MDIO

PHY_INT

NC

NC

2

1 C99

0.01UF1

2

1000PF

C102

1

2

0.01UFC98

1

20.1UF

C100

2

1 C101

0.1UF

1

2

10UFC378

1

2

10UFC379

1

2

10UFC5

2

1 C96

0.01UF

1

2

0.01UF

C94

2

1 C890.01UF

1

2

0.01UFC87

1

2

0.01UFC90

2

1 C840.01UF

2

1 C85

0.1UF

1

21000PF

C91

NC

PHY_MDIP2

PHY_COL

PHY_AVDD0

2

1 C97

0.1UF

NC

PHY_LED_LINK10

12GREEN

DS1721

R93

249R

1 2

249R

R92

PHY_MDC

PHY_LED_LINK1000

PHY_LED_LINK100

2 1

DS16

GREEN12

GREEN

DS21021

R204

249R

12GREEN

DS207

1 2

249R

R203

21R201

249R 21R202

249R

12GREEN

DS208

NC

1 2

4.7K

R83

21R94

1M

PHY_RXD5

PHY_RXD[4:7]

PHY_RXD4

PHY_RXD6

PHY_RXD7

PHY_MDIN2

21

R85

4.7K

12

4.7K

R88

21R82

4.7K

1 2

4.7K

R81

2

1 C95

1000PF

1

2

0.1UF

C93

2

1 C92

1000PF

2

1 C88

1000PF

1

20.1UF

C83

1

20.1UF

C86

PHY_RXER

PHY_RXCTL_RXDV

PHY_MDIP3

PHY_MDIP1

PHY_MDIP0

PHY_MDIN3

PHY_MDIN1

PHY_MDIN0

21R78

4.7K

12

4.7K

R86

21

R87

4.7K

2 1

DS209

GREEN

PHY_LED_RX

PHY_LED_DUPLEX

NC

NC

PHY_AVDD0

PHY_RESET

NC

NC

PHY_TXD6

PHY_TXD5

PHY_TXD[4:7]PHY_TXD7

PHY_TXD4

PHY_RXC_RXCLK

32

35

36

40

45

78

22

83

27

65

64

63

61

60

59

58

84

1

10

15

57

6

62

67

71

85

8

38

37

23

70

76

74

73

69

68

25

31

34

41

43

24

29

33

39

42

51

28

30

2 95

92

93

91

90

89

87

86

943

81

82

56

80

79

44

50

46

47

4

11

12

14

16

17

18

19

20

9

7

75

77

52

66

72

26

48

13

21

5

88

96

53

55

54

49

U45

Page 15: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

FB0805

PKG_TYPE=RJ45_HFJ11-1G01ELEVEL=STDPARTS=1

DEVICE=RJ45_HFJ11-1G01E

TD1_P

TD0_N

TD1_N

TD2_P

TD2_N

TD3_N

TD3_P

VCC

TD0_P

GND SHIELD1

SHIELD2

10/100/1000RJ45 ANDMAGNETICS

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

0402

0402

0402

0402

B

111

111

111

000

24 BF

RJ45 Connector and PHY Decoupling

15

Pin

VCC2V5

PHY_LED_LINK10

PHY_LED_LINK100

111

Bit[2:0]

Pin to Constant Mapping

PHY_LED_LINK1000

PHY_LED_DUPLEX

PHY_LED_RX

PHY_LED_TX

GND

110

101

100

011

010

001

000

CONFIG1

CONFIG2

CONFIG3

CONFIG4

CONFIG5

CONFIG6

CONFIG0 PHYADR[1]

PHYADR[4]

PHYADR[2]

ENA_PAUSE

ANEG[0]

ANEG[3]

ENA_XC

HWCFG_MODE[2] HWCFG_MODE[1]

PHYADR[3]

ANEG[2] ANEG[1]

DIS_125

HWCFG_MODE[0]

HWCFG_MODE[3]DIS_FC DIS_SLEEP

SEL_BDT INT_POL 75/50 OHM

000

111

010

PHYAddress "00000". Do notadvertise the PAUSE bit

MDC/MDIO selected. Active LOWInterrupt. 50Ohm SERDES option.

PHYADR[0]

Bit[0]Pin Bit[2] Bit[1]

Auto-Neg enabled, advertise allcapabilities; prefer slave. Autocrossover enabled. 125 CLK optiondisabled.

detect diasabled. Sleep mode disabled.GMII to Cu mode. Fiber/copper auto-

PHY_AVDD0

1 2

0.01UF

C157

1 2

0.01UF

C156

21C155

0.01UF

1 2

0.01UF

C154

PHY_MDIN3

PHY_MDIP3

PHY_MDIN2

PHY_MDIP2

PHY_MDIN1

PHY_MDIP1

PHY_MDIN0

PHY_MDIP0

21R159

49.9R

1 249.9R

R164

21R158

49.9R

1 249.9R

R157

21R161

49.9R

1 249.9R

R160

1 249.9R

R163

21R162

49.9R

3

2

6

4

5

8

7

9

1

10 11

12

P114

21FB12

Page 16: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC3V3

VCC3V3

FB0805

FB0805

VCC3V3

GREEN

BLUE

GGND

BGND

NC2

RED

NC1

GND1

RGND

GND2

ID0

ID1

HSYNC

VSYNC

NC3

VGA HD15

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC3V3

GND2GND3B0B1B2B3B4B5B6B7

BLANK_N

CLOCK

COMP

GND0

GND1

G0

G1

G2

G3

G4

G5

G6

G7

GND4

GND5

IOB_N

IOG

IOG_N

IOR

IOR_N

PSAVE_NGND6GND7

R0R1R2R3R4R5R6R7

RSET

SYNC_N

VAA0

VAA1

VAA2

VREF

IOB

LQFP48

0402 0402 0402

SOT23-5SN74LVC1G126

GND

A

OE

Y

VCC

VCC3V3

VCC3V3

SOT23-5SN74LVC1G126

GND

A

OE

Y

VCC

VCC3V3

A A

B

24 BF

Near VAA0 Pin Near VAA2 PinNear VAA1 Pin

VGA Codec

16

VGA_R0VGA_R1VGA_R2VGA_R3VGA_R4VGA_R5VGA_R6VGA_R7

1

2

10UFC3831

2

10UFC8

21

0.1UF

C402

1

2

C401

0.1UF

2

1

0.1UF

C111

3

2

1

4

5

U42

5

4

1

2

3

U43

1

2

0.01UFC112

2

1 C1070.01UF

1

2

0.01UFC110

1

2

C1090.1UF

NC

NC

NC

21

R261

3.3K

14151617181920212223

11

24

35

12345678910

25

26

27

32

31

34

33

3839404142434445464748

37

12

13

29

30

36

28U13

ADV7125

VGA_PSAVE_N

VGA_BLANK_N

VGA_SYNC_N

VGA_CLKVGA_B7

NC

NC

2

3

7

8

9

1

4

5

6

10

11

12

13

14

15

P2

12

3.3K

R100

2

10.1UF

C108

12

75R

R95

2

1

0.1UF

C106 1

2

C105

0.1UF

21

R101

560R

21

R96

75R

12

75R

R97

VGA_G7VGA_G6VGA_G5VGA_G4VGA_G3VGA_G2VGA_G1VGA_G0

VGA_B6VGA_B5VGA_B4VGA_B3VGA_B2VGA_B1VGA_B0

21FB5

1 2FB6

21

R98

3.3K

VGA_VSYNC

VGA_HSYNC

Page 17: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC5

FB0805

FB0805

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC5_AUDIO

VCC3V3

VCC5_AUDIO

D

D

PARTS=1LEVEL=STD

DVDD1_1

XTL_IN_2

XTL_OUT_3

DVSS1_4

SDATA_OUT_5

BIT_CLK_6

DVSS2_7

SDATA_IN_8

DVDD2_9

SYNC_10

RESET_N_11

PC_BEEP_12

13_PHONE_IN14_AUX_L15_AUX_R16_VIDEO_L17_VIDEO_R18_CD_L19_CD_GND_REF20_CD_R21_MIC122_MIC223_LINE_IN_L24_LINE_IN_R

25_AVDD1

26_AVSS1

27_VREF

28_VREFOUT

29_NC_AFILT1

30_NC_AFLIT2

31_NC_FILT_R

32_NC_FILT_L

33_3DN_RX3D

34_3DP_CX3D

35_LINE_OUT_L

36_LINE_OUT_R

MONO_OUT_37NC_AVDD2_38HP_OUT_L_39

HP_OUT_C_AVSS2_40HP_OUT_R_41

NC_42NC_AVDD3_43NC_AVSS3_44

ID0_45ID1_46

EAPD_JS0_47CIN_JS1_48

LM4550LQFP48

XTAL_SMD

B

2417 BF

Audio Codec

21C118

0.022UF

0603

1

233PF

C125

X4

24.576MHZ

2

1 C23

1UF0805

12345678910

11

12

131415161718192021222324

252627282930313233343536

373839404142434445464748

U14

DEVICE=LM4550VHPKG_TYPE=LQFP48

2

1 C10

220PF

GND_AUDIO

21220UF

C18

1 2

C17

220UF

2

1 C11

2.2UF

1

22.2UF

C403

2

1 C380

1UF

0805

2

1 C21

1UF

0805

2

1 C123

0.1UF

12

3.3K

R119

21

R120

3.3K

12

47R

R110

1

20.1UF

C1151

2

08051UF

C13

21C15

1UF

0805

1

2

5

3

4

J13

LINE_OUTPUT_JACK

1

2

5

3

4

J11

MICROPHONE_JACK

1

20.1UF

C116

21

R108

49.9K

4

3

5

2

1

J12

LINE_INPUT_JACK

2 1R109

2.2K

12

6.81KR112

21C9

1UF

0805

12

1K

R107

2

1 C117

0.1UF

1

20.1UF

C113

21R121

1M1 2

FB7

21FB8

1

2

0805

1UF

C22

2

1 C124

33PF

1

20.1UF

C114

2 1R111

6.81K

1 2

08051UF

C12

21C14

1UF

0805

12

6.81K

R114 21

R113

6.81K

12

10KR115

2

1 C119

220PF

1

2220PF

C120

21

R116

10K

1 2

08051UF

C16

12

10KR118

2

1 C122

220PF

21

R117

10K

4

3

5

2

1

HEADPHONE_JACK

J14

1

2

08051UF

C19

2 1R240

10K

2

1 C121

220PF

NCNCNCNCNCNCNC

NCNC

NCNCNCNC

FLASH_AUDIO_RESET_N

AUDIO_SDATA_IN

AUDIO_BIT_CLKAUDIO_SDATA_OUT

AUDIO_SYNC

Page 18: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

FB0805

VCC3V3

FB0805

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

0402

A

IND_1210

REF3025OUT

GND

IN

B

24 BF

System Monitor DVM Circuit

18

2 1R272

4.02K

21

R216

2.7R

SYS_MON_VREFP

SYS_MON_AVDD

GND_SYSMON

2

3

1

U37

1 2

L4220UH

2

1 C2970.68UF

1

2

0.22UFC420

1

2

0.1UFC295

2

1 C2711UF

2

1 C296

0.1UF

1 2

J2221

C294

1000PF

SYS_MON_VN0

SYS_MON_VP0

21C298

0.01UF

21

R212

1K

21

1K

R215

12

4.02K

R213

1 2

J21

2 1R271

4.02K

2 1

1K

R214

2 1FB14

GND_SYSMON

1 2FB15

Page 19: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

RST_N

VDD

VSS

D

VCC3V3VCC3V3

USB_A

VCC

GND

D-

D+

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

USB_B

VCC

D-

D+

GND

USB_B

VCC

D-

D+

GND

FB0805

SOP8

ENOUT2IN

GNDNC1

FLG

NC2OUT1

MIC2525-2B

VCC5

FB0805

VCC3V3

VCC3V3

0402

GND1_51GPIO19_A0_CS0_52

GPIO18_A2_RTS__53GPIO17_A1_RXD__54

GPIO16_A0_TXD_PWM0_55GPIO15_D15_nSSI_56

GPIO14_D14_57GPIO13_D13_58

GPIO10_D10_SCK_61nRD_62

VCC0_63nWR_64

GPIO9_D9_nSSI_65GPIO8_D8_MISO_66

D15_CTS_67D14_RTS_68D13_RXD_69

GND2_75D8_MISO_74D9_nSSI_73

D7_76

D6_77

D5_78

D4_79

D3_80

D2_81

D1_82

D0_83

nRESET_85

GPIO6_D6_87

GPIO7_D7_86

VCC2_88

GPIO5_D5_89

GPIO4_D4_90

GPIO3_D3_91

GPIO2_D2_92

GPIO0_D0_94

GPIO1_D1_93

A17_95

A18_96

nBEH_98

A16_97

nBEL_A0_99

GND3_100

1_A12_A23_A34_DM2B5_DP2B6_AGND7_A48_A59_DM2A10_DP2A11_OTGVBUS12_CSWITCHB13_CSWITCHA14_VSWITCH15_BOOSTGND16_BOOSTVCC17_A618_DM1B19_DP1B20_A721_AVCC

23_DP1A24_A825_A9

26_GND0

27_A10

28_XTALOUT

29_XTALIN

30_A11

31_A12

32_A13

33_A14

34_nMEMSEL

35_nROMSEL

36_nRAMSEL

37_VCC1

38_A15

39_GPIO31_SCK

40_GPIO30_SDA

41_GPIO29_OTGID

42_GPIO28_TX

43_GPIO27_RX

44_GPIO26_CTS_PWM3

45_GPIO25_IRQ1

46_GPIO24_INT_IORDY_IRQ0

47_GPIO23_nRD_IOR

48_GPIO22_nWR_IOW

49_GPIO21_nCS

50_GPIO20_A1_CS1

GPIO12_D12_59GPIO11_D11_MOSI_60

D11_MOSI_71D12_TXD_70

D10_SCK_72

Reserved_84

22_DM1A

CY7C67300-100AI

TQFP100

(DIE UP)

VCC3V3

XTAL_SMD

VCC3V3

VCC3V3

A0 VCCWP

A2VSS

A1

SDASCL

TSSOP8

B

Reset Supervisor

24 BFBypass cap for USB chip

USB

19

USB Host 1USB Power

1Kb to 16Kb EEPROM

Above 16Kb EEPROM

SCL -> GPIO30SDA -> GPIO31

SCL -> GPIO31SDA -> GPIO30

POR for USB

USB Peripheral 1

USB Peripheral 2

USB_GPIO31

1 87

34

2

56

U17

24LC128-I/ST

NC

USB_RESET_N

2

1 C425

0.1UF12

49.9K

R276

X512MHZ

21C127

22PF

USB_GPIO30

2 1R280

DNP

USB_GPIO29

2 1R281

0R

2 1R278

DNP

12

0R

R279

21C133

0.1UF

1 222PF

C126

NC

NCNCNCNCNC

NC

12

10KR265

USB_GPIO26

USB_SERIAL_RX

2 1R277

0RUSB_GPIO26

5152535455565758

616263646566676869

757473

76

77

78

79

80

81

82

83

85

87

86

88

89

90

91

92

94

93

95

96

98

97

99

100

123456789

101112131415161718192021

232425

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

5960

7170

72

84

22

U11

USB_GPIO29

12

4.7K

R268

2 1R275

20.0K

2

1 C4180.01UF

21

R264

10K

21

R273

2.80K

21

R122

1M

2

1 C419

0.1UF

1

20.1UF

C132

2 1FB13

1

2 J28

187

34

2

56

U44

12FB9

1

2

3

4

J1

4

3

2

1

J2

1

4

2

3

J19

1

2

C42150UF

1

20.1UF

C128

2

1 C129

0.1UF

1

20.1UF

C130

2

1 C131

0.1UF

NC NC

12

49.9K

R274

USB_GPIO25

NC

NCNC

SYSACE_USB_D11SYSACE_USB_D12

SYSACE_A2_USB_A1

USB_CS_N

SYSACE_MPWE_USB_WR_N

SYSACE_MPOE_USB_RD_N

USB_INT

USB_GPIO25

USB_SERIAL_TX

NC

NCNC

NC

NC

NCNCNC

NC

NCNCNC

NC

NC

NC

NC

NC

SYSACE_USB_D1

SYSACE_USB_D0

SYSACE_USB_D2

SYSACE_USB_D3

SYSACE_USB_D4

SYSACE_USB_D5

SYSACE_USB_D7

SYSACE_USB_D6

NC

NC

NC

NC

NC

NC

NC

NC

NCNC

NCNCNC

SYSACE_USB_D8SYSACE_USB_D9

NC

NCSYSACE_USB_D10

SYSACE_USB_D13SYSACE_USB_D14SYSACE_USB_D15

NCNCNC

SYSACE_A1_USB_A0

21

R282

4.7K

12

49.9K

R284

2 1R283

20.0K

2

1 C426

0.1UF

2

1 C427

0.1UF

12

3U46

MCP130

NCNC

Page 20: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC3V3

VCC3V3

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC3V3

VCC3V3

VCC3V3

A

A1

A10A11

A12A13

A14A15A16A17

A2

A20A21A22

A24

A3A4A5A6A7A8

A9

BYTE_N

CE0CE1CE2

DQ0

DQ10DQ11DQ12DQ13DQ14DQ15

DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

GND2

OE_N

RP_N

STS

VCC0VCC1

VCCQ

WE_N

A0

A18A19

A23

DQ1

VPEN

GND0GND1

A1

A10A11

A12A13

A14A15A16A17

A2

A20A21A22

A24

A3A4A5A6A7A8

A9

BYTE_N

CE0CE1CE2

DQ0

DQ10DQ11DQ12DQ13DQ14DQ15

DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

GND2

OE_N

RP_N

STS

VCC0VCC1

VCCQ

WE_N

A0

A18A19

A23

DQ1

VPEN

GND0GND1

B

(256)(128)(64)

24 BF

FLASH

Flash Memory

FLASH

Bypass and Bulk capacitors

20

(64)(128)(256)

FLASH_CE2

FLASH_AUDIO_RESET_NFLASH_AUDIO_RESET_N

4221

15

35

30

56

32

55

43

379

53

16

54

48

3634514946444038

525047454139

33

292

14

31

19202223242526

56

134

27

78

101112131718

28

MT28F320J3RG-11ET

U7

TSOP56

28

181713121110

87

27

431

56

26252423222019

31

142

29

33

394145475052

3840444649513436

48

54

16

53

937

43

55

32

65

30

35

15

2142

U6

MT28F320J3RG-11ET

TSOP56

1

2

10UFC384

21

R148

4.7K

12

4.7K

R241

21

R154

4.7K

21

R149

4.7K

2

1 C319

0.1UF 2

1 C321

0.1UF

1

2 0.1UF

C3201

2 0.1UF

C318

2

1 C317

0.1UF

1

2 0.1UF

C316

FLASH_BYTE_N

SRAM_FLASH_A22SRAM_FLASH_A21

FLASH_A0

FLASH_CE2

SRAM_FLASH_D23SRAM_FLASH_D24

SRAM_FLASH_D16SRAM_FLASH_D17

SRAM_FLASH_D29

SRAM_FLASH_D19

SRAM_FLASH_D22

SRAM_FLASH_D26

SRAM_FLASH_D28

SRAM_FLASH_D30

SRAM_FLASH_D27

SRAM_FLASH_D25

SRAM_FLASH_D21SRAM_FLASH_D20

SRAM_FLASH_D18

SRAM_FLASH_D31

SRAM_FLASH_OE_NSRAM_FLASH_WE_N

SRAM_FLASH_A17SRAM_FLASH_A16

SRAM_FLASH_A20SRAM_FLASH_A19SRAM_FLASH_A18

SRAM_FLASH_A15SRAM_FLASH_A14

SRAM_FLASH_A9SRAM_FLASH_A8

SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10

SRAM_FLASH_A2SRAM_FLASH_A3SRAM_FLASH_A4SRAM_FLASH_A5

SRAM_FLASH_A1

SRAM_FLASH_A6SRAM_FLASH_A7

SRAM_FLASH_A0

21

R151

4.7K

12

4.7K

R262

SRAM_FLASH_D1

SRAM_FLASH_A22

SRAM_FLASH_A18SRAM_FLASH_A17

FLASH_A0

SRAM_FLASH_WE_N

SRAM_FLASH_D9SRAM_FLASH_D8SRAM_FLASH_D7SRAM_FLASH_D6SRAM_FLASH_D5SRAM_FLASH_D4SRAM_FLASH_D3SRAM_FLASH_D2

SRAM_FLASH_D15SRAM_FLASH_D14SRAM_FLASH_D13SRAM_FLASH_D12SRAM_FLASH_D11SRAM_FLASH_D10

SRAM_FLASH_D0

SRAM_FLASH_A8SRAM_FLASH_A7SRAM_FLASH_A6SRAM_FLASH_A5SRAM_FLASH_A4SRAM_FLASH_A3SRAM_FLASH_A2

FLASH_A23

SRAM_FLASH_A21SRAM_FLASH_A20SRAM_FLASH_A19

SRAM_FLASH_A1

SRAM_FLASH_A16SRAM_FLASH_A15SRAM_FLASH_A14SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10SRAM_FLASH_A9

SRAM_FLASH_A0

FLASH_BYTE_N

SRAM_FLASH_OE_N

FLASH_A23

Page 21: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

K?

K?

K?

K?

VCC3V3

VCC3V3VCC3V3

VCC3V3

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCC3V3

VCC3V3

A

37_A036_A135_A34_A33_A32_A44_A45_A46_A47_A48_A49_A50_A81_A82_A83_A99_A100_A84_E1843_E3642_E7239_E14438_E288

93_BWA_N94_BWB_N95_BWC_N96_BWD_N

1_DQPC2_DQC3_DQC6_DQC7_DQC8_DQC9_DQC12_DQC13_DQC18_DQD19_DQD22_DQD23_DQD24_DQD25_DQD

VDDQ_4VDDQ_11VDDQ_15VDDQ_20VDDQ_27VDD_41

VDDQ_54VDDQ_61VDD_65

VDDQ_70VDDQ_77VDD_91VSS_5VSS_10VSS_17VSS_21VSS_26VSS_40VSS_55VSS_60VSS_67VSS_71VSS_76VSS_90NC_14NC_16NC_66

28_DQD

DQPD_30DQD_29

DQPA_51DQA_52DQA_53DQA_56DQA_57DQA_58DQA_59DQA_62DQA_63DQB_68DQB_69DQB_72DQB_73DQB_74DQB_75DQB_78DQB_79DQPB_80

TQFP100CY7C1354B

85_ADV/LD_N

88_WE_N86_OE_N

89_CLK

MODE_31ZZ_64

87_CEN_N

98_CE1_N97_CE292_CE3_N

B

24 BF

ZBT SRAM

21

The burst order mode of the SRAM is set to "Linear" by default

SRAM_BW3SRAM_BW2

SRAM_BW1SRAM_BW0

SRAM_FLASH_D0

SRAM_FLASH_D8

SRAM_FLASH_D1

SRAM_FLASH_D9

SRAM_FLASH_D2

SRAM_FLASH_D10

SRAM_FLASH_D3

SRAM_FLASH_D11

SRAM_FLASH_D4

SRAM_FLASH_D12

SRAM_FLASH_D5

SRAM_FLASH_D13

SRAM_FLASH_D6

SRAM_FLASH_D14

SRAM_FLASH_D7

SRAM_FLASH_D15

SRAM_FLASH_D31

SRAM_FLASH_D23

SRAM_FLASH_D30

SRAM_FLASH_D22

SRAM_FLASH_D29

SRAM_FLASH_D21

SRAM_FLASH_D28

SRAM_FLASH_D20

SRAM_FLASH_D27

SRAM_FLASH_D19

SRAM_FLASH_D26

SRAM_FLASH_D18

SRAM_FLASH_D25

SRAM_FLASH_D17

SRAM_FLASH_D24

SRAM_FLASH_D16 SRAM_FLASH_D16_RESSRAM_FLASH_D17_RESSRAM_FLASH_D18_RESSRAM_FLASH_D19_RESSRAM_FLASH_D20_RESSRAM_FLASH_D21_RESSRAM_FLASH_D22_RESSRAM_FLASH_D23_RES

SRAM_FLASH_D24_RESSRAM_FLASH_D25_RESSRAM_FLASH_D26_RESSRAM_FLASH_D27_RESSRAM_FLASH_D28_RESSRAM_FLASH_D29_RESSRAM_FLASH_D30_RESSRAM_FLASH_D31_RES

SRAM_FLASH_D15_RESSRAM_FLASH_D14_RESSRAM_FLASH_D13_RESSRAM_FLASH_D12_RESSRAM_FLASH_D11_RESSRAM_FLASH_D10_RESSRAM_FLASH_D9_RESSRAM_FLASH_D8_RES

SRAM_DQP2

SRAM_DQP1

SRAM_DQP3SRAM_DQP0

37363534333244454647484950818283991008443423938

93949596

12367891213181922232425

4111520274154616570779151017212640556067717690141666

28

3029

515253565758596263686972737475787980

85

8886

89

3164

87

989792

U41

1 2R286

47R

21

47R

R288

1 2R285

47R

21

47R

R287

21R211

4.7K

2

1 C26910UF

SRAM_FLASH_OE_NSRAM_FLASH_WE_N

SRAM_MODE

21

R209

4.7K

SRAM_CE1_N

SRAM_CLK

SRAM_ADV_LD_N

SRAM_ZZ

SRAM_FLASH_A22SRAM_FLASH_A21

SRAM_FLASH_A17SRAM_FLASH_A16

SRAM_FLASH_A20SRAM_FLASH_A19SRAM_FLASH_A18

SRAM_FLASH_A15SRAM_FLASH_A14

SRAM_FLASH_A9SRAM_FLASH_A8

SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10

SRAM_FLASH_A2SRAM_FLASH_A3SRAM_FLASH_A4SRAM_FLASH_A5

SRAM_FLASH_A0SRAM_FLASH_A1

SRAM_FLASH_A6SRAM_FLASH_A7

NCNCNC

2

1 C282

0.1UF

1

20.1UF

C283

2

1 C284

0.1UF

1

20.1UF

C285

2

1 C286

0.1UF

1

20.1UF

C289

2

1 C288

0.1UF

1

20.1UF

C287

12

4.7K

R208

12

4.7K

R210

8765

1234

RP20

4321

5678

RP198765

1234

RP18

4321

5678

RP17

4321

5678

RP2147R

8765

123447R

RP22

4321

5678

RP2347R

8765

123447R

RP24

SRAM_FLASH_D0_RESSRAM_FLASH_D1_RESSRAM_FLASH_D2_RES

SRAM_FLASH_D4_RESSRAM_FLASH_D5_RES

SRAM_FLASH_D3_RES

SRAM_FLASH_D6_RES

SRAM_FLASH_D8_RES

SRAM_FLASH_D10_RESSRAM_FLASH_D11_RESSRAM_FLASH_D12_RESSRAM_FLASH_D13_RESSRAM_FLASH_D14_RESSRAM_FLASH_D15_RES

SRAM_FLASH_D9_RES

SRAM_FLASH_D7_RES

SRAM_FLASH_D17_RESSRAM_FLASH_D16_RES

SRAM_FLASH_D19_RESSRAM_FLASH_D20_RESSRAM_FLASH_D21_RES

SRAM_FLASH_D18_RES

SRAM_FLASH_D22_RESSRAM_FLASH_D23_RESSRAM_FLASH_D24_RES

SRAM_FLASH_D26_RES

SRAM_FLASH_D28_RES

SRAM_FLASH_D25_RES

SRAM_FLASH_D27_RES

SRAM_FLASH_D29_RESSRAM_FLASH_D30_RESSRAM_FLASH_D31_RES

SRAM_FLASH_D7_RESSRAM_FLASH_D6_RESSRAM_FLASH_D5_RESSRAM_FLASH_D4_RESSRAM_FLASH_D3_RESSRAM_FLASH_D2_RESSRAM_FLASH_D1_RESSRAM_FLASH_D0_RES

Page 22: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC3V3

VCC3V3

VCC3V3

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

XC95144XL

IO_1_2_11

IO_1_3_12

IO_1_5_13

IO_1_6_14

IO_1_8_15

IO_1_9_16

IO_1_11_17

IO_1_12_18

IO_1_14_19

IO_1_15_20

IO_GCK1_1_17_22

IO_GSR_2_2_99

IO_GTS3_2_5_1

IO_GTS4_2_6_2

IO_GTS1_2_8_3

IO_GTS2_2_9_4

IO_2_11_6

IO_2_12_7

IO_2_14_8

IO_2_15_9

IO_2_17_10

IO_GCK2_3_2_23

IO_3_5_24

IO_3_6_25

IO_GCK3_3_8_27

28_IO_3_929_IO_3_1130_IO_3_1232_IO_3_1433_IO_3_1534_IO_3_1787_IO_4_289_IO_4_590_IO_4_691_IO_4_892_IO_4_993_IO_4_1194_IO_4_1295_IO_4_1496_IO_4_1597_IO_4_1735_IO_5_236_IO_5_537_IO_5_639_IO_5_840_IO_5_941_IO_5_1142_IO_5_1243_IO_5_1446_IO_5_15

49_IO_5_17

74_IO_6_2

76_IO_6_5

77_IO_6_6

78_IO_6_8

79_IO_6_9

80_IO_6_11

81_IO_6_12

82_IO_6_14

85_IO_6_15

86_IO_6_17

50_IO_7_2

52_IO_7_5

53_IO_7_6

54_IO_7_8

55_IO_7_9

56_IO_7_11

58_IO_7_12

59_IO_7_14

60_IO_7_15

61_IO_7_17

63_IO_8_2

64_IO_8_5

65_IO_8_6

66_IO_8_8

IO_8_9_67IO_8_11_68IO_8_12_70IO_8_14_71IO_8_15_72IO_8_17_73

GND_21GND_31GND_44GND_62GND_69GND_75GND_84

GND_100TCK_48TDI_45TDO_83TMS_47

VCCINT_5VCCINT_57VCCINT_98VCCIO_26VCCIO_38VCCIO_51VCCIO_88

B

24 BF

2-3 = Expansion Chain1-2 = No ExpansionJumperExpansion JTAG

CPLD for access to Linear Flash

22

Tap to solderable pads in layoutSRAM_FLASH_D27_RES

SRAM_FLASH_D30_RES

SRAM_FLASH_D6_RES

SRAM_FLASH_D1_RES

SRAM_FLASH_D0_RES

SRAM_FLASH_D13_RESSRAM_FLASH_D14_RESSRAM_FLASH_D15_RES

CPLD_IO_4

SRAM_FLASH_D29_RES

FPGA_DOUT_BUSY

SRAM_FLASH_D7_RES

SRAM_FLASH_D12_RES

SRAM_FLASH_D11_RESSRAM_FLASH_D10_RES

SRAM_FLASH_D23_RES

SRAM_FLASH_D9_RESSRAM_FLASH_D8_RES

CPLD_TDO

SRAM_FLASH_D5_RES

SRAM_FLASH_D4_RES

SRAM_FLASH_D3_RES

SRAM_FLASH_D2_RES

SRAM_FLASH_D16_RES

SRAM_FLASH_D31_RES

SRAM_FLASH_D17_RESSRAM_FLASH_D18_RES

SRAM_FLASH_D19_RES

11

12

13

14

15

16

17

18

19

20

22

99

1234678910

23

24

25

27

28293032333487899091929394959697353637394041424346

49747677787980818285865052535455565859606163646566

67687071727321314462697584100484583475579826385188

U36

SQ_TQFP100

21

R217

330R

1 2 3

J26

FLASH_AUDIO_RESET_N2 1

R266

47R

12

4.7K

R218

2

10.1UF

C329 1

2

C3300.1UF

2

10.1UF

C3311

2

C3280.1UF

2

10.1UF

C4041

2

C4050.1UF

EXPANSION_TDO

SYSACE_TDI

FPGA_PROM_CPLD_TMS

FPGA_PROM_CPLD_TCK

SRAM_FLASH_A14SRAM_FLASH_A15SRAM_FLASH_A18SRAM_FLASH_OE_N

CPLD_IO_5CPLD_IO_6

CPLD_PROG

FLASH_A23

FPGA_M1

FPGA_M2

FPGA_CS_B

FPGA_PROG_B

FPGA_INIT

FPGA_DONE

FPGA_DIN

SRAM_FLASH_A16

SRAM_FLASH_A17

SRAM_FLASH_A13

SRAM_FLASH_D28_RES

SRAM_FLASH_D26_RES

SRAM_FLASH_D25_RESSRAM_FLASH_D24_RES

FLASH_CE2

CPLD_IO_3CPLD_IO_2CPLD_IO_1

SRAM_FLASH_D22_RES

SRAM_FLASH_D21_RES

SRAM_FLASH_D20_RES

PLATFLASH_CPLD_CCLK

SRAM_FLASH_A5

SRAM_FLASH_A4

SYSCLK_100MHZ

SRAM_FLASH_A19

SYSACE_CFGADDR2

SRAM_FLASH_A6

SRAM_FLASH_A7

SRAM_FLASH_A8

SRAM_FLASH_A9

SRAM_FLASH_A10

SRAM_FLASH_A11

SRAM_FLASH_A12

SYSACE_CLK

SRAM_FLASH_A3

SRAM_FLASH_A2

SRAM_FLASH_A1

SRAM_FLASH_A0

SRAM_FLASH_A22

SRAM_FLASH_A21

FPGA_M0

SYSACE_CFGADDR0

SYSACE_CFGADDR1

SRAM_FLASH_A20

FPGA_TDO

Page 23: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VIN

S5

GND

VTTREF

S3

VDDQSNS

VLDOIN

VTT

PGND

VTTSNS

PWRPAD

MSOP10

VCC1V2

VCC2V5

VTTDDR

VCC2V5

D

VCC1V8

VCC5

D

VCC5

VCC5

D

VCC5

D

1UH

DO3316P-102

VCC5

EN

GND

IN

NC/FB

OUT

SOT23-5

VCC3V3

0402

0402

0402

0402

DO1813P-122HC

DO1813P-122HC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

PWP20

BOOT

PH0

VSENSE

VIN1

SS_ENA

VIN0

VBIAS

PH2PGND0

PGND1

PWRGD

PH1

PGND2

COMP

AGND

PH4

RT

PH3

VIN2

SYNC

PWRPAD

0402

0402

VCC5

VCC5

PWP28RT

SYNC

SS/ENA

VBIAS

VIN5

VIN4

VIN3

VIN2

BOOT

PH0

VSENSE

PGND1

PGND4

PGND2

PGND3

PH2

PWRGD

PH1

COMP

AGND

PH4

PH3

PGND5

PWRPAD

PH5

PH6

PH7

PH8

VIN1

PWP20

BOOT

PH0

VSENSE

VIN1

SS_ENA

VIN0

VBIAS

PH2PGND0

PGND1

PWRGD

PH1

PGND2

COMP

AGND

PH4

RT

PH3

VIN2

SYNC

PWRPAD

B

BF

Sequencing Options:

1) For sequential startup :

2) For ratiometric startup :

Power Supply

4.75V to 5.25V Input

OPEN R130, R146, R139 & R140

SHORT R128 & R135

OPEN R128 & R135

SHORT R130, R146, R139 & R140

1.8V@150mA max

[email protected]

3.3V@3A max

2.5V @ 3A max

1.2V @ 6A max

23 24

TPS54610PWP

5

6

2

15

18

16

17

813

12

4

7

11

3

1

10

20

9

14

19

21U31

TPS54310PWP

28

27

26

25

24

23

22

21

5

6

2

15

18

16

17

8

4

7

3

1

10

9

19

29

11

12

13

14

20

U32

12

39K

R291

21

R137

249R

2

1 C148470PF

1

2

470PFC138

2

1 C141470PF

1 2

680PF

C135

21C144

680PF

1 2

75R

R138

5

6

2

15

18

16

17

813

12

4

7

11

3

1

10

20

9

14

19

21U30

TPS54310PWP

1 2

C151

150PF

1

2

10UFC26

0805

2

1

0.1UF

C140

1 2

L11.2UH

1 2

L21.2UH

1 2

C142

150PF

21150PF

C137

21R145

5.11K

1

2

0.01UFC153

2

1C1340.01UF

1

2

0.01UFC145

21C150

680PF

21R182

0.003R

1 2

0.003R

R181

21R180

0.003R

12

1K

R144

3

2

1

4

5

U35

TPS73118DBV

1

2 10UF

C31

0805

1

20.1UF

C146

1

2 2.2UF

C32

0603

1

2

08051UF

C33

1 2

L3

2 1R142

71.5K

PG2V5

NC

1

2

C44220UF

21

DS18

GREEN

1 2

5.11K

R129

2

1 C36

10UF0805

1

2 10UF

C24

21R139

DNP

12

1.87K

R136

1

2

C46220UF

2

1 C29

1UF0805

2

1 C25

10UF

0805

1

2

10UFC37

0805

PG2V5

PG3V3

12

DNP

R130

21

R146

DNP

1

2

C149

0.1UF

21

R143

5.11K

12

0R

R135

2

1

0.1UF

C152

1

2

C139

0.1UF

21

R128

0R 1

2

71.5K

R127

12

5.11K

R126

21

R125

1K

2

1

0.1UF

C136

2

1220UFC43

21

R124

2.80K

PG1V2

12

14.3K

R134

2

1 C27

10UF

1

2

C143

0.1UF

12

1K

R133

21

R132

5.11K

21R131

5.11KPG1V2

2

1

0805

C30

10UF

2

1220UFC45

1 2

DNP

R140

NC

NC

NC

2 1R141

71.5K

PG1V2

PG2V5

10

9

8

6

7

1

2

3

4

5

11 U33

TPS51100DGQ

2

1

0805

C28

10UF

PG3V3

Page 24: ml401 2 3 - Xilinx · 2020-06-30 · b13 b12 a16 a15 a10 b10 b17 a17 c13 c12 u1 fpga_cs_b fpga_cclk fpga_din 2 1 47r r184 lcd_db5 sysclk_100mhz sram_clk mouse_clk phy_rxc_rxclk mouse_data

VCC2V5

04020402

0402040204020402

D

0402 0402 0402

0402 0402 0402 0402 0402 0402 0402 0402

04020402040204020402 0402

0402

VCC2V5

04020402

0402 040204020402040204020402 0402 04020402 040204020402040204020402

040204020402 0402040204020402 0402040204020402

VCC3V3

VCC3V3

D

0402

VCC2V5 VCC2V5

D

VCC3V3VCC3V3 VCC3V3

VCC2V5

VCC1V2

VCC2V5

D

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

D

B

FPGA Decoupling

BF

1.2V VCCINT

2.5V VCCO and VCCAUX

3.3V VCCO

Place these near Bank 7 VCCO

24 24

2

1330UFC409

1

2

C370330UF

VCCO_7

1

2

C373330UF

2

1 C3522.2UF

2

12.2UFC356

2

1 C3552.2UF

2

10.68UFC348

2

1 C3390.68UF

2

10.68UFC338

2

10.68UFC334

2

10.22UFC2081

2

C2070.22UF

2

10.22UFC2061

2

C2300.22UF

2

10.22UFC2291

2

C2280.22UF

1

2

0.22UFC221

2

1 C2220.22UF

2

1 C2390.047UF

1

2

0.22UFC223

1

2

C376330UF

2

12.2UFC351

2

1 C3572.2UF

2

10.68UFC332

2

1 C3350.68UF

2

1 C3330.68UF

1

2

0.22UFC2501

2

C2580.22UF

1

2

C2680.22UF

2

1 C2490.22UF

2

10.22UFC266

2

10.22UFC2621

2

C2600.22UF

2

1 C2380.047UF

2

1 C2410.047UF

2

1 C2470.047UF

2

1 C2520.047UF

2

1 C2450.047UF

2

1 C2670.047UF

2

1 C2650.047UF

2

10.047UF

C414

2

1 C2460.047UF

2

10.047UF

C248

2

1 C2610.047UF

2

1 C2200.047UF

2

1 C2240.047UF

2

1 C2250.047UF

2

1 C2260.047UF

2

1 C2270.047UF

2

1 C2100.047UF

2

1 C2630.047UF

2

1 C2160.047UF

2

1 C2170.047UF

2

1 C2180.047UF

2

1 C2110.047UF

2

1 C2120.047UF

2

1 C2130.047UF

2

1 C2140.047UF

2

1 C2150.047UF

2

1 C2190.047UF

2

10.047UF

C259

2

1 C2400.047UF

2

10.047UF

C411

2

10.047UF

C410

2

1 C4172.2UF

2

1 C1780.047UF

2

1 C1820.047UF

2

1 C1830.047UF

2

1 C1840.047UF

2

1 C1850.047UF

2

1 C1930.047UF

2

1 C1920.047UF

2

1 C1910.047UF

2

1 C1900.047UF

2

1 C1890.047UF

2

1 C1880.047UF

2

1 C1870.047UF

2

1 C1860.047UF

2

1 C1810.047UF

2

1 C1800.047UF

2

1 C1790.047UF

2

10.68UFC344

2

1 C3450.68UF

2

10.68UFC346

2

1 C3612.2UF

2

1330UFC371

2

1 C3430.68UF

2

10.22UFC201

2

1 C2000.22UF

2

10.22UFC194

2

10.22UFC199

2

1 C1950.22UF

2

10.22UFC196

2

1 C1970.22UF

2

10.22UFC198

2

12.2UFC362

2

10.22UFC237

1

2

C2360.22UF

2

12.2UFC358

2

1 C3370.68UF

2

1 C2310.047UF

2

1 C2320.047UF

2

1 C2330.047UF

2

1 C2340.047UF

2

10.047UF

C413

2

10.047UFC412