MJE16204 NPN datasheet

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SCANSWITCHNPN Bipolar Power Deflection TransistorFor High and Very High Resolution

Monitors

The MJE16204 is a stateoftheart SWITCHMODE bipolar

power transistor. It is specifically designed for use in horizontal

deflection circuits for 20 mm diameter neck, high and very resolution,

full page, monochrome monitors.

550 Volt CollectorBase Breakdown Capability

Typical Dynamic Desaturation Specified (New TurnOff Characteristic)

Application Specific StateoftheArt Die Design

Isolated or NonIsolated TO220 Type Packages

Fast Switching:65 ns Inductive Fall Time (Typ)

680 ns Inductive Storage Time (Typ)

Low Saturation Voltage:

0.4 Volts at 3.0 Amps Collector Current and 400 mA Base Drive

Low CollectorEmitter Leakage Current

100 A Max at 550 Volts VCES

High EmitterBase Breakdown Capability For High Voltage Off Drive

Circuits 9.0 Volts (Min)

Case 221D is UL Recognized at 3500 VRMS: File #E69369

Preferred devices are ON Semiconductor recommended choices for future use and best overall value.

ON Semiconductort

Semiconductor Components Industries, LLC, 2001

April, 2001 Rev. 21 Publication Order Number:

MJE16204D

MJE16204

POWER TRANSISTORS

6.0 AMPERES

550 VOLTS VCES45 AND 80 WATTS

CASE 221A09TO220ABMJE16204


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MAXIMUM RATINGS

Rating

Symbol

MJE16204

Unit

CollectorEmitter Breakdown Voltage

VCES

550

Vdc

CollectorEmitter Sustaining Voltage

VCEO(sus)

250

Vdc

EmitterBase Voltage

VEBO

8.0

Vdc

RMS Isolation Voltage(2) Per Fig. 14

(for 1 sec, TA = 25_C, Per Fig. 15

Rel. Humidity < 30%) Per Fig. 16

VISOL

V

Collector Current Continuous

Pulsed (1)

ICICM

6.0

8.0

Adc

Base Current Continuous

Pulsed (1)

IBIBM

2.0

4.0

Adc

Repetitive EmitterBase Avalanche Energy

W(BER)

0.2

mJ

Total Power Dissipation @ TC = 25_C

Total Power Dissipation @ TC = 100_C

Derated above TC = 25_C

PD

80

32

0.64

Watts

W/_C

Operating and Storage Temperature Range

TJ, Tstg

55 to 150

_C

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Thermal Resistance Junction to Case

RJC

1.56

_C/W

Lead Temperature for Soldering Purposes

1/8 from the case for 5 seconds

TL

260

_C

(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cyclev 10%.

(2) Proper strike and creepage distance must be provided.

*Measurement made with thermocouple contacting the bottom insulated mounting surface of the

package (in a location beneath the die), the device mounted on a heatsink thermal grease applied,

and a mounting torque of 6 to 8 inSlbs.


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ELECTRICAL CHARACTERISTICS (TC= 25_C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS (3)

Collector Cutoff Current

(VCE = 550 Vdc, VBE = 0 V)

ICES

100

Adc

EmitterBase Leakage

(VEB = 8.0 Vdc, IC = 0)

IEBO

10

Adc

EmitterBase Breakdown Voltage

(IE = 1.0 mA, IC = 0)

V(BR)EBO

8.0

11

Vdc

CollectorEmitter Sustaining Voltage (Table 1)

(IC = 10 mAdc, IB = 0)

VCEO(sus)

250

325

Vdc

ON CHARACTERISTICS (3)

CollectorEmitter Saturation Voltage

(IC = 1.0 Adc, IB = 133 mAdc)

(IC = 3.0 Adc, IB = 400 mAdc)

VCE(sat)

0.25

0.4

0.6

1.0

Vdc

BaseEmitter Saturation Voltage

(IC = 3.0 Adc, IB = 400 mAdc)

VBE(sat)

0.9

1.5

Vdc

DC Current Gain

(ICE = 6.0 Adc, VCE = 5.0 Vdc)

hFE

8.0

14

20

DYNAMIC CHARACTERISTICS

Dynamic Desaturation Interval (IC = 3.0 A, IB1 = 400 mA)

tds

50

ns

Output Capacitance

(VCE = 10 Vdc, IE = 0, ftest = 100 kHz)

Cob

90

150

pF

Gain Bandwidth Product

(VCE = 10 Vdc, IC = 1.0 A, ftest = 1.0 MHz)

fT

10

MHz

EmitterBase TurnOff Energy

(EB(avalanche) = 500 ns, RBE = 22 )

EB(off)

6.6

J

CollectorHeatsink Capacitance

(Mounted on a 1x 2x 1/16Copper Heatsink, VCE = 0, ftest = 100

kHz)

Cchs

3.0

pF

SWITCHING CHARACTERISTICS

Inductive Load (Table 2) (IC = 3.0 A, IB = 400 mA)

Storage

Fall Time

tsvtfi

680

65

1500

150

ns

(3) Pulse Test: Pulse Width = 300 s, Duty Cyclev 2.0%.


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VCE,

COLLECTO

R-

EMITTERVOLTAGE(VOLTS)

Figure 1. Typical DC Current Gain

IC, COLLECTOR CURRENT (AMPS)

0.5 2 10

20

hFE,

DCCURRENTGAIN

1 53

30

7

0.7

TJ = 100C

25C

-55C

7

10

5

3

50

VCE = 5 V


Figure 2. Typical CollectorEmitter

Saturation Voltage

0.5

3

0.2

5

10

1

0.1

7

0.3

2

0.7

0.5 32 50.7 10.1 0.2

TJ = 25C

TJ = 100C

IC/IB1 = 10

0.3 7

60

5

7.5

0.2

C,C

APACITANCE(pF)

VBE,

BASE-

EMITTERVOLTAGE(VO

LTS)

VCE,

COLLECTOR-

EMITTERVOLTAGE

(VOLTS)

Figure 3. Typical CollectorEmitterSaturation Region

IB, BASE CURRENT (AMPS)

0.7

0.1

0.03 0.3

0.3

6 A

0.05 1 2

2 A 3 AIC = 1 A

0.030.07 0.1 0.70.2 0.5

30

5

10

Figure 4. Typical BaseEmitterSaturation Voltage

0.3 300.5

5

0.7

0.10.7 201 10

10

2

TJ = 25C

2 3 5 7


TJ = 25C

TJ = 100C

0.3

Figure 5. Typical Capacitance

10K

VR, REVERSE VOLTAGE (VOLTS)

Cib

0.1

1K

100

101 10 100 1K

2K

200

20

3K

300

5K

500

50

0.3 2 30 300200.5 5 50 500

fT,

TRANS

ITIONFREQUENCY(MHz)


Figure 6. Typical Transition Frequency

VCE = 10 V

ftest = 1 MHz

TC = 25C

0 0.5 1 1.5 2 32.5

20

8

2

14

0

6

16

12

0.5

0.07

0.2

0.05

20

3

7

2

1

3

IC/IB1 = 5 to 107

1

3

0.5

30

0.2 3 200

TC = 25C

10

4

18

Cob


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IC,

COLLECTORC

URRENT(AMPS)

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 7. Maximum Forward Biased

Safe Operating Area

7

3

10

1

0.02

70

SECONDARY BREAK

DOWN

WIREBOND LIMIT

THERMAL LIMITIC,

COLLECTORC

URRENT(AMPS)

0.1

7 20 250

3

0.30.2

d

c

TC = 25C

1ms

10 s

2

5

0.5

50

7

0150 550

IC/IB1 5

TJ

100C

VBE(off) = 5 V

50

VCE(pk), PEAK COLLECTOR-EMITTER VOLTAGE (VOLTS)

350

VBE(off) = 0 V

Figure 8. Maximum Reverse Biased

Safe Operating Area

3

5

2

1

250 450

0.03

0.070.05

0.01

0.7

1005 10 20030

MJE16204 6

4

SAFE OPERATING AREA

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of

a transistor: average junction temperature and second

breakdown. Safe operating area curves indicate IC VCElimits of the transistor that must be observed for reliable

operation; i.e., the transistor must not be subjected to greater

dissipation than the curves indicate.

The data of Figure 7 is based on TC = 25_C; TJ(pk) is

variable depending on power level. Second breakdown

pulse limits are valid for duty cycles to 10% but must bederated when TC 25_C. Second breakdown limitations do

not derate the same as thermal limitations. Allowable

current at the voltages shown on Figure 7 may be found at

any case temperature by using the appropriate curve on

Figure 9.

At high case temperatures, thermal limitations will reduce

the power that can be handled to values less than the

limitations imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be

sustained simultaneously during turnoff, in most cases,with the basetoemitter junction reverse biased. Under

these conditions the collector voltage must be held to a safe

level at or below a specific value of collector current. This

can be accomplished by several means such as active

clamping, RCsnubbing, load line shaping, etc.

TC, CASE TEMPERATURE (C)

040 120 160

0.6

POWERDERATINGFACTOR

SECOND BREAK

DOWN DERATING

1

0.8

0.4

0.2

60 100 14080

THERMAL

DERATING

2

0

Figure 9. Power Derating

The safe level for these devices is specified as Reverse

Biased Safe Operating Area and represents the

voltagecurrent condition allowable during reverse biased

turnoff. This rating is verified under clamped conditions so

that the device is never subjected to an avalanche mode.

Figure 8 gives the RBSOA characteristics.


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H.P. 214

OR EQUIV.

P.G.

0

-35 V

5

0

50

0 10

0 -V

2N533

71 F

+ -

+

-

0.02 F

20

10

0

+V 11 V

2N619

1

A

RB1

RB2

10 F

0.02 F

T1 +V

0 V

-V

A

50

*IB

*IC

T.U.T

.

L

MR856

Vclamp VCC

IC

VCE

IB

IB1

IB2

IC(pk)

VCE(pk)

T1 [Lcoil (ICpk)

VCC

T1 adjusted to obtain IC(pk)

V(BR)CEOL = 10 mH

RB2 =

VCC = 20 Volts

RBSOA

L = 200 H

RB2 = 0

VCC = 20 Volts

RB1 selected for desired IB1

Note: Adjust V to obtain desired VBE(off) at Point A.

*Tektronix

*P6042 or

*Equivalent

Table 1. RBSOA/V(BR)CEO(sus) Test Circuit


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+24 V

C1100 F

+

U2

MC7812

VI VOG

N

D

C2

10 F

+ Q2MJ11016

(IB

)

R1

1 k

6.2

V

100 V

C3

10 F

+R7

2.7

k

R8

9.1

k

R9

470 R10

47

C5

0.1

C4

0.005

(DC)

R2

R510

R3

250

SYN

CQ

1

BS17

0

R6

1 k 2

18

7 6

G

N

D

O

S

C

VCC

% OU

T

R10

4701 W

Q3

MJE

15031

R12

470

1 W

D1

MUR11

0

T

1

R4

22

L

B

D2

MUR460

CY

VCE

Q4

DUT

LY

C6

100 F

R51 k

(IC) Q5

MJ11016

+

T1: Ferroxcube Pot Core #1811 P3C8

Primary/Sec. Turns Ratio = 18:6

Primary Inductance Gap:

LP = 250 H

LB = 0.5 H

CY = 0.01 F

LY = 13 H

U1

MC1391P

Table 2. High Resolution Deflection Application Simulator


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Figure 10. Typical Collector Current Storage

Time in Deflection Circuit Simulator

ts,

STORAGETIME(ns)

2K

700

200

300

ICI/B1 = 7.5

500

1K

1 2 753

10


Figure 11. Typical Collector Current Fall Time

in Deflection Circuit Simulator

tf,FALLTIME(ns) 100

20

50

200

2 3 5 71 10

30

70

TC = 25C

ICI/B1 = 7.5

10

TC = 25C

Figure 12. Deflection Simulator Switching

Waveforms From Circuit in Table 2

IC

0% IB

VCE

tsv

VCE = 20 V

tfi

10% IC(pk)

Figure 13. Definition of Dynamic

Saturation Measurement

TIME (ns)

VCE

DYNAMIC SATURATION TIME

IS MEASURED FROM VCE = 1 V

TO VCE = 5 V

tds

1

4

COLLECTOR-

EMITTERVOLTAGE(VOLTS)

5

0

3

2

0

0

90% IC(pk)

DYNAMIC DESATURATIION

The SCANSWITCH series of bipolar power transistors

are specifically designed to meet the unique requirements of

horizontal deflection circuits in computer monitor

applications. Historically, deflection transistor design was

focused on minimizing collector current fall time. While fall

time is a valid figure of merit, a more important indicator of

circuit performance as scan rates are increased is a newcharacteristic, dynamic desaturation. In order to assure a

linear collector current ramp, the output transistor must

remain in hard saturation during storage time and exhibit a

rapid turnoff transition. A sluggish transition results in

serious consequences. As the saturation voltage of the

output transistor increases, the voltage across the yoke

drops. Roll off in the collector current ramp results in

improper beam deflection and distortion of the image at the

right edge of the screen. Design changes have been made in

the structure of the SCANSWITCH series of devices which

minimize the dynamic desaturation interval. Dynamic

desaturation has been defined in terms of the time required

for the VCE to rise from 1.0 to 5.0 volts (Figures 12 and 13)

and typical performance at optimized drive conditions hasbeen specified. Optimization of device structure results in a

linear collector current ramp, excellent turnoff switching

performance, and significantly lower overall power

dissipation.


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t, TIME (ms)

0.010.01 0.05 1 2 5 10 20 50 5000.1 0.50.2

1

0.2

0.1

0.05r(t),T

RANSIENTTHERMAL

RJC(t) = r(t) RJCRJC = 1.56C/W MAX

D CURVES APPLY FOR POWERPULSE TRAIN SHOWN

READ TIME AT t1TJ(pk) - TC = P(pk)RJC(t)

P(pk)

t1t2

DUTY CYCLE, D = t1/t2SINGLE PULSE

RESISTANCE(NORMALIZED)

Figure 14. Typical Thermal Response for MJE16204

0.5D = 0.5

0.7

0.07

0.02

0.02 100 200 10 k

0.2

0.05

0.1

0.02

0.01


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PACKAGE DIMENSIONS

CASE 221A09ISSUE AA

TO220AB

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION Z DEFINES A ZONE WHERE ALL

BODY AND LEAD IRREGULARITIES ARE

ALLOWED.

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.570 0.620 14.48 15.75

B 0.380 0.405 9.66 10.28

C 0.160 0.190 4.07 4.82

D 0.025 0.035 0.64 0.88

F 0.142 0.147 3.61 3.73

G 0.095 0.105 2.42 2.66

H 0.110 0.155 2.80 3.93

J 0.018 0.025 0.46 0.64

K 0.500 0.562 12.70 14.27

L 0.045 0.060 1.15 1.52

N 0.190 0.210 4.83 5.33

Q 0.100 0.120 2.54 3.04

R 0.080 0.110 2.04 2.79

S 0.045 0.055 1.15 1.39

T 0.235 0.255 5.97 6.47

U 0.000 0.050 0.00 1.27

V 0.045 --- 1.15 ---

Z --- 0.080 --- 2.04

B

Q

H

Z

L

V

G

N

A

K

F

1 2 3

4

D

SEATINGPLANET

C

ST

U

R

J


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Notes


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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particularpurpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/orspecifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must bevalidated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury ordeath may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and holdSCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonableattorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claimalleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

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MJE16204D

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MJE16204 NPN datasheet