mixed signal

Lovely Professional University, PunjabCourse Code Course Title Course Planner Lectures Tutorials Practicals CreditsECE567 MIXED SIGNAL IC DESIGN 16096::Mohinder Bassi 3.0 0.0 0.0 3.0Course Category Courses with conceptual focus

TextBooks Sr No Title Author Edition Year Publisher NameT-1 CMOS CIRCUIT DESIGN,

LAYOUT AND SIMULATIONR JACOB BAKER 2nd 2011 WILEY-INDIA, NEW DELHI

Reference BooksSr No Title Author Edition Year Publisher NameR-1 CMOS MIXED-SIGNAL CIRCUIT

DESIGNJACOB BAKER 2nd 2008 WILEY-INDIA, NEW DELHI

R-2 DESIGN OF ANALOG CMOS INTEGRATED CIRCUITS

BEHZAD RAZAVI 1st 2001 TATA MCGRAW HILL, INDIA

Relevant WebsitesSr No (Web address) (only if relevant to the course) Salient FeaturesRW-1 http://www.cmosedu.com/jbaker/courses/ece615/f10/lec615.htm The students will cover the entire syllabus details of mixed signal basic

conceptsRW-2 www.edaboard.com The students can clear their doubts of a particular topic in this fourm

Software/Equipments/Databases

Sr No (S/E/D) (only if relevant to the course) Salient FeaturesSW-1 Cadence Virtuoso, ADE simulator, Xilinx ise and Cadence Assura The design problems coverage, project coverage related issues.

Detailed Plan For Lectures

LTP week distribution: (LTP Weeks)Weeks before MTE 7

Weeks After MTE 7

Spill Over 7

Week Number

Lecture Number

Broad Topic(Sub Topic) Chapters/Sections of Text/reference books

Other Readings,Relevant Websites, Audio Visual Aids, software and Virtual Labs

Lecture Description Learning Outcomes Pedagogical ToolDemonstration/ Case Study / Images / animation / ppt etc. Planned

Live Examples

Week 1 Lecture 1 Analog and Discrete-time signal processing(Quantization noise)

R-1:ch-30 Sec 30.1 L1:Introduction to basic course. L2:Sampling details in terms of mixed signal applications.

As a result of this lecture student will able to understand the effect of sampling with respect to aliasing effect.

Lecturing, Video Presentation and Discussion.

Analog and Discrete-time signal processing(Introduction tosampling theory)

R-1:ch-30 Sec 30.1 RW-1 L1:Introduction to basic course.L2:Sampling details in terms of mixed signal applications.

As a result of this lecture student will able to understand the Sampling theorem in details.


Digital Transmitters and receivers.

Analog and Discrete-time signal processing(Types of sampling)


As a result of this lecture student will able to understand different types of sampling.


Lecture 2 Analog and Discrete-time signal processing(Types of sampling)


As a result of this lecture student will able to understand different types of sampling.


Analog and Discrete-time signal processing(Introduction tosampling theory)

R-1:ch-30 Sec 30.1 RW-1 L1:Introduction to basic course.L2:Sampling details in terms of mixed signal applications.

As a result of this lecture student will able to understand the Sampling theorem in details.


Digital Transmitters and receivers.

Analog and Discrete-time signal processing(Quantization noise)


As a result of this lecture student will able to understand the effect of sampling with respect to aliasing effect.


Lecture 3 Analog and Discrete-time signal processing(The MOSFET as switch)

T-1:ch-25 sec 25.1 Switching application of MOSFET with charge injection.

As a result of this lecture student will able to understand the action of MOSFET as a switch.

Lecturing, Discussion.

Analog and Discrete-time signal processing(Charge Injection)

T-1:ch-25 sec 25.1 Switching application of MOSFET with charge injection.

As a result of this lecture student will able to understand switching action with charge injection.

Lecturing, Video Presentation.

Week 2 Lecture 4 Analog and Discrete-time signal processing(Fully Differential Sample and Hold Circuit)

T-1:ch-25 sec 25.2 RW-1 Explanation of fully differential sample and hold circuit with common mode feedback circuits.

As a result of this lecture student will able to understand designing of fully differential sample and hold circuit.

Lecturing, and questioning.

Testing of products in an industry by choosing samples.

Analog and Discrete-time signal processing(Common Mode Feedback)

T-1:ch-25 sec 25.2 RW-1 Explanation of fully differential sample and hold circuit with common mode feedback circuits.

As a result of this lecture student will able to understand designing of fully differential sample and hold circuit.


Lecture 5 Analog and Discrete-time signal processing(Switched-capacitor filters)

T-1:ch-25 sec 25.3 RW-1 Explain switch capacitorfilter design

As a result of this lecture student will have the conceptualknowledge of designmixed signal basedanalog and discretefilters


High speed RF switches

Lecture 6 Analog and Discrete-time signal processing(Switched-capacitor filter applications)

T-1:ch-25 sec 25.4 RW-1 Design of dynamic amplifiers and dynamic comparators.

As a result of this lecture student will able to understand the concept of mixedsignal based analogand discrete filtersdesign in terms ofvariouscommercializedapplications.

Lecturing, Questioning.

Week 3 Lecture 7 Analog to Digital Converters(Flash ADC)

T-1:ch-29 sec 29.2.1 sec 29.2.2

Explaining the mixedsignal design of Flash ADC

As a result of this lecture student will able to familiarize with thenew designmethodologies of ADCsin terms of variouscommercialsedapplicatrions

Lecturing, Discussion and Brainstorming.

Cellphone.

Lecture 8 Analog to Digital Converters(Pipeline ADC)

T-1:ch-29 sec 29.2.3 RW-1 Explaining the mixedsignal design of pipelineADC

As a result of this lecture student will able to familiarize with the new design methodologies of ADCs in terms of various commercialsed applicatrions

Lecturing, Brainstorming and Discussion.

Week 3 Lecture 9 Analog to Digital Converters(Dual slope ADCs.)

T-1:ch-29 sec 29.2.4 Explain the mixed signaldesign of Dual slopeADC s

As a result of this lecture student will able to understand the concept of dual slopeADCs mixed signalbased design.


Digital Antenna

Week 4 Lecture 10 Analog to Digital Converters(Successive approximation ADCs)

T-1:ch-29 sec 29.2.5 Explaining the design of Successive approximation ADCs

As a result of this lecture student will able to understand the concept ofsuccessive ADCdesign andimplementation

Lecturing, brainstorming.

Lecture 11 Analog to Digital Converters(High-resolution ADC)

T-1:ch-29 sec 29.2.6 L11: Highresolution designs basics.L12:Highresolution designing.

As a result of this lecture student will able to understand thenew designmethologies of ADCsin terms of variouscommercialsedapplicatrions


Lecture 12 Analog to Digital Converters(High-resolution ADC)

T-1:ch-29 sec 29.2.6 L11: Highresolution designs basics.L12:Highresolution designing.

As a result of this lecture student will able to understand thenew designmethologies of ADCsin terms of variouscommercialsedapplicatrions


Week 5 Lecture 13 Quiz,Test,Design problem1

Lecture 14 Digital to Analog Converters(Input/output characteristics of an ideal D/A converter)

T-1:ch-28 sec 28.4 L14:Basics of DAC designprinciples.L15:I/O characteristics of an ideal D/A converter.

As a result of this lecture student will able to understand the ideal D/A converter characteristics.


MP3 and Compact Disc.

Digital to Analog Converters(Performance metrics of D/A converter)

T-1:ch-28 sec 28.4 L14:Basics of DAC design principles. L15:I/O characteristics of an ideal D/A converter.

As a result of this lecture student will able to understand various performance metrics of D/A converter.

Lecturing,Discussion.

Lecture 15 Digital to Analog Converters(Performance metrics of D/A converter)

T-1:ch-28 sec 28.4 L14:Basics of DAC design principles. L15:I/O characteristics of an ideal D/A converter.

As a result of this lecture student will able to understand various performance metrics of D/A converter.

Lecturing,Discussion.

Week 5 Lecture 15 Digital to Analog Converters(Input/output characteristics of an ideal D/A converter)

T-1:ch-28 sec 28.4 L14:Basics of DAC designprinciples.L15:I/O characteristics of an ideal D/A converter.

As a result of this lecture student will able to understand the ideal D/A converter characteristics.


MP3 and Compact Disc.

Week 6 Lecture 16 Digital to Analog Converters(D/A converter in terms of voltage, current, and charge division or multiplication)

R-1:Sec- 34.1 316-328

L16: Explain the students thevoltage, currentdivisions in DACs.L17: Chargedivisions in DACs.

As a result of this lecture student will able to analyze D/A converter in terms of voltage, current, and charge division or multiplication.

Lecturing, Discussion and questioning.

Lecture 17 Digital to Analog Converters(D/A converter in terms of voltage, current, and charge division or multiplication)

R-1:Sec- 34.1 316-328

L16: Explain the students thevoltage, currentdivisions in DACs.L17: Chargedivisions in DACs.

As a result of this lecture student will able to analyze D/A converter in terms of voltage, current, and charge division or multiplication.

Lecturing, Discussion and questioning.

Lecture 18 Digital to Analog Converters(Resistor-Ladder architectures)

T-1:ch-29 sec 29.1.1 sec 29.1.2 sec 29.1.3

Explain the resistorladder DAC designs

As a result of this lecture student will able to understand the designing of resistorladder DAC.


Week 7 Lecture 19 Digital to Analog Converters(Current-steering architectures.)

T-1:ch-29 sec 29.1.4 29.1.5

RW-1 Explain current steeringarchitectures

As a result of this lecture student will able to design the current steering DACs


SPILL OVERWeek 7 Lecture 20 Spill Over

Lecture 21 Spill Over

MID-TERMWeek 8 Lecture 22 Phased Locked Loop(Basics

building blocks of PLL)T-1:ch-19 sec 19.1 Explain the building

blocks and dynamics ofPLL

As a result of this lecture student will able to understand the basicsof locking aparticular frequencyat a desired clock.


CRO

Lecture 23 Phased Locked Loop(Charge pump and Phase detector)

R-2:sec- 15.1 and sec 15.2

L23: Explain the Non idealeffects in charge pump.PLLs.L24: Jitter relates to charge pumpPLLs.

As a result of this lecture student will able tounderstand the basicsof Charge PumpPLLs and Phasedetectors.


Week 8 Lecture 24 Phased Locked Loop(Charge pump and Phase detector)

R-2:sec- 15.1 and sec 15.2

L23: Explain the Non idealeffects in charge pump.PLLs.L24: Jitter relates to charge pumpPLLs.

As a result of this lecture student will able tounderstand the basicsof Charge PumpPLLs and Phasedetectors.


Week 9 Lecture 25 Phased Locked Loop(Voltage Control Oscillator design)

T-1:ch-19 sec 19.2 Explain the role ofVCOs in PLL Designs.

As a result of this lecture student will able to understand the designbasics of VCOs

Lecturing,Questioning and Discussion.

Lecture 26 Phased Locked Loop(PFD DPLL)

T-1:ch-19 sec 19.3.2 RW-1 L26: Basics of DPLL using PFD.L27:Designing of DPLL using PFD.

As a result of this lecture student will able to design DPLL using PFD.


Lecture 27 Phased Locked Loop(PFD DPLL)

T-1:ch-19 sec 19.3.2 RW-1 L26: Basics of DPLL using PFD.L27:Designing of DPLL using PFD.

As a result of this lecture student will able to design DPLL using PFD.


Week 10 Lecture 28 Phased Locked Loop(Digital PLL and its applications)

T-1:ch - 19 sec 19.4 L28: Working principle of Digital PLLs.L29: Digital PLLs commercialapplications



Lecture 29 Phased Locked Loop(Digital PLL and its applications)

T-1:ch - 19 sec 19.4 L28: Working principle of Digital PLLs.L29: Digital PLLs commercialapplications



Lecture 30 Quiz,Test,Design problem2

Week 11 Lecture 31 Delay Locked Loop(Basics of Delay Locked loop)

T-1:ch-19 sec 19.5 Explain the Delay lockloop and its applicationsin mixed signal design

As a result of this lecture student will able to familiar with thelocking frequencywith some delay


Lecture 32 Delay Locked Loop(Clock Management System)

T-1:ch-19 sec 19.5 Explainthe clock managementin both PLL and DLLapplications.

As a result of this lecture student will able to understand themanagement of clocksignals in reducingjitter


Missile locking system

Week 11 Lecture 33 Delay Locked Loop(Applications of Delay locked loop)

T-1:ch-19 sec 19.6.1 sec-19.6.2

L33: 1gb/s clock recovery circuit L34: 2 Ghz DLL using Hogge Phase detector.

As a result of this lecture student will able to understand various applications of DLL


Week 12 Lecture 34 Delay Locked Loop(Applications of Delay locked loop)

T-1:ch-19 sec 19.6.1 sec-19.6.2

L33: 1gb/s clock recovery circuit L34: 2 Ghz DLL using Hogge Phase detector.

As a result of this lecture student will able to understand various applications of DLL


Lecture 35 Quiz,Test,Design problem3

Lecture 36 Mixed Signal Layout(Basics of Mixed-signal layout)

T-1:ch- 28 sec-28.6 Explained the basics ofMixed signal Layout

As a result of this lecture student will able to familiar with thedesign rules of Mixedsignal layout.


Transceiver

Mixed Signal Layout(Shielding)

T-1:ch- 28 sec-28.6 Explained the basics ofShielding.

As a result of this lecture student will able to familiar with thedesign rules of Mixedsignal layout.


Week 13 Lecture 37 Mixed Signal Layout(Grounding and Guard rings)

T-1:ch- 28 sec-28.6 Explain the concept of grounding and guard rings.

As a result of this lecture student will able to understand the the concept of grounding and guard rings in mixed signal layout


Lecture 38 Mixed Signal Layout(Interconnects)

R-2:ch-18 sec-18.2.5 RW-2 Explain the Details ofinterconnects ariseduring physical layoutof mixed signal circuit.

As a result of this lecture student will able to understand theactual high levelparasitics arise duringmaking interconnectsand datatransmission.


Lecture 39 Mixed Signal Layout(Pipelined ADC layout)

R-1:ch-34 SW-1 L39: Pipelined ADC Layout basic.L40: Designing of pipelined ADC layout.

As a result of this lecture student will able to understand the designing of Pipelined ADC layout

Lecturing, Video Presentation, Discussion and simulations.

Week 14 Lecture 40 Mixed Signal Layout(Pipelined ADC layout)

R-1:ch-34 SW-1 L39: Pipelined ADC Layout basic.L40: Designing of pipelined ADC layout.

As a result of this lecture student will able to understand the designing of Pipelined ADC layout

Lecturing, Video Presentation, Discussion and simulations.

SPILL OVERWeek 14 Lecture 41 Spill Over


Week 15 Lecture 43 Spill Over



Scheme for CA:Component Frequency Out Of Each Marks Total Marks

Quiz,Test,Design problem 2 3 10 20Total :- 10 20

Details of Academic Task(s)AT No. Objective Topic of the Academic Task Nature of Academic Task

(group/individuals/field work

Evaluation Mode Allottment / submission Week

Test1 To test the performance of students on the basics in analog signal processing

The test includes the sampling, different switched capacitor filters and ADCs.

Individual 6 questions of 5 mark each

4 / 5

Quiz1 To test the analytical skills of the students .

Te quiz includes the DACs and their applications and Phased Locked Loop.

Individual Negative marking of 25% should be done and there should be 30 question of MCQ type.

9 / 10

Design problem1 To test the knowledge by assigning the students a new design problem.

The task includes the topics like PLL, DLL, ADC, DAC, charge pumps, VCO and frequency synthesisers, Phase detectors.

Individual Literature= 5 marks , Viva = 5 marks and Design Implementation = 20 marks

5 / 12

Documents

mixed signal