ESA-ESTEC GSTP projectAnalog Silicon Compiler for

Mixed-Signal ASICsFinal Presentation - Introduction

Georges GielenKatholieke Universiteit Leuven

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 2

Outline

! Context

! Project objectives

! Project partners

! Project overview

! Overview Final Presentation

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 3

Need for mixed-signal ICs! analog is interface between DSP electronics and

analog outer world" voice, audio, images…" measuring and driving “signals”" transmitting “signals”

! high-performance applications" high speeds, low power...

Digital

Analog

Analog

real world

1010110

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 4

The egg model

DSP

analogtelecommunications

automotive

military/space

industrial applications

medical

consumer electronics

multimedia

[Paul Gray - UC Berkeley]

The more digital, the more analog and mixed-signal !

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 5

Is analog still important ?! non-negligible % of system functionality is still analog! mixed analog-digital ICs is a multi-billion-$ industry

100%

80%

60%

40%

20%

0%1990 2000

digital functionality

analog functionality% functionality

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 6

Example : ISDN interface

HYBRID

WAKE-UPDETECTOR

D

ATX

AMPLIFIER

U-IN

TE

RF

AC

E

TXFILTER

RXFILTER

ECHOCANCELLER

++

-EQUALISERAGC

CLOCKRECOVERY

ANALOG FRONT-END DIGITAL SIGNAL PROCESSORS SUBSCRIBER/EXCHANGEINTERFACE

MUX

MUX

SYNCHWORD6kBd

INT

ER

FA

CE

AD

AP

TA

TIO

N

2B

1Q

SCRAMBLER

DE-SCRAMBLER

ACTIVATION/DEACTIVATIONCONTROLLER

‘S’INTERFACENT-MODE

256 kbits/s

256 kbits/s

512kHz

8kHz

DOUT

DIN

DCLK

DFR

S0 IN

TE

RF

AC

E

SXP

SXN

SRP

SRN

XTLI(CLS)

7.68MHz

34Ω

5KΩ

34Ω

5KΩ

D

A

2B

1Q

Source : Alcatel Microelectronics

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 7

Example : ISDN interface

Source : Alcatel Microelectronics

PORTS µCORE

SOFTWARE

ANALOG BLOCKS

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 8

SIA technology roadmapprediction of Gordon Moore:

chip compute power *2 per 1,5 year

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 9

What is driving integration ?! reduction of cost :

" technology used" number of components and passives

! higher performance, lower power

© B De Muer

~ cm2 ~ mm2

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 10

What about space ?! integration reduces 3-D volume, weight! increased performance and lower power consumption! cheaper standard technologies

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 11

Need for analog CAD tools! analog is typically small fraction of chip area! but requires disproportionally large part of design effort

and is often responsible for design errors !

# analog is big problem for mixed-signal systems !# need analog CAD tools to solve this problem !

Digital

Analog Analog

Digital

AREA DESIGN TIME

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 12

Analog module generator! covers complete design flow

from spec to layout :" optimally tailors circuit to each

application and process" increases analog design

productivity" for frequently used cells

e.g. opamps, filters...

[Gielen JCTheory 1995]

AMGIE

LAYLA

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 13

Outline

! Context

! Project objectives

! Project partners

! Project overview

! Overview Final Presentation

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 14

Project objectives! extend Analog Module Generator (resulting from ASTP4

project) to meet the requirements for on-board spaceapplications" mismatch/yield" better layout

! develop, manufacture and test two ADC cells" high-speed ADC" low-power ADC for on-board PDFE

! design, manufacture and demonstrate microcamera foron-board space applications" CMOS imager chips

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 15

Outline

! Context

! Project objectives

! Project partners

! Project overview

! Overview Final Presentation

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 16

Project partners! prime contractor : Katholieke Universiteit Leuven

! subcontractor : IMEC" subcontractor : FillFactory

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 17

Outline

! Context

! Project objectives

! Project partners

! Project overview

! Overview Final Presentation

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 18

Project overview! duration : October 1996 - March 2001! phase I and II - 1.2 MAU! project activities :

" WP1100-1500 : consolidation and extension of the AMG(K.U.Leuven)

" WP2100-2500 : development of high-speed ADC(K.U.Leuven)

" WP2600, 3100-3600 : development of PDFE, including low-power ADC (IMEC)

" WP4100-4900 : development of microcamera(IMEC - FillFactory)

" WP5100-5200 : project management (K.U.Leuven)

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 19

Outline

! Context

! Project objectives

! Project partners

! Project overview

! Overview Final Presentation

Final presentation – ESA-ESTEC 7/3/2001 Georges Gielen 20

Final Presentation Overview! Geert Van der Plas (K.U.Leuven) :

“Analog module generator software (AMGIE/Mondriaan)”! Jan Vandenbussche (K.U.Leuven) :

“Irradiation of CSA-PSA”“High-speed analog-to-digital converter”

! Jan Wouters (IMEC) :“Particle detector front-end (PDFE)”

! lunch! Werner Ogiers (FillFactory) :

“Integrated radiation-tolerant imaging systems (IRIS1,IRIS2)”