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MIPI M-PHY Receiver Characterization Using the SV1C SerDes Tester

The M-PHY is an advanced physical-layer specification that is part of the Mobile Industry Processor Interface (MIPI) Alliance. It represents the MIPI Alliance’s vision for enhanced capabilities of next generation mobile devices. In this white paper, we describe how the SV1C Personalized SerDes Tester can be used to characterize MIPI M-PHY receivers. As will be shown, receiver testing is a critical part of the M-PHY, which is based on an embedded-clock architecture. In the following section, we introduce the M-PHY at a high level as well as the SV1C. Subsequently, we describe the various test and measurement features that make the SV1C an ideal tool for receiver characterization and test.

SV1C and the MIPI M-PHY Test Requirements Figure 1 shows an architectural block diagram of a MIPI M-PHY link. As can be seen, multiple point-to-point connections are made in parallel to construct a very high-bandwidth link between a transmitter and a receiver.

Figure 1 Block diagram of a MIPI M-PHY Link.

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Some of the challenges for designing and creating M-PHY links have to do with the complexity of the protocols and the need to maintain a very low power design. Specifically, the challenges include

• Clock recovery and 8b/10b encoding (complex receiver)

• Very high data rates (1-6 Gbps and beyond)

• EMI requirements (low voltage swing)

• Multiple protocols

When it comes to M-PHY receiver characterization, the SV1C – illustrated in Figure 2 – is an ideal candidate for several reasons. It is a tiny, self-contained, automated bench tool that enables tremendous productivity enhancement during design characterization or validation. Built upon Introspect Technology’s massively parallel test architecture, it offers the opportunity for multi-lane, multi-device physical layer characterization at an unprecedented cost/performance combination. Each SV1C Personalized SerDes Tester offers up to 8 transmit lanes and 8 receive lanes for maximum test flexibility. It provides a complete easy-to-use programming environment and intuitive graphical user interface.

In the following sections, we show how the SV1C can be used for M-PHY receiver characterization.

Figure 2 Illustration of SV1C Personalized SerDes Tester.

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Figure 4 Programming data rate within the Introspect ESP GUI.

Additionally, the SV1C transmitters have been optimized for performance at high speed as well as for creating signal impairments for the purpose of receiver test (covered in the next section). In Figure 5, we show a scope capture of the SV1C transmitters optimized for 2.5 Gbps. As can be seen, the high bandwidth transmitters and the precise waveform shape control result in a wide eye opening at this data rate.

Figure 5 Sample SV1C output eye diagram at 2.5 Gbps.

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Wide Range of Parametric Measurements In order to be viable as a receiver characterization solution, the SV1C incorporates various AC parametric controls for the purpose of impairment creation and/or margin testing. Some of these features are

• Programmable jitter injection

o Either as a pattern source or in loopback mode

o Automated sinusoidal jitter sweeps

• Programmable voltage swing down to 20 mV minimum value

• Programmable pre-emphasis and waveform shape

An illustration of jitter injection waveforms is shown in Figure 6, which is a screen capture from an oscilloscope when measuring the SV1C output data pattern while injecting sinusoidal jitter. This graph shows the extracted time-domain view of the injected jitter (commonly referred to as Time-Interval Error). As can be seen, high spectral purity is achieved.

Figure 6 Illustration of jitter injection fidelity as measured by an oscilloscope.

Jitter injection is used to test and characterize the clock recovery feature of M-PHY receivers. By sweeping jitter amplitude and frequency, the tolerance of the M-PHY receiver can be traced and analyzed. This is illustrated in Figure 7, which shows the jitter tolerance graph of a real device. This graph is the result of an automated jitter tolerance sweep that has been programmed in the Introspect ESP GUI.

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We next move on to the receiver voltage tests. By using a very similar tool to the jitter tolerance utility, the SV1C offers a receiver sensitivity shmoo test. In this test, the SV1C transmitter swing is swept gradually (from high to low) until the receiver fails to recover the stimulus pattern correctly. An illustration of a receiver sensitivity test result on a real device is shown in Figure 9. As can be seen, the part is able to receive < 80 mV in this case.

Figure 9 Receiver voltage sensitivity shmoo test.

Parallelism and Customization Once complete confidence is obtained in the receiver PHY, it is possible to perform more advanced tests. For example, parallel transmitter testing can be performed to ensure good cross-talk performance and/or power dissipation performance. Similarly, protocol-based testing can happen through SV1C customization. That is, the SV1C can be optionally reconfigured to implement a specific M-PHY protocol: real MIPI traffic can be transmitted to the receiver for higher-level verification of the link.

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Conclusion In this paper, we presented how the SV1C can be used to perform full-featured MIPI M-PHY receiver characterization. Optimized for high-speed, automation, and signal impairment creation, the SV1C is an ideal candidate for the test, verification, and characterization of any MIPI M-PHY receiver. Specifically, we illustrated the following features:

• Continuous data rate range that allows for margin testing and/or future-proofing

• Programmable and automated jitter tolerance sweeping

• Programmable and automated voltage sensitivity testing

• Advanced post-processing analysis using the scientific computing utility