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11/1/00 Paul Besser SRC TRC on Reliabiilty 1
Microstructural Characterization ofCopper Interconnects
Paul R. Besser,Technology Development Group, Advanced Micro Devices, Inc.
The data presented here were collected in collaboration with:
Ehrenfried Zschech and Werner Blum (AMD Saxony Manufacturing Dresden, Germany)Matt Herrick, Cindy Simpson, Stacye Thrasher, Greg Braeckelmann, Brett Baker, Stewart
Rose, Betsy Weitzman, and Hisao Kawasaki (Digital DNA Laboratories, Motorola)Larry Zhao (Technology Development Group, Advanced Micro Devices)
Richard Ortega and Delrose Winter (AMIA Laboratories-Rigaku)
11/1/00 Paul Besser SRC TRC on Reliabiilty 2
Explicit Goals of the Topical Research Conferenceon Reliability
“Papers are intended to highlight the key challenges or problemsrelated to semiconductor reliability.
The goal is to clearly define the problems and challenges, toencourage discussion of potential avenues of research, and
to stimulate university research.”
--- Semiconductor Research Corporation
11/1/00 Paul Besser SRC TRC on Reliabiilty 3
Status/Plans for Cu interconnects
• 2000:– Industry is developing and qualifying 0.13 µm Technology Node.
• The technology node term is no longer the gate CD, although theconvention is still followed. The contact and metal line CD is 1.5Xof 0.13 or roughly 0.18 µm.
– Advanced PVD barriers and Cu are used. Bulk of the Cu is deposited byelectrochemical deposition.
• 2001/2:– Industry will be developing and qualifying the 0.10 µm Technology.– Advanced PVD barriers and Cu will be used. Bulk of the Cu will be
deposited by electrochemical deposition. Seed repair will be in place.CVD barriers may be needed.
• 2003:– Industry will be developing and qualifying the 0.08 µm Technology.– CVD barriers will be used. Possibly CVD Cu. ECD Cu.
11/1/00 Paul Besser SRC TRC on Reliabiilty 4
General Goals of SRC University Research
• Further the fundamental understanding of a subject.
• Perform thorough, quality research and apply models/theory tounderstand and aid in interpretation of the results.
• Be a leader for the industry in which research is conducted.
11/1/00 Paul Besser SRC TRC on Reliabiilty 5
Suggested areas for Research
• Investigate replacements for Cu– What is the next metal? Gold, Silver, etc.?– How will it be deposited and contained on the wafer?
• What are the limits to extending Cu?– Electromigration– What is the fundamental limit of current density for Cu?– Calculate and model scattering processes. What factors affect
scattering? How do they change with linewidth, barrier, microstructure,Cu processing, alloys.
– Alloy improvements for Cu. How to insert the Alloy? Plating, seed?– Correlation of microstructure to EM.
• Microscopic• Macroscopic• Barrier effects
11/1/00 Paul Besser SRC TRC on Reliabiilty 6
Suggested areas for Research
• Advanced barriers– What are the next barriers that will be used? CVD. Are they carbide
based? Amorphous, crystalline? What are the choices?– Advanced interface studies are needed. With Cu. With advanced low K
materials.– Barrier layer effectiveness studies. How thin can a barrier be? How to
improve CVD and PVD barriers? How to minimize the interface widthand scattering of the barrier and Cu?
• Copper– Grain growth and evolution studies are needed by universities.
• PVD, CVD, ECD, E-less– Industry tends to focus more on bulk grain growth. Universities can do
more fundamental work.– Microstructural evolution of lines. => stress, grain size, texture
11/1/00 Paul Besser SRC TRC on Reliabiilty 7
Why Microstructure?
• Much of the published microstructural characterization has beendone on blanket films. However, interconnect lines connecttransistors for the industry.
• Cu lines are produced using inlaid methods.• The inlaid fabrication method affects the grain growth and
microstructure of the Cu.– Grain growth is affected by the confinement of the sidewalls.– Sidewall-nucleated grains are observed.– Mechanical stress is affected by the inlaid fabrication methodology.– Electroplating introduces new variables to understand.– EM performance may be affected by grain orientation, grain size, stress.
• Our research was undertaken to characterize and understand themicrostructure of Cu in inlaid Cu lines.
11/1/00 Paul Besser SRC TRC on Reliabiilty 8
The Challenge
• As we push the technology to smaller dimensions,– The interface area increases.– The dimension of the inlaid trench reduces.– New materials are being introduced.
• Thus,– Interfaces are dominant, and adhesion is critical.– Quantifying the grain growth and grain evolution of Cu interconnects is
more challenging.– Integrating new materials affects the thermal budget of the
interconnects.
Can universities develop and apply novel micro-methods to study interface adhesion, quantify microstructure, and
understand the interaction of new materials?
11/1/00 Paul Besser SRC TRC on Reliabiilty 9
• Comparison-– 1980s. Stresses in thin films move to the forefront of industry challenges.– Novel testing methods are developed and applied to understand the
problem:• Bulge testing, Nanoindentation, GIXS and XRD of thin films/lines,
Bending beam methods, etc.• Comparitively, these are now macroscopic methods.• Microscopic methods are now needed to quantify microstructure.
• What are the novel characterization methods coming from Universities?– Adhesion testing? MELT? 4-point bend adhesion test? Macro.– In-situ void observations during EM. Micro.– Piezoresitive measurements? Micro. No longer.– EBSD? Micro.– X-Ray Microdiffraction Micro
Can universities develop and apply novel micro-methods to study interface adhesion, quantify microstructure, and
understand the interaction of new materials?
11/1/00 Paul Besser SRC TRC on Reliabiilty 10
What aspects of microstructure of lines areimportant and how are they measured?
❶ Grain size! TEM, STEM costly! EBSD time-intensive! FIB/SEM A lot of work.
❷ Crystallographic orientation! XRD cheap, non-destructive. Gives average grain
orientation through thickness. MUST be pole figure.! EBSD complicated, cannot be done through passivation.
❸ Stress! Curvature easy, convenient. Not for lines. Great for films.! XRD direct measurements for lines. Best for lines.
❹ Grain-to-grain misorientation! EBSD time and labor intensive! TEM more time and labor intensive
11/1/00 Paul Besser SRC TRC on Reliabiilty 11
Grain size measurement in Cu lines *
• FIB images taken of the lines afterthe ILD is stripped show the grainboundaries and twins.
• Grain size is determined using themean grain length in the center ofthe trench, along trench direction.
• Twins (coherent interfaces) arenot considered grain boundaries.
• 150-200 grains are measured pergrain distribution (per linewidth).
• Equivalence between TEM andFIB/SEM has been shown.
* Method first applied to damascene lines by Besser, Sanchez and Field, Adv. Metall. and Interconnect Systems for ULSI Applications in 1996, MRS Symposium Proceedings (1997).
11/1/00 Paul Besser SRC TRC on Reliabiilty 12
Grain size determination in lines
0.01 0.10 1.00 10.00
Grain Size
Cum
mul
ativ
e Pr
obab
ility
1.06 µm lines0.7 µm lines0.35 µm lines
The grain sizedistribution in lines isdetermined with thismethod: mediangrain size, standarddeviation attained.
Grain size distributionis log-normal.Grain size is afunction of linewidth.
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 13
Grain size measurements in linesLow vs. High Temp PP Anneal
The grain sizedistribution andmedian grain sizeincrease dramaticallywith increasinganneal temperature.
0.01 0.10 1.00 10.00Grain Size (µm)
Cum
mul
ativ
e Pr
obab
ility
1.06 µm lines0.7 µm lines
0.35 µm lines1.06 µm lines HIGH
0.7 µm lines HIGH0.35 µm lines HIGH
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 14
Grain growth with ILD depositionLow Temp PP Anneal.
With and without passivation.
If the annealtemperature is low,then significantgrain growthoccurs during ILDdeposition.
0.01 0.10 1.00 10.00Grain Size (µm)
Cum
mul
ativ
e Pr
obab
ility
1.06 µm lines0.7 µm lines
0.35 µm linesPassivated 1.06 µm lines
Passivated 0.7 µm linesPassivated 0.35 µm lines
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 15
Grain size measurements in lines Medium Temp PP Anneal.
With and without passivation.
If the annealtemperature is equalto or greater thanthe ILD depositiontemperature, thenthe grain growthduring ILD depositionis insignificant.
0.01 0.10 1.00 10.00
Grain Size (µm)
Cum
mul
ativ
e Pr
obab
ility
Passivated 1.06 µm linesPassivated 0.7 µm linesPassivated 0.35 µm lines1.06 µm lines0.7 µm lines0.35 µm lines
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 16
Pole figures for films and lines.
0°
70.5°90°
(111) plane normal at 0°
(11-1) planenormal at
70.5°
3D 2D
For lines, the grains nucleateat the trench bottom as wellas the sidewall. The (11-1)from the sidewall leads to anadditional peak on the (111)pole figure for in-laid lines.
(111)
From bottom,(111)-texture
From bottom,(511)-texture
films
lines
11/1/00 Paul Besser SRC TRC on Reliabiilty 17
Vertical Sidewall.Preferred in-plane (111).
[aa0]
[111]
[aa0]
[111]
Non-vertical sidewall.Preferred in-plane (111).
(111) grains nucleated onsidewall lead to multiple peaks
in the (111) pole plot. Peakseparation is twice the sidewall
angle.
Schematic drawing of pole figures for lines.
85°tilt
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 18
.70
.35 .50
(111) Pole Figures of Cu Lines vs. Linewidth
WIDELINES
NARROWLINES
Narrow lineshave a larger
sidewall contribution.
(111)from
sidewall
FILM
Cu (111)
Cu (511)
Cu (11-1)
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 19
(111) Pole Figure for 0.35µm Cu Lines,Low Temp anneal.
Cu {111}
Cu (511)
(111) fromsidewall
Cu lines have a strong (111) texture and (511) twins.The (111) grains have a preferred in-plane texture: [aa0] along sidewall.
(111) sidewall-nucleated grains are visible. Twins have a preferred orientation.The entire pole figure must be collected to quantify the orientation. θθθθ-2θθθθ scans are useless.
70.5°
15° 25°
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 20
Cu line pole figures are similar, independent of when the anneal is
performed. Grain growth is independent of when the anneal was performed.
(111) Pole Figure of 0.35µm Cu Lines-
Low Temp, post-CMP anneal
High Temp, post-plate anneal
Low Temp, post-plate anneal
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 21
No (110) grains.The (111) grains have a preferred in-plane texture: [aa0] along sidewall.
(111) sidewall-nucleated grains are visible.
(110) Pole Figure of 0.35µm Cu Lines,Low Temp anneal.
(111)
(111) grains from trenchbottom have a preferred
in-plane orientation.
(111) grains from sidewallshould give peaks at 0 and 55°.
Peaks at 5, 49 and 59° arisefrom the 5° sidewall angle.Peaks have a preferred in-
plane orientation with the [aa0]parallel to the trench bottom.
35°49° 59°5°
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 22
Does Texture and grain size of blanket films matter?
• These results differ from others-– Lucent (Lingk et al.) and U. of Michigan (Sanchez et al.) find relatively weak
texture in their inlaid Cu lines-– Appl. Phys. Lett. 74(5) 1999. J. Appl. Phys. 84(10) 5547 (1998)
– Also, new grain growth initiates initiates at the top corner of the trench.– Grains extend from the overburden into the trench for WIDE lines.
• The current work on 0.35µm lines observes:– Crystallographic texture is strong (111).– Texture and therefore, grain growth, is independent of when the anneal is
performed (post CMP or post plating).– Texture on the field is not necessarily representative of texture in the trench.– The (111) grains have a preferred orientation relative to the sidewall to surface
energy. (Sanchez and Besser, IITC (1998)).
• Differences are attributed to differences in processing and linewidth.– Plating additives, chemistry, seed layer, barrier type, waveform, etc.– Thermal history is different as well.
11/1/00 Paul Besser SRC TRC on Reliabiilty 23
Grain growth in field is not necessarily correlatedwith grain growth in trenches
Top of film
FIB image is tilted at 52°
into the trenches
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 24
Texture and Grain Growth Comments
θ-2θ scans are misleading. Pole figures are necessary to quantify texture.• There is disagreement on grain growth and texture development in trenches.
Overburden matters for some. Texture is weak for some.• Fundamental studies about grain growth and texture evolution in trenches are
necessary.– Need new methods to quantify texture?– Some work was done at U.M.– Some research underway at Johns Hopkins.– How does texture develop? How does it vary with plating chemistry type, seed
layer thickness, additives, annealing place, temperature and time?– How does pinning of solute atoms (additives) affect evolution?– How do you quantify additives in trenches?
• What does orientation mean for EM reliability?– IEDM 2000 paper will be given on microstructure correlation to reliability.– More university work is needed.
11/1/00 Paul Besser SRC TRC on Reliabiilty 25
Development of stress in RIE and damascene lines
SiO2
Cu
Cu Z
YX
• Mechanical stresses and their determination are wellunderstood in inlaid Cu lines-
– Rick Vinci did the first work, with lift-off Cu lines.– Besser, Stress-Induced Phenomena in Metallization, AIP Conf. Proc.
491, pp. 229-239 (1999).– Besser et al., MRS Symp. Proc.563 (1999).– Kasthurirangan et al., Stress-Induced Phenomena in Metallization, AIP
Conf. Proc. 491, pp. 304-314 (1999).
• Mechanical stresses arise from a difference in thermalexpansion between the Cu and the substrate anddielectrics. CTECu>>CTESi
• The stresses in Cu lines are smaller than that in Al lines ofthe same aspect ratio.
• Inlaid fabrication alters the stress state.• The stresses at RT are hydrostatic and tensile. Stresses
are linear with temperature.• How does the stress state change with annealing
conditions?
11/1/00 Paul Besser SRC TRC on Reliabiilty 26
Stress data- Passivated 0.35 µm lines
• Mechanical stress was measured on 0.35 µm lines, 4.5kÅ deep.• Samples had the same passivating ILD.• All stress values are in MPa. X is along the length, Y along the width
and Z along the height of the line.• Mechanical stress increases with anneal temperature.
Anneal Temperature X Y Z HydrostaticPost-plating , low temp 307 162 55 175
Post-plating, medium temp. 399 235 156 263Post-plating, medium +40° 458 289 194 314
Post-plating, high temp. 618 470 228 439
Cu Z
X Y
Submitted for publication to Journal of Electronic Materials (2000).
11/1/00 Paul Besser SRC TRC on Reliabiilty 27
Stress is a strong function of ILD
ILD Process X Y Z HydrostaticSilane HDP 681 514 453 549
TEOS 542 315 288 382HSQ + TEOS 381 156 -50 162
Al linewidth= 0.5 µm, Aspect Ratio=0.625All stresses are in MPa.
The OOP CTE for HSQ >> CTE of Al. Therefore, the Z stress is compressive.
From P.R. Besser et al., MRS Symposium Proceedings 563, 189 (1999)
11/1/00 Paul Besser SRC TRC on Reliabiilty 28
Stress- Options for Research
• With each technology, stress becomes more important.– Narrower lines have higher stress.– Stress state is driven by in-plane and out-of-plane CTE of ILD and substrate.– The elastic modulli of the materials are so different.
• Refractory metals are stiff. Cu evolves with temperature, given the opportunity.Ultra low K films are weak.
• Fundamental research is needed to-– Correlate stress with changes in grain size, orientation, linewidth, barrier
thickness, alloys, plating conditions, additives, ILD type and modulus,adhesion, thermal history and Cu processing.
– Correlate mechanical properties of Low K to reliability.– Correlate mechanical stress to EM reliability, decohesion, BTS.– Improve signal for precision stress measurement. Synchrotron?– New techniques needed to measure micro-stress?
– Raman is used on silicide lines. Mico-strain still needs improvement.– How to determine decohesion of metal to Low-K?
– Sanchez, U.M. had Piezoresistance.
11/1/00 Paul Besser SRC TRC on Reliabiilty 29
Suggested Solutions
• Universities work closely with industry.– This meeting is one excellent example.
• Better industry partnership.– Requires industry to openly share data or have NDAs.– Universities could partner with suppliers, however.– Industry should mentor SRC researchers.– Industry direct support of University research.
• Link SRC to SEMATECH?– Allows University access to advanced structures and materials.– Integration and processing strongly affects interfaces, microstructure.
• Allegiances between universities• Joint test vehicle?