Microelectronic Circuits SJTU Yang Hua Chapter 10 Analog Integrated Circuits and its application Introduction The 741 Op-Amp Circuit The ideal Op Amp

Microelectronic Circuits SJTU Yang Hua

Chapter 10 Analog Integrated Circuits and its application

IntroductionThe 741 Op-Amp CircuitThe ideal Op AmpThe inverting configuration The noninverting configurationIntegrator and differentiatorOther operation application

SJTU Yang HuaMicroelectronic Circuits

Introduction

信号的提取：传感器、接收器或信号发生器，通常信号比较微弱，且易受干扰，甚至与噪声的幅度相当。信号预处理：信号的分离与放大（隔离、滤波与阻抗变换）信号的加工：信号的运算、转换和比较等。一般再经功放才能驱动负载，或者经 A/D 转换到 PC 机信号的执行：一般为 CPU （ MCU ， DSP ， PC ）


Part 1. The 741 Op-Amp Circuit and analysis.

Part 2. Analog integrated circuits’ application

_ the application of operational amplifier

_ the application of comparer circuits

Content


Part I:

Analog ICs include operational amplifiers, analog multipliers, A/D converters, D/A converters, PLL, etc.

A complete op amp is realized by combining analog circuit building blocks.

The bipolar op-amp has the general purpose variety and is designed to fit a wide range of specifications.

The terminal characteristics is nearly ideal.


The 741 Op-Amp Circuit


Structure

“ 化整为零”：划分偏置电路、输入级、中间级和输出级

“ 分析功能”：分别分析各部分的结构形式及特点

“ 统观整体” ：研究各部分电路之间的联系 “ 定量估算”：必要时做定量分析


General Description

24 transistors, few resistors and only one capacitor

Two power supplies Short-circuit protection




The Input Stage

The input stage consists of transistors Q1 through Q7.

Q1-Q4 is the differential version of CC and CB configuration.

High input resistance. Current source (Q5-Q7) is the active load of input

stage. It not only provides a high-resistance load but also converts the signal from differential to single-ended form with no loss in gain or common-mode rejection.


The Intermediate Stage

The intermediate stage is composed of Q16, Q17 and Q13B.

Common-collector configuration for Q16 gives this stage a high input resistance as well as reduces the load effect on the input stage.

Common-emitter configuration for Q17 provides high voltage gain because of the active load Q13B.

Capacitor Cc introduces the miller compensation to insure that the op amp has a very high unit-gain frequency.



The Output Stage

The output stage is the efficient circuit called class AB output stage.

Voltage source composed of Q18 and Q19 supplies the DC voltage for Q14 and Q20 in order to reduce the cross-over distortion.

Q23 is the CC configuration to reduce the load effect on intermediate stage.

Short-circuit protection circuitry Forward protection is implemented by R6 and Q15. Reverse protection is implemented by R7, Q21,

current source(Q24, Q22) and intermediate stage.


The Output Stage

(a) The emitter follower is a class A output stage. (b) Class B output stage.


The Output Stage

Wave of a class B output stage fed with an input sinusoid.

Positive and negative cycles are unable to connect perfectly due to the turn-on voltage of the transistors.

This wave form has the nonlinear distortion called crossover distortion.

To reduce the crossover distortion can be implemented by supplying the constant DC voltage at the base terminals.


The Output Stage

QN and QP provides the voltage drop which equals to the summer of turn-on voltages of QN and QP.

This circuit is call Class AB output stage.



The Biasing Circuits

Reference current is generated by Q12, Q11 and R5.

Wilder current provides biasing current in the order of μA.

Double-collector transistor is similar to the two-output current mirror. Q13B provides biasing current for intermediate stage, Q13A for output stage.

Q5, Q6 and Q7 is composed of the current source to be an active load for input stage.


The Ideal Op Amplifier

symbol for the op amp


The Ideal Op Amplifier

The op amp shown connected to dc power supplies.

NP uu

ou

o


Characteristics of the Ideal Op Amplifier

Differential input resistance is infinite. Differential voltage gain is infinite. CMRR is infinite. Bandwidth is infinite. Output resistance is zero. Offset voltage and current is zero.

a) No difference voltage between inverting and noninverting terminals.

b) No input currents.


iiNN = = iiPP = = 00

uuNN = = uuPP

1. Differential input voltage is zero1. Differential input voltage is zero

2. Input current is zero2. Input current is zero

uuoo = = AAodod （（ uuNN - - uuPP ））

Virtual short circuitVirtual short circuit

Virtual disconnect circuitVirtual disconnect circuit

AAodod++

--

uuNN

uuPP

uuoo

iiNN

iiPP

feedbackfeedback

Working at linear region Working at linear region →→

circuit with negative feedbackcircuit with negative feedback

Ideal Op Ideal Op amplifieramplifier works at linear region works at linear region


Ideal Op amplifier works at nonlinear regionIdeal Op amplifier works at nonlinear region

uuoo ≠≠ AAodod （（ uu++ - - uu-- ））

uuoo = + = + UUOPPOPP when when uu++>> uu--

uuoo = - = - UUOPPOPP when when uu++ << uu--

1. Vo have only two value1. Vo have only two value

2. 2. ii++ = = ii- - =0 =0 Virtual disconnect-circuit

Virtual short circuit doesn’t exsistVirtual short circuit doesn’t exsist

NP uu

ou

o


Equivalent Circuit of the Ideal Op Amp


The Inverting Configuration

012 A

vvv o

Virtual short circuit.

Virtual ground: that is, having zero voltage but not physically connected to ground

Virtual disconnect-circuit

0 ii



The inverting closed-loop configuration.

I

o

v

vG :gain loop-closed




Effect of finite open-loop gain

ARR

RR

v

vG

I

o

/)/1(1

/

12

12



Shunt-shunt negative feedback Closed-loop gain depends entirely on passive

components and is independent of the op amplifier.

Engineer can make the closed-loop gain as accurate as he wants as long as the passive components are accurate.

Exercises: example 2.2


Example2.2


Homework:

May 27th, 2009

2.8; 2.22


The Non-inverting Configuration

The noninverting configuration.

Series-shunt negative feedback.


The Noninverting Configuration

ARRRR

G12

12

/11

/1

Effect of finite open-loop gain


The Voltage follower

(a) The unity-gain buffer or follower amplifier.

(b) Its equivalent circuit model.


The Weighted Summer


The Weighted Summer

)()())(())((4

43

32

21

1 R

Rv

R

Rv

R

R

R

Rv

R

R

R

Rvv cc

b

ca

b

cao


34123

4122

4312

4311

4321

432

////

////

////

////

////

////IIIP u

RRRR

RRRu

RRRR

RRRu

RRRR

RRRu

)////

////

////

////

////

////)(1( 3

4123

4122

4312

4311

4321

432III

fo u

RRRR

RRRu

RRRR

RRRu

RRRR

RRR

R

Ru


Example 2.6: A Single Op-Amp Difference Amplifier

Linear amplifier.

Theorem of linear Superposition.


A Single Op-Amp Difference Amplifier

Application of superposition

Inverting configuration

11

21 Io v

R

Rv


A Single Op-Amp Difference Amplifier

Application of superposition.

Noninverting configuration.

121

2

1

2

3

4

21

234

4

1

22

,

)(1(

IIo

ooo

Io

vvR

Rv

R

R

R

Rif

vvv

vRR

R

R

Rv

）


Integrators

The inverting configuration with general impedances in the feedback and the feed-in paths.


The Inverting Integrators

The Miller or inverting integrator.

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Frequency Response of the integrator

CRV

V

CRjsCRsV

sV

i

o

i

o

1

11

90


The op-amp Differentiator


The op-amp Differentiator

Frequency response of a differentiator with a time-constant RC.

90


Practical op-amp Differentiator

disadvantages ：1 ) 输入电压的阶跃变化和外界的脉冲干扰，会使集成运放进入非线性区，出现阻塞现象。2) 反馈网络为滞后环节，它与集成运放内部的滞后环节相叠加易于满足自激振荡的条件。R1 ：限制输入电流，也就限制了 R 中的电流。 DZ1 （ 2 ）：稳压二极管限制了输出电压保证了放大管工作在线性区，防止了阻塞。 C1 ：相位补偿作用，提高电路的稳定性。


Logarithm operation


Exponential operation

I

T

u

UR E Si i I e

BE Iu u



Instrumentation Amplifier

UA ＝ UI1 ， UB ＝ UI2

)(2 21

21

221 ooII uu

RR

Ruu

))(2

1( 212

121 IIoo uu

R

Ruu

Output voltage ：

))(2

1(

)(

212

1

21

IIf

oof

o

uuR

R

R

R

uuR

Ru


三、集成仪表用放大器

INA102

6 连 7 ，增益为 12 连 6 和 7 ，增益为 103 连 6 和 7 ，增益为 1005 连 6/4 连 7 ，增益为 1000

Integrated Instrumentation Amplifier


exercises:


Homework:

June 3rd, 2009

2.36; 2.44; 2.61; 2.65

Documents

Microelectronic Circuits SJTU Yang Hua Chapter 10 Analog Integrated Circuits and its application Introduction The 741 Op-Amp Circuit The ideal Op Amp