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SAMA5D27 SOM1 SAMA5D27 MPU 1Gbit (128MB) DDR2 SDRAM 10100
Ethernet PHY 64Mbit (8MB) Flash Power Management IC1Kbit EEPROM
Introduction
The Microchip SAMA5D27 SOM1 is a small single-sided System-On-Module (SOM) based on the high-performance System-in-Package 32-bit Armreg Cortexreg-A5 processor-based MPU SAMA5D27 and 1GbDDR2 SDRAM running up to 500 MHz
The SAMA5D27 SOM1 is built on a common set of proven Microchip components to reduce time tomarket by simplifying hardware design and software development
The SOM also limits design rules of the main application board reducing overall PCB complexity andcost The SAMA5D27 SOM1 is delivered with a free Linuxreg distribution and bare metal C examples
Figure 1 SAMA5D27 SOM1
Features
bull System-In-Package (SAMA5D27C-D1G-CU) includingndash Arm Cortex-A5 processor-based SAMA5D2 MPUndash 1 Gbit DDR2 SDRAM
bull On-Board Power Management Unit (MIC2800-G1JJYML)
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 1
bull 1 Kb Serial EEPROM with EUI-48trade Node Identity (24AA02E48T-IOT)bull 64 Mb Serial Quad IO Flash Memory (SST26VF064BT-104IMF)bull 10Base-T100Base-TX Ethernet PHY (KSZ8081RNAIA)bull 40 x 38 mm Module Pitch 08 mm solderable by handbull 103 IOsbull Up to 7 Tampersbull One USB Device One USB Host and One HSIC Interfacebull Shutdown and Reset Control Pinsbull Up to 24-bit LCD Interfacebull Independent Power Supplies Available for Camera Sensor for SD Card and for Backup depending on
Voltage Domainsbull Operational Specifications
ndash Main operating voltage 33V plusmn 5ndash Temperature range -40degC to 85degCndash Integrated crystals internal voltage regulatorsndash Multiple interfaces and IOs for easy application development
Applications
bull HealthcarePatient Monitoringbull IoT Secure Gatewaysbull Human Machine Interface Control Panelbull Home and Building Automation Thermostat Industrial Gateways
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 2
Table of Contents
Introduction1
Features 1
Applications 2
1 Description5
2 Reference Documents6
3 Block Diagram 7
4 Pinout 841 Pinout Overview 842 Pin List 9
5 Functional Description 1651 SAMA5D27 System-In-Package 1652 Power Supplies 1753 System Control1854 Ethernet PHY 1955 QSPI Memory2056 EEPROM Memory21
6 Power Supply Connections and Timing Sequences2361 Power Supply Configuration 12362 Power Supply Configuration 22463 Power Supply Configuration 32664 Power Supply Configuration 427
7 Booting Guidelines 3071 Boot Process3072 Boot Configuration3073 NVM Programming3074 Boot From External Memory 31
8 Debug Considerations 33
9 Electrical Characteristics 3491 Absolute Maximum Ratings3492 Operational Characteristics3493 DC Electrical Characteristics35
10 Mechanical Characteristics37101 Module Dimensions37
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 3
102 Module Land Pattern38
11 Production Settings 40111 Bake Information 40112 Reflow Profile 40
12 Ordering Information42
13 Revision History43
The Microchip Web Site 44
Customer Change Notification Service44
Customer Support 44
Product Identification System45
Microchip Devices Code Protection Feature 45
Legal Notice45
Trademarks 46
Quality Management System Certified by DNV46
Worldwide Sales and Service48
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 4
1 DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85degC temperature range
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz It features up to
bull 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)bull 1 Kb of EEPROM memory (24AA02E48T-IOT) with EUI-48bull 64 Mb of QSPI Flash (SST26VF064BT-104IMF) memory
The SAMA5D27 SOM1 is a 176-pin 08mm pad pitch module 40 mm x 38 mm in size
The SAMA5D27 SOM1 offers an extensive peripheral set including High-speed USB Host and DeviceHSIC Interface 10Base-T100Base-TX Ethernet Interface system control and up to 103 IOs featuring
bull Up to 4 UARTsbull Up to 4 Flexcomsbull Up to 6 Capactive Touch lines for up to 9 touch buttonsbull Up to 4 ADC Inputsbull Up to 2 CANbull Up to 7 Tamper Pinsbull Serial Interfaces such as SPI TWI QSPI SSC and Isup2Sbull SDMMC eMMC SDIO Interfacesbull Up to 24-bit LCD RGB Interfacebull CMOS Camera Interfacebull Mono PDMIC and Full-Bridge Class-D Stereobull Up to 6 Capacitive Touch Lines
Tip Each IO of the SAMA5D27 SOM1 is configurable as either a general-purpose IO lineonly or as an IO line multiplexed with up to six peripheral IOs As the multiplexing is hardware-defined the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application
SAMA5D27 SOM1Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 5
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
bull 1 Kb Serial EEPROM with EUI-48trade Node Identity (24AA02E48T-IOT)bull 64 Mb Serial Quad IO Flash Memory (SST26VF064BT-104IMF)bull 10Base-T100Base-TX Ethernet PHY (KSZ8081RNAIA)bull 40 x 38 mm Module Pitch 08 mm solderable by handbull 103 IOsbull Up to 7 Tampersbull One USB Device One USB Host and One HSIC Interfacebull Shutdown and Reset Control Pinsbull Up to 24-bit LCD Interfacebull Independent Power Supplies Available for Camera Sensor for SD Card and for Backup depending on
Voltage Domainsbull Operational Specifications
ndash Main operating voltage 33V plusmn 5ndash Temperature range -40degC to 85degCndash Integrated crystals internal voltage regulatorsndash Multiple interfaces and IOs for easy application development
Applications
bull HealthcarePatient Monitoringbull IoT Secure Gatewaysbull Human Machine Interface Control Panelbull Home and Building Automation Thermostat Industrial Gateways
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 2
Table of Contents
Introduction1
Features 1
Applications 2
1 Description5
2 Reference Documents6
3 Block Diagram 7
4 Pinout 841 Pinout Overview 842 Pin List 9
5 Functional Description 1651 SAMA5D27 System-In-Package 1652 Power Supplies 1753 System Control1854 Ethernet PHY 1955 QSPI Memory2056 EEPROM Memory21
6 Power Supply Connections and Timing Sequences2361 Power Supply Configuration 12362 Power Supply Configuration 22463 Power Supply Configuration 32664 Power Supply Configuration 427
7 Booting Guidelines 3071 Boot Process3072 Boot Configuration3073 NVM Programming3074 Boot From External Memory 31
8 Debug Considerations 33
9 Electrical Characteristics 3491 Absolute Maximum Ratings3492 Operational Characteristics3493 DC Electrical Characteristics35
10 Mechanical Characteristics37101 Module Dimensions37
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 3
102 Module Land Pattern38
11 Production Settings 40111 Bake Information 40112 Reflow Profile 40
12 Ordering Information42
13 Revision History43
The Microchip Web Site 44
Customer Change Notification Service44
Customer Support 44
Product Identification System45
Microchip Devices Code Protection Feature 45
Legal Notice45
Trademarks 46
Quality Management System Certified by DNV46
Worldwide Sales and Service48
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 4
1 DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85degC temperature range
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz It features up to
bull 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)bull 1 Kb of EEPROM memory (24AA02E48T-IOT) with EUI-48bull 64 Mb of QSPI Flash (SST26VF064BT-104IMF) memory
The SAMA5D27 SOM1 is a 176-pin 08mm pad pitch module 40 mm x 38 mm in size
The SAMA5D27 SOM1 offers an extensive peripheral set including High-speed USB Host and DeviceHSIC Interface 10Base-T100Base-TX Ethernet Interface system control and up to 103 IOs featuring
bull Up to 4 UARTsbull Up to 4 Flexcomsbull Up to 6 Capactive Touch lines for up to 9 touch buttonsbull Up to 4 ADC Inputsbull Up to 2 CANbull Up to 7 Tamper Pinsbull Serial Interfaces such as SPI TWI QSPI SSC and Isup2Sbull SDMMC eMMC SDIO Interfacesbull Up to 24-bit LCD RGB Interfacebull CMOS Camera Interfacebull Mono PDMIC and Full-Bridge Class-D Stereobull Up to 6 Capacitive Touch Lines
Tip Each IO of the SAMA5D27 SOM1 is configurable as either a general-purpose IO lineonly or as an IO line multiplexed with up to six peripheral IOs As the multiplexing is hardware-defined the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application
SAMA5D27 SOM1Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 5
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Table of Contents
Introduction1
Features 1
Applications 2
1 Description5
2 Reference Documents6
3 Block Diagram 7
4 Pinout 841 Pinout Overview 842 Pin List 9
5 Functional Description 1651 SAMA5D27 System-In-Package 1652 Power Supplies 1753 System Control1854 Ethernet PHY 1955 QSPI Memory2056 EEPROM Memory21
6 Power Supply Connections and Timing Sequences2361 Power Supply Configuration 12362 Power Supply Configuration 22463 Power Supply Configuration 32664 Power Supply Configuration 427
7 Booting Guidelines 3071 Boot Process3072 Boot Configuration3073 NVM Programming3074 Boot From External Memory 31
8 Debug Considerations 33
9 Electrical Characteristics 3491 Absolute Maximum Ratings3492 Operational Characteristics3493 DC Electrical Characteristics35
10 Mechanical Characteristics37101 Module Dimensions37
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 3
102 Module Land Pattern38
11 Production Settings 40111 Bake Information 40112 Reflow Profile 40
12 Ordering Information42
13 Revision History43
The Microchip Web Site 44
Customer Change Notification Service44
Customer Support 44
Product Identification System45
Microchip Devices Code Protection Feature 45
Legal Notice45
Trademarks 46
Quality Management System Certified by DNV46
Worldwide Sales and Service48
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 4
1 DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85degC temperature range
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz It features up to
bull 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)bull 1 Kb of EEPROM memory (24AA02E48T-IOT) with EUI-48bull 64 Mb of QSPI Flash (SST26VF064BT-104IMF) memory
The SAMA5D27 SOM1 is a 176-pin 08mm pad pitch module 40 mm x 38 mm in size
The SAMA5D27 SOM1 offers an extensive peripheral set including High-speed USB Host and DeviceHSIC Interface 10Base-T100Base-TX Ethernet Interface system control and up to 103 IOs featuring
bull Up to 4 UARTsbull Up to 4 Flexcomsbull Up to 6 Capactive Touch lines for up to 9 touch buttonsbull Up to 4 ADC Inputsbull Up to 2 CANbull Up to 7 Tamper Pinsbull Serial Interfaces such as SPI TWI QSPI SSC and Isup2Sbull SDMMC eMMC SDIO Interfacesbull Up to 24-bit LCD RGB Interfacebull CMOS Camera Interfacebull Mono PDMIC and Full-Bridge Class-D Stereobull Up to 6 Capacitive Touch Lines
Tip Each IO of the SAMA5D27 SOM1 is configurable as either a general-purpose IO lineonly or as an IO line multiplexed with up to six peripheral IOs As the multiplexing is hardware-defined the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application
SAMA5D27 SOM1Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 5
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
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Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
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Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
102 Module Land Pattern38
11 Production Settings 40111 Bake Information 40112 Reflow Profile 40
12 Ordering Information42
13 Revision History43
The Microchip Web Site 44
Customer Change Notification Service44
Customer Support 44
Product Identification System45
Microchip Devices Code Protection Feature 45
Legal Notice45
Trademarks 46
Quality Management System Certified by DNV46
Worldwide Sales and Service48
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 4
1 DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85degC temperature range
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz It features up to
bull 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)bull 1 Kb of EEPROM memory (24AA02E48T-IOT) with EUI-48bull 64 Mb of QSPI Flash (SST26VF064BT-104IMF) memory
The SAMA5D27 SOM1 is a 176-pin 08mm pad pitch module 40 mm x 38 mm in size
The SAMA5D27 SOM1 offers an extensive peripheral set including High-speed USB Host and DeviceHSIC Interface 10Base-T100Base-TX Ethernet Interface system control and up to 103 IOs featuring
bull Up to 4 UARTsbull Up to 4 Flexcomsbull Up to 6 Capactive Touch lines for up to 9 touch buttonsbull Up to 4 ADC Inputsbull Up to 2 CANbull Up to 7 Tamper Pinsbull Serial Interfaces such as SPI TWI QSPI SSC and Isup2Sbull SDMMC eMMC SDIO Interfacesbull Up to 24-bit LCD RGB Interfacebull CMOS Camera Interfacebull Mono PDMIC and Full-Bridge Class-D Stereobull Up to 6 Capacitive Touch Lines
Tip Each IO of the SAMA5D27 SOM1 is configurable as either a general-purpose IO lineonly or as an IO line multiplexed with up to six peripheral IOs As the multiplexing is hardware-defined the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application
SAMA5D27 SOM1Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 5
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
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ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
1 DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85degC temperature range
The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz It features up to
bull 1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU)bull 1 Kb of EEPROM memory (24AA02E48T-IOT) with EUI-48bull 64 Mb of QSPI Flash (SST26VF064BT-104IMF) memory
The SAMA5D27 SOM1 is a 176-pin 08mm pad pitch module 40 mm x 38 mm in size
The SAMA5D27 SOM1 offers an extensive peripheral set including High-speed USB Host and DeviceHSIC Interface 10Base-T100Base-TX Ethernet Interface system control and up to 103 IOs featuring
bull Up to 4 UARTsbull Up to 4 Flexcomsbull Up to 6 Capactive Touch lines for up to 9 touch buttonsbull Up to 4 ADC Inputsbull Up to 2 CANbull Up to 7 Tamper Pinsbull Serial Interfaces such as SPI TWI QSPI SSC and Isup2Sbull SDMMC eMMC SDIO Interfacesbull Up to 24-bit LCD RGB Interfacebull CMOS Camera Interfacebull Mono PDMIC and Full-Bridge Class-D Stereobull Up to 6 Capacitive Touch Lines
Tip Each IO of the SAMA5D27 SOM1 is configurable as either a general-purpose IO lineonly or as an IO line multiplexed with up to six peripheral IOs As the multiplexing is hardware-defined the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application
SAMA5D27 SOM1Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 5
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
2 Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices The relevant documentation islisted in the table below
Type Document Title Available Ref NoProduct
Data sheet SAMA5D2 wwwmicrochipcomSAMA5D2 DS60001476
Data sheet SAMA5D2 System-In-Package(SIP)
wwwmicrochipcomSAMA5D2 SIP DS60001484
Data sheet Serial EEPROMs with EUI-48Node Identity
wwwmicrochipcom24AA02E48 24AA02E48T-IOT
Data sheet 10BASE-T100BASE-TXEthernet PHY wwwmicrochipcomksz8081 KSZ8081RNAIA
Data sheet Serial Quad IO (SQI) FlashMemory
wwwmicrochipcomsst26vf064b SST26VF064BT-104IMF
Data sheet Digital Power Management IC wwwmicrochipcommic2800 MIC2800-G1JJYML
SAMA5D27 SOM1Reference Documents
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 6
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
3 Block DiagramFigure 3-1 SAMA5D27 SOM1 Block Diagram
MPU + DDR2 1GbSAMA5D27C-D1G-CU
LFBGA289
64Mbit Serial QUAD IOFlash Memory
SST26VF064BT-104IMF
1K Serial EEPROMwith EUI-48 Node Identity
24AA02E48T-IOT
ΤΜ
10BASE-T 100BASE-TXPHY With RMII Support
KSZ8081RNAIA
Power ManagementUnit
MIC2800-G1JJYML
VDDSDHC VDDISC VDDBU
MAIN33V
TWI Interface
103 IO Available
CLA
SS
-D S
tere
o
eMM
C In
terfa
ce
QS
PI I
nter
face
Cam
era
Inte
rface
Up
to 4
A
DC
Inpu
ts
TWI I
nter
face
Up
to 4
U
AR
T
2
SP
I Int
erfa
ces
Up
to 4
F
LEXC
OM
LCD
Inte
rface
up
to 2
4-bi
t
SS
C In
terfa
ce
Mon
o P
DM
IC In
terfa
ce
Up
to 2
C
AN
Isup2S In
terfa
ce
SD
IO In
terfa
ce
SD
-CA
RD
Int
erfa
ce
ExternalQSPI
Connection
JTAG amp DBGU Interfaces DEBUG
SYSTEM
MISC
USB Dev
USB Host
HSIC
BACKUP7 PIOBU
RXDWAKEUP
RESET
SHUTDOWN
CLK_AUDIO
COMPP COMPN
Disable Boot
USB Device Connector
USB Host Connector
HSIC Device
PhysicalReceiver
TransceiverInterface
SAMA5D27 SOM1Block Diagram
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 7
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
4 Pinout
41 Pinout OverviewThe categories of pins are listed below
bull Red Power Suppliesbull Black Groundbull Blue Signalsbull Orange Reserved for future use
Figure 4-1 SAMA5D27 SOM1 Pinout Overview
PC03
LCD
PWM
TIO
A1
SPI1
_MIS
OI2
SWS0
PB01SPI0_SPCKPWML1CLASSD_R0
PB04UTXD4FIQCLASSD_R3
PC09FIQISI_D0TIOA4PC12ISI_D3URXD3TK0A1
PC16
ISI_
D7R
K0A
5
RFU
2
RFU
1
PC11
ISI_
D2T
CLK4
CA
NRX0
A0
NBS0
PC18
ISI_
D9F
LEXC
OM
3_IO
2A
7
GND_
20
PB28
LCD
DAT1
7FL
EXCO
M0_
IO0
TIO
A5
PB29
LCD
DAT1
8FL
EXCO
M0_
IO1
TIO
B5
PB30
LCD
DAT1
9FL
EXCO
M0_
IO2
TCLK
5
PB31
LCD
DAT2
0FL
EXCO
M0_
IO3
PC00
LCD
DAT2
1FL
EXCO
M0_
IO4
PC01
LCD
DAT2
2CA
NTX0
SPI
1_SP
CKI2
SCK 0
PC02
LCD
DAT2
3CA
NRX0
SPI
1_M
OSI
I2SM
CK0
PC07
LCD
PCK
TWCK
1SP
I1_N
PCS3
URX
D1
PB13
LCD
DAT2
PCK
1
PB14
LCD
DAT3
TK1
I2SM
CK1
PB15
LCD
DAT4
TF1
I2SC
K1
PB16
LCD
DAT5
TD1
I2SW
S1
PB17
LCD
DAT6
RD1
I2SD
I1
PB18
LCD
DAT7
RK1
I2SD
O1
PB19
LCD
DAT8
RF1
TIO
A3
PB20
LCD
DAT9
TK0
TIO
B3P
CK1
PB21
LCD
DAT1
0TF
0TC
LK3
FLEX
COM
3_IO
2
PB23
LCD
DAT1
2RD
0TI
OB2
FLE
XCO
M3_
IO0
PB24
LCD
DAT1
3RK
0TC
LK2
FLEX
COM
3_IO
3
PB25
LCD
DAT1
4RF
0FL
EXCO
M3_
IO4
PB26
LC D
DAT1
5UR
XD0
PB27
LCD
DAT1
6UT
XD0
PB11
LCD
DAT0
URX
D3P
DMDA
T0
PB12
LCD
DAT1
UTX
D3P
DMCL
K0
PB05
TCL
K2P
WM
H2Q
SPI1
_SCK
PB07
TIO
B2P
WM
H3Q
SPI1
_IO
0PB
09T
IOA
3PW
MFI
1Q
SPI1
_IO
2
PB10
TIO
B3P
WM
EXTR
G1Q
SPI1
_IO
3
PC08
LCD
DEN
FIQ
PCK
0UT
XD1
GN
D_2
4
GN
D_2
3
GN
D_2
2
GN
D_2
1
PC22ISI_VSYNCFLEXCOM3_IO4A11
PC14ISI_D5TD0A3
PC20ISI_D11FLEXCOM3_IO0A9
PC15ISI_D6RD0A4PC24ISI_MCKA13
SHDN
VDDIN_3V3VDDIN_3V3
VDDISC
PD22EEPROM_TWCK_PD22PD21EEPROM_TWD_PD21
PD03UTXD1FIQNWAIT
PD04TWD1NCS0
PD05TWCK1NCS1PD06PCK1NCS2
PD07NWR1NBS1
PD08NANDRDY
GND_04
GND_06
PD24UTXD2AD5PD23URXD2AD4
GND_03
RXD
ETH_RXMETH_RXP
ETH_LED0
ETH_TXMETH_TXP
GND_05
PC10ISI_D1TIOB4CANTX0
PC13ISI_D4UTXD3TF0A2PC17ISI_D8RF0A6
PC19ISI_D10FLEXCOM3_IO1A8PC21ISI_PCKFLEXCOM3_IO3A10
PD26AD7PIOBU1
GND_00
GND_01
GND_02
GND_
09
PD27
JTA
G_T
CK
PD28
JTA
G_T
DI
PD29
JTA
G_T
DO
PD30
JTA
G_T
MS
PIO
BU7
PA11
SDM
MC0
_VDD
SEL
TCLK
4A
22N
AND
CLE
PA00
SDM
MC0
_CK
QSP
IO0_
SLK
D0
PA06
SDM
MC0
_DA
T4T
IOA
5FL
EXCO
M2_
IO0
D6
PA07
SDM
MC0
_DA
T5T
IOB5
FLE
XCO
M2_
IO1
D7A
08S
DMM
C0_D
AT6
TCL
K5F
LEXC
OM
2_IO
2NW
ENA
NDW
EPA
09S
DMM
C0_D
AT7
TIO
A4
FLEX
COM
2_IO
3NC
S3
A10
SDM
MC0
_RST
NTI
OB4
FLE
XCO
M2_
IO4
A21
NA
NDA
LE
GND_
07
VDD
BU
PD19
PCK
0TW
D1
AD
0PD
20T
IOA
2TW
CK1
AD
1
PIO
BU3
CLK_
AU
DIO
nRST
PA03
SDM
MC0
_DA
T1Q
SPI0
_IO
1D3
PA02
SDM
MC0
_DA
T0Q
SPI0
_IO
0D2
PA04
SDM
MC0
_DA
T2Q
SPI0
_IO
2D4
PA05
SDM
MC0
_DA
T3Q
SPI0
_IO
3D5
PIO
BU5
PIO
BU6
PIO
BU4
WKU
P
PIO
BU2
GND_
10
GND_
08
GND_
15
RFU0
PD25AD6
PD01A24
PC26CANTX1A15PC27PCK1CANRX1A16
PC28FLEXCOM4_IO0PCK2A17PC29FLEXCOM4_IO1A18
PC30FLEXCOM4_IO2A19PB00SPI0_MOSIPWMH1
PA14SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
PA15SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
PA16SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
PA17SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
PA18SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13PA20SPI0_NPCS3TIOB0SDMMC1_DAT2D15
PA22FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
PA25FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
PA26FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
PB03URXD4IRQPWMEXTRG0CLASSD_R2PB02PWMFI0CLASSD_R1
PA21PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
PA27TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
PA23FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
PA24FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
GND_19
DIS_BOOTPB06TIOA2PWML2QSPI1_CSPB08TCLK3PWML3QSPI1_IO1
PD00FLEXCOM4_IO4UTXD3A23
PA12SDMMC0_WPIRQNRDNANDOEPA13SDMMC0_CDFLEXCOM3_IO1D8
PA28TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0PA29TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
PA30SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2PA31SPI0_MISOPWML0CLASSD_L3
GND_17
GND_16
GND_18
PA01
SDM
MC0
_CM
DQ
SPI0
_CS
D1GN
D_14
PD02URXD1A25
COM
PPCO
MPN
USB
A_M
USB
A_P
GND_
11VD
DSD
HC
USB
B_M
USB
B_P
STRO
BED
ATA
GND_
13
GND_
12
PA19SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
PC31FLEXCOM4_IO3URXD3A20
PC04
LCD
DISP
TIO
B1S
PI1_
NPCS
0I2
SDI0
PC05
LCD
VSY
NCT
CLK1
SPI
1_NP
CS1
I2SD
O0
PC06
LCD
HSYN
CTW
D1S
PI1_
NPCS
2
PB22
LCD
DAT1
1TD
0TI
OA
2FL
EXCO
M3_
IO1
PC23
ISI_
HSYN
CA
12
PC25
ISI_
FIEL
DA
14
1
5
10
15
20
25
30
35
40
42
43 45 50 55 60 65 70 75 80 85 88
8990
95
100
105
110
115
120
125
130
176
131
135
140
145
150
155
160
165
170
175
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 8
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
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Users of Microchip products can receive assistance through several channels
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Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
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ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
42 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables
Table 4-1 System-On-Module Pin Description PIOA
Pin Number PIO Power Rail Other Features Type
80 PA00 VDDSDHC SDMMC0_CKQSPIO0_SLKD0 IO
76 PA01 VDDSDHC SDMMC0_CMDQSPI0_CSD1 IO
83 PA02 VDDSDHC SDMMC0_DAT0QSPI0_IO0D2 IO
81 PA03 VDDSDHC SDMMC0_DAT1QSPI0_IO1D3 IO
84 PA04 VDDSDHC SDMMC0_DAT2QSPI0_IO2D4 IO
85 PA05 VDDSDHC SDMMC0_DAT3QSPI0_IO3D5 IO
86 PA06 VDDSDHC SDMMC0_DAT4TIOA5FLEXCOM2_IO0D6
IO
79 PA07 VDDSDHC SDMMC0_DAT5TIOB5FLEXCOM2_IO1D7
IO
78 PA08 VDDSDHC SDMMC0_DAT6TCLK5FLEXCOM2_IO2NWENANDWE
IO
77 PA09 VDDSDHC SDMMC0_DAT7TIOA4FLEXCOM2_IO3NCS3
IO
82 PA10 VDDSDHC SDMMC0_RSTNTIOB4FLEXCOM2_IO4A21NANDALE
IO
87 PA11 VDDIN_3V3 SDMMC0_VDDSELTCLK4A22NANDCLE
IO
92 PA12 VDDIN_3V3 SDMMC0_WPIRQNRDNANDOE IO
91 PA13 VDDIN_3V3 SDMMC0_CDFLEXCOM3_IO1D8 IO
111 PA14 VDDIN_3V3 SPI0_SPCKTK1QSPI0_SCKI2SMCK1FLEXCOM3_IO2D9
IO
109 PA15 VDDIN_3V3 SPI0_MOSITF1QSPI0_CSI2SCK1FLEXCOM3_IO0D10
IO
112 PA16 VDDIN_3V3 SPI0_MISOTD1QSPI0_IO0I2SWS1FLEXCOM3_IO3D11
IO
108 PA17 VDDIN_3V3 SPI0_NPCS0RD1QSPI0_IO1I2SDI1FLEXCOM3_IO4D12
IO
105 PA18 VDDIN_3V3 SPI0_NPCS1RK1QSPI0_IO2I2SDO1SDMMC1_DAT0D13
IO
101 PA19 VDDIN_3V3 SPI0_NPCS2RF1QSPI0_IO3TIOA0SDMMC1_DAT1D14
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 9
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Power Rail Other Features Type
104 PA20 VDDIN_3V3 SPI0_NPCS3TIOB0SDMMC1_DAT2D15
IO
103 PA21 VDDIN_3V3 PCK2IRQTCLK0SDMMC1_DAT3NANDRDY
IO
106 PA22 VDDIN_3V3 FLEXCOM1_IO2SPI1_SPCKSDMMC1_CKQSPI0_SCK
IO
102 PA23 VDDIN_3V3 FLEXCOM1_IO1SPI1_MOSIQSPI0_CS
IO
99 PA24 VDDIN_3V3 FLEXCOM1_IO0SPI1_MISOQSPI0_IO0
IO
97 PA25 VDDIN_3V3 FLEXCOM1_IO3SPI1_NPCS0QSPI0_IO1
IO
100 PA26 VDDIN_3V3 FLEXCOM1_IO4SPI1_NPCS1QSPI0_IO2
IO
90 PA27 VDDIN_3V3 TIOA1SPI0_NPCS2SPI1_NPCS2SDMMC1_RSTNQSPI0_IO3
IO
95 PA28 VDDIN_3V3 TIOB1SPI0_NPCS3SPI1_NPCS3SDMMC1_CMDCLASSD_L0
IO
96 PA29 VDDIN_3V3 TCLK1SPI0_NPCS1SDMMC1_WPCLASSD_L1
IO
94 PA30 VDDIN_3V3 SPI0_NPCS0PWMH0SDMMC1_CDCLASSD_L2
IO
93 PA31 VDDIN_3V3 SPI0_MISOPWML0CLASSD_L3 IO
Table 4-2 System-On-Module Pin Description PIOB
Pin Number PIO Power Rail Other Features Type
119 PB00 VDDIN_3V3 SPI0_MOSIPWMH1 IO
122 PB01 VDDIN_3V3 SPI0_SPCKPWML1CLASSD_R0 IO
124 PB02 VDDIN_3V3 PWMFI0CLASSD_R1 IO
123 PB03 VDDIN_3V3 URXD4IRQPWMEXTRG0CLASSD_R2
IO
125 PB04 VDDIN_3V3 UTXD4FIQCLASSD_R3 IO
134 PB05 VDDIN_3V3 TCLK2PWMH2QSPI1_SCK IO
127 PB06 VDDIN_3V3 TIOA2PWML2QSPI1_CS IO
133 PB07 VDDIN_3V3 TIOB2PWMH3QSPI1_IO0 IO
128 PB08 VDDIN_3V3 TCLK3PWML3QSPI1_IO1 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 10
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Power Rail Other Features Type
132 PB09 VDDIN_3V3 TIOA3PWMFI1QSPI1_IO2 IO
135 PB10 VDDIN_3V3 TIOB3PWMEXTRG1QSPI1_IO3 IO
148 PB11 VDDIN_3V3 LCDDAT0URXD3PDMDAT0 IO
151 PB12 VDDIN_3V3 LCDDAT1UTXD3PDMCLK0 IO
155 PB13 VDDIN_3V3 LCDDAT2PCK1 IO
150 PB14 VDDIN_3V3 LCDDAT3TK1I2SMCK1 IO
162 PB15 VDDIN_3V3 LCDDAT4TF1I2SCK1 IO
154 PB16 VDDIN_3V3 LCDDAT5TD1I2SWS1 IO
157 PB17 VDDIN_3V3 LCDDAT6RD1I2SDI1 IO
152 PB18 VDDIN_3V3 LCDDAT7RK1I2SDO1 IO
158 PB19 VDDIN_3V3 LCDDAT8RF1TIOA3 IO
156 PB20 VDDIN_3V3 LCDDAT9TK0TIOB3PCK1 IO
164 PB21 VDDIN_3V3 LCDDAT10TF0TCLK3FLEXCOM3_IO2
IO
161 PB22 VDDIN_3V3 LCDDAT11TD0TIOA2FLEXCOM3_IO1
IO
160 PB23 VDDIN_3V3 LCDDAT12RD0TIOB2FLEXCOM3_IO0
IO
168 PB24 VDDIN_3V3 LCDDAT13RK0TCLK2FLEXCOM3_IO3
IO
159 PB25 VDDIN_3V3 LCDDAT14RF0FLEXCOM3_IO4 IO
169 PB26 VDDIN_3V3 LCDDAT15URXD0 IO
163 PB27 VDDIN_3V3 LCDDAT16UTXD0 IO
167 PB28 VDDIN_3V3 LCDDAT17FLEXCOM0_IO0TIOA5 IO
144 PB29 VDDIN_3V3 LCDDAT18FLEXCOM0_IO1TIOB5 IO
165 PB30 VDDIN_3V3 LCDDAT19FLEXCOM0_IO2TCLK5 IO
143 PB31 VDDIN_3V3 LCDDAT20FLEXCOM0_IO3 IO
Table 4-3 System On Module Pin Table PIOC
Pin Number PIO Power Rail Other Features Type
145 PC00 VDDIN_3V3 LCDDAT21FLEXCOM0_IO4 IO
141 PC01 VDDIN_3V3 LCDDAT22CANTX0SPI1_SPCKI2SCK0
IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 11
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Power Rail Other Features Type
146 PC02 VDDIN_3V3 LCDDAT23CANRX0SPI1_MOSII2SMCK0
IO
142 PC03 VDDIN_3V3 LCDPWMTIOA1SPI1_MISOI2SWS0
IO
136 PC04 VDDIN_3V3 LCDDISPTIOB1SPI1_NPCS0I2SDI0
IO
137 PC05 VDDIN_3V3 LCDVSYNCTCLK1SPI1_NPCS1I2SDO0
IO
140 PC06 VDDIN_3V3 LCDHSYNCTWD1SPI1_NPCS2 IO
139 PC07 VDDIN_3V3 LCDPCKTWCK1SPI1_NPCS3URXD1
IO
138 PC08 VDDIN_3V3 LCDDENFIQPCK0UTXD1 IO
2 PC09 VDDISC FIQISI_D0TIOA4 IO
9 PC10 VDDISC ISI_D1TIOB4CANTX0 IO
175 PC11 VDDISC ISI_D2TCLK4CANRX0A0NBS0 IO
3 PC12 VDDISC ISI_D3URXD3TK0A1 IO
4 PC13 VDDISC ISI_D4UTXD3TF0A2 IO
8 PC14 VDDISC ISI_D5TD0A3 IO
12 PC15 VDDISC ISI_D6RD0A4 IO
174 PC16 VDDISC ISI_D7RK0A5 IO
5 PC17 VDDISC ISI_D8RF0A6 IO
172 PC18 VDDISC ISI_D9FLEXCOM3_IO2A7 IO
6 PC19 VDDISC ISI_D10FLEXCOM3_IO1A8 IO
14 PC20 VDDISC ISI_D11FLEXCOM3_IO0A9 IO
7 PC21 VDDISC ISI_PCKFLEXCOM3_IO3A10 IO
11 PC22 VDDISC ISI_VSYNCFLEXCOM3_IO4A11 IO
170 PC23 VDDISC ISI_HSYNCA12 IO
13 PC24 VDDISC ISI_MCKA13 IO
173 PC25 VDDISC ISI_FIELDA14 IO
115 PC26 VDDIN_3V3 CANTX1A15 IO
114 PC27 VDDIN_3V3 PCK1CANRX1A16 IO
117 PC28 VDDIN_3V3 FLEXCOM4_IO0PCK2A17 IO
118 PC29 VDDIN_3V3 FLEXCOM4_IO1A18 IO
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 12
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Power Rail Other Features Type
120 PC30 VDDIN_3V3 FLEXCOM4_IO2A19 IO
116 PC31 VDDIN_3V3 FLEXCOM4_IO3URXD3A20 IO
Table 4-4 System-On-Module Pin Description PIOD
Pin Number PIO Power Rail Other Features Type
121 PD00 VDDIN_3V3 FLEXCOM4_IO4UTXD3A23 IO
113 PD01 VDDIN_3V3 A24 IO
23 PD02 VDDIN_3V3 URXD1A25 IO
24 PD03 VDDIN_3V3 UTXD1FIQNWAIT IO
27 PD04 VDDIN_3V3 TWD1NCS0 IO
21 PD05 VDDIN_3V3 TWCK1NCS1 IO
22 PD06 VDDIN_3V3 PCK1NCS2 IO
25 PD07 VDDIN_3V3 NWR1NBS1 IO
28 PD08 VDDIN_3V3 NANDRDY IO
58 PD19 VDDIN_3V3 PCK0TWD1AD0 IO
57 PD20 VDDIN_3V3 TIOA2TWCK1AD1 IO
19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 IO
20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 IO
30 PD23 VDDIN_3V3 URXD2AD4 IO
29 PD24 VDDIN_3V3 UTXD2AD5 IO
110 PD25 VDDIN_3V3 AD6 IO
34 PD26 VDDIN_3V3 AD7 IO
53 PD27 VDDIN_3V3 JTAG_TCK IO
51 PD28 VDDIN_3V3 JTAG_TDI IO
52 PD29 VDDIN_3V3 JTAG_TDO IO
54 PD30 VDDIN_3V3 JTAG_TMS IO
Table 4-5 System-On-Module Pin Description System
Pin Number PIO Power Rail Designation Type
61 CLK_AUDIO VDDIN_3V3 Audio clock Output
64 COMPN VDDBU External analog comparator input Input
63 COMPP VDDBU External analog comparator input Input
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 13
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
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ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Power Rail Designation Type
126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input
67 USBA_M VDDIN_3V3 USB Device High-speed Data - ndash
68 USBA_P VDDIN_3V3 USB Device High-speed Data + ndash
70 USBB_M VDDIN_3V3 USB Host Port B High-speed Data - ndash
71 USBB_P VDDIN_3V3 USB Host Port B High-speed Data + ndash
74 DATA VDDHSIC USB High-speed Inter-Chip Data ndash
73 STROBE VDDHSIC USB High-speed Inter-Chip Strobe ndash
60 NRST VDDIN_3V3 Microprocessor reset Input ActiveLow
33 PIOBU1 VDDBU Tamper or Wake-up input Input
44 PIOBU2 VDDBU Tamper or Wake-up input Input
48 PIOBU3 VDDBU Tamper or Wake-up input Input
47 PIOBU4 VDDBU Tamper or Wake-up input Input
46 PIOBU5 VDDBU Tamper or Wake-up input Input
59 PIOBU6 VDDBU Tamper or Wake-up input Input
45 PIOBU7 VDDBU Tamper or Wake-up input Input
32 RXD VDDBU Low-Power Asynchronous Receiver Input
35 SHDN VDDBU Shutdown Control Output
49 WKUP VDDBU Wake-up Input
36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output
37 ETH_RXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
38 ETH_RXP plusmn 25V Physical receive or transmit signal (+differential) IO
40 ETH_TXM plusmn 25V Physical receive or transmit signal (ndashdifferential) IO
41 ETH_TXP plusmn 25V Physical receive or transmit signal (+differential) IO
Table 4-6 System-On-Module Pin Description Power
Pin Number PIO Description Comments
1617 VDDIN_3V3 Main 33V Supply inputs Used forPeripheral IO lines and MIC2800-G1JJYML supplies
ndash
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 14
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPin Number PIO Description Comments
55 VDDBU Input supply for Slow ClockOscillator internal 32 kHz RCOscillator and a part of theSystem Controller
ndash
65 VDDSDHC SDMMC IO lines supply input ndash
15 VDDISC Image Sensor IO lines supplyinput
ndash
1 10 18 2631 39 42 4350 56 62 6669 72 75 8889 98 107
130 131 149166 171 176
GND Ground connections Must be connected together
129 RFU0 Reserved for future use Must be left floating
147 RFU1 Reserved for future use Must be left floating
153 RFU2 Reserved for future use Must be left floating
SAMA5D27 SOM1Pinout
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 15
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
5 Functional Description
51 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package
By combining the high-performance ultra-low power SAMA5D2 with DDR2-SDRAM in a single packagePCB routing complexity area and number of layers is reduced This makes board design easier andlowers the overall cost of bill of materials Board design is more robust by facilitating design for EMI ESDand signal integrity
For more information about the SIP see Reference Documents This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory
The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package
Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics
Figure 5-1 SAMA5D27C-D1G-CU Supplies Distribution Schematic
VDDIN_3V3
VDDUTMII
VDDOSC
VDDAUDIOPLL
VDDIOP0
VDDIOP1
VDDIOP2
GNDUTMII
10microF
47micro
F
22R
100n
F
100n
F
100n
F
22R
BLM03AX100SZ11 2
47micro
F
100n
F10
0nF
MLZ1608N100L1 2
BLM03AX100SZ1
1 2
100n
F
100n
F
0R
100n
F
MLZ1608N100L1 2
BLM03AX100SZ11 2
BLM03AX100SZ11 2
BLM03AX100SZ1
1 20R
100n
F
VDDANA
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 16
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 5-2 SAMA5D27C-D1G-CU Supplies Decoupling Schematic
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(3V3)
(1V8)
(1V25)
(2V5)
VDDIOP2
VDDIOP1
VDDIOP0
VDDOSC
VDDUTMII
VDDAUDIOPLL
VDDBU
VDDFUSE
VDDSDHC
VDDISC
VDDCORE
GNDUTMII
47micro
F
100n
F
100n
F
47micro
F
MLZ1608N100L1 2
100n
F
100n
F
100n
F
100n
F
SAMA5D27C-D1G-CU
U2G
GNDANA_2J6GNDANA_1M1
GNDBUU4
GNDCORE_1E12
GNDCORE_2F12
GNDCORE_3J11
GNDCORE_4K6
GNDCORE_5K7
GNDCORE_6K11
GNDIODDR_1E10
GNDIODDR_2F8
GNDIODDR_3G10
GNDIODDR_4H12
GNDIODDR_5J9
GNDIODDR_6K10
GNDIODDR_7M14
GNDDPLLT3
GNDAUDIOPLLT4
GNDIOP0_1E3
GNDIOP0_2F2
GNDIOP1_1M12
GNDIOP1_2P11
GNDOSCP5
GNDPLLAT5
GNDUTMIIM6
GNDUTMICR6
VDDANA_2K4 VDDANA_1J5
VDDBUU5
VDDCORE_1D7
VDDCORE_2E9
VDDCORE_3H2
VDDCORE_4L12
VDDCORE_5P7
VDDIODDR_1E8
VDDIODDR_2E11
VDDIODDR_3G12
VDDIODDR_4H10
VDDIODDR_5J8
VDDIODDR_6L10
VDDIODDR_7L14
VDDAUDIOPLLM4
VDDFUSEN13
VDDIOP0_1D4
VDDIOP0_2F3
VDDIOP1_1N12
VDDIOP1_2P12
VDDOSCN6
VDDPLLAR5
VDDSDMMCN8
VDDUTMIIP6
VDDUTMICM7
GNDIOP2_1D6
VDDCORE_6U3
VDDIOP2_1D9
VDDHSICR7
VDDISCH3
GNDISCH5
GNDSDMMCR8
22R
100n
F
VDDPLLA
VDDUTMIC
VDDHSIC
VDDANA
100n
F
100n
F
VDDIODDR
100n
F
100n
F
100n
F
100n
F
100n
F
1nF
1nF
100n
F
100n
F
1nF
1nF
10microF
1nF
1nF
1nF
VDDIODDR
VDDCORE
1nF
1nF
1nF
100n
F
1nF
100n
F
100n
F
100n
F
10microF
100n
F
1nF
1nF
100n
F
VDDCORE
VDDCOREBLM03AX100SZ11 2
VDDCOREBLM03AX100SZ1
1 2 (1V25)
(1V25)
(1V25)
Figure 5-3 SAMA5D27C-D1G-CU System Schematic
R amp Cas close as possibleVDDANA
COMPNCOMPP
LOWQPIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7
GNDUTMII
SHDN
WKUP
nRST
USBA_MUSBA_P
USBB_MUSBB_P
STROBEDATA
CLK_AUDIO
RXD
NX2012SA_32-768KHz
1 2
8pF50V
NX2016SA_24MHz
11 2
GN
D1
334
GN
D2
12pF50V 10pF
25V
SAMA5D27C-D1G-CU
ADVREFPL9
CLK_AUDIOT8
COMPNU7COMPPU6
HHSDMAT10
HHSDMBT11
HHSDPAU10
HHSDPBU11
JTAGSELR3 NRSTT7
PIOBU0P3
PIOBU1M3
PIOBU2P2
PIOBU3P4
PIOBU4N4
PIOBU5M5
SHDNT2 TSTR4
VBGT6
WKUPR2
XINU9
XIN32U2
XOUTU8
XOUT32U1
PIOBU6N5
PIOBU7N3
HHSDPDATCT12
HHSDMSTRCU12
RXDN2
100R
8pF50V
100R
100R 100R12pF50V
10K
562
K
100R
Y1
Y2
52 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 33V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML Power Management Unit
The MIC2800 is a high-performance power management IC providing three output voltages withmaximum efficiency and is optimized to respect the MPU power-up and power-down cycles
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 17
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Integrating a 2 MHz DCDC converter with an LDO post regulator the MIC2800 gives two high-efficiencyoutputs with a second 300mA LDO for maximum flexibility The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90 at load currents up to 600mA
The three outputs supply the following internal nodesbull DCDC set 18V supplies SAMA5D27C-D1G-CU DDR2 pads and devicebull LDO1 set 125V supplies SAMA5D27C-D1G-CU Corebull LDO2 set 25V supplies SAMA5D27C-D1G-CU VDDFUSE pad
The MIC2800 is a μCap design operating with very small ceramic output capacitors and inductors forstability
It is available in fixed output voltages in the 16-pin 3mm x 3mm MLFreg lead-less package For moreinformation refer to the product web page
Figure 5-4 Power Management Unit Schematic
VDDBU
VDDIN_3V3
VDDFUSE
VDDIODDR
VDDIODDRVDDCORELOWQ
nRST
47uF
10uF
22uF
100nF 10nF
22uH1 2
100nF
100K
10uF
10uF
MIC2800-G1JJYML
POR12
SW5
FB9
CBIAS2
LOWQ1
VIN16
VIN27 LDO2
8
PG
ND
4
SG
ND
3EN2
16
EN115
CBYP14
CSET13
LDO10
LDO111
TPA
D17
VDDIN_3V3
56K
100nF
53 System ControlThe SAMA5D27 SOM1 provides global system Reset (nRST) and Shutdown (SHDN) pins to theapplication board
bull The nRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below
bull The SHDN pin is an output pin and is managed by the software application It switches the Main33V Supply ON or OFF
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 18
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 5-5 Internal System Control Schematic
SHDN
Q1
DMN26D0UDJ-7D1
6
S11
2 G1
5G2
4S2
3D2
VDDIN_3V3
10K
nRST
VDDBU
100K
From SAMA5D27
54 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable
The KSZ8081RNAIA is a highly-integrated PHY solution The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors
The KSZ8081RNAIA is available in 24-pin lead-free QFN packages For more information refer to the product web page
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 19
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 5-6 Ethernet PHY Schematic
VDDIN_3V3
VDDIN_3V3
VDD
IN_3
V3
VDDIN_3V3
ETH_TXPETH_TXM
ETH_RXPETH_RXM
GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31
nRST
ETH_LED0
100nF
22uF
0R
BLM18PG181SN1D
1 2
100nF
22pF50V
100nF 10K
1KU6
KSZ8081RNAIA
TXM5 TXP6
RXP4
RXM3
VDD_1V21
GND22
PADDLE25
REXT9
XI8
XO7
REF_CLK16
TXD121
TXD020
TXEN19
RXD112
RXD013
RXER17
CRS_DVPHYAD[1_0]15
MDC11
MDIO10
INTRP18
VDDA_3V32
VDDIO14
LED0ANEN_SPEED23
RST24
10uF
NX2
016S
A_25
MH
z
11
2
GND1 33
4
GND210K
649K
22pF50V
10uF
1K
ETH_XO
ETH_XI
Y3
55 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104IMF a 64Mb Serial Quad IO Flash memory
The SST26VF064BT-104IMF SQI features a six-wire 4-bit IO interface that allows for low-power high-performance operation in a low pin-count package
The SST26VF064BT-104IMF is available in 8-lead WDFN package with 6mm times 5mm dimensions
For more information refer to the product web page
Figure 5-7 QSPI Memory Schematic
VDDIN_3V3
VDDIN_3V3 VDDIN_3V3
VDDIN_3V3
PB07TIOB2PWMH3QSPI1_IO0
PB08TCLK3PWML3QSPI1_IO1
PB09TIOA3PWMFI1QSPI1_IO2
PB10TIOB3PWMEXTRG1QSPI1_IO3
PB05TCLK2PWMH2QSPI1_SCK
QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07
PB06TIOA2PWML2QSPI1_CS
DIS_BOOT
QSPI_CS_PB06
22R
22R
10KDNP
10KDNP
22R
NL17SZ126DFT2G
OE1
IN2
GND3
OUT4
VCC5
22R
22R
10KDNP
22R
10KDNP
10K
22R
100nF
22R
10KDNP
22R
10KDNP
SST26VF064BT-104IMF
CE1SOSIO1
2
WPSIO23 VSS
4SISIO05
SCK6 HOLDSIO37
VDD8
TPAD9
22R
100nF
22R
10K
22R
QSPI_CS
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 20
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Tip In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1 it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below To do so the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground
Table 5-1 Other GPIO Possibilities for QSPI Interface in Case of Non-use
Pin Number Power RailPrimary PIO Peripheral
Reset StateSignal Dir Func Signal Dir IOset
134 VDDIN_3V3 PB05 IO A TCLK2 I 1 PIO I PUST
C PWMH2 O 1
D QSPI1_SCK O 2
127 VDDIN_3V3 PB06 IO A TIOA2 IO 1 PIO I PUST
C PWML2 O 1
D QSPI1_CS O 2
133 VDDIN_3V3 PB07 IO A TIOB2 IO 1 PIO I PUST
C PWMH3 O 1
D QSPI1_IO0 IO 2
128 VDDIN_3V3 PB08 IO A TCLK3 I 1 PIO I PUST
C PWML3 O 1
D QSPI1_IO1 IO 2
132 VDDIN_3V3 PB09 IO A TIOA3 IO 1 PIO I PUST
C PWMFI1 I 1
D QSPI1_IO2 IO 2
135 VDDIN_3V3 PB10 IO A TIOB3 IO 1 PIO I PUST
C PWMEXTRG1 I 1
D QSPI1_IO3 IO 2
Tip The QSPI interface can be shared with another external device To do so the QSPI_CSnode must stay at High level That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground
56 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-IOT a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 21
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
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Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
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Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface The secondblock is reserved for MAC Address storage
The 24AA02E48T-IOT also has a page write capability for up to 8 bytes of data
The 24AA02E48T-IOT is available in the standard 5-lead SOT-23 package For more information seethe product web page
Figure 5-8 EEPROM Memory Schematic
VDDIN_3V3
VDDIN_3V3
PD22EEPROM_TWCK_PD22
PD21EEPROM_TWD_PD21
EEPROM_TWCK_PD22
EEPROM_TWD_PD2122R
24AA02E48T-IOT
VCC4
SCL1
SDA3
VSS2
NC5 22K
100nF
22R
22R
22K
22R
Tip The 2-Wire serial interface can be externally shared with another device 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused
Important If the 2-Wire serial interface is used externally the device connected must have adifferent Isup2C address than the embedded EEPROM For more details refer to the device datasheet
SAMA5D27 SOM1Functional Description
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 22
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
6 Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs
Four power domains must be supplied and can be connected differently The four different powerconnections are described below
bull Power Configuration 1 All supplies are connected to the Main 33V Supplybull Power Configuration 2 Backup domain is connected to a coin-cell and the rest to the Main 33V
Supplybull Power Configuration 3 Backup domain is connected to a coin-cell Camera sensor is connected
to a separate power supply and the rest to the Main 33V Supplybull Power Configuration 4 All supply domains are connected to separate power supplies
For each power configuration the power-on and power-off timing sequences to respect are describedbelow
61 Power Supply Configuration 1The SAMA5D27 SOM1 is supplied by only one main supply
In this configuration mode all supplies are connected together and supplied by the main 33V supply AllPIOs have VDDIN_3V3 Power Rail as voltage reference
Figure 6-1 Power Configuration 1
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
Figure 6-2 Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDIN_3V3 LEVEL
nRST
Tmain
Tstart
Tpor
a
c
d
e
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 23
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
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All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 6-3 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDIN_3V3 LEVEL
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-1 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than 800micros VDDBU must be applied at the same time asVDDIN_3V3 or just before It is forbidden to apply VDDBU after VDDIN_3V3
62 Power Supply Configuration 2The SAMA5D27 SOM1 is supplied by different power supplies
bull Backup domain is connected to a coin-cell supplybull The rest of the power inputs are connected to the main 33V supply
In this configuration the following PIOs have VDDBU Power Rail as reference All other PIO haveVDDIN_3V3 Power Rail as reference
bull COMPP and COMPNbull PIOBU1 to PIOBU7bull RXD SHDN and WKUP
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 24
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 6-4 Power Configuration 2
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration the two following timing sequences are applied
Figure 6-5 Power-On Sequence Timing Diagram
SYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Tstart
Tpor
b
c
d
e
a
f
Figure 6-6 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC VDDIN_3V3 LEVEL
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Tstop
c
d
a
b
Table 6-2 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time ndash ndash 1 ms
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time ndash ndash 1 ms
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 25
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedSymbol Description Min Typ Max Unit
tstop Internal Delay before switching-off System Core Supplies 1 ndash 3 ms
Note 1 The three supplies VDDIN_3V3 VDDISC and VDDSDHC must be applied at the same time If a
delay is implemented it must be lower than tstart
63 Power Supply Configuration 3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies
bull Backup domain is connected to a coin cellbull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the
following voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull The remaining power inputs are connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-7 Power Configuration 3
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1
In this configuration mode the two following timing sequences are applied
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 26
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 6-8 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton1
Tstart
Tpor
b
a
d
c
e
f
Figure 6-9 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDIN_3V3 LEVEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Tstop
c
d
e
a
b
Table 6-3 Timing Values
Symbol Description Min Typ Max Unit
tmain(1) Main 33V Start-up Time (From regulator available on the
motherboard)ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (From regulatoravailable on the motherboard)
ndash ndash 800 micros
tstart Internal Delay before starting System Core Supplies 1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsoft Software Shutdown Time Depending on system off time ms
tmain_off Main 33V Power-off Time (From regulator available onthe motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System Core Supplies 1 ndash 3 ms
Note 1 The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time If a delay is
implemented it must be lower than tstart
64 Power Supply Configuration 4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies
bull Backup domain is connected to a coin cell
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 27
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
bull Camera sensor power input (VDDISC) is connected to a separate power supply set at one of thefollowing voltage levels (18V25V28V30V or 33V) depending on the camera sensor technologyused in the application
bull SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (18V or 33V) depending on the SD Card TechnologySpeed used in theapplication
bull VDDIN_3V3 power input is connected to the main 33V supply
In this configuration the following PIOs havebull VDDBU Power Rail as reference
ndash COMPP and COMPNndash PIOBU1 to PIOBU7ndash RXD SHDN and WKUP
bull VDDISC Power Rail as referencendash PC09 to PC25
bull VDDSDHC Power Rail as referencendash PA00 to PA10
bull All other PIOs have VDDIN_3V3 Power Rail as reference
Figure 6-10 Power Configuration 4
SHDN
nRST
VDDSDHC
VDDISC
VDDBU
VDDIN_3V3
nRST
SHDN
33V
SAM
A5D
27-S
OM
1SDMMC0_VDDSEL
In this configuration mode the two following timing sequences are applied
Figure 6-11 Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC DYNAMIC VDDSDHC LEVEL (33V) DYNAMIC VDDSDHC LEVEL (18V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES GENERATION
SHDN VDDBU LEVEL SOFTWARE RELEASE
nRST
Tmain
Ton2
Ton1
Tstart
Tpor Tsys
b
d
c
g
e
a
f
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 28
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
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SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 6-12 Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP
VDDIN_3V3 MAIN 33V IS PRESENT
VDDBU VDDBU ALWAYS PRESENT
VDDISC EXTERNAL VDDISC LEVEL (18V25V28V30V33V)
VDDSDHC VDDSDHC LEVEL (18V) VDDSDHC LEVEL (33V)
SDMMC0_VDDSEL
INT_VDD INTERNAL SUPPLIES SWITCH-OFF
SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE
SHDN SOFTWARE REQUEST
nRST
Tsoft
Tmain_off
Toff1
Toff2
Tstop
c
d
e
f
a
b
Table 6-4 Timing Values
Symbol Description Min Typ Max Unit
tmain Main 33V Start-up Time (From regulatoravailable on the mother board)
ndash ndash 1 ms
ton1 VDDISC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
ton2 VDDSDHC Regulator Start-up Time (Fromregulator available on the mother board)
ndash ndash 800 micros
tstart Internal Delay before starting System CoreSupplies
1 ndash 3 ms
tpor Power-on Reset Delay ndash 10 11 ms
tsys Low-speed to High-speed Card Timing(1) Depending on systemon time
ms
tsoft Software Shutdown Time Depending on systemoff time
ms
tmain_off Main 33V Power-off Time (From regulatoravailable on the motherboard)
ndash ndash 1 ms
toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)
ndash ndash 1 ms
tstop Internal Delay before switching off System CoreSupplies
1 ndash 3 ms
Note 1 Timing depends on the system boot time No particular recommendations to apply
SAMA5D27 SOM1Power Supply Connections and Timing
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 29
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
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All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
7 Booting GuidelinesThis section provides an overview of how to program a Non-Volatile Memory (NVM) and boot from it
The SAMA5D27 SOM1 embeds a Quad IO Flash Memory as a source for boot Another type of NVMmay be located on the motherboard This section explains how to program select and boot from an NVM
71 Boot ProcessThe system always boots from the ROM memory at address 0x0 The ROM code is a boot programcontained in the embedded ROM It is also called ldquoFirst level bootloaderrdquo The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode More information on how the SecureBoot mode can be enabled and how the chip operates in this mode is provided in the documentSAMA5D2x Secure Boot Strategy To obtain this application note and additional information about thesecure boot and related tools contact a Microchip sales representative
By default the chip starts in Standard Boot Mode
The ROM code standard sequence is executed as followsbull Basic chip initialization crystal or external clock frequency detectionbull Attempt to retrieve a valid code from external non-volatile memories (NVM)bull Execution of a monitor called SAM-BAreg Monitor in case no valid application has been found on
any NVM (1)
Note 1 This may be the case during the first start-up or after an NVM erase or when a boot disable
jumper is used on the memory Chip Select in order to force an update
72 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area or in the backupregisters BUREG
For details refer to the section ldquoBoot Configurationrdquo of the SAMA5D2 Data Sheet document noDS60001476
73 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BAreg In-System Programmer a comprehensive tool toprogram boot memories
In case the boot code does not find a valid program in NVM the SAM-BA monitor is launched in order toprogram the considered NVM
The SAM-BA monitor principle is tobull Initialize DBGU and USBbull Check if USB Device enumeration occurredbull Check if characters are received on the DBGU
Once the communication interface is identified the application runs in an infinite loop waiting for differentcommands
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 30
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
The firmware can be sent and programmed in the NVM
For more information refer to the following link httpwwwat91comlinux4sambinviewLinux4SAMSama5d2XplainedMainPageUsing_SAM_BA_to_flash_components
74 Boot From External MemorySeveral types of external memories such as NAND Flash SDCard SPI Flash QSPI Flash etc can beconnected to the SAMA5D27 SOM1 and placed on the motherboard
For details of the Boot sequence refer to the NVM Bootloader Program Description for MRL C Partsdiagram of the SAMA5D2 data sheet document no DS60001476
The table below provides the list of external memory types and interfaces that may be used to boot theSAMA5D27 SOM1
Table 7-1 External Memory Connections
Memory Type Interface PIO Comments
SDCard
SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
SD-MMC1 PA18 to PA22 PA27to PA30
If external SDMMC1 Interface is not used bitSDMMC_1 in Boot Configuration Word mustbe set to 1
eMMC SD-MMC0 PA0 to PA10 PA13If external SDMMC0 Interface is not used bitSDMMC_0 in Boot Configuration Word mustbe set to 1
NAND Flash NFC PA0 to PA21 PC11 toPC31 PD0 to PD8
Field NFC in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
QSPI Flash
QSPI0
PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to 00 IOSET1 is selected (SeeNotes below)
PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to 01 IOSET2 is selected (SeeNotes below)
PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to 10 IOSET3 is selected (SeeNotes below)
QSPI1 PB5 to PB10
Need to tie DIS-BOOT pin to GND BitsQSPI_1 in Boot Configuration Word must beset to 01 IOSET2 is selected (See Notesbelow)
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 31
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
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India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedMemory Type Interface PIO Comments
SPI Flash
SPI0
PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
PA30 PA31 PB0PB1
Bits SPI_0 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
SPI1
PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to 01 IOSET2 is selected (SeeNotes below)
PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to 00 IOSET1 is selected (SeeNotes below)
Note For these external memory configurations set the EXT_MEM_BOOT_ENABLE bit to 1 in BootConfiguration Word
Note The Boot Configuration Word allows several customizations of the boot sequence For detailsrefer to the section Boot Configuration in the SAMA5D2 Data Sheet document no DS60001476
SAMA5D27 SOM1Booting Guidelines
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 32
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
8 Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM at the sametime the ROM memory and fuses are hidden If no valid boot is found on an external NVM the ROM code
bull enables the USB connection and one UART serial portbull starts the standard SAM-BA monitorbull locks access to the ROM memorybull re-enables the JTAG connection
The SAMA5D27 SOM1 has multiple debug and JTAG settings For more information refer to theSAMA5D2 Data Sheet document no DS60001476 ldquoSECUMOD JTAG Protection Control RegisterrdquoCustomer Fuse Matrix and Special Function Bits
The JTAG IO set can be configured For correct operations the IO set to be used is JTAG_IOSET_3ie the field JTAG_IO_SET in the Boot Configuration Word must be written with value 2(1)
Note Due to IO conflict on line PA22 JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media See the SAMA5D2 Data Sheet document no DS60001476 ldquoBootConfiguration Wordrdquo
SAMA5D27 SOM1Debug Considerations
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 33
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
9 Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 moduleAbsolute maximum ratings for the SAMA5D27 SOM1 module are listed below Exposure to thesemaximum rating conditions for extended periods may affect device reliability Functional operation of themodule at these or any other conditions above the parameters indicated in the operation listings of thisspecification is not implied
91 Absolute Maximum RatingsTable 9-1 Absolute Maximum Ratings
Parameter Conditions Min Max
Storage Temperature ndash -60degC +150degC
Maximum Operating Temperature ndash -40degC +85degC
Voltage on Inputs Pins With respect to ground -03V +40V
Maximum Voltage
On VDDIN_3V3 Pads ndash +40V
On VDDBU Pad ndash +40V
On VDDSDHC Pad ndash +40V
On VDDISC Pad ndash +40V
Important Stresses beyond those listed under ldquoAbsolute Maximum Ratingsrdquo may causepermanent damage to the device This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability
92 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-2 Table 7 Power Supplies Operating Conditions
Pad Parameters Conditions Min Typ Max
VDDIN_3V3DC Supply ndash 30V 33V 36V
Maximum InputCurrent ndash ndash ndash 450mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 34
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPad Parameters Conditions Min Typ Max
VDDBUDC Supply Must be established first or at
the same time as VDDIN_3V3 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 01 mA
VDDSDHCDC Supply SDHC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
VDDISCDC Supply ISC IOs Lines 165V 33V 36V
Maximum InputCurrent ndash ndash ndash 30mA
93 DC Electrical Characteristics
931 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-3 DC Electrical Characteristicsfor GPIO Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage All GPIO 33V -03V ndash 04V
VIHHigh-level InputVoltage All GPIO 33V 23V ndash 36V
VOLLow-level OutputVoltage IO Max ndash ndash 041V
VOHHigh-level OutputVoltage IO Max 29V ndash --
IILLow-level InputCurrent All GPIO 33V -1microA ndash 1microA
IIHHigh-level InputCurrent All GPIO 33V -1microA ndash 1microA
IOLLow-level OutputCurrent
All GPIO 33V Low -2mA ndash --
All GPIO 33V High -32mA ndash --
IOHHigh-level OutputCurrent
All GPIO 33V Low ndash ndash 2mA
All GPIO 33V High ndash ndash 32mA
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 35
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
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Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continuedPad Parameters Conditions Min Typ Max
RPULLUP Pull-up ResistorsAll GPIO 33V and PDxx inAD mode 280kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 66kΩ 130kΩ
RPULLDOWNPull-downResistors
All GPIO 33V and PDxx inAD mode 280 kΩ 380kΩ 480kΩ
All IOs in GPIO mode 33V 40kΩ 77kΩ 160kΩ
Note This table applies to all the following pads PA0ndashPA31 PB0ndashPB31 PC0ndashPC31 PD0ndashPD8 PD19-PD30
932 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40degC to +85degCunless otherwise specified
Table 9-4 Table 7 DC Electrical Characteristics for System Inputs
Pad Parameters Conditions Min Typ Max
VILLow-level InputVoltage DIS_BOOT ndash ndash 10V
VIHHigh-level InputVoltage DIS_BOOT 23V ndash ndash
SAMA5D27 SOM1Electrical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 36
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
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Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
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The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
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Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
10 Mechanical Characteristics
101 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with specific mechanical characteristics listedbelow
Figure 10-1 System-On-Module Dimensions
123456789101112131415161718192021222324252627282930313233343536373839404142
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
176
175
174
173
172
171
170
127126125124123122121120119118117116115114113112111110109108107106105104103102101100
9998979695949392919089
130129128
(TP1) (TP2)
(TP7)
(TP9)
(TP10)
(TP5)
(TP6)
(TP4)
(TP3)
(TP8)
177178
179
180
181
184183
185
186
182
PIN 1 CORNERE1
D1 D2
E2S
A1
TOP
VIEW
P1b
aaa
P2f ff f x n
E
D
e
B
BOTT
OM
VIE
W
P2Eb
P2Ea jjjjjj x m
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
Units mm
P1t
aaa
P2f fn x
47 48 8259 70
4
31
4191
173
89
252627
51 54
170
155
Table 10-1 System-On-Module Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Body SizeX E -- 40000 40100 ndash
Y D -- 38000 38100 ndash
Pad Pitch e -- 0800 -- ndash
PCB Thickness S 1150 1200 1250 ndash
Total Thickness A1 -- 2750 2800 ndash
PCB Angle Hole Diameter(1) B ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 37
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
continued
SymbolCommon Dimensions
CommentsMin Typ Max
Pad Length(1)Bottom Side P1b ndash 1500 ndash ndash
Top Side P1t ndash 0800 ndash ndash
Pad Width(1) P2 ndash 0600 ndash Solder Maskdefined 0550
Pad Space(1) aaa ndash 0200 ndash ndash
Opening Drilling Diameterφff
ndash0400
ndash 0400 typicminusmetallization
Pad Count n ndash 176 ndash ndash
Edge Center toCenter
X E1 37550 37630 37700 ndash
Y D1 34400 34480 34550 ndash
X E2 35550 35630 35700 ndash
Y D2 32400 32480 32550 ndash
Pad Axis to Edge(1)X P2Ea ndash 2000 ndash ndash
Y P2Eb ndash 2600 ndash ndash
Note 1 Tolerances are defined upon
ndash IPC A600 - Class2ndash IPC 2615
WARNING Test points placed on the bottom side are used for factory test only It is not possible to connectexternal devices on these test points
102 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 38
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Figure 10-2 System-On-Module Land Pattern
Pads Body Pads Pitch
17640 x 38 x 280
08A11SAMA5D27-SOM1_POD
02052017
SAMA5D27-SOM1 DIMENSIONS Drawn by R C R
LAND PATTERN RECOMMENDATIONS
PIN 1 CORNER
S1
S2
Wk
L
Units mm
WARNING Do not place vias copper or signals in the S1-S2 area on the top PCB layer of the motherboardCopper and low-speed signals may be used on inner and opposite layers
Table 10-2 System-On-Module Land Pattern Dimensions
SymbolCommon Dimensions
CommentsMin Typ Max
Land Pattern Pad Width W ndash 0600 ndashSolder MaskDefined0550
Land Pattern Pad Length L ndash 2000 ndash ndash
Land Pattern Pad X Space S1 ndash 37000 ndash ndash
Land Pattern Pad Y Space S2 ndash 35000 ndash ndash
Land Pattern Pad Space k ndash 0200 ndash ndash
SAMA5D27 SOM1Mechanical Characteristics
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 39
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
11 Production Settings
111 Bake InformationThe SAMA5D27-SOM1 module is rated MSL 3 indicating that storage and assembly processes must becompliant with IPCJEDEC J-STD-033C
The SAMA5D27-SOM1 module has a total thickness of 2750 mm (PCB and SMD mounted) and iscomparable to a die package Thus baking instructions must comply with Table 4-1 of J-STD-033-C as apackage body comprised between 20mm and 45mm
Refer to the highlighted information in the table below
Table 4-1 Reference Conditions for Drying Mounted or Unmounted SMDPackages (User Bake Floor life begins counting at time = 0 after bake)
Package Body Level
Bake 125 degC +10-0 degCBake 90 degC +8-0 degC
le5 RHBake 40 degC +5-0 degC
le5 RH
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
ExceedingFloor Lifeby gt72 h
ExceedingFloor Lifeby le72 h
Thicknessle14 mm
2 5 hours 3 hours 17 hours 11 hours 8 days 5 days
2a 7 hours 5 hours 23 hours 13 hours 9 days 7 days
3 9 hours 7 hours 33 hours 23 hours 13 days 9 days
4 11 hours 7 hours 37 hours 23 hours 15 days 9 days
5 12 hours 7 hours 41 hours 24 hours 17 days 10 days
5a 16 hours 10 hours 54 hours 24 hours 22 days 10 days
Thicknessgt14 mmle20 mm
2 18 hours 15 hours 63 hours 2 days 25days 20 days
2a 21 hours 16 hours 3 days 2 days 29 days 22 days
3 27 hours 17 hours 4 days 2 days 37 days 23 days
4 34 hours 20 hours 5 days 3 days 47 days 28 days
5 40 hours 25 hours 6 days 4 days 57 days 35 days
5a 48 hours 40 hours 8 days 6 days 79 days 56 days
Thicknessgt20 mmle45 mm
2 48 hours 48 hours 10 days 7 days 79 days 67 days
2a 48 hours 48 hours 10 days 7 days 79 days 67 days
3 48 hours 48 hours 10 days 8 days 79 days 67 days
4 48 hours 48 hours 10 days 10 days 79 days 67 days
5 48 hours 48 hours 10 days 10 days 79 days 67 days
5a 48 hours 48 hours 10 days 10 days 79 days 67 days
BGA packagegt17 mm x 17 mmor any stackeddie package
2-5a 96 hours(See Note 2)
As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Not applicable As aboveper packagethickness andmoisture level
Note 1 Table 4-1 is based on worst-case molded lead frame SMD packages Users may reduce the actual bake time if technically justified (eg absorptiondesorption data etc) In most cases it is applicable to other nonhermetic surface mount SMD packages If parts have been exposed to gt60 RH itmay be necessary to increase the bake time by tracking desorption data to ensure parts are dry
Note 2 For BGA packages gt17 mm x 17 mm that do not have internal planes that block the moisture diusion path in the substrate may use bake timesbased on the thicknessmoisture level portion of the table
Note 3 If baking of packages gt45 mm thick is required see appendix B
IPCJEDEC J-STD-033C February 2012
112 Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPCJEDEC J-STD-020EWe recommend a maximum of two soldering processes
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 40
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard and lead-free solderreflow profile To avoid damage to the module follow the JEDEC recommendations as well as thoselisted below
bull Do not exceed the peak temperature (Tp) of 245ordmCbull Refer to the solder paste data sheet for specific reflow profile recommendationsbull Use no-clean flux solder pastebull Use only one flow If the PCB requires multiple flows mount the module at the time of the final flow
Figure 11-1 Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 Board
IPC-020e-5-1
Tc -5degC
t
Max Ramp Up Rate = 3degCsMax Ramp Down Rate = 6degCs
Preheat AreaTsmax
Tsmin
ts
Tp
TL
Te
mp
era
ture
Time
25Time 25degC to Peak
Supplier Tp gt Tc-
Supplier tp
Tc
User Tp lt Tc-
User tp
Tc -5degC
tp
L
Profile Feature J-STD-020E Profile
Temperature Min Tsmin 150degC
Temperature Max Tsmax 200degC
Temperature Rise ts (from Tsmin to Tsmax) 60 to 120 seconds
Ramp-up Rate TL to Tp 3degCsecmax
Liquidous Temperature Time maintained above 217degC TL 60 to 150 seconds
Peak Temperature Tp 245degC
Time (tp) within 5degC of the specified classification temperature (Tc) 30 seconds
Ramp-down rate Tp to TL 6degCsecond max
Time 25degC to peak temperature 8 minutes max
SAMA5D27 SOM1Production Settings
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 41
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
12 Ordering InformationTable 12-1 Ordering Information
Ordering Code Version Package Carrier Type OperatingTemperature Range
ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40degC to +85degC
SAMA5D27 SOM1Ordering Information
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 42
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
13 Revision HistoryTable 13-1 SAMA5D27 SOM1 Data Sheet Rev DS60001521C Oct-2018
Changes
Deleted all references to PTC in Features Block Diagram Pinout Overview and Pin ListEditorial corrections throughout
Table 13-2 SAMA5D27 SOM1 Data Sheet Rev DS60001521B Feb-2018
Changes
Features added PTC support and LCD interface
Applications updated list
1 Description added PTC support
2 Reference Documents corrected datasheet cross-reference
Pinout Overview updated figure with correct color key
SAMA5D27C-D1G-CU Supplies Decoupling Schematic updated all occurrences of 1V2 to 1V25
51 SAMA5D27 System-In-Package removed table SAMA5D27C-D1G-CU External Crystal
52 Power Supplies LDO1 output changed to 125V
54 Ethernet PHY removed table KSZ8081RNAIA External Crystal
QSPI Memory Schematic updated QSPI memory reference
56 EEPROM Memory updated Important Note
102 Module Land Pattern added Warning
Added 11 Production Settings
Updated 112 Reflow Profile
Updated 12 Ordering Information
Table 13-3 SAMA5D27 SOM1 Data Sheet Rev DS60001521A Oct-2017
Changes
First issue
SAMA5D27 SOM1Revision History
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 43
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
The Microchip Web Site
Microchip provides online support via our web site at httpwwwmicrochipcom This web site is used asa means to make files and information easily available to customers Accessible by using your favoriteInternet browser the web site contains the following information
bull Product Support ndash Data sheets and errata application notes and sample programs designresources userrsquos guides and hardware support documents latest software releases and archivedsoftware
bull General Technical Support ndash Frequently Asked Questions (FAQ) technical support requestsonline discussion groups Microchip consultant program member listing
bull Business of Microchip ndash Product selector and ordering guides latest Microchip press releaseslisting of seminars and events listings of Microchip sales offices distributors and factoryrepresentatives
Customer Change Notification Service
Microchiprsquos customer notification service helps keep customers current on Microchip productsSubscribers will receive e-mail notification whenever there are changes updates revisions or erratarelated to a specified product family or development tool of interest
To register access the Microchip web site at httpwwwmicrochipcom Under ldquoSupportrdquo click onldquoCustomer Change Notificationrdquo and follow the registration instructions
Customer Support
Users of Microchip products can receive assistance through several channels
bull Distributor or Representativebull Local Sales Officebull Field Application Engineer (FAE)bull Technical Support
Customers should contact their distributor representative or Field Application Engineer (FAE) for supportLocal sales offices are also available to help customers A listing of sales offices and locations is includedin the back of this document
Technical support is available through the web site at httpwwwmicrochipcomsupport
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 44
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Product Identification System
To order or obtain information eg on pricing or delivery refer to the factory or the listed sales office
Architecture
Product Group
ATSAMA5 D27 - SOM1
System on Module
Version
Architecture SAMA5
Product Group D27
System on Module SOM
Version 1
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices
bull Microchip products meet the specification contained in their particular Microchip Data Sheetbull Microchip believes that its family of products is one of the most secure families of its kind on the
market today when used in the intended manner and under normal conditionsbull There are dishonest and possibly illegal methods used to breach the code protection feature All of
these methods to our knowledge require using the Microchip products in a manner outside theoperating specifications contained in Microchiprsquos Data Sheets Most likely the person doing so isengaged in theft of intellectual property
bull Microchip is willing to work with the customer who is concerned about the integrity of their codebull Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code Code protection does not mean that we are guaranteeing the product as ldquounbreakablerdquo
Code protection is constantly evolving We at Microchip are committed to continuously improving thecode protection features of our products Attempts to break Microchiprsquos code protection feature may be aviolation of the Digital Millennium Copyright Act If such acts allow unauthorized access to your softwareor other copyrighted work you may have a right to sue for relief under that Act
Legal Notice
Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates It is your responsibility to ensure that yourapplication meets with your specifications MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED WRITTEN OR ORAL STATUTORYOR OTHERWISE RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ITSCONDITION QUALITY PERFORMANCE MERCHANTABILITY OR FITNESS FOR PURPOSE
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 45
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
Microchip disclaims all liability arising from this information and its use Use of Microchip devices in lifesupport andor safety applications is entirely at the buyerrsquos risk and the buyer agrees to defendindemnify and hold harmless Microchip from any and all damages claims suits or expenses resultingfrom such use No licenses are conveyed implicitly or otherwise under any Microchip intellectualproperty rights unless otherwise stated
Trademarks
The Microchip name and logo the Microchip logo AnyRate AVR AVR logo AVR Freaks BeaconThingsBitCloud CryptoMemory CryptoRF dsPIC FlashFlex flexPWR Heldo JukeBlox KeeLoq KeeLoq logoKleer LANCheck LINK MD maXStylus maXTouch MediaLB megaAVR MOST MOST logo MPLABOptoLyzer PIC picoPower PICSTART PIC32 logo Prochip Designer QTouch RightTouch SAM-BASpyNIC SST SST Logo SuperFlash tinyAVR UNIO and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the USA and other countries
ClockWorks The Embedded Control Solutions Company EtherSynch Hyper Speed Control HyperLightLoad IntelliMOS mTouch Precision Edge and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the USA
Adjacent Key Suppression AKS Analog-for-the-Digital Age Any Capacitor AnyIn AnyOut BodyComchipKIT chipKIT logo CodeGuard CryptoAuthentication CryptoCompanion CryptoControllerdsPICDEM dsPICDEMnet Dynamic Average Matching DAM ECAN EtherGREEN In-Circuit SerialProgramming ICSP Inter-Chip Connectivity JitterBlocker KleerNet KleerNet logo Mindi MiWimotorBench MPASM MPF MPLAB Certified logo MPLIB MPLINK MultiTRAK NetDetach OmniscientCode Generation PICDEM PICDEMnet PICkit PICtail PureSilicon QMatrix RightTouch logo REALICE Ripple Blocker SAM-ICE Serial Quad IO SMART-IS SQI SuperSwitcher SuperSwitcher II TotalEndurance TSHARC USBCheck VariSense ViewSpan WiperLock Wireless DNA and ZENA aretrademarks of Microchip Technology Incorporated in the USA and other countries
SQTP is a service mark of Microchip Technology Incorporated in the USA
Silicon Storage Technology is a registered trademark of Microchip Technology Inc in other countries
GestIC is a registered trademark of Microchip Technology Germany II GmbH amp Co KG a subsidiary ofMicrochip Technology Inc in other countries
All other trademarks mentioned herein are property of their respective companiescopy 2018 Microchip Technology Incorporated Printed in the USA All Rights Reserved
ISBN 978-1-5224-3688-1
AMBA Arm Arm7 Arm7TDMI Arm9 Arm11 Artisan bigLITTLE Cordio CoreLink CoreSight CortexDesignStart DynamIQ Jazelle Keil Mali Mbed Mbed Enabled NEON POP RealView SecurCoreSocrates Thumb TrustZone ULINK ULINK2 ULINK-ME ULINK-PLUS ULINKpro microVision Versatileare trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US andor elsewhere
Quality Management System Certified by DNV
ISOTS 16949Microchip received ISOTS-169492009 certification for its worldwide headquarters design and waferfabrication facilities in Chandler and Tempe Arizona Gresham Oregon and design centers in Californiaand India The Companyrsquos quality system processes and procedures are for its PICreg MCUs and dsPICreg
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 46
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
DSCs KEELOQreg code hopping devices Serial EEPROMs microperipherals nonvolatile memory andanalog products In addition Microchiprsquos quality system for the design and manufacture of developmentsystems is ISO 90012000 certified
SAMA5D27 SOM1
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 47
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
AMERICAS ASIAPACIFIC ASIAPACIFIC EUROPECorporate Office2355 West Chandler BlvdChandler AZ 85224-6199Tel 480-792-7200Fax 480-792-7277Technical SupporthttpwwwmicrochipcomsupportWeb AddresswwwmicrochipcomAtlantaDuluth GATel 678-957-9614Fax 678-957-1455Austin TXTel 512-257-3370BostonWestborough MATel 774-760-0087Fax 774-760-0088ChicagoItasca ILTel 630-285-0071Fax 630-285-0075DallasAddison TXTel 972-818-7423Fax 972-818-2924DetroitNovi MITel 248-848-4000Houston TXTel 281-894-5983IndianapolisNoblesville INTel 317-773-8323Fax 317-773-5453Tel 317-536-2380Los AngelesMission Viejo CATel 949-462-9523Fax 949-462-9608Tel 951-273-7800Raleigh NCTel 919-844-7510New York NYTel 631-435-6000San Jose CATel 408-735-9110Tel 408-436-4270Canada - TorontoTel 905-695-1980Fax 905-695-2078
Australia - SydneyTel 61-2-9868-6733China - BeijingTel 86-10-8569-7000China - ChengduTel 86-28-8665-5511China - ChongqingTel 86-23-8980-9588China - DongguanTel 86-769-8702-9880China - GuangzhouTel 86-20-8755-8029China - HangzhouTel 86-571-8792-8115China - Hong Kong SARTel 852-2943-5100China - NanjingTel 86-25-8473-2460China - QingdaoTel 86-532-8502-7355China - ShanghaiTel 86-21-3326-8000China - ShenyangTel 86-24-2334-2829China - ShenzhenTel 86-755-8864-2200China - SuzhouTel 86-186-6233-1526China - WuhanTel 86-27-5980-5300China - XianTel 86-29-8833-7252China - XiamenTel 86-592-2388138China - ZhuhaiTel 86-756-3210040
India - BangaloreTel 91-80-3090-4444India - New DelhiTel 91-11-4160-8631India - PuneTel 91-20-4121-0141Japan - OsakaTel 81-6-6152-7160Japan - TokyoTel 81-3-6880- 3770Korea - DaeguTel 82-53-744-4301Korea - SeoulTel 82-2-554-7200Malaysia - Kuala LumpurTel 60-3-7651-7906Malaysia - PenangTel 60-4-227-8870Philippines - ManilaTel 63-2-634-9065SingaporeTel 65-6334-8870Taiwan - Hsin ChuTel 886-3-577-8366Taiwan - KaohsiungTel 886-7-213-7830Taiwan - TaipeiTel 886-2-2508-8600Thailand - BangkokTel 66-2-694-1351Vietnam - Ho Chi MinhTel 84-28-5448-2100
Austria - WelsTel 43-7242-2244-39Fax 43-7242-2244-393Denmark - CopenhagenTel 45-4450-2828Fax 45-4485-2829Finland - EspooTel 358-9-4520-820France - ParisTel 33-1-69-53-63-20Fax 33-1-69-30-90-79Germany - GarchingTel 49-8931-9700Germany - HaanTel 49-2129-3766400Germany - HeilbronnTel 49-7131-67-3636Germany - KarlsruheTel 49-721-625370Germany - MunichTel 49-89-627-144-0Fax 49-89-627-144-44Germany - RosenheimTel 49-8031-354-560Israel - RarsquoananaTel 972-9-744-7705Italy - MilanTel 39-0331-742611Fax 39-0331-466781Italy - PadovaTel 39-049-7625286Netherlands - DrunenTel 31-416-690399Fax 31-416-690340Norway - TrondheimTel 47-7289-7561Poland - WarsawTel 48-22-3325737Romania - BucharestTel 40-21-407-87-50Spain - MadridTel 34-91-708-08-90Fax 34-91-708-08-91Sweden - GothenbergTel 46-31-704-60-40Sweden - StockholmTel 46-8-5090-4654UK - WokinghamTel 44-118-921-5800Fax 44-118-921-5820
Worldwide Sales and Service
copy 2018 Microchip Technology Inc Datasheet DS60001521C-page 48
