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MDE based FPGA physical Design Fast prototyping with Smalltalk. Ciprian Teodorov, Loïc Lagadec [email protected] Lab-STICC MOCS UMR 3192. FPGAs. “Flexible” hardware Time to market. Hard to program Hard to debug. Compute node. i1. µP. LUT. I1-i2. E/S. LUT. LUT. i2. LUT. - PowerPoint PPT Presentation
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MDE based FPGA physical DesignFast prototyping with Smalltalk
Ciprian Teodorov, Loïc Lagadec
Lab-STICC MOCS UMR 3192
FPGAs
Compute node
Programmable interconnection
I1+i2i1
i2
LUT LUT
LUT
LUTLUTLUT
LUT
i1
i2I1-i2
LUT
LUT E/S
µP
“Flexible” hardwareTime to market
Hard to programHard to debug
FPGAs
“Flexible” hardwareTime to market
Hard to programHard to debug
EDA required !
•C to circuit
•Debug
•Benchmarking
Our Smalltalk-based EDA legacy
Legacy backfires
Early developments (MADEO) started in 1996
Fast evolving domain (Moore + Murfy)
Refactoring is not enough to keep in the race
We have to re-design our framework
New direction
We need to shift from a generic solution to be tailored on demand
Toa repository of model, algorithms, components
In order to deliver PerformancesScalabilityFlexibilityDurability
LEGACY
Front end
High level synthesis (compilation)
Ressources allocation (logic synthesis)
C code
Circuit
Programming an FPGA in 4 steps
TestbenchesHW
Prototype
Compilation Simulation Validation
Exploration
Application Compiler TestbenchesHW
PrototypeSynthesizer
Synthesis/Compilation Simulation Validation
P&R Bitstreamgenerator
ConfigurationController
10
Spécification ArchitectureSpécification Architecture
ArchitecturespecificationArchitecturespecification
ADLDescription
ADLDescription
ADL Based EDA generators
Zone
Resources
ADLDescription
ADLDescription
Bitstreammodel
Bitstreammodel
Resourcemodel
Resourcemodel
BistreamBistream ArchitectureVHDL
ArchitectureVHDL
Configurationcontroller
Configurationcontroller
Simulation & synthesisSimulation & synthesis
Configurationmodel
Configurationmodel
Reconfigurable zones
description
Reconfigurable zones
description
Prototype
ZoneZone
Context
11
Behavioralcode
Our flow
12
Some examples
RE-DESIGN
Goal oriented view extraction
Tool engine
Models as common vocabulary
Combinational circuit modeling
Target modeling
Re-design / copy down
CONCLUSION
Let’s try to summarize
Succes: target, tool flow
Conclusion
Future work: Tools integration (eg Mondrian integration)Performances improvementTest coverageAlgorithm pick and play GUI
Thank you for your attention
