MCC SMPS Library User's Guide - ww1.microchip.comww1.microchip.com/downloads/en/DeviceDoc/MCC-Switch-Mode-Power-Supply... · Mode Power Supply (SMPS) Library before starting or during

MPLAB® Code Configurator Switch Mode Power Supply

Library User's Guide

Preface

Important: Notice to customers:All documentation becomes dated, and this manual is no exception. Microchip tools anddocumentation are constantly evolving to meet customer needs, so some actual dialogs and/ortool descriptions may differ from those in this document. Please refer to our website(www.microchip.com) to obtain the latest documentation available.

Documents are identified with a “DS” number. This number is located on the bottom of eachpage, in front of the page number. The numbering convention for the DS number is“DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of thedocument.

For the most up-to-date information on development tools, see the MPLAB® IntegratedDevelopment Environment (IDE) online help. Select the Help menu, and then Topics to open alist of available online help files.

OverviewThis document describes how to install, configure and use the MPLAB Code Configurator (MCC) SwitchMode Power Supply (SMPS) Library before starting or during the development process of an embeddedsoftware application designed with hybrid PIC® microcontrollers (MCUs).

Recommended ReadingThis user's guide refers to the MCC SMPS Library only. Other useful documents are listed below. Thefollowing Microchip documents are available and recommended as supplemental reference resources:

• MPLAB Code Configurator User's Guide• MPLAB X IDE User’s Guide

© 2019 Microchip Technology Inc. User Guide DS50002835B-page 1

Table of Contents

Preface............................................................................................................................ 1

1. Introduction................................................................................................................3

2. Installation................................................................................................................. 42.1. Installing the MCC SMPS Library from the Microchip Website.................................................... 42.2. Updating the MCC SMPS Library.................................................................................................52.3. Loading Different MCC SMPS Library Versions...........................................................................52.4. Older MCC SMPS Library Versions............................................................................................. 6

3. User Interface............................................................................................................ 73.1. Information Tab.............................................................................................................................73.2. Configuration Tab......................................................................................................................... 73.3. Schematic Tab..............................................................................................................................83.4. Pin Manager Section....................................................................................................................8

4. MCC SMPS Library Modules.....................................................................................94.1. CIP Blocks..................................................................................................................................104.2. Control Modes............................................................................................................................144.3. Power Supply Topologies...........................................................................................................16

5. Sample Application..................................................................................................195.1. Synchronous Buck PCMC..........................................................................................................195.2. SEPIC with LED Dimming..........................................................................................................27

6. Appendix..................................................................................................................34

7. Revision History.......................................................................................................35

The Microchip Website..................................................................................................36

Product Change Notification Service.............................................................................36

Customer Support......................................................................................................... 36

Microchip Devices Code Protection Feature................................................................. 36

Legal Notice...................................................................................................................37

Trademarks................................................................................................................... 37

Quality Management System........................................................................................ 38

Worldwide Sales and Service........................................................................................39


1. IntroductionThe MCC SMPS Library allows quick and easy configuration, and code generation for 8-bit PIC MCUSMPS applications. This library contains a set of modules for generic fundamental SMPS building blocksand topologies. These support PIC device families designed for CIP Hybrid Power Controllers. The MCCSMPS Library is an add-on library that needs to be installed on top of the MCC plug-in tool and theMPLAB X IDE. Instructions on how to install the library are in the 2. Installation section. The 3. UserInterface and 4. MCC SMPS Library Modules sections discuss the library interface and currentlyavailable modules. The 5. Sample Application section provides a sample application of the library andhow to configure the project using the library's modules.

The MCC SMPS Library is currently available for the PIC16(L)F176X and the PIC16(L)F177X devicefamilies.

Additional support for other devices will be available in a future release of a new version of the library.

Introduction


2. InstallationThe MCC SMPS Library can be installed via the Microchip website. The following chapters describethese procedures and the library update process.

2.1 Installing the MCC SMPS Library from the Microchip WebsiteThe library can be downloaded from the Microchip website by typing the address www.microchip.com/mcc in a web browser, selecting the Current Download tab and downloading thecurrent version of the .zip file. The library can also be found on www.microchip.com/CIP-power. See Figure 2-1.

Figure 2-1. Downloading the MCC SMPS Library from the Microchip Website

Once downloaded, extract the archive that contains the library to a preferred location (see Figure 2-2). Toinstall the library, complete the following instructions:

1. Open MPLAB X IDE.2. Go to Tools → Options → Plug-ins.3. Select MPLAB Code Configurator 3.x tab from Plug-ins option.4. Click on Install Library/Open Library Folder.5. Navigate to the folder where the downloaded .zip file has been extracted and select the

SMPSPowerLibrary_vX.X.X.jar file.6. Restart MPLAB X IDE (optional).

Installation


http://www.microchip.com/mcchttps://www.microchip.com/design-centers/8-bit/development-tools/pic-hardware/cip-hybrid-power-development-board

Figure 2-2. Installing the MCC SMPS Library from the Downloaded File

2.2 Updating the MCC SMPS LibraryWhen a new version of the library is available, the download link on the Current Download tab will bereplaced with the latest version. To update the library, download the new archive corresponding to theversion of the software and follow the same steps as in 2.1 Installing the MCC SMPS Library from theMicrochip Website. Once installed, the new version will be added to the Versions tab of the library inMCC.

2.3 Loading Different MCC SMPS Library VersionsIf more than one version of the library is currently installed, switching between versions is possiblethrough the following steps:

1. Open MPLAB Code Configurator v3 from the Tools → Embedded menu.2. Expand the Versions tab under Software/SMPS Power Library (the loaded version is indicated by

the green mark in Figure 2-3).3. Right click on the desired version of the library and select Mark for load.4. Click on Load Selected Libraries button to load the library.

Installation


Figure 2-3. Library Version Marked as Loaded

2.4 Older MCC SMPS Library VersionsOlder versions of the library will be available at the same www.microchip.com/mcc address, under theArchive Download tab.

Installation


http://www.microchip.com/mcc

3. User InterfaceThe MCC SMPS Library user interface has four main areas listed below and shown in Figure 3-1.

Figure 3-1. MCC SMPS Library Module User Interface

1. Information tab – This tab contains general information about the building block/topology module.2. Configuration tab – This tab is the main area that displays the configurable parameters and

settings of the building block/topology.3. Schematic tab – This tab shows the visual representation of the building block/topology module.4. Pin Manager section – Each building block/topology has its corresponding section in the Pin

Manager.

3.1 Information TabThis tab displays the functional description of the building block/topology driven by the module. It containsa brief overview of the parameters and may also contain links to relevant webpages or documentation.

3.2 Configuration TabThis tab is divided in two sections, as shown in Figure 3-2.

User Interface


Figure 3-2. MCC SMPS Library Module Configuration Tab Sections

1. Hardware Settings – This section contains the various configurable parameters.2. Submodule Selection – This section contains the Upload All button and a list of selectable

submodules/peripherals.

Each parameter is connected to a specific peripheral setting and directly updates those settings withoutgoing into the peripheral module. The Upload All button of the Submodule Selection loads allsubmodules and peripherals used by the building block/topology. Also, the listed submodule/peripheralhas its own Upload button for selective loading.

3.3 Schematic TabThe schematic image displayed in this tab shows the connectivity between the loaded peripherals orsubmodules. This tab shows the available I/O pin functions found in 3.4 Pin Manager Section. The 4. MCC SMPS Library Modules section shows the schematic image for each available MCC SMPS Librarymodule.

3.4 Pin Manager SectionThe pins contained in every MCC SMPS Library module section are connected to specific peripheral I/Opin functions. Some pins are only visible once the peripheral connected to the pins’ function is loaded.

MCC SMPS Library pins are managed by following the hierarchy shown in Figure 4-2. Pins from theupper levels of the hierarchy directly configure the pins from the lower level modules that it controls.However, changing a pin in the lower level modules cannot control its corresponding pin on the upperlevel module.

User Interface


4. MCC SMPS Library ModulesThe MCC SMPS Library modules fall under three categories, as shown in Figure 4-1.

Figure 4-1. List of MCC SMPS Library Modules

These modules operate in a hierarchical manner illustrated in Figure 4-2.

Figure 4-2. Operational Hierarchy of MCC SMPS Library Modules

Application

SyncBuck

VMCPCMC

Modulator Block(PCMC)

CompensatorBlock

Modulator Block(VMC)Fault Block

CMP

DAC

FVR

PRG

COG

PWM

TMR

CMP

DAC

FVR

OPA

DAC

FVR

PRG

COG

PWM

TMR

CMP

FVR

Control Modes

CIP Blocks

Topology

PeripheralDrivers

SEPIC_LED

Pulse ModulatorBlock

PRG

COG

DSM

10-bit PWM

16-bit PWM

TMR

CMP

FVR

MCC SMPS Library Modules


Each level of the hierarchy represents one of the categories:

1. CIP Blocks: These modules are the fundamental building blocks of an SMPS application, andcontrol a set of Core Independent Peripherals (CIPs).

2. Control Modes: These modules control a set of CIP blocks and function as an independent PWMcontroller.

3. Power Supply Topologies: These modules configure Control Mode modules for specifictopologies.

Modules from the upper level of the hierarchy can load the lower level modules (submodules) theyconfigure. When a module is removed, the submodules are removed with it. However, when a submoduleis removed, the users must manually load it again directly from the Device Resources. Configurationflexibility increases when using modules in the lower levels of the hierarchy.

The modules’ configurable parameters and pins are set in a unidirectional behavior. When a parameter ischanged in the higher level module GUI (i.e., PCMC > Duty Cycle), the same value is passed on to asimilar parameter in the lower level module GUI (i.e., Modulator Block > Duty Cycle). However, changingthe parameter in the lower level module does not update the similar parameter in the higher level module.This unidirectional behavior avoids circular dependencies between each module.

Multiple instances of these modules are available for multiple PWM driver applications. Each instanceconsists of default peripheral combinations determined by a PWM Controller Block (refer to Appendix).

If different peripherals are required in place of the default peripherals, users can still change theperipherals set in the CIP Block modules. However, this change in peripherals will not update the list ofpins in the Control Mode and Topology modules. The updated pins must be assigned in the CIP Blockmodules.

4.1 CIP BlocksThe CIP blocks act as fundamental building blocks of an SMPS application. The configurable parametersdirectly control CIP settings where users only need to have basic knowledge of the CIPs. This eases thedevelopment of an SMPS application by not requiring the users to load and configure each CIPindividually. The users can still tailor the CIPs for custom configurations. The drivers generated by thesemodules contain basic peripheral operations needed by the block.

4.1.1 Compensator BlockThis block configures the error amplifier of the feedback loop, including its programmable referencesource and pinout options to connect an external RC compensation network. The Compensator Blockconsists of the following CIPs, as shown in Figure 4-3:

1. Operational Amplifier (OPA)2. Digital-to-Analog Converter (DAC)3. Fixed Voltage Reference (FVR)

The voltage reference for the error amplifier is supplied by a variable voltage reference configuredthrough the DAC. The DAC reference is derived from the FVR or the VDD of 5V. The error amplifieroperation can be overridden to keep it from saturation during dimming off-time.



Figure 4-3. Compensator Block Schematic

DACOPA

+

_

FVR

EA_OUT FB

to PWMComparator orSlopeCompensation

Output Feedback Signal(select pin)

Set Reference Voltage

Error Amplifier Outputconnected to theCompensation Network(select pin)

5V

to PWM override

4.1.2 Modulator Block PCMCThis block is a feedback loop modulator for the Peak Current Mode Control (PCMC). It compares theerror signal from the Compensator Block and the input current sense signal to change the duty cycle ofthe PWM drive signal. This block consists of the following CIPs, as shown in Figure 4-4:

1. Pulse-Width Modulator (PWM)2. Programmable Ramp Generator (PRG)3. Complementary Output Generator (COG)4. Comparator (CMP)5. Fixed Voltage Reference (FVR)6. Timer

Note: The module only loads a timer peripheral if a 16-bit PWM is loaded.

Figure 4-4. Modulator Block PCMC Schematic

Set value of Slope Compensation

signal from the EA_OUT of the Compensator Block

Input Current Sense Signal (select pin)

Set Switching Frequency and

Max. Duty Cycle

Set dead-band of the complementary outputs

PRG

FS OUT IN

RS

PWM

OUT_H OUT_LCS

+

_

CMP

High-Side Switch PWM Drive (select pin)

Low-Side Switch PWM Drive (select pin)

Half-Bridge Mode/Single-Ended Mode

Set blanking time for the Rising Source Signal

signal from FAULT BLOCK trigger

COGRS

FS B/D

A/C

AS*for Half-Bridge Mode only

The configurable parameters include the following:

1. PWM Output mode, switching frequency and maximum duty cycle2. Slope rate of the ramp generator



3. Comparator inputs4. Rising/falling edge dead-time and blanking for nonoverlapping PWM drive signals

There is also an option for a stand-alone open-loop PWM operation. This option establishes theconnection of the COG to the PWM only. This peripheral interconnection provides a fixed frequency andduty cycle that will help the designer to analyze the operation of the power plant during hardwarevalidation and design optimization (e.g., FET drive circuit and feedback signal integrity). However, as theregulation is disabled when this option is selected, lies in the responsibility of the designer to select aswitching frequency and duty ratio carefully to prevent damages.

4.1.3 Modulator Block VMCThis block is a feedback loop modulator block for the Voltage Mode Control (VMC). It compares theinternally generated sawtooth ramp voltage and the EA_OUT signal (error signal) of the CompensatorBlock to change the duty cycle of the PWM drive signal. The Modulator Block VMC consists of the CIPslisted in 4.1.2 Modulator Block PCMC with an additional DAC, as shown in Figure 4-5. It also containssimilar configurable parameters like PCMC.

Figure 4-5. Modulator Block VMC Schematic

PWM

OUT_H OUT_L

PRG

FS OUT IN

RS

DAC



signal from the EA_OUT of the Compensator Block OPA3OUT or OPA4OUT


Set start and stop value of artificial ramp


Max. Duty Cycle


COGRS

FS B/D

A/C

AS

+ _

CMP

TMR

*for Half-Bridge Mode only


4.1.4 Pulse Modulator BlockThis block is a feedback loop modulator block for PCMC with enhanced LED dimming method. Theenhanced dimming technique provides more visually attractive dimming and protects the LEDs fromovercurrent. This is done by synchronously turning off the load switch and the converter PWM output tocut the path of the decaying current from the output capacitor discharge and allow the LED to turn offfaster.

In addition to the CIPs and parameters listed in 4.1.2 Modulator Block PCMC, the Pulse Modulator blockhas an additional 16-bit resolution PWM for the dimming frequency, and a Digital Signal Modulator (DSM)as shown in Figure 4-6. Both the dimming frequency and duty cycle can be configured through this block.



Figure 4-6. Pulse Modulator Block Schematic

Set value of Slope Compensation

signal from the EA_OUT of the Compensator Block

Input Current Sense Signal (select pin)


Max. Duty Cycle


PRGFS

OUT IN RS

DSM

OUT_H OUT_LCS

+

_

CMP




Set blanking time for the Rising Source Signal


COG

FS B/D AS

16-bit PWM

10-bit PWM CARH

CARL MOD Q

Set Pulse Modulating Frequency and

Duty Cycle

EXT_DIM External Dimming Output pin

RS A/C


4.1.5 Fault BlockThe Fault Block protects the power supply from failure caused by abnormal input and output conditions.This block compares the FAULT input of the PWM output logic COG and supports programmablethresholds for the reference voltage levels. When the FAULT input exceeds the set reference voltage, theFault protection will be triggered and the PWM drive signal will shut down.

The Fault Block consists of the following CIPs, as shown in Figure 4-7:

1. Comparator (CMP)2. Digital-to-Analog Converter (DAC)3. Fixed Voltage Reference (FVR)

Figure 4-7. Fault Block Schematic

DAC+

_

FAULT

CMP

FAULT Input (select pin)

Set Reference Voltage

to COG shutdown source 5V

FVR



To enable the Fault protection, the “Fault_EnableProtection()” function must be called in theapplication (see Figure 4-8).

Figure 4-8. Enable Fault Protection Function

4.2 Control ModesThese modules utilize the existing CIP blocks previously described to operate as a closed-loop PWMcontroller. These blocks do not allow the selection of specific CIP blocks and refer to high-level designparameters only. The generated drivers contain a basic soft start code for a proper start-up of the powersupply. However, there is no option for influencing the ramp-up timing. The effective start-up time will,therefore, depend on the feedback loop bandwidth determined by the feedback loop compensator design.

4.2.1 Peak Current Mode Control (PCMC)The PCMC module is composed of the Compensator and a Modulator Block, as shown in Figure 4-9.This module uses two feedback loops: an outer loop, incorporating the nominal power supply outputvoltage or current value, and an inner inductor current loop.

The Compensator Block processes the voltage difference between the output feedback signal and thereference voltage to generate the error signal, which is used as reference signal of the inner current loop.The current reference signal is modulated by the slope compensation ramp to avoid subharmonicoscillation.

The Modulator Block compares the inductor current feedback signal with the modulated current referencesignal. The result of the comparison determines the required duty cycle to maintain the power supplyoutput in regulation.



Figure 4-9. PCMC Module Schematic

+ -

VIN

VIN

L

C LOAD

VOUT

RFB1

+

_

DAC+

_

FVR

COMPENSATOR BLOCK (OPA+DAC+FVR)

EA_OUT FB

PRGFS

OUT IN RS

COGRS

FS B/D

A/C

OUT_H OUT_LCS

+

_

CMP

OPA

PCMC/PULSE MODULATOR BLOCK (PWM+COG+CMP+PRG)+DSM

RFB2

5V


PWM

EXT_DIM

*for LED Dimming only

PWM

DSM

The configurable parameters include the following:

1. PWM output mode, switching frequency and maximum duty cycle2. Slope rate of the ramp generator3. Comparator inputs4. Rising/Falling edge dead-time and blanking5. Error amplifier reference voltage

The PCMC module also has an option to support linear or weber LED dimming. This option has thePCMC module use the Pulse Modulator Block instead of the Modulator Block PCMC.

4.2.2 Voltage Mode Control (VMC)The VMC module is composed of the Compensator and the Modulator Block VMC, as shown in Figure4-10. This module compares the output voltage feedback signal with the programmable internal referencevoltage.

The Compensator Block produces the voltage error between the output feedback signal with the setreference voltage. The Modulator Block VMC compares the error signal and the internally generatedsawtooth waveform signal. The result of the comparison determines the duty cycle to keep the powersupply output in regulation.



Figure 4-10. VMC Module Schematic

+ -

VIN

VIN

L

C LOAD

VOUT

RFB1

+

_

DAC+

_

5V

COMPENSATOR BLOCK (OPA+DAC+FVR)

EA_OUT FB

PWM

OUT_H OUT_L

OPA

VMC MODULATOR BLOCK (PWM+COG+CMP+PRG+DAC)

RFB2

PRGFS

OUT IN RS

DAC+ _

CMP

COGRS

FS B/D

A/C

FVR


In addition to the parameters listed in 4.2.1 Peak Current Mode Control (PCMC), the VMC moduleincludes the Start and Stop voltage of the rising ramp. These voltages, together with the switchingfrequency and duty cycle, determine the slew rate of the resulting rising ramp (see Equation 4-1).

Equation 4-1. VMC Rising Ramp Slew Rate ComputationSlew Rate = Stop Voltage − Start Voltage × Sw Frequency in Hz)/ 1000000 × Duty Cyclevolts per microsecond4.3 Power Supply Topologies

These modules support specific SMPS topologies that operate in either Peak Current or Voltage ModeControl. Based on the selected mode, the PCMC or VMC module is loaded and configured for theselected topology. These modules provide an ease in setting the parameters of the chosen topology aswell as the parameters for the PWM drive signals.

4.3.1 Synchronous Buck (SyncBuck)A buck converter is designed to produce lower average output voltage than the input voltage. It usessynchronous switching where the low-side switch requires a second PWM signal that is complement ofthe high-side switch signal. This block supports asynchronous and synchronous operation. By default, ituses synchronous switching by incorporating an active low-side switch to rectify the inductor currentduring the off-time (active rectification). However, the modulator subblock allows the user to turn off thesynchronous switch drive signal and thus to operate the converter in Asynchronous mode (passiverectification). See Figure 5-1.



The configurable parameters include:

1. Control mode2. PWM switching frequency and maximum duty cycle3. Reference voltage of the error amplifier4. Rising/Falling edge dead-time and blanking5. Slope rate of the slope compensation/ramp generator6. Start and Stop of the voltage ramp (see Note below)

Figure 4-11. SyncBuck Module Schematic

VOUT

CS

8-BIT PIC®MICROCONTROLLER

+

-VIN

VIN

L

C LOAD

Note: This is only available for VMC operation.

4.3.2 Single-Ended Primary Inductance Converter with LED Dimming (SEPIC_LED)A Single-Ended Primary Inductance Converter (SEPIC) is an attractive LED driver solution for automotiveapplications. The SEPIC provides a regulated output even if the supply goes below or above the outputvoltage. Simultaneously, the SEPIC can also provide a noninverted output referring to the same groundpotential as its input. In LED dimming, when the automotive electrical supply voltage drops below or risesabove the LED’s voltage, the SEPIC can maintain the LED current constant.

The SEPIC_LED module provides an ease in setting the PWM drive signals as well as the LED dimmingmethod and LED dimming steps. This module uses the PCMC Control mode module in Single-Endedmode, with the dimming option enabled.

The configurable parameters include:

1. PWM switching frequency and maximum duty cycle2. Reference voltage of the error amplifier3. Leading edge blanking4. Overvoltage protection reference voltage5. Slope rate of the slope compensation6. Dimming frequency and duty cycle7. Dimming mode and resolution



Figure 4-12. SEPIC_LED Module Schematic

VOUT

CS8-BIT PIC®

MICROCONTROLLER

+

-VIN

VIN

COUT

L1 Cc

L2

D

OUT_H

LED

EXT_DIM



5. Sample ApplicationThis section contains examples on how to use the library for specific topologies.

5.1 Synchronous Buck PCMCThis sample application is based on a PCMC Closed Loop Demo of the CIP Hybrid Power Starter Kit.The MCC SMPS Library can set up a Synchronous Buck PCMC in three ways:

1. Using the CIP blocks2. Using the Control mode - PCMC module3. Using the SyncBuck module

The project may be configured with the following parameters:

• Switching Frequency = 500 kHz• Maximum Duty Cycle = 90%• Slope Compensation = 0.3 V/us• Rising Edge Dead-time = 15 ns• Falling Edge Dead-time = 60 ns• Leading Edge Blanking = 250 ns• Error Amplifier Reference Voltage = 2.5V• OVP Protection = 2V

Device Recommendation: PIC16F1779.

5.1.1 Using the CIP BlocksThe CIP blocks provide a modular way of configuring the Synchronous Buck PCMC. Below are the stepson developing the project using the CIP blocks:

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controllers/CIP Blocks section of the MCC device resources.4. Load and configure the Modulator PCMC, Compensator and Fault Block in no definite order (see

5.1.1.1 Configuring the Modulator Block PCMC, 5.1.1.2 Configuring the Compensator Block and 5.1.1.3 Configuring the Fault Block sections).

5. Click Generate and MCC will produce the respective C source and header files for each block andCIPs.

6. Use the generated APIs/functions to run the application.

The following sections list the step-by-step procedure on configuring the CIP blocks:

5.1.1.1 Configuring the Modulator Block PCMC1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below).2. Click Upload All to load the CIPs and the CS and OUT_H/L pin selections.3. Keep Stand-alone Open Loop PWM unchecked.4. Configure the parameters with the required values (see Figure 5-1).5. Select the desired CS input and OUT_H/L pins.

Sample Application


http://ww1.microchip.com/downloads/en/DeviceDoc/CIP-Hybrid-Power-Starter-Kit-40002086A.pdf

Figure 5-1. Modulator Block PCMC Configuration

Sample Application


5.1.1.2 Configuring the Compensator Block1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below). The

users can also select a feedback input (FB) pin which preselects the CIPs and the EA_OUT pin.The selected OPA output must be available as an input source for the Modulator Block's rampgenerator (refer to Figure 5-1).

2. Click Upload All to load the CIPs.3. Configure the parameters with the required values (see Figure 5-2).

Figure 5-2. Compensator Block Configuration

5.1.1.3 Configuring the Fault Block1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below). The

selected CIPs must be compatible with the other blocks’ CIPs.2. Click Upload All to load the CIPs and the Fault pin selection.3. Configure the parameters with the required values (see Figure 5-3).4. Indicate the COG used by the Modulator Block.5. Select the desired Fault input pin.

Sample Application


Figure 5-3. Fault Block Configuration

Note: To verify the compatibility of the selected peripherals, refer to the device data sheet or use one ofthe higher configuration hierarchy layers like Control mode or topology modules (see 5.1.2 Using theControl Mode - PCMC Module and 5.1.3 Using the SyncBuck Module sections).

5.1.2 Using the Control Mode - PCMC ModuleThis section provides an easier way to configure the Synchronous Buck PCMC using the PCMC module.For convenience, these modules have up to four preselected CIP groups, which are determined by theselected FB pin. Below are the steps on developing the project using the PCMC module.

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controllers/Control Modes section of the MCC device resources.4. Load the PCMC module.5. Select an FB pin to preselect the EA_OUT pin and the CIPs loaded by the CIP blocks (see Note

below).6. Click Upload All to load the other pin selections, the CIP blocks and its peripherals.7. Check Enable Soft Start to enable the quick soft start sequence.8. Configure the parameters with the required values (see Figure 5-4).9. Assign pins for the CS, OUT_H and OUT_L pins.

Sample Application


10. Load the Fault Block and follow the steps in 5.1.1.3 Configuring the Fault Block for the Faultprotection.

11. Click Generate and MCC will produce the respective C source and header files.12. Call the generated soft start from pcmc.c and the Fault protection functions from fault_blk.c to

run the application (see Figure 5-5).

Note: The FB pin determines which CIPs are compatible to the Compensator Block’s Op Amp. The Appendix shows the CIP combinations determined by the FB pin (or PWM Controller Block in theTopology level) for the PIC16F176X/7X devices.

Sample Application


Figure 5-4. PCMC Module Configuration

Sample Application


Figure 5-5. Adding Fault Protection and Soft Start Functions

5.1.3 Using the SyncBuck ModuleThe easiest way to configure a Synchronous Buck PCMC is through the SyncBuck module in PCMCmode. This module provides up to four PWM Controller Block channels that correspond to the CIP groupsof the Control mode modules. Below are the steps on developing the project using the SyncBuck module:

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controllers/Power Supply Topologies section of the MCC device

resources.4. Load the SyncBuck module.5. Set the mode to PCMC.6. Select a PWM Controller Block.7. Click Upload All to load the other pin selections, the PCMC module and its CIP blocks and

peripherals.8. Configure the parameters with the required values (see Figure 5-6).9. Assign pins for the CS, OUT_H and OUT_L pins.10. Follow steps 10 to 12 from 5.1.2 Using the Control Mode - PCMC Module.

Sample Application


Figure 5-6. SyncBuck Module Configuration

Sample Application


5.2 SEPIC with LED DimmingThis sample application is based on a SEPIC LED Driver Demo Board Application Note. The MCC SMPSLibrary can set up a SEPIC with LED dimming in three ways:

1. Using the CIP blocks2. Using the Control mode - PCMC module3. Using the SEPIC_LED module

The project may be configured with the following parameters:

• Switching Frequency = 350 kHz• Maximum Duty Cycle = 90%• Slope Compensation = 0.2 V/us• Leading Edge Blanking = 250 ns• Error Amplifier Reference Voltage = 2.5V• OVP Protection = 2V• Dimming Frequency = 1 kHz• Dimming Duty Cycle = 50%

Device Recommendation: PIC16F1769

5.2.1 Using the CIP BlocksThe CIP blocks provide a modular way of configuring the SEPIC with LED dimming. Below are the stepson developing the project using the CIP blocks:

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controller/CIP blocks section of the MCC device resources.4. Load and configure the Pulse Modulator, Compensator and Fault Block in no definite order (see

5.2.1.1 Configuring the Pulse Modulator Block, 5.2.1.2 Configuring the Compensator Block and 5.2.1.3 Configuring the Fault Block sections).

5. Click Generate and MCC will produce the respective C source and header files for each block andCIPs.

6. Use the generated APIs/functions to run the application.

The following sections list the step-by-step procedure on configuring the CIP blocks:

5.2.1.1 Configuring the Pulse Modulator Block1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below).2. Click Upload All to load the CIPs and the CS, OUT_H/L and EXT_DIM pin selections.3. Keep Stand-alone Open Loop PWM unchecked.4. Configure the parameters with the required values (see Figure 5-7).5. Select the desired CS input and OUT_H and EXT_DIM pins.

Sample Application


http://ww1.microchip.com/downloads/en/AppNotes/00001978B.pdf

Figure 5-7. Pulse Modulator Block Configuration

Sample Application


5.2.1.2 Configuring the Compensator Block1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below). The

users can also select a feedback input (FB) pin which preselects the CIPs and the EA_OUT pin.The selected OPA output must be available as an input source for the Modulator Block's rampgenerator (refer to Figure 5-7).

2. Click Upload All to load the CIPs.3. Configure the parameters with the required values (see Figure 5-8).

Figure 5-8. Compensator Block Configuration

5.2.1.3 Configuring the Fault Block1. Select a set of compatible peripherals on the Submodule Selection pane (see Note below).2. Click Upload All to load the CIPs and the Fault pin selection.3. Configure the parameters with the required values (see Figure 5-9).4. Indicate the COG used by the Modulator Block.5. Select the desired Fault input pin.

Sample Application


Figure 5-9. Fault Block Configuration

Note: To verify the compatibility of the selected peripherals, refer to the device data sheet or use one ofthe higher configuration hierarchy layers like Control mode or topology modules (see 5.2.2 Using theControl Mode - PCMC Module and 5.2.3 Using the SEPIC_LED Module sections).

5.2.2 Using the Control Mode - PCMC ModuleThis section provides an easier way to configure the SEPIC with LED dimming using the PCMC module.It has an additional option to set the dimming steps to a maximum of 2048 incremental steps. Forconvenience, these modules have up to four preselected CIP groups which are determined by theselected FB pin. Below are the steps on developing the project using the PCMC module:

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controller/Control Modes section of the MCC device resources.4. Load the PCMC module.5. Check the Enable Dimming Checkbox.6. Select an FB pin to preselect the EA_OUT pin and the CIPs loaded by the CIP blocks (See the

Note in 5.1.2 Using the Control Mode - PCMC Module section).7. Click Upload All to load the other pin selections, the CIP blocks and its peripherals.8. Configure the parameters with the required values (see Figure 5-10).9. Assign pins for the CS, OUT_H and EXT_DIM pins.10. Load the Fault Block and follow the steps in 5.2.1.3 Configuring the Fault Block for the Fault

protection (See Note below).11. Click Generate and MCC will produce the respective C source and header files.12. Call the generated soft start from pcmc.c and the Fault protection functions from fault_blk.c to

run the application (see Figure 5-11).

Sample Application


Figure 5-10. PCMC Module Configuration

Sample Application


Figure 5-11. Adding Fault Protection and Soft Start Functions

Note: For consistency with the SEPIC LED Driver Application Note, interchange the selectedcomparators of the loaded Pulse Modulator Block and Fault Block by clicking the individual Uploadbuttons. However, this will not update the list of CS and Fault pins in the Control mode and topologymodules. The appropriate CS and Fault pins must be reassigned in the CIP block modules.

5.2.3 Using the SEPIC_LED ModuleThe easiest way to configure a SEPIC with LED dimming is through the SEPIC_LED module. Thismodule provides up to four PWM Controller Block channels which corresponds to the CIP groups of theControl mode modules. Below are the steps on developing the project using the SEPIC_LED module:

1. Create a new project in MPLAB X and open MCC.2. Set up the System Module (i.e., System Clock of 8 MHz with PLL).3. Expand the SMPS Power Controller/Power Supply Topologies section of the MCC device

resources.4. Load the SEPIC module.5. Select a PWM Controller Block.6. Click Upload All to load the other pin selections, the PCMC module and its CIP blocks and

peripherals (See Note above).7. Configure the parameters with the required values (see Figure 5-12).8. Assign pins for the CS, OUT_H, EXT_DIM and Fault pins.9. Follow steps 11 and 12 of 5.2.2 Using the Control Mode - PCMC Module.

Sample Application


Figure 5-12. SEPIC_LED Module Configuration

Sample Application


6. AppendixTable 6-1. Peripheral Combinations Assigned to Each PWM Controller Block for the PIC16F1773/6/8 Device

PWMController

Block

CompensatorBlock

Fault Block Modulator Block (PCMC/VMC) Pulse Modulator Block

Channel OPA 10-bitDAC

CMP 5-bitDAC

COG PRG PWM(Switching)

CMP 5-bit DAC(for VMC

only)

PWM(Switching)

PWM(Dimming)

DSM

CH1 OPA1 DAC1 CMP2 DAC3 COG1 PRG1 10-bitPWM3+TMR2

CMP1 DAC3 10-bitPWM3+TMR2

16-bitPWM5

DSM1



16-bitPWM6

DSM2

CH3 OPA3 DAC5 CMP6 DAC7 COG3 PRG3 16-bit PWM11 CMP5 DAC7 10-bitPWM9+TMR2

16-bitPWM11

DSM3

Table 6-2. Peripheral Combinations Assigned to Each PWM Controller Block for the PIC16F1777/9 and 176xDevices

PWMController

Block

CompensatorBlock

Fault Block Modulator Block (PCMC/VMC) Pulse Modulator Block

Channel OPA 10-bitDAC

CMP 5-bitDAC

COG PRG PWM(Switching)

CMP 5-bit DAC(for VMC

only)

PWM(Switching)

PWM(Dimming)

DSM



16-bitPWM5

DSM1



16-bitPWM6

DSM2


16-bitPWM12

DSM3


16-bitPWM11

DSM4

Note: CH3 and CH4 are for the 1777/9 devices only.

Table 6-3. Feedback Pins Assigned to Each PWM Controller Block

PWM Controller Block Feedback (FB) Pin

Channel 1764/5 1768/9 177X

CH1 RC1 RB4 RA5

CH2 - RC6 RB2

CH3 - - RC7

CH4 - - RD2

Appendix


7. Revision HistoryDoc Rev. Date Comments

B 07/2019 PIC16(L)F176X device support, PCMC with dimming, and SEPIC_LED topologymodules. Added Pulse Modulator Block, Single-Ended Primary InductanceConverter with LED Dimming (SEPIC_LED) Modules and SEPIC with LEDDimming Sample Application sections. Added Appendix with 2 tables. Added up to4 instances of each SMPS module. Removed table 5-1. Other minor corrections.

A 12/2018 Initial document release.

Revision History


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ISBN: 978-1-5224-4746-7

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PrefaceTable of Contents1. Introduction2. Installation2.1. Installing the MCC SMPS Library from the Microchip Website2.2. Updating the MCC SMPS Library2.3. Loading Different MCC SMPS Library Versions2.4. Older MCC SMPS Library Versions

3. User Interface3.1. Information Tab3.2. Configuration Tab3.3. Schematic Tab3.4. Pin Manager Section

4. MCC SMPS Library Modules4.1. CIP Blocks4.1.1. Compensator Block4.1.2. Modulator Block PCMC4.1.3. Modulator Block VMC4.1.4. Pulse Modulator Block4.1.5. Fault Block

4.2. Control Modes4.2.1. Peak Current Mode Control (PCMC)4.2.2. Voltage Mode Control (VMC)

4.3. Power Supply Topologies4.3.1. Synchronous Buck (SyncBuck)4.3.2. Single-Ended Primary Inductance Converter with LED Dimming (SEPIC_LED)

5. Sample Application5.1. Synchronous Buck PCMC5.1.1. Using the CIP Blocks5.1.1.1. Configuring the Modulator Block PCMC5.1.1.2. Configuring the Compensator Block5.1.1.3. Configuring the Fault Block

5.1.2. Using the Control Mode - PCMC Module5.1.3. Using the SyncBuck Module

5.2. SEPIC with LED Dimming5.2.1. Using the CIP Blocks5.2.1.1. Configuring the Pulse Modulator Block5.2.1.2. Configuring the Compensator Block5.2.1.3. Configuring the Fault Block

5.2.2. Using the Control Mode - PCMC Module5.2.3. Using the SEPIC_LED Module

6. Appendix7. Revision HistoryThe Microchip WebsiteProduct Change Notification ServiceCustomer SupportMicrochip Devices Code Protection FeatureLegal NoticeTrademarksQuality Management SystemWorldwide Sales and Service