Click here to load reader
Upload
wj18868908
View
17
Download
4
Embed Size (px)
Citation preview
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
HIGH PERFORMANCEZERO VOLTAGE SWITCH
RESONANT MODECONTROLLERS
PIN CONNECTIONS
Order this document by MC34067/D
P SUFFIXPLASTIC PACKAGE
CASE 648
DW SUFFIXPLASTIC PACKAGE
CASE 751G(SO–16L)
16
1
(Top View)
Vref
Osc Charge
Osc RC
Osc Control Current
Gnd
Error Amp Out
Inverting Input
Noninverting Input
One–Shot RC
VCC
Drive Output B
CSoft–Start
Enable/UVLO Adjust
Drive Output A
Power Gnd
Fault Input
DeviceOperating
Temperature Range Package
TA = 0 to + 70°C
TA = – 40° to + 85°C
ORDERING INFORMATION
MC34067DW SO–16L
MC34067P Plastic DIPMC33067DW SO–16LMC33067P Plastic DIP
SEMICONDUCTORTECHNICAL DATA
16
1
1MOTOROLA ANALOG IC DEVICE DATA
The MC34067/MC33067 are high performance zero voltage switchresonant mode controllers designed for off–line and dc–to–dc converterapplications that utilize frequency modulated constant off–time or constantdeadtime control. These integrated circuits feature a variable frequencyoscillator, a precise retriggerable one–shot timer, temperature compensatedreference, high gain wide bandwidth error amplifier, steering flip–flop, anddual high current totem pole outputs ideally suited for driving powerMOSFETs.
Also included are protective features consisting of a high speed faultcomparator, programmable soft–start circuitry, input undervoltage lockoutwith selectable thresholds, and reference undervoltage lockout.
These devices are available in dual–in–line and surface mount packages.
• Zero Voltage Switch Resonant Mode Operation
• Variable Frequency Oscillator with a Control Range Exceeding 1000:1
• Precision One–Shot Timer for Controlled Off–Time
• Internally Trimmed Bandgap Reference
• 4.0 MHz Error Amplifier
• Dual High Current Totem Pole Outputs
• Selectable Undervoltage Lockout Thresholds with Hysteresis
• Enable Input
• Programmable Soft–Start Circuitry
• Low Startup Current for Off–Line Operation
Simplified Block Diagram
NoninvertingInput
11
8
6
16
3
2
1Osc Charge
Enable /UVLO Adjust
VCC15
5
14
12
13
Vref UVLO
ErrorAmp
VCC UVLO /Enable
Fault Detector
2.5 VClamp
Soft–Start
One–Shot
Output B
Inverting Input
Soft–Start
7
Error AmpOutput
One–Shot
OscillatorControl Current
Osc RC
9
Ground4
Fault Input10
Pwr Gnd
Output A
Vref
VariableFrequencyOscillator
SteeringFlip–Flop
5.0 VReference
Motorola, Inc. 1999 Rev 1, 05/99
MC34067 MC33067
2 MOTOROLA ANALOG IC DEVICE DATA
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage VCC 20 V
Drive Output Current, Source or Sink (Note 1)ContinuousPulsed (0.5 µs, 25% Duty Cycle
IO 0.31.5
A
Error Amplifier, Fault, One–Shot, Oscillator andSoft–Start Inputs
Vin – 1.0 to + 6.0 V
UVLO Adjust Input Vin(UVLO) – 1.0 to VCC V
Power Dissipation and Thermal CharacteristicsDW Suffix, Plastic Package, Case 751G
TA = 25°CThermal Resistance, Junction–to–Air
P Suffix, Plastic Package, Case 648TA = 25°CThermal Resistance, Junction–to–Air
PDRθJA
PDRθJA
862145
1.25100
mW°C/W
W°C/W
Operating Junction Temperature TJ + 150 °C
Operating Ambient TemperatureMC34067MC33067
TA0 to + 70
– 40 to + 85
°C
Storage Temperature Tstg – 55 to + 150 °C
ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF,CL = 1.0 nF. For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unlessotherwise noted.)
Characteristic Symbol Min Typ Max Unit
REFERENCE SECTION
Reference Output Voltage (IO = 0 mA, TJ = 25°C) Vref 5.0 5.1 5.2 V
Line Regulation (VCC = 10 TO 18 V) Regline – 1.0 20 mV
Load Regulation (IO = 0 mA to 10 mA) Regload – 1.0 20 mV
Total Output Variation Over Line, Load, and Temperature Vref 4.9 – 5.3 V
Output Short Circuit Current IO 25 100 190 mA
Reference Undervoltage Lockout Threshold Vth 3.8 4.3 4.8 V
ERROR AMPLIFIER
Input Offset Voltage (VCM = 1.5 V) VIO – 1.0 10 mV
Input Bias Current (VCM = 1.5 V) IIB – 0.2 1.0 µA
Input Offset Current (VCM = 1.5 V) IIO – 0 0.5 µA
Open Loop Voltage Gain (VCM = 1.5 V, VO = 2.0 V) AVOL 70 100 – dB
Gain Bandwidth Product (f = 100 kHz) GBW 3.0 5.0 – MHz
Input Common Mode Rejection Ratio (VCM = 1.5 to 5.0 V) CMR 70 95 – dB
Power Supply Rejection Ratio (VCC = 10 to 18 V, f = 120 Hz) PSR 80 100 – dB
Output Voltage SwingHigh StateLow State
VOHVOL
2.8–
3.20.6
–0.8
V
NOTES: 1. Maximum package power dissipation limits must be observed.2. Adjust VCC above the Startup threshold before setting to 12 V.3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow = 0°C for the MC34067 Thigh = + 70°C for MC34067= – 40°C for the MC33067 Thigh = + 85°C for MC33067
MC34067 MC33067
3MOTOROLA ANALOG IC DEVICE DATA
ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF,CL = 1.0 nF. For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unlessotherwise noted.)
Characteristic Symbol Min Typ Max Unit
OSCILLATOR
Frequency (Error Amp Output Low)TA = 25°CTotal Variation (VCC = 10 to 18 V, TA = TLow to THigh
fOSC(low) 500490
525–
540550
kHz
Frequency (Error Amp Output High)TA = 25°CTotal Variation (VCC = 10 to 18 V, TA = TLow to THigh
fOSC(high) 19001850
2050–
21502200
kHz
Oscillator Control Input Voltage, Pin 3 @ 25°C Vin – 2.5 – V
ONE–SHOT
Drive Output Off–TimeTA = 25°CTotal Variation (VCC = 10 to 18 V, TA = TLow to THigh
tBlank 235225
250–
270280
ns
DRIVE OUTPUTS
Output VoltageLow State (ISink = 20 mA)Low State (ISink = 200 mA)High State (ISource = 20 mA)High State (ISource = 200 mA)
VOL
VOH
––
9.59.0
0.81.510.39.7
1.22.0––
V
Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mA) VOL(UVLO) – 0.8 1.2 V
Output Voltage Rise Time (CL = 1.0 nF) tr – 20 50 ns
Output Voltage Fall Time (CL = 1.0 nF) tf – 15 50 ns
FAULT COMPARATOR
Input Threshold Vth 0.93 1.0 1.07 V
Input Bias Current (VPin 10 = 0 V) IIB – – 2.0 – 10 µA
Propagation Delay to Drive Outputs (100 mV Overdrive) tPLH(In/Out) – 60 100 ns
SOFT–START
Capacitor Charge Current (VPin 11 = 2.5 V) Ichg 4.5 9.0 14 µA
Capacitor Discharge Current (VPin 11 = 2.5 V) Idischg 3.0 8.0 – mA
UNDERVOLTAGE LOCKOUT
Startup Threshold, VCC IncreasingEnable/UVLO Adjust Pin OpenEnable/UVLO Adjust Pin Connected to VCC
Vth(UVLO) 14.88.0
169.0
17.210
V
Minimum Operating Voltage After Turn–OnEnable/UVLO Adjust Pin OpenEnable/UVLO Adjust Pin Connected to VCC
VCC(min) 8.07.6
9.08.6
109.6
V
Enable/UVLO Adjust Shutdown Threshold Voltage Vth(Enable) 6.0 7.0 – V
Enable/UVLO Adjust Input Current (Pin 9 = 0 V) Iin(Enable) – – 0.2 – 1.0 mA
TOTAL DEVICE
Power Supply Current (Enable/UVLO Adjust Pin Open)Startup (VCC = 13.5 V)Operating (fOSC = 500 kHz) (Note 2)
ICC ––
0.527
0.835
mA
NOTES: 1. Maximum package power dissipation limits must be observed.2. Adjust VCC above the Startup threshold before setting to 12 V.3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow = 0°C for the MC34067 Thigh = + 70°C for MC34067= – 40°C for the MC33067 Thigh = + 85°C for MC33067
MC34067 MC33067
4 MOTOROLA ANALOG IC DEVICE DATA
AVO
L, O
PEN
LO
OP
VOLT
AGE
GAI
N (d
B)
RT
Ω, T
IMIN
G R
ESIS
TOR
(k)
RO
SCΩ
, OSC
ILLA
TOR
TIM
ING
RES
ISTO
R (k
)
One–Shot Period is Measuredat the Drive Outputs.
Oscillator Discharge Time is Measured at the Drive Outputs. f OSC
COSC = 200 pF
60
30
20
10
400
3.0
500
0
V sat, O
UTP
UT
SATU
RAT
ION
VO
LTAG
E (V
)
, OSC
ILLA
TOR
FR
EQU
ENC
Y (k
Hz)
tdischg, OSCILLATOR DISCHARGE TIME (µs)
3500
3000
2500
2000
1500
1000
IOSC, OSCILLATOR CONTROL CURRENT (mA)
0.35
0.30
0.25
0.20
0.15
0.10
IOSC, OSCILLATOR CONTROL CURRENT (mA) tOS, ONE–SHOT PERIOD (µs)
0
0.05
200
VCC = 12 VTA = 25°CROSC = 18.2 k400
300
100500
COSC = 300 pF
0
– 10
– 20
– 30
– 40
– 50
50
40
30
20
10
0
f, FREQUENCY (Hz)
, REF
EREN
CE
OU
TPU
T VO
LTAG
E C
HAN
GE
(mV)
TA, AMBIENT TEMPERATURE (°C)
– 20
∇
–10
Gain
Vre
f
50
60
70
80
90
100
120
110 0, E
XCES
S PH
ASE
(DEG
REE
S)
COSC = 500 pF
COSC = 300 pF
VCC = 12 VRVFO = ∞RT = ∞CT = 500 pFTA = 25°C
Figure 1. Oscillator Timing Resistorversus Discharge Time
Figure 2. Oscillator Frequency versusOscillator Control Current
Figure 3. Error Amp Output SaturationVoltage versus Oscillator Control Current
Figure 4. One–Shot Timing Resistorversus Period
Figure 5. Open Loop Voltage Gain and Phase versus Frequency
Figure 6. Reference Output Voltage Changeversus Temperature
0 400 800 1200 1600 20000 20 40 60 80 100
0 0.5 1.0 1.5 2.0 2.5 3.0 0.1 0.3 0.6 1.0 3.0 6.0 10
10 k 100 k 1.0M 10M – 55 – 25 0 25 50 75 125100
VCC = 12 VVO = 2.0 VRL = 100 kTA = 25°C
VCC = 12 VRL = ∞*Vref at TA = 25°C
VCC = 12 VCOSC = 500 pFROSC = 100 kTA = 25°C
PhaseMargin= 64°
*Vref = 5.0 V
CT = 200 pF
CT = 300 pF CT = 500 pF
Phase
*Vref = 5.0 V
*Vref = 5.0 V
MC34067 MC33067
5MOTOROLA ANALOG IC DEVICE DATA
24
2.0
, REF
EREN
CE
OU
TPU
T VO
LTAG
E C
HAN
GE
(mV)
∇ Vre
f Vsa
t3.2
2.4
1.6
0.8
0
0
– 50
, OU
TPU
T SA
TUR
ATIO
N V
OLT
AGE
(V)
Figure 7. Reference Voltage Changeversus Source Current
Iref, REFERENCE SOURCE CURRENT (mA)
Figure 8. Drive Output Saturation Voltage versus Load Current
0
–1.0
– 2.0
– 3.0
3.0
IO, OUTPUT LOAD CURRENT (A)
Figure 9. Drive Output Waveform
90%
10%
20 ns/DIV
V
, S
OFT
–STA
RT S
ATU
RAT
ION
VO
LTAG
E (V
)
Figure 10. Soft–Start Saturation Voltageversus Capacitor Discharge Current
Idchg, CAPACITOR DISCHARGE CURRENT (mA)
0
– 30
–10
– 20
– 401.0
2000
1600
1200
800
400
0
f, FR
EQU
ENC
Y (k
Hz)
Figure 11. Operating Frequencyversus Supply Current
ICC, INPUT SUPPLY CURRENT (mA)
Source Saturation(Load to Ground)
Source Saturation(Load to VCC)
OL
Gnd
TA = – 40°C
TA = 25°C
Figure 12. Supply Current versus Supply Voltage
TA = 25°C
TA = – 40°C
VCC, SUPPLY VOLTAGE (V)
20
12
4.0
0
I
, SU
PPLY
CU
RR
ENT
(mA)
CC
16
8.0
Enable/UVLOAdjust Pin
Open
Enable/UVLOAdjust Pin
to VCC
VCC = 12 V80 µs Pulsed Load
120 Hz Rate
TA = – 40°C
CL = 1.0 nFTA = 25 °C
0 0.2 0.4 0.6 0.8 1.00 20 40 60 80 100
0 2.0 4.0 6.0 8.0 10
30 40 50 60 70 80 90 0 4.0 8.0 12 16 20
VCC = 12 VCL = 1.0 nFTA = 25 °C
VCC = 12 VPin 10 = VrefTA = 25 °C
TA = – 20°C
TA = –125°C
VCC = 12 V
VCC
TA = 25 °C
MC34067 MC33067
6 MOTOROLA ANALOG IC DEVICE DATA
3
Figure 13. MC34067 Representative Block Diagram
12Output B
13
14
8
7Inverting Input
OscillatorControl Current
16
9
8.0V
Q2
R
RTCT
ROSCCOSC
RVFO
Vref
4.9V/3.6V
15VCC
Enable /UVLO Adjust
OSC Charge
OSC RC
One–Shot RC
Error Amp Output
Noninverting Input
Soft–Start
Ground4
Fault Input
Power Ground
Output A
Vref
D1Q1
IOSC
Oscillator
One–Shot
Error AmpClamp
3.1V
Error Amp
9.0µA1.0V
Q
QT
SteeringFlip–Flop
4.2/4.0V
Vref UVLOVCC UVLO
7.0k50k 7.0k
50k
4.9V/3.6V
Vref
5.1VReference
1
2
6
11
IOSO
5
10
Timing Diagram
5.1 V
3. 6 V
COSC
5.1 V3.6 V
One–Shot
Output A
Output B
tOS tOS tOS tOS tOS tOS
Error Amp output high, minimum IOSC currentoccurring at minimum input voltage, maximum load.
Error Amp output low, maximum IOSC currentoccurring at maximum input voltage, minimum load.
Fault Comparator
MC34067 MC33067
7MOTOROLA ANALOG IC DEVICE DATA
OPERATING DESCRIPTION
IntroductionAs power supply designers have strived to increase power
conversion efficiency and reduce passive component size,high frequency resonant mode power converters haveemerged as attractive alternatives to conventionalpulse–width modulated control. When compared topulse–width modulated converters, resonant mode controloffers several benefits including lower switching losses,higher efficiency, lower EMI emission, and smaller size. Anew integrated circuit has been developed to support thistrend in power supply design. The MC34067 Resonant ModeController is a high performance bipolar IC dedicated tovariable frequency power control at frequencies exceeding1.0 MHz. This integrated circuit provides the features andperformance specifically for zero voltage switching resonantmode power supply applications.
The primary purpose of the control chip is to provide afixed off–time to the gates of external power MOSFETs at arepetition rate regulated by a feedback control loop.Additional features of the IC ensure that system startup andfault conditions are administered in a safe, controlled manner.
A simplified block diagram of the IC is shown on the frontpage, which identifies the main functional blocks and theblock–to–block interconnects. Figure 13 is a detailedfunctional diagram which accurately represents the internalcircuitry. The various functions can be divided into twosections. The first section includes the primary control pathwhich produces precise output pulses at the desiredfrequency. Included in this section are a variable frequencyOscillator, a One–Shot, a pulse Steering Flip–Flop, a pair ofpower MOSFET Drivers, and a wide bandwidth ErrorAmplifier. The second section provides several peripheralsupport functions including a voltage reference, undervoltagelockout, Soft–Start circuit, and a fault detector.
Primary Control PathThe output pulse width and repetition rate are regulated
through the interaction of the variable frequency Oscillator,One–Shot timer and Error Amplifier. The Oscillator triggersthe One–Shot which generates a pulse that is alternatelysteered to a pair of totem pole output drivers by a toggleFlip–Flop. The Error Amplifier monitors the output of theregulator and modulates the frequency of the Oscillator. Highspeed Schottky logic is used throughout the primarycontrol channel to minimize delays and enhance highfrequency characteristics.
OscillatorThe characteristics of the variable frequency Oscillator are
crucial for precise controller performance at high operatingfrequencies. In addition to triggering the One–Shot timer andinitiating the output deadtime, the oscillator also determinesthe initial voltage for the one–shot capacitor. The Oscillator isdesigned to operate at frequencies exceeding 1.0 MHz. TheError Amplifier can control the oscillator frequency over a1000:1 frequency range, and both the minimum andmaximum frequencies are easi ly and accuratelyprogrammed by the proper selection of external components.
The functional diagram of the Oscillator and One–Shottimer is shown in Figure 14. The oscillator capacitor (COSC) isinitially charged by transistor Q1. When COSC exceeds the4.9 V upper threshold of the oscillator comparator, the baseof Q1 is pulled low allowing COSC to discharge through theexternal resistor, (ROSC), and the oscillator control current,(IOSC). When the voltage on COSC falls below thecomparator’s 3.6 V lower threshold, Q1 turns on and againcharges COSC.
COSC charges from 3.6 V to 5.1 V in less than 50 ns. Thehigh slew rate of COSC and the propagation delay of thecomparator make it difficult to control the peak voltage. Thisaccuracy issue is overcome by clamping the base of Q1through a diode to a voltage reference. The peak voltage ofthe oscillator waveform is thereby precisely set at 5.1 V.
Figure 14. Oscillator and One–Shot Timer
VOE
OscillatorControl Current
COSC
RTCT
ROSC
IOSO
4.9V/3.6V
1
2
10
3
OSC Charge
OSC RC
One–Shot RC
D1Q1
IOSC
Oscillator
One–Shot
3.1V
4.9V/3.6V
Vref
Error Amp Output
6
VOE+ +
Error AmpCharge
RVFO
The frequency of the Oscillator is modulated by varyingthe current flowing out of the Oscillator Control Current (IOSC)pin. The IOSC pin is the output of a voltage regulator. Theinput of the voltage regulator is tied to the variable frequencyoscillator. The discharge current of the Oscillator increasesby increasing the current out of the IOSC pin. Resistor RVFO isused in conjunction with the Error Amp output to change theIOSC current. Maximum frequency occurs when the ErrorAmplifier output is at its low state with a saturation voltage of0.1 V at 1.0 mA.
The minimum oscillator frequency will result when theIOSC current is zero, and COSC is discharged through theexternal resistor (ROSC). This occurs when the ErrorAmplifier output is at its high state of 2.5 V. The minimum andmaximum oscillator frequencies are programmed by theproper selection of resistor ROSC and RVFO. The minimumfrequency is programmed by ROSC using Equation 1:
COSC
where tPD is the internal propagation delay.
(1)R
1ƒ
tPD
nC
t 70 ns
0.348
–
= =–
OSC
(min) (max)OSC 5.1
3.6
MC34067 MC33067
8 MOTOROLA ANALOG IC DEVICE DATA
The maximum oscillator frequency is set by the currentthrough resistor RVFO. The current required to dischargeCOSC at the maximum oscillator frequency can be calculatedby Equation 2:
COSC 1.5C(2)
OSCI1
ƒ
5.1 – 3.6= =
(max)
(max) ƒ(max)
The discharge current through ROSC must also be knownand can be calculated by Equation 3:
ƒ(min) COSCROSC1.5
εI
1ƒ
5.1 – 3.6=
(min)
R ROSC
COSCROSC
=ROSC
ε
1(3)
–
–
OSC
Resistor RVFO can now be calculated by Equation 4:
(4)R =VFO I(max) IR–
2.5 – VEAsat
OSC
One–Shot TimerThe One–Shot is designed to disable both outputs
simultaneously providing a deadtime before either output isenabled. The One–Shot capacitor (CT) is chargedconcurrently with the oscillator capacitor by transistor Q1, asshown in Figure 14. The one–shot period begins when theoscillator comparator turns off Q1, allowing CT to discharge.The period ends when resistor RT discharges CT to thethreshold of the One–Shot comparator. The lower thresholdof the One–Shot is 3.6 V. By choosing CT, RT can by solvedby Equation 5:
5.13.6
(5)CTR
t OS
C 0.348= =
TT
t OS
n
Errors in the threshold voltage and propagation delaysthrough the output drivers will affect the One–Shot period. Toguarantee accuracy, the output pulse of the control chip istrimmed to within 5% of 250 ns with nominal values of RT andCT.
The outputs of the Oscillator and One–Shot comparatorsare OR’d together to produce the pulse tOS, which drives theFlip–Flop and output drivers. The output pulse (tOS) isinitiated by the Oscillator and terminated by the One–Shotcomparator. With zero–voltage resonant mode converters,the oscillator discharge time should never be set less thanthe one–shot period.
Error AmplifierA fully accessible high performance Error Amplifier is
provided for feedback control of the power supply system.The Error Amplifier is internally compensated and features dcopen loop gain greater than 70 dB, input offset voltage of lessthan 10 mV and a guaranteed minimum gain–bandwidthproduct of 2.5 MHz. The input common mode range extendsfrom 1.5 V to 5.1 V, which includes the reference voltage.
Figure 15. Error Amplifier and Clamp
RVFO
Oscillator Control Current
3.1V
Error Amp Output
Noninverting Input
Inverting InputErrorAmp
IOSC
7
8
6
3
Error AmpCharge
When the Error Amplifier output is coupled to the IOSC pinby RVFO, as illustrated in Figure 15, it provides the OscillatorControl Current, IOSC. The output swing of the Error Amplifieris restricted by a clamp circuit to improve its transientrecovery time.
Output SectionThe pulse(tOS), generated by the Oscillator and One–Shot
timer is gated to dual totem–pole output drives by theSteering Flip–Flop shown in Figure 16. Positive transitions oftOS toggle the Flip–Flop, which causes the pulses to alternatebetween Output A and Output B. The flip–flop is reset by theundervoltage lockout circuit during startup to guarantee thatthe first pulse appears at Output A.
Figure 16. Steering Flip–Flop and Output Drivers
Output A
R
12
13
14
Output B
Power Ground
Q
QT
SteeringFlip–Flop
±
±
PwrGnd
VOE
VOE
PwrGnd
The totem–pole output drivers are ideally suited for drivingpower MOSFETs and are capable of sourcing and sinking1.5 A. Rise and fall times are typically 20 ns when driving a1.0 nF load. High source/sink capability in a totem–poledriver normally increases the risk of high cross conductioncurrent during output transitions. The MC34067 utilizes aunique design that virtually eliminates cross conduction, thuscontrolling the chip power dissipation at high frequencies. Aseparate power ground pin is provided to isolate the sensitiveanalog circuitry from large transient currents.
MC34067 MC33067
9MOTOROLA ANALOG IC DEVICE DATA
Figure 17. Undervoltage Lockout and Reference
8.0V
Vref
15
9
VCC
5Vref
4.2/4.0V
Vref UVLOVCC UVLO
7.0k
50k 7.0k
50k
5.1VReference
Enable /UVLO Adjust
UVLO
PERIPHERAL SUPPORT FUNCTIONS
The MC34067 Resonant Controller provides a number ofsupport and protection functions including a precision voltagereference, undervoltage lockout comparators, soft–startcircuitry, and a fault detector. These peripheral circuitsensure that the power supply can be turned on and off in acontrolled manner and that the system will be quicklydisabled when a fault condition occurs.
Undervoltage Lockout and Voltage ReferenceSeparate undervoltage lockout comparators sense the
input VCC voltage and the regulated reference voltage asillustrated in Figure 17. When VCC increases to the upperthreshold voltage, the VCC UVLO comparator enables theReference Regulator. After the Vref output of the ReferenceRegulator rises to 4.2 V, the Vref UVLO comparator switchesthe UVLO signal to a logic zero state enabling the primarycontrol path. Reducing VCC to the lower threshold voltagecauses the VCC UVLO comparator to disable the ReferenceRegulator. The Vref UVLO comparator then switches theUVLO output to a logic one state disabling the controller.
The Enable/UVLO Adjust pin allows the power supplydesigner to select the VCC UVLO threshold voltages. Whenthis pin is open, the comparator switches the controller on at16 V and off at 9.0 V. If this pin is connected to the VCCterminal, the upper and lower thresholds are reduced to9.0 V and 8.6 V, respectively. Forcing the Enable/UVLOAdjust pin low will pull the VCC UVLO comparator input low(through an internal diode) turning off the controller.
The Reference Regulator provides a precise 5.1 Vreference to internal circuitry and can deliver up to 10 mA toexternal loads. The reference is trimmed to better than 2%initial accuracy and includes active short circuit protection.
Fault DetectorThe high speed Fault Comparator illustrated in Figure 18
can protect a power supply from destruction under faultconditions. The Fault Input pin connects to the input of theFault Comparator. The Fault Comparator output connects tothe output drivers. This direct path reduces the propagation
delay from the Fault Input to the A and B outputs to typically70 ns. The Fault Comparator output is also OR’d with theUVLO output from the Vref UVLO comparator to produce thelogic output labeled “UVLO+Fault”. This signal disables theOscillator and One–Shot by forcing both the COSC and CTcapacitors to be continually charged.
Figure 18. Fault Detector and Soft–Start
CSoft–Start
FaultInput
109.0µA
1.0V
11
6 Ground
Soft–StartBuffer
Ea Clamp
UVLO + FaultUVLO
FaultComparator
Soft–Start CircuitThe Soft–Start circuit shown in Figure 18 forces the
variable frequency Oscillator to start at the maximumfrequency and ramp downward until regulated by thefeedback control loop. The external capacitor at theCSoft–Start terminal is initially discharged by the UVLO+Faultsignal. The low voltage on the capacitor passes through theSoft–Start Buffer to hold the Error Amplifier output low. AfterUVLO+Fault switches to a logic zero, the soft–startcapacitor is charged by a 9.0 µA current source. The bufferallows the Error Amplifier output to follow the soft–startcapacitor until it is regulated by the Error Amplifier inputs. Thesoft–start function is generally applicable to controllersoperating below resonance and can be disabled by simplyopening the CSoft–Start terminal.
MC34067 MC33067
10 MOTOROLA ANALOG IC DEVICE DATA
APPLICATIONS INFORMATION
The MC34067 is specifically designed for zero voltageswitching (ZVS) quasi–resonant converter (QRC)applications. The IC is optimized for double–ended push–pullor bridge type converters operating in continuous conductionmode. Operation of this type of ZVS with resonant propertiesis similar to standard push–pull or bridge circuits in that theenergy is transferred during the transistor on–time. Thedifference is that a series resonant tank is usually introducedto shape the voltage across the power transistor prior toturn–on. The resonant tank in this topology is not used todeliver energy to the output as is the case with zero currentswitch topologies. When the power transistor is enabled thevoltage across it should already be zero, yielding minimalswitching loss. Figure 19 shows a timing diagram for ahalf–bridge ZVS QRC. An application circuit is shown inFigure 20. The circuit built is a dc to dc half–bridge converterdelivering 75 W to the output from a 48 V source.
When building a zero voltage switch (ZVS) circuit, theobjective is to waveshape the power transistor’s voltagewaveform so that the voltage across the transistor is zerowhen the device is turned on. The purpose of the control IC isto allow a resonant tank to waveshape the voltage across thepower transistor while still maintaining regulation. This isaccomplished by maintaining a fixed deadtime and byvarying the frequency; thus the effective duty cycle ischanged.
Primary side resonance can be used with ZVS circuits. Inthe application circuit, the elements that make the resonanttank are the primary leakage inductance of the transformer(LL) and the average output capacitance (COSS) of a powerMOSFET (CR). The desired resonant frequency for theapplication circuit is calculated by Equation 6:
L L 2CR(6)
1=
π2ƒr
In the application circuit, the operating voltage is low andthe value of COSS versus Drain Voltage is known. Becausethe COSS of a MOSFET changes with drain voltage, the valueof the CR is approximated as the average COSS of theMOSFET. For the application circuit the average COSS can becalculated by Equation 7:
measured at (7)CR12
2 * COSS= inV
The MOSFET chosen fixes CR and that LL is adjusted toachieve the desired resonant frequency.
However, the desired resonant frequency is less criticalthan the leakage inductance. Figure 19 shows the primarycurrent ramping toward its peak value during the resonanttransition. During this time, there is circulating currentflowing through the secondary inductance, which effectivelymakes the primary inductance appear shorted. Therefore,the current through the primary will ramp to its peak value ata rate controlled by the leakage inductance and the appliedvoltage. Energy is not transferred to the secondary duringthis stage, because the primary current has not overcome thecirculating current in the secondary. The larger the leakageinductance, the longer it takes for the primary current to slew.The practical effect of this is to lower the duty cycle, thusreducing the operating range.
The maximum duty cycle is controlled by the leakageinductance, not by the MC34067. The One–Shot in theMC34067 only assures that the power switch is turned onunder a zero voltage condition. Adjust the one–shot period sothat the output switch is activated while the primary current isslewing but before the current changes polarity. The resonantstage should then be designed to be as long as the time forthe primary current to go to zero amps.
MC34067 MC33067
11MOTOROLA ANALOG IC DEVICE DATA
Figure 19. Application Timing Diagram
0 A
+ Iprimary
– IprimaryVin/Turns Ratio
Output DiodeVoltage
0 V
1/2 Vin
Vin
Output B
Output A
One–Shot3.6 V
5.1 V
COSC
3.6 V
5.1 V
MC34067 MC33067
12 MOTOROLA ANALOG IC DEVICE DATA
Indu
ctan
ce =
1.8
Hµ
MBR
2535
330p
F
100p
F
V FB
16k
1.6k
330p
F15
00pF
220p
F
0.01
10k1.
1k
2.7k
18k
10
V CC
15 9 1 2 10 3 6 8 7 11
4
Ref
eren
ceR
egul
ator
5 14 13 12 10 470p
F47
0
3.9k
1N58
19T2M
TP33
N10
E
100
1.0
1.0
T31.
0k
1.0k
100
1N58
19 x
4
V in
= 36
– 5
6V
500p
F51
, 0.5
WV F
B
CTL
230
V out
= 5.
0V
L1 =
1.8µ
L2 =
100n
s
Fig
ure
20. A
pplic
atio
n C
ircui
t
Line
Reg
ulat
ion
Load
Reg
ulat
ion
Out
put R
ippl
e
Effi
cien
cy
Test
Con
ditio
nsR
esul
ts
Vin
= 4
0 V
to 5
6 V,
I O=
15 A
Vin
= 4
8 V,
I O=
10
A to
15
A
Vin
O=
48
V, I
= 1
5 A
, f
20 m
V =
switc
h=
1.0
MH
z
Vin
O=
48
V, I
= 1
0 A
, fsw
itch
= 1
.7 M
Hz
Vin
O=
48
V, I
= 1
5 A
, fsw
itch
= 1
.0 M
Hz
±0.1
98%
4.0
mV
=±0
.039
%
25 m
V p–p
83.5
%84
.2%
T1
=P
rimar
y: 1
2 tu
rns
#48
AW
G (
1300
str
ands
litz
wire
)S
econ
dary
: 6 tu
rns
cent
er ta
pped
#48
AW
G (
1300
str
ands
litz
wire
)C
ore:
Phi
lips
3F3
4312
020
412
4B
obbi
n: P
hilip
s 43
22 0
21 3
525
Prim
ary
Leak
age
Indu
ctan
ce =
1.0
Hµ
T2
=A
ll w
indi
ngs:
8 tu
rns
#36
AW
GC
ore:
Phi
lips
3F3
EP
7–3F
3B
obbi
n: P
hilip
s E
P7P
CB
1–6
T3
=C
oilc
raft
D18
70 (
100
turn
s)
L1 =
2 tu
rns
#48
AW
G (
1300
str
ands
litz
wire
)C
ore:
Phi
lips
3F3
EP
10–3
F3
Bob
bin:
Phi
lips
EP
10P
CB
1–8
L2 =
5 tu
rns
#48
AW
G (
1300
str
ands
litz
wire
)C
ore:
0.5
Indu
ctan
ce =
100
nH
″di
amet
er a
ir co
de
Hea
tsin
ks =
AA
VID
Eng
inee
ring
Inc.
533
402B
0255
2 w
ith c
lipM
C34
067–
5803
Insu
lato
rs =
Ber
quis
t Sil–
Pad
150
0
MC34067 MC33067
13MOTOROLA ANALOG IC DEVICE DATA
5.0″
3.875″
(Bottom View)
Figure 21. Printed Circuit Board and Component Layout
(Top View)
MC34067 MC33067
14 MOTOROLA ANALOG IC DEVICE DATA
OUTLINE DIMENSIONS
P SUFFIXPLASTIC PACKAGE
CASE 648–08ISSUE R
DW SUFFIXPLASTIC PACKAGE
CASE 751G–03(SO–16L)ISSUE B
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.5. ROUNDED CORNERS OPTIONAL.
–A–
B
F C
S
HG
D
J
L
M
16 PL
SEATING
1 8
916
K
PLANE–T–
MAM0.25 (0.010) T
DIM MIN MAX MIN MAXMILLIMETERSINCHES
A 0.740 0.770 18.80 19.55B 0.250 0.270 6.35 6.85C 0.145 0.175 3.69 4.44D 0.015 0.021 0.39 0.53F 0.040 0.70 1.02 1.77G 0.100 BSC 2.54 BSCH 0.050 BSC 1.27 BSCJ 0.008 0.015 0.21 0.38K 0.110 0.130 2.80 3.30L 0.295 0.305 7.50 7.74M 0 10 0 10 S 0.020 0.040 0.51 1.01
D
14X
B16X
SEATINGPLANE
SAM0.25 B ST
16 9
81
hX
45
MB
M0.
25
H8X
E
B
A
eTA
1
A
L
C
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.3. DIMENSIONS D AND E DO NOT INLCUDE MOLD
PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.13 TOTAL IN EXCESSOF THE B DIMENSION AT MAXIMUM MATERIALCONDITION.
DIM MIN MAXMILLIMETERS
A 2.35 2.65A1 0.10 0.25B 0.35 0.49C 0.23 0.32D 10.15 10.45E 7.40 7.60e 1.27 BSCH 10.05 10.55h 0.25 0.75L 0.50 0.90 0 7
MC34067 MC33067
15MOTOROLA ANALOG IC DEVICE DATA
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, andspecifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motoroladata sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights ofothers. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or otherapplications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injuryor death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorolaand its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney feesarising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges thatMotorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an EqualOpportunity/Affirmative Action Employer.
MC34067 MC33067
16 MOTOROLA ANALOG IC DEVICE DATA
Mfax is a trademark of Motorola, Inc.How to reach us:USA/EUROPE/Locations Not Listed : Motorola Literature Distribution; JAPAN : Motorola Japan Ltd.; SPD, Strategic Planning Office, 141,P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan. 81–3–5487–8488
Customer Focus Center: 1–800–521–6274
Mfax : [email protected] – TOUCHTONE 1–602–244–6609 ASIA/PACIFIC : Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre,Motorola Fax Back System – US & Canada ONLY 1–800–774–1848 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
– http://sps.motorola.com/mfax/ 852–26668334HOME PAGE: http://motorola.com/sps/
MC34067/D◊