8
Evaluates: MAX32666 MAX32666FTHR Application Platform General Description The MAX32666FTHR board is a rapid development platform to help engineers quickly implement battery opti- mized Bluetooth ® 5 solutions with the MAX32666 Arm ® Cortex ® -M4 processor with FPU. The board also includes the MAX1555 1-Cell Li+ battery charger for battery man- agement. The form factor is a small 0.9in by 2.0in dual- row header footprint that is compatible with breadboards and off-the-shelf peripheral expansion boards. The board also includes a variety of peripherals, such as a micro SD card connector, 6-axis accelerometer/gyro, RGB indica- tor LED, and pushbutton. This platform provides power- optimized flexible for quick proof-of-concepts and early software development to enhance time to market. Ordering Information appears at end of data sheet. Features MAX32666 Microcontroller • Dual Arm Cortex-M4F, 96MHz • 1MB Flash Memory • 560KB SRAM • 3 x 16KB Cache Bluetooth 5 Low Energy Radio • High-Speed USB 2.0 • Three QSPI Master/Slave • Three I 2 C Master/Slave • Three UARTS • SD/SDIO 3.0 • 1-Wire ® Master • 48 GPIO 8 Input, 10-Bit ADC MAX1555 1-Cell Li+ Battery Charger • Charge from USB • On-Chip Thermal Limiting • Charge Status Indicator Expansion Connections • Breadboard Compatible Headers • 10-Pin Cortex Debug Header • Micro USB Connector • Micro SD Card Connector Integrated Peripherals • RGB Indicator LED • User Pushbutton • 6-Axis Accelerometer/Gyro • Bluetooth Surface Mount Antenna SWD/MAXDAP Debug Interface • Drag-and-Drop Programming • SWD Debugger • Virtual UART Console Bluetooth SIG registered trademark. Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. 1-Wire is a registered trademark of Maxim Integrated Products, Inc. 319-100525; Rev 0; 3/20 Click here for production status of specific part numbers.

MAX32666FTHR Application Platform-Evaluates: MAX32666 · 2020. 6. 29. · Capacitor 16pF 50V 5% C0G/NP0 0402 2 D1, D2 Schottky Diode 0V/0.5A SOD-123 1 D3 LED yellow 0603 1 D4 LED

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  • Evaluates: MAX32666MAX32666FTHR Application Platform

    General DescriptionThe MAX32666FTHR board is a rapid development platform to help engineers quickly implement battery opti-mized Bluetooth® 5 solutions with the MAX32666 Arm® Cortex®-M4 processor with FPU. The board also includes the MAX1555 1-Cell Li+ battery charger for battery man-agement. The form factor is a small 0.9in by 2.0in dual-row header footprint that is compatible with breadboards and off-the-shelf peripheral expansion boards. The board also includes a variety of peripherals, such as a micro SD card connector, 6-axis accelerometer/gyro, RGB indica-tor LED, and pushbutton. This platform provides power-optimized flexible for quick proof-of-concepts and early software development to enhance time to market.

    Ordering Information appears at end of data sheet.

    Features ● MAX32666 Microcontroller

    • Dual Arm Cortex-M4F, 96MHz• 1MB Flash Memory• 560KB SRAM• 3 x 16KB Cache• Bluetooth 5 Low Energy Radio• High-Speed USB 2.0• Three QSPI Master/Slave• Three I2C Master/Slave• Three UARTS• SD/SDIO 3.0 • 1-Wire® Master• 48 GPIO• 8 Input, 10-Bit ADC

    ● MAX1555 1-Cell Li+ Battery Charger• Charge from USB• On-Chip Thermal Limiting• Charge Status Indicator

    ● Expansion Connections• Breadboard Compatible Headers• 10-Pin Cortex Debug Header• Micro USB Connector• Micro SD Card Connector

    ● Integrated Peripherals• RGB Indicator LED• User Pushbutton• 6-Axis Accelerometer/Gyro• Bluetooth Surface Mount Antenna

    ● SWD/MAXDAP Debug Interface• Drag-and-Drop Programming• SWD Debugger• Virtual UART Console

    Bluetooth SIG registered trademark.Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.1-Wire is a registered trademark of Maxim Integrated Products, Inc.

    319-100525; Rev 0; 3/20

    Click here for production status of specific part numbers.

    https://www.maximintegrated.com/en/storefront/storefront.html

  • Maxim Integrated │ 2www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    Quick StartApply power to the MAX32666FTHR using the USB cable. The blue LED (D4) begins to blink indicating that the board is transmitting a BLE beacon. Observe the beacon using

    any BLE capable phone or tablet. The beacon appears as MAX32666FTHR Beacon.The source code for the beacon firmware can be found in the Maxim Low Power Arm Micro Toolchain.

    Figure 1. MAX32666FTHR Pinout Diagram

  • Maxim Integrated │ 3www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    Figure 2. MAX32666FTHR Top Side Components

  • Maxim Integrated │ 4www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    Figure 3. MAX32666FTHR Bottom Side Components

  • Maxim Integrated │ 5www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    Battery ChargerThe MAX1555 charges a single-cell Li+ battery from a USB source. When the MAX1555 thermal limits are reached, the charger does not shut down, but simply reduces charging current by 17mA/°C above a die tem-perature of +110°C. The USB charge current is set to 100mA (max). This allows charging from both powered

    and unpowered USB hubs with no port communication required. Refer to the MAX1551/MAX1555 data sheet and the data sheet for your battery to ensure compatibility.

    Expansion HeadersNote: All port pins labeled Pn_n are capable of GPIO or PWM with timer or pulse train engine.

    Table 1. JH3 Pinout

    Table 2. JH4 Pinout

    PIN NAME DESCRIPTION1 GND Ground2 P0_9 UART0 Tx3 P0_10 UART0 Rx4 P0_26 QSPI2 MISO5 P0_25 QSPI2 MOSI6 P0_27 QSPI2 SCK7 AIN_5 ADC Analog Input. Alternatively, AIN2N or P0_218 AIN_4 ADC Analog Input. Alternatively, AIN2P or P0_209 AIN_3 ADC Analog Input. Alternatively, AIN1N or P0_1910 AIN_2 ADC Analog Input. Alternatively, AIN1P or P0_1811 AIN_1 ADC Analog Input. Alternatively, AIN0N or P0_1712 AIN_0 ADC Analog Input. Alternatively, AIN0P or P0_1613 GND Ground14 NC No Connection15 3V3 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers16 RSTN Master Reset Signal

    PIN NAME DESCRIPTION

    1 SYS SYS switched connection to the Battery. This is the primary system power supply and automatically switches between the battery voltage and the USB supply when available.2 PWREN Power Enable. This is connected to the ON pin of the MAX4995 LDO. It turns off the LDO if shorted to GND.

    3 VBUSUSB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be used as an input to power the board, but this should only be done when not using the USB connector since there is no circuitry to prevent current from flowing back into the USB connector.

    4 P0_12 1-Wire master signal5 P0_3 SPIXF SCK6 P0_5 SPIXF SDIO37 P0_4 SPIXF SDIO28 P0_2 SPIXF SDIO1/MISO9 P0_1 SPIXF SDIO0/MOSI10 P0_0 SPIXF SS011 P0_6 I2CM0 SCL. Pulled to MAX32666 VDDIOH, connected to BMI160.12 P0_7 I2CM0 SDA. Pulled to MAX32666 VDDIOH, connected to BMI160.

  • Maxim Integrated │ 6www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    #Denotes RoHS compliance.

    PART TYPEMAX32666FTHR# Application Platform

    QTY SCHEMATIC REFERENCE DESCRIPTION

    1 U1 Arm Cortex-M4F, MAX326661 ANT1 Antenna 2.4GHz chip

    5 C1, C10, C11, C12, C13 Capacitor 22µF 6.3V 20% X5R 0603

    17

    C2, C3, C4, C5, C6, C7,

    C9, C14, C15, C16, C17, C18, C20, C24, C26,

    C27, C28

    Capacitor 1µF 6.3V X5R 0402

    1 C8 Capacitor 4700pF 16V 10% X7R 0201

    7C19, C21, C22, C23, C25, C32,

    C33

    Capacitor 0.1µF 6.3V 10% X5R 0201

    2 C29, C34 Capacitor 1.5pF 50V ±0.1pF C0G/NP0 0402

    2 C30, C31 Capacitor 16pF 50V 5% C0G/NP0 0402

    2 D1, D2 Schottky Diode 0V/0.5A SOD-1231 D3 LED yellow 06031 D4 LED RGB Clear 04041 J1 Header vertical 2 position 1.27mm1 J2 Connector micro USB B right angle

    1 J3 Connector microSD PUSH-PULL right angle

    1 JH1 Header 2 position 2mm right angle1 JH2 Header 10 position dual 0.05mm1 JH3 Header 0.100 16 position1 JH4 Header 0.100 12 position

    QTY SCHEMATIC REFERENCE DESCRIPTION

    1 L1 Ferrite bead 120 0805 1LN1 L2 Inductor 2.2µH 1A 150m 08051 Q1 MOSFET P-CH 20V 0.2A1 R1 Resistor 93.1kΩ 1% 1/10W 0402

    6 R2, R14, R20, R21, R23, R24 Resistor 100kΩ 1% 1/10W 0402

    1 R3 Resistor 215kΩ 1% 1/10W 04021 R4 Resistor 330kΩ 1% 1/10W 0402

    7 R5, R6, R7, R8, R9, R10, R11 Resistor 10kΩ 1% 1/16W 0402

    1 R12 Resistor 10kΩ 1% 1/10W 04022 R13, R16 Resistor 2.7kΩ 1% 1/10W 04021 R15 Resistor 499kΩ 1% 1/10W 04021 R17 Resistor 1.4kΩ 1% 1/10W 04022 R18, R19 Resistor 4.7kΩ 1/10W 1% 04021 R22 Resistor 1kΩ 1/10W 1% 04021 R25 Resistor 0.0 1/10W 0402

    1 U2 2 Channel ESD protection, MAX13202EALT

    1 U3 Current limit switch, MAX4995AAUT

    1 U4 1-Cell Li+ battery charger, MAX1555EZK

    2 U5, U6 Linear regulator 3.3V 150mA, MAX8841ELT33

    1 U7 1-Wire EEPROM 2Kib, DS28EL22Q1 U8 Inertial measurement unit, BMI1601 Y1 Crystal 32.768kHz 6.0pF1 Y2 Crystal 32.00 MHz 12pF

    Ordering Information

    Component List

  • Maxim Integrated │ 7www.maximintegrated.com

    Evaluates: MAX32666MAX32666FTHR Application Platform

    MAX32666FTHR Application Platform Schematic90

    ohm

    diff

    eren

    tial t

    race

    s

    VREG

    O_D

    VTXO

    UTVR

    XOUT

    VREG

    O_A

    VREG

    O_B

    VREG

    O_C

    VREG

    O_D

    VREG

    O_A

    VREG

    O_A

    LDO

    _3V3

    VREG

    O_C

    VREG

    O_B

    VRXO

    UT

    VTXO

    UTVR

    XOUT

    VRXO

    UTVR

    XOUT

    VDD

    B

    VDD

    B

    LDO

    _3V3

    LDO

    _3V3

    LDO

    _3V3

    LDO

    _3V3

    LDO

    _3V3

    VREG

    O_A

    VREG

    O_A

    VREG

    O_A

    VREG

    O_A

    VREG

    O_A

    VREG

    O_A

    VREG

    O_A

    LDO

    _3V3

    VBU

    S

    VBU

    S

    SWIT

    CH

    ED_P

    WR

    SWIT

    CH

    ED_P

    WR

    LDO

    _3V3

    LDO

    _3V3

    DM

    DP

    DMDP

    P1_2

    P1_4

    P1_5

    P1_0

    P1_1

    P1_3

    P1_7

    P1_2

    P1_4

    P1_5

    P1_0

    P1_1

    P1_3

    P1_7

    P0_1

    2

    RST

    N

    SWD

    IOSW

    CLK

    SWD

    IOSW

    CLK

    P1_1

    3P1

    _12

    RST

    N

    P0_0

    P0_1

    P0_1

    P0_2

    P0_2

    P0_3

    P0_3

    P0_4

    P0_5

    P0_4

    P0_5

    P0_6

    P0_7

    P0_6

    P0_7

    P1_1

    1

    RST

    N

    P1_1

    2P1

    _13

    P1_1

    1

    P0_1

    6P0

    _17

    P0_1

    8P0

    _19

    P0_1

    6P0

    _17

    P0_1

    8P0

    _19

    P0_2

    9P0

    _30

    P0_3

    1

    P0_2

    9

    P0_3

    0

    P0_3

    1

    P0_1

    2

    P0_7

    P0_6

    P0_2

    0P0

    _21

    P0_2

    0P0

    _21

    P1_1

    0

    P1_1

    0

    PWR

    _EN

    ABLE

    PWR

    _EN

    ABLE

    RST

    N

    P0_0

    P0_1

    0P0

    _9

    P0_1

    0P0

    _9

    P0_1

    2P0

    _13

    P0_1

    3

    P0_2

    5P0

    _26

    P0_2

    7

    P0_2

    5P0

    _26

    P0_2

    7

    R1

    93.1

    K04

    02

    C24

    1uF

    0402

    MAX

    3266

    6_12

    1P_B

    GA

    U1

    121P

    BG

    A

    P0.0

    /SPI

    XF_S

    S0/U

    ART2

    _CTS

    /TM

    R0

    K6

    P0.1

    /SPI

    XF_M

    OSI

    /SD

    IO0/

    UAR

    T2_T

    X/TM

    R1

    K7

    P0.2

    /SPI

    XF_M

    ISO

    /SD

    IO1/

    UAR

    T2_R

    X/TM

    R2

    J10

    P0.3

    /SPI

    XF_S

    CK/

    UAR

    T2_R

    TS/T

    MR

    3J9

    P0.4

    /SPI

    XF_S

    DIO

    2/O

    WM

    _IO

    /TM

    R4

    K9

    P0.5

    /SPI

    XF_S

    DIO

    3/O

    WM

    _PE/

    TMR

    5L9

    P0.6

    /I2C

    0_SC

    L/SW

    DIO

    2/TM

    R0

    L8

    P0.7

    /I2C

    0_SD

    A/SW

    CLK

    2/TM

    R1

    K8

    P0.8

    /SPI

    XR_S

    S0/Q

    SPI0

    _SS0

    /UAR

    T0_C

    TS/T

    MR

    2E7

    P0.9

    /SPI

    XR_M

    OSI

    /SD

    IO0/

    QSP

    I0_M

    OSI

    /SD

    IO0/

    UAR

    T0_T

    X/TM

    R3

    D7

    P0.1

    0/SP

    IXR

    _MIS

    O/S

    DIO

    1/Q

    SPI0

    _MIS

    O/S

    DIO

    1/U

    ART0

    _RX/

    TMR

    4G

    6

    P0.1

    1/SP

    IXR

    _SC

    K/Q

    SPI0

    _SC

    K/U

    ART0

    _RTS

    /TM

    R5

    F6

    P0.1

    2/SP

    IXR

    _SD

    IO2/

    QSP

    I0_S

    DIO

    2/O

    WM

    _IO

    /TM

    R0

    G5

    P0.1

    3/SP

    IXR

    _SD

    IO3/

    QSP

    I0_S

    DIO

    3/O

    WM

    _PE/

    TMR

    1H

    5

    P0.1

    4/I2

    C1_

    SCL/

    QSP

    I0_S

    S1/B

    LE_A

    NT_

    CTR

    L/TM

    R2

    F5

    P0.1

    5/I2

    C1_

    SDA/

    QSP

    I0_S

    S2/B

    LE_A

    NT_

    CTR

    L/TM

    R3

    D6

    P0.1

    6/AI

    N0/

    AIN

    0P/Q

    SPI1

    _SS0

    /OW

    M_I

    O/T

    MR

    4K1

    1

    P0.1

    7/AI

    N1/

    AIN

    0N/Q

    SPI1

    _MO

    SI/S

    DIO

    0/O

    WM

    _PE/

    TMR

    5H

    9

    P0.1

    8/AI

    N2/

    AIN

    1P/Q

    SPI1

    _MIS

    O/S

    DIO

    1/TM

    R0/

    PDO

    WN

    G9

    P0.1

    9/AI

    N3/

    AIN

    1N/Q

    SPI1

    _SC

    K/TM

    R1/

    SQW

    OU

    TJ1

    1

    P0.2

    0/AI

    N4/

    AIN

    2P/Q

    SPI1

    _SD

    IO2/

    UAR

    T1_R

    X/TM

    R2

    H10

    P0.2

    1/AI

    N5/

    AIN

    2N/Q

    SPI1

    _SD

    IO3/

    UAR

    T1_T

    X/TM

    R3

    E8

    P0.2

    2/AI

    N6/

    AIN

    3P/Q

    SPI1

    _SS1

    /UAR

    T1_C

    TS/T

    MR

    4E9

    P0.2

    3/AI

    N7/

    AIN

    3N/Q

    SPI1

    _SS2

    /UAR

    T1_R

    TS/T

    MR

    5D

    8

    P0.2

    4/PC

    M_L

    RC

    LK/Q

    SPI2

    _SS0

    /OW

    M_I

    O/T

    MR

    0G

    8

    P0.2

    5/PC

    M_D

    OU

    T/Q

    SPI2

    _MO

    SI/S

    DIO

    0/O

    WM

    _PE/

    TMR

    1H

    8

    P0.2

    6/PC

    M_D

    IN/Q

    SPI2

    _MIS

    O/S

    DIO

    1/TM

    R2/

    PDO

    WN

    J8

    P0.2

    7/PC

    M_B

    CLK

    /QSP

    I2_S

    CK/

    TMR

    3/SQ

    WO

    UT

    H7

    P0.2

    8/PD

    M_D

    ATA2

    /QSP

    I2_S

    DIO

    2/U

    ART2

    _RX/

    TMR

    4J7

    P0.2

    9/PD

    M_D

    ATA3

    /QSP

    I2_S

    DIO

    3/U

    ART2

    _TX/

    TMR

    5H

    6

    P0.3

    0/PD

    M_R

    X_C

    LK/Q

    SPI2

    _SS1

    /UAR

    T2_C

    TS/T

    MR

    0J6

    P0.3

    1/PD

    M_M

    CLK

    /QSP

    I2_S

    S2/U

    ART2

    _RTS

    /TM

    R1

    K5

    P1.1

    /SD

    HC

    _CM

    D/S

    DM

    A_TD

    O/P

    T1K3

    P1.2

    /SD

    HC

    _DAT

    0/SD

    MA_

    TDI/P

    T2L4

    P1.3

    /SD

    HC

    _CLK

    /SD

    MA_

    TCK/

    PT3

    K4

    P1.4

    /SD

    HC

    _DAT

    1/U

    ART0

    _RX/

    PT4

    J5

    P1.5

    /SD

    HC

    _DAT

    2/U

    ART0

    _TX/

    PT5

    J4

    P1.6

    /SD

    HC

    _WP/

    UAR

    T0_C

    TS/P

    T6J3

    P1.7

    /SD

    HC

    _CD

    N/U

    ART0

    _RTS

    /PT7

    J2

    P1.8

    /QSP

    I0_S

    S0/P

    T8H

    4

    P1.9

    /QSP

    I0_M

    OSI

    /PT9

    H1

    P1.1

    0/Q

    SPI0

    _MIS

    O/P

    T10

    H3

    P1.1

    1/Q

    SPI0

    _SC

    K/PT

    11H

    2

    P1.1

    2/Q

    SPI0

    _SD

    IO2/

    UAR

    T1_R

    X/PT

    12E5

    P1.1

    3/Q

    SPI0

    _SD

    IO3/

    UAR

    T1_T

    X/PT

    13E6

    P1.1

    4/I2

    C2_

    SCL/

    UAR

    T1_C

    TS/P

    T14/

    JTAG

    TD

    IG

    4

    P1.1

    5/I2

    C2_

    SDA/

    UAR

    T1_R

    TS/P

    T15/

    JTAG

    TD

    OD

    5

    DM

    F11

    DP

    G11

    RST

    NC

    5

    SWD

    IOC

    6

    SWC

    LKG

    7

    32KI

    NF1

    32KO

    UT

    F2

    HFX

    INA4

    HFX

    OU

    TB4

    P1.0

    /SD

    HC

    _DAT

    3/SD

    MA_

    TMS/

    PT0

    K2

    VDD

    BG

    10

    VSSB

    F10

    VSS

    F8

    VSS

    F9

    VSSA

    B7VD

    DA

    C8

    VDD

    IOK1

    0

    VDD

    IOL1

    1

    VDD

    IOH

    L10

    VDD

    IOH

    D9

    VCO

    REA

    L6VC

    OR

    EAD

    10

    VCO

    REB

    L7

    VCO

    REB

    D11

    VREG

    IC

    11

    VSSP

    WR

    B10

    LXA

    B11

    LXB

    A10

    VBST

    C10

    VREG

    O_A

    B9

    VREG

    0_B

    A9

    VREG

    0_C

    A8

    VREG

    0_D

    B8

    VSSA

    _BT5

    B3

    VDD

    IOC

    9

    VSS

    F7

    VSS

    G3

    VSS

    L5

    VSS

    A7

    VDD

    IOL3

    VSS

    G2

    VDD

    IOH

    L2

    VSS

    G1

    VCO

    REA

    K1

    VCO

    REB

    J1

    VRXI

    NA5

    VRXO

    UT

    B5

    VTXI

    NA6

    VTXO

    UT

    B6

    VDD

    _BT1

    D3

    VDD

    _BT2

    C3

    VDD

    _BT3

    E1

    VDD

    _BT4

    D1

    VDD

    _BT5

    A3

    VSSA

    _BT0

    D4

    VSSA

    _BT1

    C2

    VSSA

    _BT2

    C4

    VSSA

    _BT3

    E2

    VSSA

    _BT4

    C1

    ANT

    B2

    VSSP

    WR

    A11

    VSS

    E10

    VSS

    E11

    VSS

    H11

    VSSA

    _BT1

    B1

    VDD

    _BT1

    D2

    VSSA

    _BT0

    E3

    VSSA

    _BT0

    E4

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  • Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time.

    Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2020 Maxim Integrated Products, Inc. │ 8

    Evaluates: MAX32666MAX32666FTHR Application Platform

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    0 3/20 Initial release —

    Revision History

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