36
Federal Federal University University of of Santa Santa Catarina Catarina - - UFSC UFSC Post Post - - graduation in Electrical Engineering graduation in Electrical Engineering - - PPGEEL PPGEEL Study and Design of a Voltage Line Conditioner Study and Design of a Voltage Line Conditioner with Serial Compensation and Fed by Load Side with Serial Compensation and Fed by Load Side Master Thesis Presentation Master Thesis Presentation : : July, 2007 Power Electronics Institute Power Electronics Institute - - INEP INEP Eng. MSc Thiago Batista Soeiro

Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

  • Upload
    others

  • View
    1

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Federal Federal UniversityUniversity ofof Santa Santa CatarinaCatarina -- UFSCUFSCPostPost--graduation in Electrical Engineering graduation in Electrical Engineering -- PPGEELPPGEEL

Study and Design of a Voltage Line Conditioner Study and Design of a Voltage Line Conditioner with Serial Compensation and Fed by Load Sidewith Serial Compensation and Fed by Load Side

Master Thesis PresentationMaster Thesis Presentation::

July, 2007

Power Electronics Institute Power Electronics Institute -- INEPINEP

Eng. MSc Thiago Batista Soeiro

Page 2: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Presentation ContentsPresentation Contents

•• IntroductionIntroduction

•• Voltage Line Conditioner: Power StageVoltage Line Conditioner: Power Stage

•• Voltage Line Conditioner: Control StageVoltage Line Conditioner: Control Stage

•• Experimental ResultsExperimental Results

•• ConclusionsConclusions

Page 3: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

MotivationsMotivations

22-- The existence of standards limiting the harmonic pollution in The existence of standards limiting the harmonic pollution in electric power systemelectric power system;;

33-- To aid the national industries in the development of highTo aid the national industries in the development of high--quality quality voltage sources.voltage sources.

11-- The increase of voltageThe increase of voltage--sensitive equipments results in greater sensitive equipments results in greater demand for highdemand for high--quality voltage sources;quality voltage sources;

Page 4: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

33-- To evaluate the performance of the topology proposed under To evaluate the performance of the topology proposed under unbalanced and distorted system voltagesunbalanced and distorted system voltages;;

Main ObjectivesMain Objectives

44-- To study and formulate control techniques to provide the To study and formulate control techniques to provide the conditioning of the load voltage conditioning of the load voltage

22-- To establish general voltage compensation methods to be applied To establish general voltage compensation methods to be applied in voltage line conditionersin voltage line conditioners;;

55-- To develop and test a voltage line conditioner prototype to To develop and test a voltage line conditioner prototype to validate the analysis.validate the analysis.

11-- To study concepts and topologies of voltage line conditionersTo study concepts and topologies of voltage line conditioners;;

Page 5: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

1S

2S

3S

4S

5S

6S

7S

8S

oL

oC

a b

+−

riv+ −

dsv

Inverter

Rectifier

•• TheThe Principle of Serial Voltage Principle of Serial Voltage CompensationCompensation, applied in Stabilizers in , applied in Stabilizers in 1950 by 1950 by PatchettPatchett

The Studied Topology was based on two The Studied Topology was based on two concepts:concepts:

• Indirect acIndirect ac--ac Converter with ac Converter with Direct link presented by BongDirect link presented by Bong--

Hwan Kwon in 2002Hwan Kwon in 2002

riv

rv

dpv

Important ConceptsImportant Concepts

iv

oi

+− riv

+

( ), ,o i ov v i d

+

LZ d

Page 6: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

The Voltage Line Conditioner Operation Principle:The Voltage Line Conditioner Operation Principle:

Important ConceptsImportant Concepts

= +i F Hv v v

= +o F Hi i i

+− riv

ov

′iv dsv

+− = +ds dsF dsHv v v

ov

′iv

+ =

SZ

Page 7: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Voltage Line ConditionerVoltage Line ConditionerGeneralization of Serial Voltage Conditioners:Generalization of Serial Voltage Conditioners:

•• The Serial Voltage CompensationThe Serial Voltage Compensation::

Car

ga

ov+

−iv+

vΔ +−

ConversorCA-CA

Inversor

Conversorca ca−

Direct CompensationDirect Compensation

vΔ +−

Car

ga

ov+

−iv+

− Conversorca ca−

TransfTransf. + Filter. + Filter

Page 8: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

vΔ +−

Car

gaov+

−iv+

− ConversorCA-CA

Inversor

Conversorca ca−

vΔ +−

Car

ga

ov+

−iv+

− ConversorCA-CA

Inversor

Conversorca ca−

TransfTransf. + . + FilterFilter

Filter by the load sideFilter by the load side

Voltage Line ConditionerVoltage Line Conditioner

Page 9: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• Feeding the Feeding the acac--ac Converter:ac Converter:

Car

gaov+

−iv+

ConversorCA-CA

Inversor

Compensadorsérie

Car

ga

ov+

−iv+

ConversorCA-CA

Inversor

Compensadorsérie

ByBy thethe LineLine SideSide

ByBy thethe LoadLoad SideSide

Voltage Line ConditionerVoltage Line Conditioner

Page 10: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Car

ga

ov+

−iv+

ConversorCA-CA

Inversor

Compensadorsérie

auxv+ −

Auxiliary SourceAuxiliary Source

Voltage Line ConditionerVoltage Line Conditioner

Page 11: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• acac--ac Converter Isolation:ac Converter Isolation:

By the By the Rectifier sideRectifier side

By the By the inverter sideinverter side

+

ov

+

+− dsv

iv

oLoC

1T +

−fv

Converterac ac−

Inverter

+

ov

+

+− dsv

iv

oLoC

1T+

−fv

ConversorCA-CA

Retificador Inversor

Converterac ac−

Inverter

Voltage Line ConditionerVoltage Line Conditioner

Page 12: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• Conditioner Topologies:Conditioner Topologies:

Voltage Line ConditionerVoltage Line Conditioner

Fed by the line sideFed by the line side

+

ov

+

+− dsv

iv

oLoC

1T +

−fv

Converterac ac−

Inverter

ov

+

+− dsv

oL

oCfv

ConversorCA-CA

RetificadorInversor

Converterac ac−

Inverter

1T+

iv

+

ov

+

+− dsv

iv

oLoC

1T+

−fv

ConversorCA-CA

Retificador Inversor

Converterac ac−

Inverter

ov

+

+− dsv

oL

oCfv

ConversorCA-CA

RetificadorInverso r

Converterac ac−

Inverter

1T+

iv

Page 13: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• Conditioner Topologies:Conditioner Topologies:

Fed by the load sideFed by the load side

Voltage Line ConditionerVoltage Line Conditioner

+

ov

+

+− dsv

iv

oLoC

ConversorCA-CA

1T

fvRetificadorInversor

Converterac ac−

Inverter

+

ov

+

+− dsv

iv

oL

fv

ConversorCA-CA

RetificadorInversor

Converterac ac−

Inverter

1T

oC

+

ov

+

+− dsv

iv

oLoC

1T

fv

ConversorCA-CA

RetificadorInversor

Converterac ac−

Inverter

+

ov

+

+− dsv

iv

oL

oCfv

ConversorCA-CA

RetificadorInversor

Converterac ac−

Inverter

1T

Page 14: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• Conditioner Topologies:Conditioner Topologies:

Fed by an auxiliary sourceFed by an auxiliary source

Voltage Line ConditionerVoltage Line Conditioner

+

ov

+

+− dsv

iv

oLoC

ConversorCA-CA

1T +

−fv

Retificador Inversor

Converterac ac−

Inverter

ov

+

+− dsv

oL

oCfv

ConversorCA-CA

RetificadorInversor

Converterac ac−

Inverter

1T+

iv

+

ov

+

+− dsv

iv

oLoC

1T+

−fv

ConversorCA-CA

Retificador Inversor

Converterac ac−

Inverter

ov

+

+− dsv

oL

oC

ConversorCA-CA

RetificadorInverso r

Converterac ac−

Inverter

1T+

iv fv

Page 15: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Voltage Line Conditioner:Voltage Line Conditioner:Power StagePower Stage

1S

iv

+

−2S

3S

4S6S

7S

8SoC

1T

a b

+− dsv

oL

S dsL L+

5S

rv

Inverter Rectifier

Loiov

+

oi

Page 16: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Modulation StrategyModulation Strategy

0

2rT rT

t

0 ( )v t

( )rv t

1,4 ( )S t

2,3 ( )S t

Bidirectional Rectifier (S1 - S4)

PWM Inverter (S5 - S8)

Page 17: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Main WaveformsMain Waveforms

3 Level PWM Modulation

Rectifier

Inverter

iv

Adding voltage Subtracting voltage

0 π 2π 0 π 2π

1,4gv

2,3gv

rv

cv

abv

dsv

oviv

2sT

d ⋅2sT0

t t

ovRectifier input voltage Rectifier input voltage

Page 18: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Main Analytical ExpressionMain Analytical Expression

( )( )

Ng tN d t

=−

( ) ( )( )0 12Leq

s eq

V d t d tI

N f L⋅ ⋅ −

Δ =⋅ ⋅ ⋅

( )( ) ( ) ( )( )( )( ) ( )

2 116 4 1

Leq oCo

S o S o Leq

I N d t I d t d tV

N f C f C I N d t NΔ ⋅ − ⋅ ⋅ −

Δ = +⋅ ⋅ ⋅ ⋅ ⋅ ⋅Δ ⋅ − ⋅ −

Converter’s Static Gain

Voltage ripple

Transformation ratio

Current ripple

( )1N d t= ⋅Δ

Page 19: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Voltage Line Conditioner: Voltage Line Conditioner: Control StageControl Stage

0( )v t()iv t

1S 2S 3S 4S

_o refv5S 6S 7S 8S

+−SrrvSrrv vC (s)

Sensorde

Tensão

Red

e de E

nerg

ia

SR SL dPL

Car

ga

Compensador de TensãoModulador

Modulador

5S

6S

7S

8S

1S

2S

3S

4S0C

Comando

Page 20: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Mathematical ModelMathematical Model

•• Small signals model:Small signals model:• G(s), Transfer Function of output voltage vs. duty cycle;

( )

• F(s), Transfer Function of output voltage vs. input voltage .

( ) ( )

( )

2

222 2

eq oo

Lo

eqeq o

L

s L N VV N D

Z N DvG s

s L Nd s L C N N DZ

− ⋅ ⋅ ⋅+ ⋅ −

⋅ −= =

⋅ ⋅⋅ ⋅ ⋅ + + −

( ) ( )

( )2

22 2

o

eqieq o

L

N N DvF s

s L Nv s L C N N DZ

⋅ −= =

⋅ ⋅⋅ ⋅ ⋅ + + −

( ) ( ) ( ) ( ) ( )0 iv s F s v s G s d s= ⋅ + ⋅

Page 21: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Conditioner Analytical StudyConditioner Analytical Study

•• Load Influence over circuitLoad Influence over circuit’’s dynamic responses dynamic response::

Page 22: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

There are some strategies to damp the voltage oscillation or compensate the absence of load:

•• To damp voltage oscillation with virtual resistance control straTo damp voltage oscillation with virtual resistance control strategy;tegy;

•• To insert a control loop to compensate abrupt voltage drop;To insert a control loop to compensate abrupt voltage drop;

• To insert input filter topologiesTo insert input filter topologies;;

Conditioner Analytical StudyConditioner Analytical Study

Page 23: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Virtual ResistanceVirtual Resistance

Line conditioner Block Diagram:

0

1sC

+

+ −

+

+

iv+

d 0vCoi

0i

LeqiˆLeqvoV

N1

eqs L⋅

N DN−

DN

( )o

L

VZ N D⋅ −

VirtualR

+ PWMG( )Vc s

0

Virtual

PWM

N RV G⋅⋅

d

Page 24: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Converter ControlConverter ControlT

a

6D

5D

b7D

8D 4D

3D1D

D

0( )v t()iv t

1S 2S 3S 4S

_o refv5S 6S 7S 8S

+−SrrvSrrv

2

vC (s)

Sensorde

Tensão

Red

e de E

nerg

ia

SR SL dPL

Car

ga

Compensador de TensãoModulador

Modulador

5S

6S

7S

8S

1S

2S

3S

4S0C

ComandoSensorde

Corrente

++

cI ( )s+−

+−

RvC ( )s

Compensador de Rvirtual

Page 25: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Experimental ResultsExperimental Results

[ ]220 20% ViV = ±

[ ]220 VoV =

[ ]10 kVAoS =

[ ]60 HzrF =

[ ]20 kHzSF =

4N =

[ ]340 HeqL μ≈

[ ]20 FoC μ=

PrototypePrototype

Page 26: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Control SignalsControl Signals

Page 27: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

acac--ac converter voltage signalsac converter voltage signalsRectifier Inverter

Page 28: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Operation with Load TransientOperation with Load TransientWithout Virtual Resistance Control Loop With Virtual Resistance Control Loop

50% Load Transient

Page 29: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• +20% transient in input voltage +20% transient in input voltage Vi(tVi(t):):

Operation with input TransientOperation with input Transient

Page 30: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• --20% transient in input voltage 20% transient in input voltage Vi(tVi(t):):.

Operation with input TransientOperation with input Transient

Page 31: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

•• THD correctionTHD correction::

Operation with input TransientOperation with input Transient

Page 32: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

Nonlinear load OperationNonlinear load Operation

ov

+

100 Hμ

10mF

10ΩThe greatest requirements in terms of dynamic

response.

Page 33: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

• Experimental Results:

• The control strategy was efficient with instantaneous correction of the output voltage when faced with input voltage and load variations;

ConclusionsConclusions

• Capability of supplying an output voltage with low harmonic distortion;

• When presented with the worst case scenario, a nonlinear load, the conditioner studied was able to correct the THD to fit the required standards of 5% (IEEE519/92);

Page 34: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

ConclusionsConclusions

• A generalization of serial line conditioners was presented through 12 possible topologies;

• A control strategy was introduced to efficiently stabilize the output voltage of the studied structure;

.

• Contributions:

• This work focused on the study of a serial line conditioner with an ac-ac indirect converter with direct link, fed by load side. The capacitive filter was positioned on the load side to make use of the line impedance as a multi-functional filter;

Page 35: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

ConclusionsConclusions

• Study of three-phase voltage line conditioners:

• Future works:

- Space vector Modulation;

- Digital Control and Nonlinear Control Techniques;

- Study of Rectifier control techniques;

- Study of combined series and shunt active power filters for simultaneous compensation of voltage and current;

- Hybrid and Matrix Converters;

Page 36: Master Thesis Presentation: Study and Design of a Voltage ... › Bases_Dados › ... · Master Thesis Presentation: July, 2007 Power Electronics Institute - INEP Eng. MSc Thiago

The EndThe End