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Marr College Higher Computing Slide 1
Part 2: Computer Structure – 6 hours
Higher Computing: COMPUTER SYSTEMS
Marr College Higher Computing Slide 2
The five box diagram represents the basic components of a computer system.
It represents input devices, processor, main memory, output devices and backing storage.
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reFive box diagram
Input Output
Processor
Main Memory
BackingStore
INT 2
Marr College Higher Computing Slide 3
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reThe purpose of the processor
The processor – also known as the central processing unit (CPU) - is the ‘brain’ or ‘engine’ of the computer system.
Its purpose is to interpret instructions and process data contained in computer programs.
INT 2
Marr College Higher Computing Slide 4
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reParts of a processor
The control unit has a timer to that sends signals to fetch, decode and execute program instructions.
The arithmetic and logic unit performs arithmetic calculations e.g. / * + - and logic operations e.g. AND, OR etc.
The registers are temporary storage areas that hold data being processed; instructions being executed; and addresses to be accessed.
The CPU consists of three main parts:
Control Unit
ALU
Registers
RAM
INT 2
Marr College Higher Computing Slide 5
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reThe purpose of the ALU
The arithmetic and logic unit is a digital circuit that performs arithmetic and logical operations.
The ALU can perform many operations including:
Integer arithmetic e.g. addition and subtraction
Bitwise logic operations e.g. AND, OR, NOT, XOR
Control Unit
ALUInput (operand)
Output (result)
Operation (opcode)
* The inputs to the ALU are the data to be operated on (called operands)
* and a code from the control unit indicating which operation to perform.
* Its output is the result of the computation.
Marr College Higher Computing Slide 6
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reThe purpose of the Control Unit
The control unit is the circuitry that controls the flow of data through the processor, and coordinates the activities of the other units within it.
It can be described as the "brain within the brain", as it controls what happens inside the processor, which in turn controls the rest of the PC.
It performs the tasks of fetching, decoding, managing execution and then storing results and has a timer to synchronise these events.
Marr College Higher Computing Slide 7
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reThe Address Bus
• Carries address information from the CPU to main memory and any other attached devices
• It is uni-directional i.e. one-way only
• The width (i.e. the number of wires) determines the number of memory locations the CPU can address
A 32 bit address bus has 32 parallel wires each switched on (1) or off (0) that can address locations starting from:
0000 0000 0000 0000 0000 0000 0000 0000 (decimal 0)
up to and including address:
1111 1111 1111 1111 1111 1111 1111 1111 (decimal 232 –1)
making a total of 232 addresses
A 32 bit address bus has 32 parallel wires each switched on (1) or off (0) that can address locations starting from:
0000 0000 0000 0000 0000 0000 0000 0000 (decimal 0)
up to and including address:
1111 1111 1111 1111 1111 1111 1111 1111 (decimal 232 –1)
making a total of 232 addresses
Every time a wire is added to the width of the address bus, the address range doubles
Marr College Higher Computing Slide 8
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reThe Data Bus
• Carries data to and from the CPU, main memory and any other devices attached
• It is bi-directional i.e. two-way
• The number of wires determines the quantity of data that the bus can carry so increasing the number of wires in the data bus increases the quantity of data it can carry
• A typical 32-bit data bus can carry 32-bits of data or instructions at a time
In Higher Computing we make the assumption that:
The size (number of wires) on the data bus determines the size of the memory locations in RAM e.g.
A 32 bit data bus means each memory location in RAM stores 32 bits (i.e. 4 bytes equivalent)
In Higher Computing we make the assumption that:
The size (number of wires) on the data bus determines the size of the memory locations in RAM e.g.
A 32 bit data bus means each memory location in RAM stores 32 bits (i.e. 4 bytes equivalent)
Marr College Higher Computing Slide 9
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reThe Control Bus - control lines
Signals are sent out and received on the control bus.
The control bus is not really a ‘bus’ as it does not transfer data or addresses.
It is made up of discrete wires each with a specific function:
• Read and Write signals are initiated to fetch – execute instructions in memory
• Clock line carries a series of clock pulses at a constant rate to keep the CPU in step (clock rate measured megahertz or gigahertz)
• Reset halts the execution of the stored program. Internal registers are cleared and the machine reboots.
• Interrupts are signals usually from I/O devices that halt program execution temporarily. The CPU may ignore them e.g. printer out of paper
• Non-maskable Interrupts cannot be ignored e.g. power failure
Marr College Higher Computing Slide 10
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reThe buses: Address, Data and Control
Control UnitArithmetic and Logic Unit (ALU)
Other registers
Memory Address Register
Memory Data Register Main
Memory
Address bus
Data bus
Control Bus (Read / Write)
Electronic clock
Clock pulses
Marr College Higher Computing Slide 11
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reThe fetch-execute cycle
The fetch-execute cycle of the processor refers to the sequence that is completed for each instruction in a program.
• Fetch Sequence
• Move the value in the program counter to the memory address register
• Send the value in the memory address register to memory via the address bus
• Return the value stored in memory via the data bus• Store the value in the memory data register • Copy the instruction from the memory address register to the
instruction register • Increment the program counter. The instruction in the instruction
register is then Decoded
• Execute Sequence
• Instruction is executed
Marr College Higher Computing Slide 12
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reThe purpose of the Registers
The registers are small, fast storage areas that temporarily hold data. Instructions or addresses.
The registers in the CPU have three main functions. They are to hold data being processed, instructions being executed, and addresses being accessed.
• memory address register (MAR) – holds the address of a location in memory
• memory data register (MDR) – holds data just read from or written to memory
• program counter (PC) – holds the address of the next instruction to be fetched
• Instruction register (IR) – holds the current instruction being executed
• general purpose registers – can be used by programmers
Marr College Higher Computing Slide 13
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reComputer Memory - Cache
CPUCacheMain
Memory (RAM)
1. Cache fetches data from next to current addresses in main memory
2. CPU checks to see whether the next instruction it requires is in cache
4. If not, the CPU has to fetch next instruction from main memory - a much slower process
3. If it is, then the instruction is fetched from the cache – a very fast position
Cache Memory
Is a small area of ‘super fast’ access memory, between the processor and main memory, which stores frequently used instructions and data.
Marr College Higher Computing Slide 14
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Main memory is commonly referred to as RAM (random access memory).
RAM is used to hold program instructions and data before and after processing by the CPU.
RAM chip
Increasing memory size (capacity in Mb/Gb) improves system performance as more programs and data can be held.
INT 2Main memory – RAM
RAM is volatile i.e. loses it contents when switched off.
Reading from RAM is slower than accessing registers or cache.
Use of cache avoids slower fetches from RAM.
Marr College Higher Computing Slide 15
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reMain memory - ROM
Another type of memory is Read Only Memory (ROM).
ROM is used to store the bootstrap loader program that locates the operating system on the hard disc when the computer ‘boots up’.
Features - ROM
• ROM data is permanently etched on chip
• Read-only so data cannot be changed
• Data not lost when computer switched off
ROM chip
INT 2
Marr College Higher Computing Slide 16
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reBacking storage
Backing storage is where the computer permanently saves computer programs and data.
This includes devices such as the hard disc and media such as DVD.
INT 2
Marr College Higher Computing Slide 17
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reDistinguishing between different parts of memory
Registers – fastest access time as internal to CPU
Registers – fastest access time as internal to CPU
Cache – slower than registers but fast as no READ needed
Cache – slower than registers but fast as no READ needed
RAM – slower than registers and cache
RAM – slower than registers and cache
Backing store – slowest speed of access
Backing store – slowest speed of access
Marr College Higher Computing Slide 18
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reMemory
Investigate the following elements of computer memory:
•Registers•cache•main memory•backing storage
Distinguish between the above elements of memory according to:
•Function •speed of access
Produce a brief word processed report or powerpoint presentation.
Include an image/diagram of each component.
Task
Marr College Higher Computing Slide 19
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reAddressability
Main memory consists of a number of storage locations, each of which is identified by a unique address.
The ability of the CPU to identify each location is known as its addressability.
Each location stores a word i.e. the number of bits that can be processed by the CPU in a single operation. Word length may be typically 16, 24, 32 or as many as 64 bits.
A large word length improves system performance, though may be less efficient on occasions when the full word length is not used
Marr College Higher Computing Slide 20
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reCalculating memory capacity of a computer
Example
A computer has a 24 bit address bus and a 16 bit data bus. Calculate the maximum amount of memory this computer can use.
224 * 2 bytes = 33,554,432 bytes
33,554,432 / 1024 = 32,768 kilobytes
32768 / 1024 = 32 megabytes
Memory capacity can be calculated if we know:
• the number of lines on the address bus
• and the number of bits stored in each memory location
Note: in Higher we assume the number of bits in a memory location to be the same as the number of bits the data bus can carry.
FormulaAmount of storage locations = 2 width of the address bus
Memory capacity = 2 the width of the address bus * width of data bus
FormulaAmount of storage locations = 2 width of the address bus
Memory capacity = 2 the width of the address bus * width of data bus
Marr College Higher Computing Slide 21
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reCalculating memory capacity of a computer
Calculate the total memory requirements of the following computer systems:
a) Processor has a 16-line address bus and each location stores 16 bits.
b) Processor has a 16-line address bus and each location stores 32 bits.
c) Processor has a 32-line address bus and a 24-line data bus.
d) Processor has a 36-bit address bus and a word length of 32 bits.
Questions
Remember: Location size = data bus size = word length / sizeRemember: Location size = data bus size = word length / size
Marr College Higher Computing Slide 22
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reDesktop computer INT 2
Processing Power - measured by clock speed e.g. 3 Ghz.
Memory size - typically 3 Gb.
Backing storage – large hard disc typically 750 Gb – 1 Tb. Also, CD-RW and DVD-RW.
Input devices – keyboard, microphone, mouse, webcam etc.
Output devices – monitors, printers, speakers, modem etc
Typical uses – applications (word, excel), email, internet, gaming
Processing Power - measured by clock speed e.g. 3 Ghz.
Memory size - typically 3 Gb.
Backing storage – large hard disc typically 750 Gb – 1 Tb. Also, CD-RW and DVD-RW.
Input devices – keyboard, microphone, mouse, webcam etc.
Output devices – monitors, printers, speakers, modem etc
Typical uses – applications (word, excel), email, internet, gaming
Marr College Higher Computing Slide 23
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reLaptop computer INT 2
Processing Power - measured by clock speed e.g. 1.75 Ghz – 2.4 GHz
Memory size - typically 512 Mb – 1 Gb.
Backing storage – large hard disc typically 40 - 100 Gb. Also, CD-RW and DVD-RW.
Input devices – keyboard, touchpad
Output devices – LCD integrated monitor, printers, speakers, modem etc
Typical uses – applications (word, excel), email, internet, gaming. Portable to work on the move.
Processing Power - measured by clock speed e.g. 1.75 Ghz – 2.4 GHz
Memory size - typically 512 Mb – 1 Gb.
Backing storage – large hard disc typically 40 - 100 Gb. Also, CD-RW and DVD-RW.
Input devices – keyboard, touchpad
Output devices – LCD integrated monitor, printers, speakers, modem etc
Typical uses – applications (word, excel), email, internet, gaming. Portable to work on the move.
Marr College Higher Computing Slide 24
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rePalmtop computer
Processing Power - measured by clock speed e.g. 200 – 500 Mhz
Memory size - typically 32 – 64 Mb. Can extend with memory card.
Backing storage – Same as memory (battery powered)
Input devices – stylus and touch screen
Output devices – integrated LCD screen
Typical uses – personal organiser and connectivity to PC.
INT 2
Marr College Higher Computing Slide 25
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reMainframe computer
A large and powerful computer that deals with very high volumes of data processing.
Features
Processing power: several processors
RAM: 32 GB or more
Backing storage: 100s of GB, tape drives
I/O: keyboard, printers, monitors
Uses
Used by large organisations to provide remote access to central computer via terminals e.g. a bank’s ‘cashpoint’ machines are directly connected to a mainframe at head office.
INT 2
Marr College Higher Computing Slide 26
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reEmbedded computer
Embedded computers are special-purpose systems where the computer is embedded within the machine it controls e.g. a computer system in a car.
They perform a specific task
Considered a
INT 2
Marr College Higher Computing Slide 27
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reSystem Performance: Clock Speed INT 2
Clock speed indicates processing power but some instructions need more clock pulses on one processor than on another.
Is the number of clock pulses a CPU generates per second. Measured in gigahertz i.e. 1GHz = 1 billion pulses per second.
Clock Speed
These pulses synchronise the steps of the fetch-execute cycle e.g. a clock pulse starts a ‘fetch’, or triggers placing data in the MDR.
The faster the clock speed – the more operations can be executed per second.
Marr College Higher Computing Slide 28
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reSystem Performance: MIPS rate
Millions of Instructions per Second (MIPS)
MIPS roughly measures the number of machine code instructions that a CPU can execute per second.
ProsRough measure of processor performance e.g.
Intel 8080: 500 kIPS at 2 MHzIntel 486 DX2: 54 MIPS at 66 MHz Intel Pentium III: 1354 MIPS at 500 MHzIntel Core 2 X6800: 27,079 MIPS at 2.93 GHz
ConsNo standard way of measuring MIPS as does not take into account complexity of an nstruction e.g. some instructions require more time than others.
Refers only to CPU speed, not other factors such as I/O
Therefore a machine with a high MIP rate may not run an application faster than a CPU with a lower rate due to other limiting factors.
Marr College Higher Computing Slide 29
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reSystem Performance: MIPS rate
How to calculate a CPU’s MIPS rating
There is a simple formula to calculate MIPS.
Formula
MIPS = n / (t x 1,000,000)
Where n is the number of instructions executed and t
ExampleNo standard way of measuring MIPS as does not take into account complexity of an nstruction e.g. some instructions require more time than others.
Refers only to CPU speed, not other factors such as I/O
Therefore a machine with a high MIP rate may not run an application faster than a CPU with a lower rate due to other limiting factors.
Marr College Higher Computing Slide 30
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reSystem Performance: MIPS rate
Millions of Instructions Per Second (MIP)
A clock speed of 200 MHz does not mean that 200 million instructions are executed per second. Because of this, clock speed isn’t an accurate measure of performance.
It may therefore be the case that two processors have the same clock speed but different MIP rates.
In order to get a better picture of performance we measure the CPUs ability in how many million instructions it can process per second, also referred to as the machine cycle time.
Marr College Higher Computing Slide 31
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reSystem Performance: MIPS rate
Working out MIPS rate
It can take at least five clock pulses to execute an instruction.
Example – a CPU with a clock speed of 200 MHz
=> 200,000,000 clock pulses / 5 pulses per instruction
=> 40,000,000 instructions per sec.
Thus CPU = 40 MIPS
Marr College Higher Computing Slide 32
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Problems with MIPS rate
•Using MIPS rate as a comparison factor also has problems.
•MIPS rate depends on what sort of instructions are being carried out
•There is no standard set and so some manufacturers could use instructions which require less clock pulses to complete thus giving the impression of a faster MIPS rate than it actually is.
System Performance: MIPS rate
Marr College Higher Computing Slide 33
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reSystem Performance: FLOPS
Floating Point Operations per Second (FLOPS)
Measures how many floating point operations are processor can perform per second.
FLOPS are more accurate than MIPS.
They measure a number of clearly definable arithmetic tasks carried out per second.
Marr College Higher Computing Slide 34
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reSystem Performance: Application-based Test (Benchmarks)
This involves running various application programs on different computer systems and observing which system runs these programs the fastest.
Most reliable measure of processor performance because it provides the user with actual evidence of how well different processors perform complex operations at high speed.
Benchmarks
Marr College Higher Computing Slide 35
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reFactors that affect system performance
Data bus width – Increasing the data bus width increases processor throughput i.e. an 8-bit bus can transfer 1 byte of data; a 16-bit can transfer 2 bytes etc.
Cache memory - Using / increasing cache (SRAM) means less ‘fetches’ from slower main memory (DRAM).
Peripheral speed – Slow transfer rates slow the system down so better to choose peripherals with faster transfer rates.
Marr College Higher Computing Slide 36
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reCurrent trends in computer hardware
Faster clock speeds – improved CPU throughput as millions more instructions per second.
More RAM – more sophisticated software can be run, and improved multitasking i.e. more programs loaded simultaneously.
More backing storage capacity means more data can be stored permanently.