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8/18/2019 Markov Reversible
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Introduction to Reversible Ckts
Igor Markov
University of Michigan
Electrical Engineering & Computer Science
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Outline
Historical motivation Arbitrary computations via reversible Rev. ckts: basic definitions & eamples Recent implementations in CMO! Reversible synt"esis & ot"er #$A tasks %ovel motivations for reversible circuits
In"erently reversible computations uantum circuits
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Historical Motivation
#very lost bit causes an energy loss C. 'ennett( )*+,( IBM J. of R & D - t"e kinetic energy of one molecule in air
Idea: try to avoid t"ose energy costs Adiabatic circuits
Asymptotically energy lossless Time → ∞ /
!. 0ounis and 1. 2nig"t( )**3(Workshop on Low Power Design
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Implementing ArbitraryComputations via Reversible
1offoli )*45( 1"eorem 3.):Any finite function can be 6rittenas a product of trivial encoder µ bi7ection f trivial decoder υ
Constructiveprocedure Adds variables
55
µ
f
88
argument
result
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$efinitions
Reversible bit9based computatione.g.( 1offoli )*45/ N bits at input N bits at output #very input & output bit9string possible 'i7ection
1"ese restrictions apply to gates & ckts Additional restriction: no fanout
Acyclic comb. circuits interesting enoug"
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#amples
k 9C%O1 gate( a.k.a. generalied 1offoli k+1/9inputs and k+1/9outputs
;alues on t"e first k inputs are unc"anged
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A Reversible Circuit and 1rut" 1able
y y
5 5 5 5 5 5
5 5 ) 5 5 )
5 ) 5 5 ) )
5 ) ) 5 ) 5
) 5 5 ) 5 5
) 5 ) ) 5 )) ) 5 ) ) )
) ) ) ) ) 5
#?uiv. to a C%O1 gate @roof by e"austive
simulation @roof by symbolic
arguments
z ⊕ x
! " x" x
z ⊕ x ⊕ x"#z ⊕
x
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Implementations in CMO!
'. $esoete andA. $e ;os =A reversible
carry-look-aheadadder usingcontrol gates>(In$egr%$ion $he
'L(I Jo)rn%* (vol. ,, 55/(pp. 4*9)53
Reversible 39bit adder ,43 transistors no power rails
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Identities for Reversible Ckts
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1emporary !torage B arbage 'its
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Ho6 Muc" 1emporary !torage$o De %eed 8
1offoli MI1 1R( )*45/ Odd permutations re?uire
at least ) line of temporary storage
!"ende et al.( ICCA$ E5 #ven permutations need no temp storage Odd permutations need ) line and no more Constructive synt"esis procedure
not implemented/
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Comb. !ynt"esis Formulations
!traig"tfor6ard iven a full trut" table( find a circuit !"ende et al. s"o6 an optimal procedure
all ,9line circuits synt"esied in mins/
Dit" donGt cares 1"e function of one output bit is restricted I6ama et al. $AC E5/: "euristic(
transformation9based synt"esis(may use many lines of temp. storage
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Ot"er #$A 1asks
Fault testing in reversible circuits 2. @atel et al. ;1! E5/: reversible
circuits re?uire very fe6 test vectors
#?uivalence c"ecking
$ifficulties 6it" empirical validation Circuit B gate costs 8 Circuit benc"marks 8
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%e6 Motivation:In"erently Reversible Applications
Information is re9coded(but none is lost or added $igital signal processing Cryptograp"y Communications Computer grap"ics
Micro9processor instructions for 'it9permutations 'utterfly operation from FF1
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%e6 Motivation: uantum Ckts
%ot related to lo6 po6er uantum circuits operate
on linear combinations of bit9strings #.g.( |0>|1>/B√( |00>i |11>/B√
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Classical ;ersus uantum Ckts Circuit identities for conventional
reversible gates e.g.( C%O1 and 1offoli/do not c"ange in t"e ?uantum contet Conventional tec"ni?ues applicable
6"en t"ere are no purely ?uantum gates =Conventional subroutines> of ?. programs
@urely ?uantum gates re?uired in apps Open problem: synt"esis 6it"
purely ?uantum gates
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1"ank you