Makefile Tutorial CIS5027

Prof: Dr. Shu-Ching ChenTA: Hsin-Yu HaMakefile TutorialCIS5027Whats make?Autility thatautomatically buildsexecutable programs and libraries fromsource codeby reading files calledmakefilewhich specify how to derive the target program.Make allows you to manage large programs and keep track of which portion of the entire program have been changed.Makefile tells make how to generate an execution file

makemake f MyMakefilemakeexecutes commands in themakefileto update one or more targetnames, wherenameis typically a program. If no-foption is present,makewill look for the makefilesGNUmakefile,makefile, andMakefile, in that order.

The purpose of themakeutility is to determine automatically which pieces of a large program need to be recompiled, and issue the commands to recompile them. The manual describes the GNU implementation ofmake, which was written by Richard Stallman and Roland McGrath. Our examples show C programs, since they are most common, but you can usemakewith any programming language whose compiler can be run with a shell command. In fact,makeis not limited to programs. You can use it to describe any task where some files must be updated automatically from others whenever the others change.

To prepare to usemake, you must write a file called themakefilethat describes the relationships among files in your program, and the states the commands for updating each file. In a program, typically the executable file is updated from object files, which are in turn made by compiling source files.Once a suitable makefile exists, each time you change some source files, this simple shell command:make

``When should I use aMakefile?''When there is more than one file to handle.If the code is expected to be built on different machines.There are special handling steps.If you consider your time to be valuable.If you expect to rebuild your executable at some later point - theMakefileretains thememoryof the needed steps.

2Compiling by handBuild Process

Files: main.c foo1.c foo2.cgcc main.c foo1.c foo2.c o maingcc main.c foo1.c foo2.c cgcc main.o foo1.o foo2.o o mainWith make and makefile, you only need to type

make

-c Compile and assemble, but do not link -o Place the output into -Wa, Pass comma-separated on to the assembler

GCC: GNU Compiler Collection

Referrers to all the different languages that are supported by the GNU compiler.gcc: GNU C Compilerg++: GNU C++ Compiler

The main differences:gcc will compile: *.c/*.cpp files as C and C++ respectively.g++ will compile: *.c/*.cpp files but they will all be treated as C++ files.Also if you use g++ to link the object files it automatically links in the std C++ libraries (gcc does not do this).gcc compiling C files has less predefined macros.gcc compiling *.cpp and g++ compiling *.c/*.cpp files has a few extra macros.

3Makefile FormatTarget: The file we want to createDependencies: Check before creating the target fileCommands: Consider as shell script.Target : dependencies system commandsIf there are no dependencies for target, makewill safely executes the system commands specified.

4Dependency graph

Four entries appear in the file. Each contains adependency linethat shows how a file is built. Thus the first line says thatproject1(the name before the colon) is built from the two object filesmain.oandio.o(the names after the colon). What this line tellsmakeis that it should execute the followinggccline whenever one of those object files change. The lines containing commands have to begin with tabs (not spaces).

It doesn't matter what order the three entries are within the makefile.makefigures out which files depend on which and executes all the commands in the right order.

5First Makefile

makegcc main.c cgcc foo1.c cgcc main.o fool.o o mainChange one source file

touch foo1.cmakegcc foo1.c cgcc main.o fool.o o mainChanges the date/time stamp of the file filename to the current time.

7Variables$(VAR) or ${VAR}For example

Targets = foo${Targets}: common.hgcc o ${Targets} foo.cfoo: common.hgcc o foo foo.cYou can also use variables when writing Makefiles. It comes in handy in situations where you want to change the compiler, or the compiler options.

When people use a filename or other string more than once in a makefile, they tend to assign it to a macro. That's simply a string thatmakeexpands to another string.8Difference between :=, = and +=x = fooy = $(x) barx = xyz# The value of y would be xyz barx := fooy := $(x) barx := xyz# The value of y would be foo barCFLAGS= -cCFLAGS+= -WallIn short, variables defined with:=are expanded once, but variables defined with=are expanded whenever they are used.

+= adds the option Wall to CFLAGS9Makefile Example

10Makefile TutorialMake manualhttp://www.gnu.org/software/make/manual/make.html8 functions for transforming texthttp://www.gnu.org/software/make/manual/html_node/Functions.htmlFunctionsallow you to do text processing in the makefile to compute the files to operate on or the commands to use in recipes. You use a function in afunction call, where you give the name of the function and some text (thearguments) for the function to operate on. The result of the function's processing is substituted into the makefile at the point of the call, just as a variable might be substituted.11