Machine Controller MP900/MP2000 Series USER'S MANUAL ...€¦ · The following conventions are used to indicate precautions in this manual. ... No patent liability is assumed with

USER'S MANUALLADDER PROGRAMMING

Machine Controller MP900/MP2000 Series

MANUAL NO. SIEZ-C887-1.2C

!

!

Safety Information

iii

Safety Information

The following conventions are used to indicate precautions in this manual. Failure to heed precau-

tions provided in this manual can result in serious or possibly even fatal injury or damage to the prod-

ucts or to related equipment and systems.

WARNING Indicates precautions that, if not heeded, could possibly result in loss of life orserious injury.

Caution Indicates precautions that, if not heeded, could result in relatively serious or minorinjury, damage to the product, or faulty operation.

The warning symbols for ISO and JIS standards are different, as shown below.

ISO JIS

The ISO symbol is used in this manual.

Both of these symbols appear on warning labels on Yaskawa products. Please abide by

these warning labels regardless of which symbol is used.

Yaskawa, 1998

All rights reserved. No part of this publicationmay be reproduced, stored in a retrieval system, or transmitted, in any form,or by any means, mechanical, electronic, photocopying, recording, or otherwise, without the prior written permission ofYaskawa. No patent liability is assumed with respect to the use of the information contained herein. Moreover, becauseYaskawa is constantly striving to improve its high-quality products, the information contained in this manual is subject tochange without notice. Every precaution has been taken in the preparation of this manual. Nevertheless, Yaskawa as-sumes no responsibility for errors or omissions. Neither is any liability assumed for damages resulting from the use of theinformation contained in this publication.

iv

Visual Aids

The following aids are used to indicate certain types of information for easier reference.

Indicates application examples.

Indicates supplemental information.

Indicates important information that should be memorized, including precautions such asalarm displays to avoid damaging the devices.

AEXAMPLE"

INFO

IMPORTANT

OVERVIEW

v

OVERVIEW

Safety Information iii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Visual Aids iv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TABLE OF CONTENTS vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Overview xii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Using This Manual xiii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Safety Precautions xiv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Warranty xvi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1 Drawing System and Hierarchical ProgramStructure 1 - 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.1 Basic Program Structure 1 - 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Parent Drawings 1 - 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Hierarchical Arrangement of Drawings 1 - 5. . . . . . . . . . . . . . . . . . . . .

1.4 Functions 1 - 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Managing Registers 2 -1. . . . . . . . . . . . . . . . . . . . . . . . . . .2.1 Register Designation Methods 2 -2. . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Data Types 2 -3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Register Types 2 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Managing Symbols 2 -15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5 Upward Symbols Link and Automatic Allocation 2 -17. . . . . . . . . . . . .

3 Ladder Instructions 3 -1. . . . . . . . . . . . . . . . . . . . . . . . . . .Instruction Descriptions 3 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Instructions with [ ] 3 -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Program Control Instructions 3 -9. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3 Direct I/O Instructions 3 -25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.4 Relay Circuit Instructions 3 -31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.5 Logical Operation Instructions 3 -47. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6 Numeric Operation Instructions 3 -50. . . . . . . . . . . . . . . . . . . . . . . . . . .

3.7 Numeric Conversion Instructions 3 -70. . . . . . . . . . . . . . . . . . . . . . . . . .

3.8 Number Comparison Instructions 3 -79. . . . . . . . . . . . . . . . . . . . . . . . .

3.9 Data Manipulation Instructions 3 -83. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.10 Basic Function Instructions 3 -100. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11 DDC Instructions 3 -110. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.12 Table Data Manipulation Instructions 3 - 148. . . . . . . . . . . . . . . . . . . . .

4 Table Programming 4 -1. . . . . . . . . . . . . . . . . . . . . . . . . . .4.1 Types and Execution of Table Programs 4 -2. . . . . . . . . . . . . . . . . . .

4.2 Constant Tables (M Registers) 4 -4. . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3 Constant Tables (# Registers) 4 -6. . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.4 I/O Conversion Tables 4 -8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.5 Interlock Tables 4 -13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.6 Part Composition Tables 4 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.7 Constant Tables (C Registers) 4 -19. . . . . . . . . . . . . . . . . . . . . . . . . . . .

vi

5 Standard System Functions 5 - 1. . . . . . . . . . . . . . . . . . . .5.1 DATA TRACE READ Function (DTRC-RD) 5 - 3. . . . . . . . . . . . . . . . .

5.2 TRACE Function (TRACE) 5 -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3 FAILURE TRACE READ Function (FTRC-RD) 5 -9. . . . . . . . . . . . . .

5.4 INVERTER TRACE READ Function (ITRC-RD) 5 -14. . . . . . . . . . . . .

5.5 SEND MESSAGE Function (MSG-SND) 5 -17. . . . . . . . . . . . . . . . . . .

5.6 RECEIVE MESSAGE Function (MSG-RCV) 5 -30. . . . . . . . . . . . . . . .

5.7 COUNTER Function (COUNTER) 5 - 38. . . . . . . . . . . . . . . . . . . . . . . . .

5.8 FIRST-IN/FIRST-OUT Function (FINFOUT) 5 - 39. . . . . . . . . . . . . . . .

5.9 INVERTER CONSTANT WRITE Function (ICNS-WR) 5 - 40. . . . . . .

5.10 INVERTER CONSTANT READ Function (ICNS-RD) 5 - 45. . . . . . .

A Ladder Instructions and Standard System Functions A - 1. . . . . . . .

TABLE OF CONTENTS

vii

TABLE OF CONTENTS

Safety Information iii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Visual Aids iv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Overview xii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Using This Manual xiii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Safety Precautions xiv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Warranty xvi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1 Drawing System and Hierarchical Program Structure

1.1 Basic Program Structure 1 - 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Parent Drawings 1 - 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2.1 Types and Priority Levels of Parent Drawings 1 - 3. . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2.2 Execution Control of Parent Drawings 1 - 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2.3 Execution Scheduling of Scan Process Drawings 1 - 4. . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Hierarchical Arrangement of Drawings 1 - 5. . . . . . . . . . . . . . . . . . . . . . .1.3.1 Execution of Drawings 1 - 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3.2 Execution Processing Method of Drawings 1 - 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4 Functions 1 - 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4.1 Function Definitions 1 - 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4.2 Preparing User Functions 1 - 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Managing Registers

2.1 Register Designation Methods 2 -2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Data Types 2 -3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Register Types 2 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.1 Registers in Drawings 2 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.2 Registers in Functions 2 -6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.3 Internal CPU Registers 2 -11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.4 Subscripts i and j 2 -11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.5 I/O and Registers in Functions 2 -13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.3.6 Register Ranges in Programs 2 -14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4 Managing Symbols 2 -15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.4.1 Symbols in Drawings 2 -15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.4.2 Symbols in Functions 2 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5 Upward Symbols Link and Automatic Allocation 2 -17. . . . . . . . . . . . . .2.5.1 Upward Linking of Symbols 2 -17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5.2 Automatic Register Number Allocation 2 -18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

viii

3 Ladder Instructions

Instruction Descriptions 3 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Instructions with [ ] 3 -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Program Control Instructions 3 -9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.1 CHILD DRAWING CALL Instruction (SEE) 3 -9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.2 DRAWING END Instruction (DEND) 3 -10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.3 MOTION PROGRAM CALL Instruction (MSEE) 3 -11. . . . . . . . . . . . . . . . . . . . . . . . . .3.2.4 FOR Structure 3 -11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.5 WHILE Structure 3 -13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.6 IF Structure without ELSE 3 -15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.7 IF Structure with ELSE 3 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.8 FUNCTION CALL Instruction (FSTART) 3 -17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.9 FUNCTION INPUT Instruction (FIN) 3 -18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.10 FUNCTION OUTPUT Instruction (FOUT) 3 -19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.11 COMMENT Instruction (COMMENT) 3 -23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.12 EXTENSION PROGRAM CALL Instruction (XCALL) 3 -23. . . . . . . . . . . . . . . . . . . . .

3.3 Direct I/O Instructions 3 -25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.3.1 INPUT STRAIGHT Instruction (INS) 3 -25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.3.2 OUTPUT STRAIGHT Instruction (OUTS) 3 -28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.4 Relay Circuit Instructions 3 -31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.1 NO CONTACT Instruction 3 -31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.2 NC CONTACT Instruction 3 -32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.3 COIL Instruction 3 -32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.4 SET COIL and RESET COIL Instructions 3 -33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.5 RISING PULSE Instruction 3 -35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.6 FALLING PULSE Instruction 3 -36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.7 10-MS ON-DELAY TIMER Instruction 3 -37. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.8 10-MS OFF-DELAY TIMER Instruction 3 -40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.9 1-S ON-DELAY TIMER 3 -42. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.10 1-S OFF-DELAY TIMER 3 -44. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.4.11 Examples of Relay Circuit Combinations 3 -45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.5 Logical Operation Instructions 3 -47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.5.1 AND Instruction 3 -47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.5.2 OR Instruction 3 -48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.5.3 XOR Instruction 3 -49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6 Numeric Operation Instructions 3 -50. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.1 INTEGER ENTRY Instruction 3 -50. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.2 REAL NUMBER ENTRY Instruction 3 -51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.3 STORE Instruction 3 -52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.4 ADDITION Instruction (+) 3 -53. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.5 SUBTRACTION Instruction (−) 3 -54. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.6 EXTENDED ADDITION Instruction (++) 3 -55. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.7 EXTENDED SUBTRACTION Instruction (− −) 3 -57. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.8 MULTIPLICATION Instruction (×) 3 -58. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.9 DIVISION Instruction (÷) 3 -59. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.10 MOD Instruction 3 -60. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.11 REM Instruction 3 -61. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.12 INC Instruction 3 -62. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TABLE OF CONTENTS

ix

3.6.13 DEC Instruction 3 -63. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.14 ADD TIME Instruction (TMADD) 3 -64. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.15 SUBTRACT TIME Instruction (TMSUB) 3 -65. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.6.16 SPEND TIME Instruction (SPEND) 3 -67. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.7 Numeric Conversion Instructions 3 -70. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.1 SIGN INVERSION Instruction (INV) 3 -70. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.2 1’S COMPLEMENT Instruction (COM) 3 -71. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.3 ABSOLUTE VALUE CONVERSION Instruction (ABS) 3 -71. . . . . . . . . . . . . . . . . . . . .3.7.4 BINARY CONVERSION Instruction (BIN) 3 -72. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.5 BCD CONVERSION Instruction (BCD) 3 -73. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.6 PARITY CONVERSION Instruction (PARITY) 3 -74. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.7 ASCII CONVERSION 1 Instruction (ASCII) 3 -74. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.8 ASCII CONVERSION 2 Instruction (BINASC) 3 -76. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7.9 ASCII CONVERSION 3 Instruction (ASCBIN) 3 -77. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8 Number Comparison Instructions 3 -79. . . . . . . . . . . . . . . . . . . . . . . . . . .3.8.1 Comparison Instructions 3 -79. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.8.2 RANGE CHECK Instruction (RCHK) 3 -81. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.9 Data Manipulation Instructions 3 -83. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.1 BIT ROTATION LEFT Instruction (ROTL) and

BIT ROTATION RIGHT Instruction (ROTR) 3 -83. . . . . . . . . . . . . . . . . . . . . . . . . .3.9.2 MOVE BITS Instruction (MOVB) 3 -84. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.3 MOVE WORD Instruction (MOVW) 3 -86. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.4 EXCHANGE Instruction (XCHG) 3 -87. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.5 SET WORDS Instruction (SETW) 3 -89. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.6 BYTE-TO-WORD EXPANSION Instruction (BEXTD) 3 -90. . . . . . . . . . . . . . . . . . . . . .3.9.7 WORD-TO-BYTE COMPRESSION Instruction (BPRESS) 3 -92. . . . . . . . . . . . . . . . .3.9.8 BINARY SEARCH Instruction (BSRCH) 3 -93. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.9 SORT Instruction (SORT) 3 -95. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.10 BIT SHIFT LEFT Instruction (SHFTL) and

BIT SHIFT RIGHT Instruction (SHFTR) 3 -95. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.11 COPY WORD Instruction (COPYW) 3 -97. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.9.12 BYTE SWAP Instruction (BSWAP) 3 -98. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.10 Basic Function Instructions 3 -100. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.1 SQUARE ROOT Instruction (SQRT) 3 -100. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.2 SINE Instruction (SIN) 3 -101. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.3 COSINE Instruction (COS) 3 -102. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.4 TANGENT Instruction (TAN) 3 -103. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.5 ARC SINE Instruction (ASIN) 3 -104. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.6 ARC COSINE Instruction (ACOS) 3 -105. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.7 ARC TANGENT Instruction (ATAN) 3 -105. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.8 EXPONENT Instruction (EXP) 3 -107. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.9 NATURAL LOGARITHM Instruction (LN) 3 -108. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.10.10 COMMON LOGARITHM Instruction (LOG) 3 -109. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11 DDC Instructions 3 -110. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.1 DEAD ZONE A Instruction (DZA) 3 -110. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.2 DEAD ZONE B Instruction (DZB) 3 -111. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.3 UPPER/LOWER LIMIT Instruction (LIMIT) 3 -113. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.4 PI CONTROL Instruction (PI) 3 -115. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

x

3.11.5 PD CONTROL Instruction (PD) 3 -118. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.6 PID Control Instruction (PID) 3 -121. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.7 FIRST-ORDER LAG Instruction (LAG) 3 -125. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.8 PHASE LEAD/LAG Instruction (LLAG) 3 -127. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.9 FUNCTION GENERATOR Instruction (FGN) 3 -129. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.11.10 INVERSE FUNCTION GENERATOR Instruction (IFGN) 3 -132. . . . . . . . . . . . . . . . .3.11.11 LINEAR ACCELERATOR/DECELERATOR 1 Instruction (LAU) 3 -135. . . . . . . . . . .3.11.12 LINEAR ACCELERATOR/DECELERATOR 2 Instruction (SLAU) 3 -139. . . . . . . . . .3.11.13 PULSE WIDTH MODULATION Instruction (PWM) 3 -146. . . . . . . . . . . . . . . . . . . . . .

3.12 Table Data Manipulation Instructions 3 - 148. . . . . . . . . . . . . . . . . . . . . . .3.12.1 BLOCK READ Instruction (TBLBR) 3 - 149. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.2 BLOCK WRITE Instruction (TBLBW) 3 - 150. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.3 ROW SEARCH Instruction (TBLSRL) 3 - 152. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.4 COLUMN SEARCH Instruction (TBLSRC) 3 - 153. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.5 BLOCK CLEAR Instruction (TBLCL) 3 - 154. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.6 BLOCK MOVE Instruction (TBLMV) 3 - 155. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.12.7 Queue Table Read Instructions (QTBLR, QTBLRI) 3 - 157. . . . . . . . . . . . . . . . . . . . . . .3.12.8 Queue Table Write Instructions (QTBLW, QTBLWI) 3 - 159. . . . . . . . . . . . . . . . . . . . . .3.12.9 QUEUE POINTER CLEAR Instruction (QTBLCL) 3 - 161. . . . . . . . . . . . . . . . . . . . . . . .

4 Table Programming

4.1 Types and Execution of Table Programs 4 -2. . . . . . . . . . . . . . . . . . . . .4.1.1 Types of Table Programs 4 -2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.1.2 Execution of Table Programs 4 -3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2 Constant Tables (M Registers) 4 -4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.2.1 Overview of the M Register Constant Table 4 -4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.2.2 Preparation of an M Register Constant Table 4 -5. . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3 Constant Tables (# Registers) 4 -6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.3.1 Overview of a # Register Constant Table 4 -6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.3.2 Preparation of a # Register Constant Table 4 -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.4 I/O Conversion Tables 4 -8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.4.1 Overview of an I/O Conversion Table 4 -8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.4.2 Preparation of an I/O Conversion Table 4 -9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.5 Interlock Tables 4 -13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5.1 Overview of Interlock Tables 4 -13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5.2 Preparation of Interlock Tables 4 -14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.6 Part Composition Tables 4 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.6.1 Overview of a Part Composition Table 4 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.6.2 Preparation of a Part Composition Table 4 -17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.6.3 Preparation of the Function Programs for Parts 4 -18. . . . . . . . . . . . . . . . . . . . . . . . . .

4.7 Constant Tables (C Registers) 4 -19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.7.1 Overview of a C Register Constant Table 4 -19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.7.2 Preparation of a C Register Constant Table 4 -20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TABLE OF CONTENTS

xi

5 Standard System Functions

5.1 DATA TRACE READ Function (DTRC-RD) 5 - 3. . . . . . . . . . . . . . . . . . . .5.1.1 Data Readout 5 - 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.1.2 Readout Data Configuration 5 - 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.2 TRACE Function (TRACE) 5 -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3 FAILURE TRACE READ Function (FTRC-RD) 5 -9. . . . . . . . . . . . . . . . .5.3.1 Failure Occurrence Data Readout 5 -10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.3.2 Readout Data Configuration (Failure Occurrence Data) 5 -11. . . . . . . . . . . . . . . . . . . .5.3.3 Failure Recovery Data Readout 5 -12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.3.4 Readout Data (Failure Recovery Data) Configuration 5 -13. . . . . . . . . . . . . . . . . . . . .

5.4 INVERTER TRACE READ Function (ITRC-RD) 5 -14. . . . . . . . . . . . . . . .5.4.1 Data Readout 5 -15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.4.2 Readout Data Configuration 5 -16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.5 SEND MESSAGE Function (MSG-SND) 5 -17. . . . . . . . . . . . . . . . . . . . . . .5.5.1 Parameters 5 -18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.2 Inputs 5 -27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.3 Outputs 5 -28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.4 Programming Example 5 -29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.6 RECEIVE MESSAGE Function (MSG-RCV) 5 -30. . . . . . . . . . . . . . . . . . .5.6.1 Parameters 5 -31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.2 Inputs 5 -35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.3 Outputs 5 -36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.4 Programming Example 5 -37. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.7 COUNTER Function (COUNTER) 5 - 38. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.8 FIRST-IN/FIRST-OUT Function (FINFOUT) 5 - 39. . . . . . . . . . . . . . . . . . . .

5.9 INVERTER CONSTANT WRITE Function (ICNS-WR) 5 - 40. . . . . . . . . . .5.9.1 Write Data Configuration 5 - 42. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.9.2 Writing to EEPROM 5 - 43. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.9.3 Programming Example 5 - 44. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.10 INVERTER CONSTANT READ Function (ICNS-RD) 5 - 45. . . . . . . . . . .

A Ladder Instructions and Standard System Functions

Revision History

xii

Overview

J About this Manual

This manual describes ladder programming for the MP900 and MP2000 series (hereinafter referred

to as MP series) Machine Controllers, including the following information.

D Hierarchical structure of program drawings

D Register control methods

D Ladder program instructions and table format programs

Read this manual carefully to ensure the proper use of the MP series Machine Controller System.

Also, keep this manual in a safe place so that it can be referred to whenever necessary.

J Related Manuals

The MP900-series Machine Controllers consists of four models, the MP910, MP920, MP930,

and MP940.

The MP2000-series Machine Controllers consists of two models, the MP2100 and MP2300.

Manuals have been produced on these products line.

Refer to the following related manuals as required.

Manual Name ManualNumber

Applicable ModelNumber

MP910 MP920 MP930 MP940 MP2100 MP2300

Machine Controller MP930 User’sManual: Design and Maintenance

SIEZ-C887-1.1 √

Machine Controller MP900/MP2000Series User’s Manual: LadderProgramming

SIEZ-C887-1.2 √ √ √ √ √ √

Machine Controller MP900/MP2000Series User’s Manual: MotionProgramming

SIEZ-C887-1.3 √ √ √ √ √ √

Machine Controller MP900 SeriesTeach Pendant User’s Manual

SIEZ-C887-1.6 √ √


SIEZ-C887-2.1 √

Machine Controller MP900 SeriesProgramming Panel Software User’sManual for Simple Operation

SIEZ-C887-2.3 √ √ √ √

Machine Controller MP920 User’sManual: Motion Module

SIEZ-C887-2.5 √

Machine Controller MP920 User’sManual: Communications Module

SIEZ-C887-2.6 √

Overview

xiii

Manual Name Applicable ModelManualNumber

Manual Name

MP2300MP2100MP940MP930MP920MP910

ManualNumber

Machine Controller MP920 InstallationManual

SIBZ-C887-2.50 √


SIEZ-C887-3.1 √


SIEZ-C887-4.1 √

Machine Controller MP940 InstallationManual

SIBZ-C887-4.50 √

Machine Controller MP900/MP2000Series MECHATROLINK SystemUser’s Manual:

SIE-C887-5.1 √ √ √ √

Machine Controller MP900 Series260IF DeviceNet System User’sManual

SIEZ-C887-5.2 √ √

Machine Controller MP900 SeriesMPLoader (Server) User’s Manual forServer

SIEZ-C887-12.1 √ √ √

Machine Controller MP900 SeriesMPLoader (Client) User’s Manual forClient

SIEZ-C887-12.2 √ √ √

Machine Controller MP900/MP2000Series New Ladder EditorProgramming Manual

SIEZ-C887-13.1 √ √ √ √ √ √

Machine Controller MP900/MP2000Series New Ladder Editor User’s Manual

SIEZ-C887-13.2 √ √ √ √ √ √

Machine ControllerMP2100/MP2100M User’s Manual:Design and Maintenance

SIEPC88070001 √

Machine Controller MP2300 BasicModule User’s Manual

SIEPC88070003 √

Machine Controller MP2300 User’sManual: Communications Module

SIEPC88070004 √

Machine Controller MP900/MP2000Series MPE720 Software forProgramming Device User’s Manual

SIEPC88070005 √ √ √ √ √ √

xiv

Using This Manual

J Intended Audience

This manual is intended for the following users.

D Those responsible for writing MP series Machine Controller ladder programs

D Those responsible for designing the MP series Machine Controller System

D Those responsible for testing and adjusting the control and operating panels in which the MP se-

ries Machine Controller is mounted

D Those responsible for maintaining the control and operating panels in which the MP series Ma-

chine Controller is mounted

J Description of Technical Terms

In this manual, the following terms are defined as follows:

D MPE720 = The Programming Device Software or a Programming Device (i.e., a personal

computer) running the Programming Device Software

D PLC = Programmable Logic Controller

Safety Precautions

xv

Safety Precautions

This section describes important precautions that apply to ladder programming. Before programming, always read this manual and all other attached documents to ensure correct programming. Before using the equipment, familiarize yourself with equipment details, safety information, and all other precautions.

■ Storage and Transportation

■ General Precautions

Caution• If disinfectants or insecticides must be used to treat packing materials such as wooden

frames, pallets, or plywood, the packing materials must be treated before the product is packaged, and methods other than fumigation must be used.Example: Heat treatment, where materials are kiln-dried to a core temperature of 56°C for 30 minutes or more.If the electronic products, which include stand-alone products and products installed in machines, are packed with fumigated wooden materials, the electrical components may be greatly damaged by the gases or fumes resulting from the fumigation process. In particular, disinfectants containing halogen, which includes chlorine, fluorine, bromine, or iodine can contribute to the erosion of the capacitors.

Observe the following general precautions to ensure safe application.

• The MP series Machine Controller was not designed or manufactured for use in devices or systems directly related to human life. Users who intend to use the product described in this manual for special purposes such as devices or systems relating to transportation, medical, space aviation, atomic power control, or underwater use must contact Yaskawa Electric Corporation beforehand.

• The MP series Machine Controller has been manufactured under strict quality control guidelines. However, if this product is to be installed in any location in which a failure of the MPseries Machine Controller involves a life and death situation or in a facility where failure may cause a serious accident, safety devices MUST be installed to minimize the likelihood of any accident.

• The products shown in illustrations in this manual are sometimes shown without covers or protective guards. Always replace the cover or protective guard as specified first, and then operate the products in accordance with the manual.

• The drawings presented in this manual are typical examples and may not match the product you received.

• If the manual must be ordered due to loss or damage, inform your nearest Yaskawa representative or one of the offices listed on the back of this manual.

• Contact your Yaskawa representative to order new nameplates whenever a nameplate becomes worn or damaged.

xvi

Warranty

■ Details of Warranty

Warranty Period

The warranty period for a product that was purchased (hereinafter called “delivered product”) is one year from the time of delivery to the location specified by the customer or 18 months from the time of shipment from the Yaskawa factory, whichever is sooner.

Warranty Scope

Yaskawa shall replace or repair a defective product free of charge if a defect attributable to Yaskawa occurs during the warranty period above. This warranty does not cover defects caused by the delivered product reaching the end of its service life and replacement of parts that require replacement or that have a limited service life.

This warranty does not cover failures that result from any of the following causes.

1. Improper handling, abuse, or use in unsuitable conditions or in environments not described in product catalogs or manuals, or in any separately agreed-upon specifications

2. Causes not attributable to the delivered product itself

3. Modifications or repairs not performed by Yaskawa

4. Abuse of the delivered product in a manner in which it was not originally intended

5. Causes that were not foreseeable with the scientific and technological understanding at the time of shipment from Yaskawa

6. Events for which Yaskawa is not responsible, such as natural or human-made disasters

■ Limitations of Liability

1. Yaskawa shall in no event be responsible for any damage or loss of opportunity to the cus-tomer that arises due to failure of the delivered product.

2. Yaskawa shall not be responsible for any programs (including parameter settings) or the results of program execution of the programs provided by the user or by a third party for use with programmable Yaskawa products.

3. The information described in product catalogs or manuals is provided for the purpose of the customer purchasing the appropriate product for the intended application. The use thereof does not guarantee that there are no infringements of intellectual property rights or other pro-prietary rights of Yaskawa or third parties, nor does it construe a license.

4. Yaskawa shall not be responsible for any damage arising from infringements of intellectual property rights or other proprietary rights of third parties as a result of using the information described in catalogs or manuals.

Warranty

xvii

■ Suitability for Use

1. It is the customer’s responsibility to confirm conformity with any standards, codes, or regula-tions that apply if the Yaskawa product is used in combination with any other products.

2. The customer must confirm that the Yaskawa product is suitable for the systems, machines, and equipment used by the customer.

3. Consult with Yaskawa to determine whether use in the following applications is acceptable. If use in the application is acceptable, use the product with extra allowance in ratings and specifications, and provide safety measures to minimize hazards in the event of failure.

Outdoor use, use involving potential chemical contamination or electrical interference, or use in conditions or environments not described in product catalogs or manuals

Nuclear energy control systems, combustion systems, railroad systems, aviation systems, vehicle systems, medical equipment, amusement machines, and installations subject to separate industry or government regulations

Systems, machines, and equipment that may present a risk to life or property

Systems that require a high degree of reliability, such as systems that supply gas, water, or electricity, or systems that operate continuously 24 hours a day

Other systems that require a similar high degree of safety

4. Never use the product for an application involving serious risk to life or property without first ensuring that the system is designed to secure the required level of safety with risk warnings and redundancy, and that the Yaskawa product is properly rated and installed.

5. The circuit examples and other application examples described in product catalogs and man-uals are for reference. Check the functionality and safety of the actual devices and equipment to be used before using the product.

6. Read and understand all use prohibitions and precautions, and operate the Yaskawa product correctly to prevent accidental harm to third parties.

■ Specifications Change

The names, specifications, appearance, and accessories of products in product catalogs and manuals may be changed at any time based on improvements and other reasons. The next editions of the revised catalogs or manuals will be published with updated code numbers. Consult with your Yaskawa representative to confirm the actual specifications before purchasing a product.

1 - 1

1Drawing System and Hierarchical

Program Structure

This chapter describes drawings, which are the basic programming unit,

the hierarchical structure of drawings, and the methods used to define

functions.

1.1 Basic Program Structure 1 - 2. . . . . . . . . . . . . . .

1.2 Parent Drawings 1 - 3. . . . . . . . . . . . . . . . . . . . . .1.2.1 Types and Priority Levels of Parent Drawings 1 - 3. . .

1.2.2 Execution Control of Parent Drawings 1 - 4. . . . . . . . . .

1.2.3 Execution Scheduling of Scan Process Drawings 1 - 4

1.3 Hierarchical Arrangement of Drawings 1 - 5. . .1.3.1 Execution of Drawings 1 - 5. . . . . . . . . . . . . . . . . . . . . . .

1.3.2 Execution Processing Method of Drawings 1 - 6. . . . . .

1.4 Functions 1 - 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4.1 Function Definitions 1 - 8. . . . . . . . . . . . . . . . . . . . . . . . . .

1.4.2 Preparing User Functions 1 - 8. . . . . . . . . . . . . . . . . . . . .

1

Drawing System and Hierarchical Program Structure

1 - 2

1.1 Basic Program Structure

User programs are managed in units of programming call “drawings,” Each drawing is identified

by a drawing number (DWG No.). These drawings serve as the basis of user programs.

The drawings include parent drawings, child drawings, grandchild drawings, and operation error

drawings. Besides the drawings, there are also functions that can be called from the drawings.

Parent Drawings

Parent drawings are executed automatically by the system program when the execution condi-

tion is established. See Table 1.1 for execution conditions.

Child Drawings

Child drawings are executed by being called from a parent drawing using the SEE instruction.

Grandchild Drawings

Grandchild drawings are executed by being called from a child drawing using the SEE instruc-

tion.

Operation Error Drawings

Operation error drawings are executed automatically by the system program when an opera-

tion error occurs.

Functions

Functions are executed by being called from a parent, child, or grandchild drawing using the

FSTART instruction.

1

1.2 Parent Drawings

1 - 3

1.2 Parent Drawings

This section describes the priority levels and execution control of the parent drawings, as well as

the execution scheduling of the high-speed and low-speed scan process drawings.

1.2.1 Types and Priority Levels of Parent Drawings

Parent drawings are classified by the first character of the drawing number (A, H, L) according

to the purpose of the process. The priority levels and execution conditions are as shown in Table

1.1.

Table 1.1 Types and Priority Levels of Parent Drawings

Type ofParent

Role ofDrawing

PriorityLevel

Execution Condition Number of DrawingsParentDrawing

Drawing LevelMP930 MP910

MP920MP940 MP2100

MP2300

DWG.A Starting process 1 Started when power is turned ON(executed once only when thepower is turned ON)

64 64 4 64

DWG.I Interrupt process 2 Executed for external interrupt.Interrupts are generated by count-er count interrupts or Di interruptsfrom Optional Modules.

--- 64 8 64

DWG.S Servo controlscan

3 Started at a fixed interval(executed during each servo con-trol scan)

--- --- 16 ---

DWG.H High-speed scanprocess

4 Started at a fixed interval(executed during each high-speedscan)For the MP940, DWG.H isexecuted in a time slice within onecycle of a servo-control scan (Sscan).

100 200 16 200

DWG.L Low-speed scanprocess

5 Started at a fixed interval(executed during each low-speedscan)For the MP940, DWG.H isexecuted in a time slice within onecycle of a servo-control scan (Sscan).

100 500 32 500

DWG.I (interrupt process) cannot be used with the MP930.

1

IMPORTANT


1.2.3 Execution Scheduling of Scan Process Drawings

1 - 4

1.2.2 Execution Control of Parent Drawings

Each drawing is executed based on its priority level, as shown in Figure 1.1.

X: A, H, L

Power ON

DWG.AStarting process drawing

During each high-speed scan During each low-speed scan

All outputs

All inputs

DWG.HHigh-speed scanprocess drawings

DWG.ALow-speed scanprocess drawings

Operation error

Continue with original process

DWG.X00Operation error

All outputs

All inputs

Interrupt signal

Continue with original process

DWG.I interruptprocess drawing

Figure 1.1 Execution Control of Parent Drawings

1.2.3 Execution Scheduling of Scan Process Drawings

The scan process drawings are not executed simultaneously. As shown in Figure 1.2, they are

scheduled based on the priority level and are executed according to the schedule.

��

��

��

��

��

��

��

��

��

��

��

��

��

��

DWG.H

DWG.L

Low-speed scan

High-speedscan

: Executed

* Used for internal system processes, such as self diagnosis.

High-speedscan

High-speedscan

High-speedscan

Ground*

Figure 1.2 Execution Scheduling of Scan Process Drawings

Note For MP940, the processing method for the scan is different. Refer to Machine Controller MP940User’s Manual: Design and Maintenance (SIEZ-C887-4.1) for details.

1

1.3 Hierarchical Arrangement of Drawings

1 - 5

1.3 Hierarchical Arrangement of Drawings

Drawings are arranged in the following order: Parent drawing, child drawing, grandchild drawing.

A parent drawing cannot call a child drawing of a different type, and a child drawing cannot call

a grandchild drawing of a different type. A parent drawing also cannot directly call a grandchild

drawing. A child drawing is called from a parent drawing, and a grandchild drawing is called from

that child drawing. This is the hierarchical arrangement of drawings.

1.3.1 Execution of Drawings

The user prepares each processing programwith the parent drawing, child drawing, grandchild

drawing hierarchy, as shown in Figure 1.3.

DWG.X DWG.X01.01DWG.X01 FUNC-001

DWG.X01.nn

DWG.X01.02

DWG.Xnn

FUNC-064

Parent Drawing Child Drawings Grandchild Drawings Functions

Function called from agrandchild drawing

Function called from achild drawing

Function called from aparent drawing

Note Substitute A, H, or L for X.

Figure 1.3 Hierarchical Arrangement of Drawings

A parent drawing is executed automatically by the system, because the execution condition

is determined for each type. In other words, the parent drawing is automatically called by the

system. See Table 1.1 Types and Priority Levels of Parent Drawings.

The user can execute any child or grandchild drawing by programming an instruction that calls

drawings (the SEE instruction) in the parent or child drawing.

The functions listed in Section 1.4 can be called from any drawing. A function can also be

called from a function. If an operation error occurs, the operation error drawing corresponding

to the drawing will be called.

1


1.3.2 Execution Processing Method of Drawings

1 - 6

1.3.2 Execution Processing Method of Drawings

Drawings in the hierarchy are executed by the lower-level drawings being called from upper-

level drawings. Figure 1.4 shows the hierarchical arrangement of drawings, using the example

of DWG.A.

FUNC-001

FUNC-001

DWG.A

SEE A01

SEE A02

DEND

DWG.A01

SEE A01.01

SEE A01.02 DEND

DEND

DEND

DENDDEND

DEND

DWG.A02

DWG.A00

DWG.A01.02

DWG.A01.01

FUNC-001

Starts according to the systemprogram execution condition

Operation error

Startedautomaticallyby the system.

Drawing description: DWG.X YY, ZZ

Grandchild drawing No. (01 to 99)

Child drawing No. (01 to 99)

Type of parent drawing (A, H, L)

Operation error drawing (A, H, L)

Parent Drawing Child Drawings Grandchild Drawings

Functions

: DWG.X 00

Figure 1.4 Hierarchical Arrangement of Drawings

1

1.4 Functions

1 - 7

1

1.4 Functions

Functions can be called from any drawing. Functions can also be called simultaneously from drawings of different types and different hierarchies. Moreover, functions can also be called from other functions.

The following advantages can be obtained by using functions:

Programs can be easily divided into parts. Programs can be easily prepared and maintained.

A function consists of the function definition, which determines the number and types of data items that are input to and output from the function, and the body (program), which describes the processes to be executed according to the inputs and outputs. Functions can be divided into standard system functions, which are provided by the system, and user functions, which are defined by the user.

Standard System Functions

The user can use functions previously defined by the system, but cannot modify the contents of the functions. In other words, the user cannot define (program) the functions. For details on the system functions, see Chapter 5 Standard System Functions.

User Functions

The user can define (program) user functions. The user prepares the function definitions and the body of the function program. For details on the preparation method, see Section 1.4.2 Preparing User Functions.

■ Characteristics of Registers in User Functions

The characteristics of registers in user functions for the MP2000 series Machine Controllers are outlined in the diagram below.

For D registers, values can be stored even after execution of the function. However, use D registers carefully when the function is to be called from more than one drawing and/or function.

For details of each register, see Section 2.3.2 Registers in Functions. X registers

(Input registers)Y registers

(Output registers)

A registers

Z registers

Registers in which input values are temporarily used when the function is called. Values will not be stored after execu-tion of the function.

Constant registers. Within the function, # registers can be used only for reference.

Registers used to reference the address input by the user.

Values will be stored after execution of the function.

# registers D registers


1.4.1 Function Definitions

1 - 8

1.4.1 Function Definitions

Function definitions are prepared by the user using the graphic format for a function shown in Figure 1.5 when creating user functions.

Figure 1.5 Graphic Format of a Function

1.4.2 Preparing User Functions

Figure 1.6 outlines the procedure for preparing user functions, which are defined by the user.

Note If a system function is to be used, prepare the program by referring to I/O Definitions in Chapter 5 Standard System Functions. The I/O specifications, function definitions, and body of the system function have already been determined by the system; they are not required from the user.

Figure 1.6 User Function Preparation Procedure

For details on the MPE720 operating methods, refer to the Machine Controller MP900/MP2000 Series MPE720 Software for Programming Device User’s Manual (manual No. SIEPC88070005).

INPUT-1

INPUT-3

INPUT-4

INPUT-2

OUTPUT-4

OUTPUT-3

OUTPUT-2

OUTPUT-1Bit input

Numeric input ====>(logic, integer, double-lengthinteger, real number)

FUNC-011Function name

Input-5Address input

Bit output

=====> Numeric output(logic, integer, double-lengthinteger, real number)

Bit input Bit output

Numeric input ====>(logic, integer, double-lengthinteger, real number)

=====> Numeric output(logic, integer, double-lengthinteger, real number)

Determining the I/O specifications

Preparing the function definition

Programming the function body

Preparing the functioncalling program

Determine the number of inputs and outputs and the data types.

Input using the MPE720.

Prepare in the same way as the drawings, except that differenttypes of register are used. Also note the correspondence betweenthe register numbers used in the body of the function program andthe I/O data used when calling the function.

Input according to the following procedure:1. Use the FSTART instruction to input the function name.2. Use the FIN instruction to connect the input data.3. Use the FOUT instruction to connect the output data.

1.4 Functions

1 - 9

J Relationship Between I/O Registers and Registers in Functions

The following diagram shows the I/O data types specified for user functions and the corre-

sponding function registers.

XB0000000 to XB00000F

X registers(input registers)Bit data inputs

B-VAL(16 bits max.)

XW0001

XW0002

XW0003

XW0004

SSSSSS

XW00015

XW00016

I-VALL-VALF-VALI-REGL-REGF-REG inputs(16 words max.)

YB0000000 to YB00000F

Y registers(output registers)

YW0001

YW0002

YW0003

YW0004

SS

SSSS

YW00015

YW00016

Bit data outputsB-VAL

I-VALL-VALF-VALI-REGL-REGF-REG inputs

MW00100

MW00101

MW00102

MW00103

MW00104

Address inputs

AW00000

AW0001

AW0002

AW0003

AW0004

A registers

MA00100

Z registers # registers D registers

(16 bits max.)

(16 words max.)

S, M, I, O, and C registers can be used in the same way as the registers for drawings.

1

INFO



1 - 10

The 11 types of registers shown in the following table can be used in functions.

Table 1.2 Function Registers

Type Name Specification Method Contents Charac-teristics

X Function input regis-ters

XB, XW, XL, XFnnnnn Input to the functionBit input: XB000000 to XB0000FInteger input: XW00001 to XW00016Double-length integer input: XL00001 to XL00015Register number nnnnn is expressed as a decimal number.

Unique toeach func-tion

Y Function output reg-isters

YB, YW, YL, YFnnnnn Output from the functionBit output: YB000000 to YB0000FInteger output: YW00001 to YW00016Double-length integer output:YL00001 to YL00015Register number nnnnn is expressed as a decimal number.

Z Internal function reg-isters

ZB, ZW, ZL, ZFnnnnn Internal registers unique to each function. Can be used inthe function for internal function processes.Register number nnnnn is expressed as a decimal number.

A External functionregisters

AB, AW, AL, AFnnnnn External registers that use the address input value as thebase address. For linking to S, M, I, O, #, and DAnnnnnregisters.Register number nnnnn is expressed as a decimal number.

# # registers #B, #W, #L, #Fnnnnn(#Annnnn)

Registers that can be referenced only in a program andonly in the corresponding drawing.The actual range is specified by the user on the MPE720.Register number nnnnn is expressed as a decimal number.

D D registers DB, DW, DL, DFnnnnn(DAnnnnn)

Registers unique to each drawing. Can be referenced onlyin the corresponding drawing.The actual range is specified by the user on the MPE720.Register number nnnnn is expressed as a decimal number.

S System registers SB, SW, SL, SFnnnnn(SAnnnnn)

Same as the registers for drawings.

These registers can be referenced from any drawing or

Common toall draw-ings

M Data registers MB, MW, ML, MFnnnnn(MAnnnnn)

These registers can be referenced from any drawing orfunction. Use them carefully when the same function isreferenced from drawings with different priority levels.

ings.

I Input registers IB, IW, IL, IFnnnnn(IAnnnnn)

O Output registers OB, OW, OL, OFnnnnn(OAnnnnn)

C Constant registers CB, CW, CL, CFnnnnn(CAnnnnn)

Note SA, MA, IA, OA, DA, #A, and CA can be used within functions as well.

1

1.4 Functions

1 - 11

J Data Types Used in User Functions

The data types used in user functions are shown on the following table.

Type Data Type Contents Ladder Program

B-VAL Bit Pass the results of theladder program to func

IB000001FIN

I-VALL-VALF-VAL

IntegerDouble-length integerReal number

ladder program to func-tions.

MW0100+25

FIN

FIN

I-REGL-REGF-REG

IntegerDouble-length integerReal number

Pass register contents tofunctions.

MW00100 FIN= =

The following example shows data being passed for I/O data type REG.

XW00000

XW00001

XW00002

XW00003

XW000016

DB000000

DB000000

MW00030

MF00032

X registers

YW00000

YW00001

YW00002

YW00003

YW000016

Y registersDB000002

MW00040

MF00042

AW00000

AW00001

AW00002

•••••••

MW00100

MW00101

MW00102

MA00100

•••

••••••••••

1



1 - 12

The following example shows data being passed for I/O data type VAL .

XW00000

XW00001

XW00002

XW00003

XW000016

DB000000

DB000000X registers

YW00000

YW00001

YW00002

YW00003

YW000016

Y registersDB000002

AW00000

AW00001

AW00002

MW00100

MW00101

MW00102

MA00100

MW00 +MW00

MF00200

+MF00202

+MF00204 →

+MW00300→

+MW00301 → MW00302

+MF00304→

+MF00306 → MF00308

••••••••••

••••••••••

We recommend that I-REG, L-REG, and F-REG are used when the I/O data is not bit type.

1

IMPORTANT

1.4 Functions

1 - 13

J User Function Specifications

This section uses the user functions shown below as examples to describe the procedure for

inputting programs.

Input Data DataType

Function Processing OutputData

DataType

IN1-B B-VAL Input is output as is. OUT1-B B-VAL

IN2-B B-VAL Input is output as is. OUT2-B B-VAL

IN3-I I-REG The value in the register specified by IN3-I isdoubled and stored in the register specified byOUT3-I.

OUT3-I I-REG

IN4-F F-REG The value in the register specified by IN4-F is divid-ed by 2.0 and stored in the register specified byOUT4-F.

OUT4-F F-REG

ADDRESS ADR-IN S The value in the register specified by IN3-I ismultiplied by 4 and stored in the register speci-fied by ADDRESS.

S The value in the register specified by IN4-F isdoubled and stored in the second and third wordsspecified by OUT-F.

− −

1



1 - 14

J Creating User Functions

The procedure for creating user functions is described below.

1. Open Programs in the FileManagerWindow, right-clickFunction Programs and double-clickMake New DWG (N).

2. Enter FUNC1 in the DWG Name Field and select FUNC as the DWG Type.

3. Click the OK Button. The ladder program editing window for FUNC1 will be displayed.

1

1.4 Functions

1 - 15

4. Select Open(O), Drawing(R), and then Properties(R) from File Menu in the EngineeringManager Window.

5. If required, change the settings for the numbers of registers used by user functions. Thedefault settings have been used in this example.

1



1 - 16

6. Display the I/ODefinition Tab Page and set theNumber of Input, Number of Address Input,and Number of Output.

The setting areas for the set number of inputs and outputs will be displayed. Specify theinput type and output type.

7. Set the comments for each type.

8. Return to the Ladder Program EditingWindow and create the ladder program for FUNC1.

1

1.4 Functions

1 - 17

The following dialog box will be displayed.

9. Click the Yes Button to save FUNC 1.

J Programming a Function Call

The procedure for programming a function call is described below.

1. To create a program that will use FUNC1, enter the drawing name and drawing type in theInput DWG Name dialog box.

2. Click the OK Button.

3. Set the FSTART instruction.

fstart

4. Enter the function name.

1



1 - 18

5. The function format will be displayed. Program the input section first, followed by the ad-dress input section, and then the output section.

Programming Input Section

Program the input section using the following procedure.

1. To program the bit input section (defined using B-VAL), enter the N.O. instruction, and thenset the FIN instruction.

The function input parameter and the N.O. instruction will be connected.

2. To program the integer and real-number input sections (defined by I-REG and F-REG, re-spectively), set the FIN instruction.

1

1.4 Functions

1 - 19

The function input parameter and register number will be connected.

3. Enter the register number.

Programming Address Input Section

Program the address input section using the following procedure.

1. To program the address input section, set the FIN instruction.

2. Enter the register number.

Programming Output Section

Program the output section using the following procedure.

1. To program the bit output section (defined by B-VAL), set the FOUT instruction.

1



1 - 20

2. Enter the COIL instruction.

The function output parameter and the COIL instruction will be connected.

3. To program the integer and real-number output sections (defined by I-REG and F-REG,respectively), set the FOUT instruction.

The function output parameter and register number will be connected.

4. Enter the register numbers

The procedure for programming a function call has now been completed.

1

2 -1

2Managing Registers

This chapter introduces the registers according to their application and de-

scribes register attributes and the register designation methods.

2.1 Register Designation Methods 2 - 2. . . . . . . . . .

2.2 Data Types 2 - 3. . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Register Types 2 - 5. . . . . . . . . . . . . . . . . . . . . . . .2.3.1 Registers in Drawings 2 - 5. . . . . . . . . . . . . . . . . . . . . . . .

2.3.2 Registers in Functions 2 - 6. . . . . . . . . . . . . . . . . . . . . . .

2.3.3 Internal CPU Registers 2 - 11. . . . . . . . . . . . . . . . . . . . . . .

2.3.4 Subscripts i and j 2 - 11. . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3.5 I/O and Registers in Functions 2 - 13. . . . . . . . . . . . . . . .

2.3.6 Register Ranges in Programs 2 - 14. . . . . . . . . . . . . . . . .

2.4 Managing Symbols 2 - 15. . . . . . . . . . . . . . . . . . . .2.4.1 Symbols in Drawings 2 - 15. . . . . . . . . . . . . . . . . . . . . . . . .

2.4.2 Symbols in Functions 2 - 16. . . . . . . . . . . . . . . . . . . . . . . .

2.5 Upward Symbols Link and Automatic

Allocation 2 - 17. . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5.1 Upward Linking of Symbols 2 - 17. . . . . . . . . . . . . . . . . . .

2.5.2 Automatic Register Number Allocation 2 - 18. . . . . . . . . .

2

Managing Registers

2 -2

2.1 Register Designation Methods

Registers can be designated by direct designating register numbers or by designating symbols. Re-

fer to Table 2.1. These two register designation methods can be used together in the user programs.

If symbolic designation is used, assign a register number to a symbol in the symbol table described

later in this manual. For details, refer to the corresponding Machine Controller User’s Manual: De-

sign and Maintenance.

Table 2.1 Register Designation Methods

Designation Type Designation Method

Direct register numberdesignation

Bit registers: MB00100AxInteger registers: MW00100xDouble integer registers: ML00100xReal number registers: MF00100xAddress registers: MA00100x

x: For subscripts, add the subscript i or j after the register number.

Symbolic designation Bit registers: RESET-A.xInteger registers: STIME-H.xDouble integer registers: POS-REF.xReal number registers: IN-DEF.xAddress registers: PID-DATA.x

Address registers are designated using 8 alphanumeric characters or less.

x: For subscripts, add a period (.) and then the subscript i or j after the regis-ter number

J Direct Register Number Designation

Register number: V T No. [Bit No.] [Subscript]

Can designate the subscript i or j.When T = B (bit) (hexadecimal, 0 to F)

Register No. for V (decimal or hexadecimal)Data type of V (T: B | W | L | F | A)

Type of registerDrawing: (V: S | M | I | O | C | # | D)Function: (V: S | M | I | O | C | # | D | X | Y | Z | A)

J Symbolic Designation

Symbol: [Symbol Name] [Subscript]

Required if a subscript is to be used(symbol name and subscript delimiter)

(Name given to the register, 8 characters or less)X XXXXXXX

Alphanumeric characters or symbols

Alphabetic character or symbol(A numeral cannot be designated at thebeginning of a symbol name.)

Can designate the subscript i or j.

[.]

2

2.2 Data Types

2 -3

2.2 Data Types

As shown in Table 2.2, there are five types of data: bit, integer, double-length integer, real number,

and address. These are used according to the purpose. Address data is used only for pointer designa-

tions within a function.

For details, refer to the corresponding Machine Controller User’s Manual: Design and Mainte-

nance.

Table 2.2 Data Types and Numeric Range

Type Data Type Numeric Range Remarks

B Bit ON OFF Used in relay circuits.

W Integer −32768 to +32767(8000H) (7FFFH)

Used in numeric operations.

The values in parentheses ( ) are used in logic opera-tions.

Normally used in a series of instruction groups that be-gin with an integer entry instruction ( ⊦ ).

Can also be used in a series of instruction groups thatbegin with a real number entry instruction ( ).

L Double integer −2147483648 to +2147483647(80000000H) (7FFFFFFFH)

Used in numeric operations.

The values in parentheses ( ) are used in logic opera-tions.

Normally used in a series of instruction groups thatbegin with an integer entry instruction ( ⊦ ).

Can also be used in a series of instruction groups thatbegin with a real number entry instruction ( ).

F Real number ±(1.175E−38 to 3.402E+38), 0 Used in numeric operations.

Can only be used in a series that begins with a real num-ber entry instruction ( ). Cannot be used in an instruc-tion group that begins with an integer entry instruction( ⊦ ).

A Address 0 to 32767 Used only for pointer designations.

2

Managing Registers

2 -4

J Register Designations and Data Types⊦

Figure 2.1 shows the register designations and data types.

[MW00100]

[MW00103]

[MW00102]

[MW00101]

[ML00100][MF00100]

[ML00102][MF00102]

[MB00103A]

[MW001036]

F E D C B A 9 8 7 6 5 4 3 2 1 0

Figure 2.1 Register Designations and Data Types

J Pointer Designations

Figure 2.2 shows a pointer designation.

2

Memory addressRegister area

[MB001003]

[ML00100][MF00100][MW00101]

[MW00103]

[MW00102]

[MW00100]

[MA00100]

nn

.

.

.

Figure 2.2 Pointer Designation

In Figure 2.2, MA00100 specifies memory address nn of MW00100. By passing MA00100 to a

function as an argument, the register area below MW00100 can be used for the internal processing

in the function.

The use of an address as an argument of a function is referred to as a pointer designation. In this

way, the register area belowMW00100 can be used for bits, integers, double integers, and real num-

bers.

2.3 Register Types

2 -5

2.3 Register Types

This section describes the types, contents, and referencing ranges of registers.

2.3.1 Registers in Drawings

The seven types of register shown in Table 2.3 can be used in drawings.


nance.

Table 2.3 Register Types and Designation Methods in Drawings

Type Name Designation Method Description Characteristic

S System registers SB, SW, SL, SFnnnnn(SAnnnnn)

System registers provided by the system. Register num-ber nnnnn is expressed as a decimal number. When thesystem is started, SW00000 to SW00049 are cleared to0.

Common to alldrawings

M Data registers MB, MW, ML, MFnnnnn(MAnnnnn)

Data registers are shared by all drawings. Used as inter-faces between drawings. Register number nnnnn is ex-pressed as a decimal number.

I Input registers IB, IW, IL, IFhhhh(IAhhhh)

Input registers are used by the I/O Module and Servoparameter interfaces. Register number hhhh is expressedas a hexadecimal number.

O Output registers OB, OW, OL, Ofhhhh(OAhhhh)

Output registers are used by the I/O Module and Servoparameter interfaces. Register number hhhh is expressedas a hexadecimal number.

C Constantregisters CB, CW, CL, CFnnnnn(CAnnnnn)

Constant registers can be referenced only in the program.Register number nnnnn is expressed as a decimal num-ber.

# # registers #B, #W, #L, #Fnnnnn(#Annnnn)

# registers can be referenced only in the program andonly in the corresponding drawing.

The actual range used is specified by the user on theMPE720. Register number nnnnn is expressed as a deci-mal number.

Unique to eachdrawing

D D registers DB, DW, DL, DFnnnnn(DAnnnnn)

D registers are unique to each drawing and can be refer-enced only in the corresponding drawing.

The actual range used is specified by the user on theMPE720. Register number nnnnn is expressed as a deci-mal number.

2

Managing Registers

2.3.2 Registers in Functions

2 - 6


The 11 types of register shown in Table 2.4 can be used in functions.

Table 2.4 Register Types and Designation Methods for Functions

Note SA, MA, IA, OA, DA, #A, and CA can also be used inside functions.

Type Name Designation Method Description Characteristic

X Function input registers XB, XW, XL, XFnnnnn Input to a function.

Bit input: XB000000 to XB0000F Integer input: XW00001 to XW00016 Long integer input: XL00001 to XL00015

Register number nnnnn is expressed as a decimal number.

Unique to each function

Y Function output registers YB, YW, YL, YFnnnnn Output from a function.

Bit input: YB000000 to YB0000F Integer input: YW00001 to XW00016 Long integer input: YL00001 to YL00015

Register number nnnnn is expressed as a decimal number.

Z Internal function registers ZB, ZW, ZL, ZFnnnnn Internal registers unique to each function. Can be used in the function for internal processes. Register number nnnnn is expressed as a decimal number.

A External function registers AB, AW, AL, AFnnnnn External registers that use the address input value as the base address. For linking with S, M, I, O, #, and Dannnnn registers. Register number nnnnn is expressed as a decimal number.

# # registers #B, #W, #L, #Fnnnnn (#Annnnn)

Registers that can be referenced only in a program and only in the corresponding drawing. The actual range used is specified by the user on the MPE720. Register number nnnnn is expressed as a decimal number.

D D registers DB, DW, DL, DFnnnnn (DAnnnnn)

Registers unique to each drawing. Can be referenced only in the corresponding drawing. The actual range used is specified by the user on the MPE720. Register number nnnnn is expressed as a decimal number.

S System registers SB, SW, SL, SFnnnnn (SAnnnnn)

Same as the registers for drawings. These registers can be referenced from any drawings or function. Use them carefully when the same function is referenced from drawings with different priority levels.

Common to all drawings

M Data registers MB, MW, ML, MFnnnnn (MAnnnnn)

I Input registers IB, IW, IL, IFhhhh (IAhhhh)

O Output registers OB, OW, OL, Ofhhhh (OAhhhh)

C Constant registers CB, CW, CL, CFnnnnn (CAnnnnn)

2.3 Register Types

2 - 7

2

Notes on the use of the registers (X, Y, Z, and D) in functions are described below with examples.

■ Notes on the Use of X Registers

X registers are used to input values to a function. If values have not been input to the function, unspecified value will remain in the register. X registers can only be used within the range speci-fied by the input definition of the function. Do not use X register for which a value has not been input.

The following diagrams show examples of using X registers.

Example of ladder program

Example of X register input values

DB000000

DB000001

X registers

XW00000XW00001XW00002

XW00016

MW00030

MW00032

Function

Unspecified value

With a value input

Managing Registers


2 - 8

■ Notes on the Use of Y Registers

Y registers are used to output values from the function to a drawing that uses the function. If values have not been written to Y registers in the function, unspecified Y register values will be output. Do not end the function with any Y register values being left unspecified.

The following diagrams show examples of using Y registers.

Example of ladder program

Example of Y register output values (example of when there is no program to store a

value in YW00002)

Y registers

YW00000YW00001YW00002

YW00016

Function

XW00001 ⇒ YW00001

XB000000 YB000000

MW00034MW00036

DB000002DEND

Outputs an unspecified value.

Unspecified value

With a value written to the function

2.3 Register Types

2 - 9

2

■ Notes on the Use of Z Registers

Z registers are used for internal operations. The Z register values will be cleared upon ending of the function (DEND execution). When the function is called again as is, the values for the Z registers are unspecified. To prevent this, set the initial values in the function in advance whenever the function is called.

Due to the characteristics stated above, the Z registers are unsuitable for use in instructions, such as those listed in the table below, that require previous values to be stored even after the function is ended.

Type Name SymbolRelay Circuit Instructions RISING PULSE

FALLING PULSE

10-MS ON-DELAY TIMER

10-MS OFF-DELAY TIMER

1-S ON-DELAY TIMER

1-S OFF-DELAY TIMER

DDC Instructions PI CONTROL PI

PD CONTROL PD

PID CONTROL PID

FIRST-ORDER LAG LAG

PHASE LEAD LAG LLAG

LINEAR ACCELERATOR/DECELERATOR 1

LAU

LINEAR ACCELERATOR/DECELERATOR 2

SLAU

PULSE WIDTH MODULATION PWM

Table Data Operation Instructions

QUEUE TABLE READ QTBLR

QUEUE TABLE READ AND INCREMENT QTBLRI

QUEUE TABLE WRITE QTBLW

QUEUE TABLE WRITE AND INCREMENT

QTBLWI

Managing Registers


2 - 10

■ Notes on the Use of D Registers

As with Z registers, D registers are used for internal operations. Unlike Z registers, however, the previous values from when the function was last executed are stored for use with the D registers when the function is called again. D register data is stored until the power is turned OFF.

The initial values when the power is turned ON again depend on the setting for Startup D register Clear (MPE720 Ver.5)/D Register Clear when Start (MPE720 Ver.6).

Setting options Disabled (MPE720 Ver.5)/Disable (MPE720 Ver.6): Undefined Enabled (MPE720 Ver.5)/Enable (MPE720 Ver.6): 0

The following section describes how to enable or disable the D register clear at startup.

With the use of MPE720 Ver.5

1. Open Definition Folder in the File Manager Window and double-click System Configuration.

2. Select either Disabled or Enabled as the Startup D register Clear.

With the use of MPE720 Ver.6

1. Select File and then Environment Setting from the main menu.

2. Select Setup and then System Setting from the tree in the Environment Setting dialog box.

2.3 Register Types

2 - 11

2

3. Select either Disable or Enable as the D Register Clear when Start.

2.3.3 Internal CPU Registers

The registers shown in Table 2.5 are provided inside the CPU. These are used for processing user programs.

Table 2.5 Internal CPU Registers

2.3.4 Subscripts i and j

Subscripts i and j are contained in registers used exclusively for modifying a relay number or register number. The functions of i and j are the same. These subscripts are explained below, giving an example for each register data type.

■ Subscripts Attached to Bit Data

When subscript i or j is attached to bit data, the value of i or j is added to the relay number. For example, if i = 2, MB000000i will be the same as MB000002. If j = 27, MB000000j will be the same as MB00001B.

Register Use

A register Used as a register for logic operations, integer operations, and double-length integer operations.

F register Used as a register for real number operations.

B register Used for relay circuit operations.

I register Used as an index register for I.

J register Used as an index register for J.

EquivalentMB0000002

MB000000i

2 i

Managing Registers

2.3.4 Subscripts i and j

2 -12

J Subscripts Attached to Integer Data

When a subscript is attached to integer data, the value of i or j is added to the relay number.

For example, if i = 3, MW00010i will be the same as MW00013.

If j = 30, MW00001j will be the same as MW00031.

00030

MW00001j

MW00031jEquivalent

J Subscripts Attached to Double-length Integer Data

When a subscript is attached to double-length integer data, the value of i or j is added to the

relay number. For example, if i = 1, ML00000i will be the same as ML00001.

ML00000j when j = 0, and ML00000j when j = 1 will be as follows:

MW00002

��

MW00001

Higher-place wordMW00001

Lower-place wordMW00000

ML00000J when j = 0: ML00000

ML00000J when j = 1: ML00001

J Subscripts Attached to Real Number Data

When a subscript is attached to long integer data, the value of i or j is added to the relay number.

For example, if i = 1, MF00000i will be the same as MF00001.

MF00000j when j = 0, and MF00000j when j = 1 will be as follows:

MW00002 MW00001

MF00000J when j = 0: MF00000

MF00000J when j = 1: MF00001

Higher-place wordMW00001

Lower-place wordMW00000

J Programming Example Using Subscripts

The programming code shown in Figure 2.3 sets the sum of 100 registers from MW00100 to

MW00199 in MW00200 using subscript j.

00000

FOR J = 00000 to 00099 by 00001

MW00200 + MW00100j

FEND

MW00200

MW00200

Figure 2.3 Programming Example Using a Subscript

2

2.3 Register Types

2 -13

2.3.5 I/O and Registers in Functions

Table 2.6 shows the I/O and registers referenced in functions.


nance.

Table 2.6 Correspondence Between I/O and Registers in Functions

Function I/O Function Register

Bit inputs The bit numbers increase continuously from XB000000 in order of the bitinputs: XB000000, XB000001, XB000002,……, XB00000F

Integer, double integer,and real number inputs

The register numbers increase continuously from XW, XL, and XF00001 inorder of the integer, double-length integer, and real number inputs:

XW00001, XW00002, XW00003,……, XW00016XL00001, XL00003, XL00005,……, XL00015XF00001, XF00003, XF00005,……, XF00015

Address inputs The address input values correspond to register numbers 0 of the externalregister:

Input value = MA00100: MW00100 = AW00000, MW00100 = AW00001...

Bit outputs In order of bit outputs: YB000000, YB000001, YB000002, YB00000F

Integer, double integer,and real number outputs

The register numbers increase continuously from YW, YL, and YF00001 inorder of the integer, double-length integer, and real number outputs.

YW00001, YW00002, YW00003, ......, YW00016YL00001, YL00003, YL00005, ......, YL00015YF00001, YF00003, FY00005, ......, YF00015

XB000000FUNC-O11

XB000001

XW00001

XB000002

XL00002

XW00004

XW00005

YB000000

YB000001

YB000002

YL00001

YL00003

YW00005

YL00006

AW00000MA01000

======>

======>

MW00400

ML00402

MW00404

MW00406

ML00410

ML00412

MW00414

ML00416

======>

======>

======>

======>

======>

======>

Figure 2.4 Function Program

If “⊦AW00000 +AW00001⇒AW00002” is written in the internal function program in Figure

2.4, the operation “⊦MW01000 + MW01001⇒MW01002” will be executed.

2

Managing Registers

2.3.6 Register Ranges in Programs

2 -14

2.3.6 Register Ranges in Programs

Figure 2.5 shows the ranges that can be referenced for registers in programs .

A

B

C

A

D

DWG H03 (Drawing)

Max. 500 steps

Registers for individual drawings

Constant data. 16,384 words max.(#B, #W, #L, #Fnnnnn)

Individual data. 16,384 words max.(DB, DW, DL, DFnnnnn)

Registers common to all drawings

System registers(SB, SW, SL, SFnnnnn)

Data registers(MB, MW, ML, MFnnnnn)

Input registers(IB, IW, IL, IFnnnnn)

Output registers(OB, OW, OL, OFnnnnn)

Constant registers(CB, CW, CL, CFnnnnn)

Registers for individual functions

Function inputregisters.(AB, AW, AL,AFnnnnn)

Function output registers. 17 words(XB, XW, XL, XFnnnnn)

Internal function registers. 17 words(YB, YW, YL, YFnnnnn)

Constant data. 64 words max.(ZB, ZW, ZL, ZFnnnnn)

Constant data. 16,384 words max.(#B, #W, #L, #Fnnnnn)

Individual data. 16,384 words max.(DB, DW, DL, DFnnnnn)

Program

FUNC-000 (Function)

Max. 500 steps

Program

A: Registers that are common to all drawings can be referenced from any drawing or function.

B: Registers that are unique to each drawing can be referenced only from within that drawing.

C: Registers that are unique to each function can be referenced only from within that function.

D: Registers that are common to all drawings and registers that are unique to each drawing can bereferenced from a function using the external function registers.

Figure 2.5 Referencing Ranges for Registers in Programs

2

2.4 Managing Symbols

2 -15

2.4 Managing Symbols

This section describes managing symbols in the drawings and functions.

2.4.1 Symbols in Drawings

All symbols used in the drawings are managed with the drawing symbol table shown in Table

2.7.

The registration of the symbols in the symbol table and the designation of the register numbers

can be performed on the MPE720 Symbol Definition Tab Page. The registration, deletion, and

modification of the symbols, as well as the designation or modification of the register numbers

can be done at any time during program preparation. Up to 200 symbols can be registered for

one drawing.

For the method of defining the drawing symbol table, refer to the Machine Controller

MP900/MP2000 Series MPE720 Software for Programming Device User’s Manual (manual

No. SIEPC88070005).

J Unregistered Symbols in Programming

The symbol will be registered automatically in the drawing symbol table, but without a register

number. Designate the register number after the program has been written.

Table 2.7 Drawing Symbol Table

No. Register No. Symbol Size * Remarks

0 IB00000 STARTPBL 1 The register number is expressed as a hexade-cimal number.

1 OB00000 STARTCOM 1 The register number is expressed as a hexade-cimal number.

2 MW00000 SPDMAS 1

3 MB000010 WORK-DB 16

4 MW00010 PIDDATA 10

5 MW00020 LAUIN 1

6 MW00021 LAUOUT 1

:

N

* If a program iswritten using data configurations such as arrays or indexed data, de-fine the size to be used in the data configuration. For example, if the data is refer-enced as PIDDATA.i and i varies in a range of 0 to 9, define the size as 10.

2

Managing Registers

2.4.2 Symbols in Functions

2 -16

2.4.2 Symbols in Functions

All symbols used in the functions are managed with the function symbol table shown in Table

2.8.

The registration, deletion, and modification of the symbols, as well as the designation or modi-

fication of the register numbers is the same as for symbols in drawings.

For the method of defining the function symbol table, refer to the Machine Controller

MP900/MP2000 Series MPE720 Software for Programming Device User’s Manual (manual

No. SIEPC88070005).

Table 2.8 Function Symbol Table

No. Register No. Symbol Size * Remarks

0 XB000000 EXECOM 1

1 XW00001 INPUT 1

2 AW00001 P-GAIN 1

3 AB00000F ERROR 1

4 YB000000 PIDEXE 1

5 YW00001 PIDOUT 1

6 ZB000000 WORKCOIL 4

7 ZW00001 WORK1 1

8 ZW00002 WORK2 1

:

N

* If a program is prepared using data configurations such as arrays or indexed data,define the size to be used in the data configuration. For example, if the data is refer-enced as PIDDATA.i and i varies in a range of 0 to 9, define the size as 10.

2

2.5 Upward Symbols Link and Automatic Allocation

2 -17

2.5 Upward Symbols Link and Automatic Allocation

This section describes the upward linking of symbols and the automatic allocation of register num-

bers.

2.5.1 Upward Linking of Symbols

Symbols can be defined so that symbol names defined in drawings with different hierarchies

can be used to reference the same register number. This is called symbol linking.

Normally, a symbol that is defined for a drawing or function will be unique to that drawing or

function program, and cannot be referenced from other drawings or functions. By using the

upward linking function for symbols, a symbol defined in a parent drawing can also be refer-

enced by a child drawing, provided the drawing is a process drawing of the same type.

Upward linking of symbols are set using the MPE720 Symbol Definition Tab Page. For details

on the setting method, refer to the Machine Controller MP900/MP2000 Series MPE720 Soft-

ware for Programming Device User’s Manual (manual No. SIEPC88070005).

Table 2.9 Linkable Symbols and Symbol Table for Linking

Symbol

Symbol Table Parent Drawing Child Drawing GrandchildDrawing

Parent drawing symbols

Child drawing symbols

Grandchild drawing symbols

Symbols within a function

Yes: PossibleNo: Not possible

No

No No No

No

No

No

No

No

Yes

Yes Yes

2

Managing Registers

2.5.2 Automatic Register Number Allocation

2 -18

2.5.2 Automatic Register Number Allocation

The automatic allocation of register numbers refers to the setting of the leading register number

and the automatic allocation of register numbers to symbols for which no register numbers

have been allocated.

Automatic allocation of register numbers are set using the MPE720 Symbol Definition Tab

Page. For details of the setting method, refer to theMachine Controller MP900/MP2000 Series

MPE720 Software for Programming Device User’s Manual (manual No. SIEPC88070005).

Table 2.10 Automatic Allocation of Register Numbers

Drawing SymbolTable

Automatic NumberAllocation

Function Symbol Table Automatic NumberAllocation

System registers S Yes System registers S Yes

Input registers I Yes Input registers I Yes

Output registers O Yes Output registers O Yes

Data registers M Yes Data registers M Yes

# registers # Yes # registers # Yes

C registers C Yes C registers C Yes

D registers D Yes D registers D Yes

− − Function input registers X No

− − Function output registers Y No

− − Internal function registers Z Yes

− − External function registersA No

Yes: Automatic number allocation possibleNo: Automatic number allocation not possible

2

3 -1

3Ladder Instructions

This chapter describes the functions, format, register operation, and pro-

gram examples for each ladder instruction.

Instruction Descriptions 3 - 5. . . . . . . . . . . . . . . . . . . .3.1 Instructions with [ ] 3 - 7. . . . . . . . . . . . . . . . . . . . .3.2 Program Control Instructions 3 - 9. . . . . . . . . . . .

3.2.1 CHILD DRAWING CALL Instruction (SEE) 3 - 9. . . . . .

3.2.2 DRAWING END Instruction (DEND) 3 - 10. . . . . . . . . . . .

3.2.3 MOTION PROGRAM CALL Instruction (MSEE) 3 - 11. .

3.2.4 FOR Structure 3 - 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.5 WHILE Structure 3 - 13. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2.6 IF Structure without ELSE 3 - 15. . . . . . . . . . . . . . . . . . . .

3.2.7 IF Structure with ELSE 3 - 16. . . . . . . . . . . . . . . . . . . . . . .

3.2.8 FUNCTION CALL Instruction (FSTART) 3 - 17. . . . . . . .

3.2.9 FUNCTION INPUT Instruction (FIN) 3 - 18. . . . . . . . . . . .

3.2.10 FUNCTION OUTPUT Instruction (FOUT) 3 - 19. . . . . .

3.2.11 COMMENT Instruction (COMMENT) 3 - 23. . . . . . . . . .

3.2.12 EXTENSION PROGRAM CALL Instruction(XCALL) 3 - 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3 Direct I/O Instructions 3 - 25. . . . . . . . . . . . . . . . . .3.3.1 INPUT STRAIGHT Instruction (INS) 3 - 25. . . . . . . . . . . .

3.3.2 OUTPUT STRAIGHT Instruction (OUTS) 3 - 28. . . . . . .

3.4 Relay Circuit Instructions 3 - 31. . . . . . . . . . . . . . .3.4.1 NO CONTACT Instruction 3 - 31. . . . . . . . . . . . . . . . . . . .

3.4.2 NC CONTACT Instruction 3 - 32. . . . . . . . . . . . . . . . . . . . .

3.4.3 COIL Instruction 3 - 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

Ladder Instructions

3 -2

3.4.4 SET COIL and RESET COIL Instructions 3 - 31. . . . . . .

3.4.5 RISING PULSE Instruction 3 - 33. . . . . . . . . . . . . . . . . . . .

3.4.6 FALLING PULSE Instruction 3 - 34. . . . . . . . . . . . . . . . . .

3.4.7 10-MS ON-DELAY TIMER Instruction 3 - 35. . . . . . . . . .

3.4.8 10-MS OFF-DELAY TIMER Instruction 3 - 38. . . . . . . . .

3.4.9 1-S ON-DELAY TIMER 3 - 40. . . . . . . . . . . . . . . . . . . . . . .

3.4.10 1-S OFF-DELAY TIMER 3 - 42. . . . . . . . . . . . . . . . . . . . .

3.4.11 Examples of Relay Circuit Combinations 3 - 43. . . . . . .

3.5 Logical Operation Instructions 3 - 45. . . . . . . . . . .3.5.1 AND Instruction 3 - 45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.5.2 OR Instruction 3 - 46. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.5.3 XOR Instruction 3 - 46. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6 Numeric Operation Instructions 3 - 48. . . . . . . . . .3.6.1 INTEGER ENTRY Instruction 3 - 48. . . . . . . . . . . . . . . . .

3.6.2 REAL NUMBER ENTRY Instruction 3 - 49. . . . . . . . . . . .

3.6.3 STORE Instruction 3 - 50. . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6.4 ADDITION Instruction (+) 3 - 51. . . . . . . . . . . . . . . . . . . . .

3.6.5 SUBTRACTION Instruction (−) 3 - 52. . . . . . . . . . . . . . . .

3.6.6 EXTENDED ADDITION Instruction (++) 3 - 53. . . . . . . .

3.6.7 EXTENDED SUBTRACTION Instruction (− −) 3 - 55. . .

3.6.8 MULTIPLICATION Instruction (×) 3 - 56. . . . . . . . . . . . . .

3.6.9 DIVISION Instruction (÷) 3 - 57. . . . . . . . . . . . . . . . . . . . . .

3.6.10 MOD Instruction 3 - 58. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6.11 REM Instruction 3 - 59. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6.12 INC Instruction 3 - 60. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6.13 DEC Instruction 3 - 61. . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.6.14 ADD TIME Instruction (TMADD) 3 - 62. . . . . . . . . . . . . .

3.6.15 SUBTRACT TIME Instruction (TMSUB) 3 - 63. . . . . . . .

3.6.16 SPEND TIME Instruction (SPEND) 3 - 65. . . . . . . . . . . .

3.7 Numeric Conversion Instructions 3 - 68. . . . . . . .3.7.1 SIGN INVERSION Instruction (INV) 3 - 68. . . . . . . . . . . .

3.7.2 1’S COMPLEMENT Instruction (COM) 3 - 69. . . . . . . . . .

3.7.3 ABSOLUTE VALUE CONVERSION Instruction(ABS) 3 - 69. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.7.4 BINARY CONVERSION Instruction (BIN) 3 - 70. . . . . . .

3.7.5 BCD CONVERSION Instruction (BCD) 3 - 71. . . . . . . . .

3.7.6 PARITY CONVERSION Instruction (PARITY) 3 - 72. . . .

3.7.7 ASCII CONVERSION 1 Instruction (ASCII) 3 - 72. . . . . .

3.7.8 ASCII CONVERSION 2 Instruction (BINASC) 3 - 74. . . .

3.7.9 ASCII CONVERSION 3 Instruction (ASCBIN) 3 - 75. . . .

3

3 -3

3.8 Number Comparison Instructions 3 - 77. . . . . . . .

3.8.1 Comparison Instructions 3 - 77. . . . . . . . . . . . . . . . . . . . . .

3.8.2 RANGE CHECK Instruction (RCHK) 3 - 79. . . . . . . . . . .

3.9 Data Manipulation Instructions 3 - 81. . . . . . . . . .3.9.1 BIT ROTATION LEFT Instruction (ROTL) and

BIT ROTATION RIGHT Instruction (ROTR) 3 - 81. . . .

3.9.2 MOVE BITS Instruction (MOVB) 3 - 82. . . . . . . . . . . . . . .

3.9.3 MOVE WORD Instruction (MOVW) 3 - 84. . . . . . . . . . . .

3.9.4 EXCHANGE Instruction (XCHG) 3 - 85. . . . . . . . . . . . . . .

3.9.5 SET WORDS Instruction (SETW) 3 - 87. . . . . . . . . . . . . .

3.9.6 BYTE-TO-WORD EXPANSION Instruction(BEXTD) 3 - 88. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.9.7 WORD-TO-BYTE COMPRESSION Instruction(BPRESS) 3 - 90. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.9.8 BINARY SEARCH Instruction (BSRCH) 3 - 91. . . . . . . .

3.9.9 SORT Instruction (SORT) 3 - 93. . . . . . . . . . . . . . . . . . . . .

3.9.10 BIT SHIFT LEFT Instruction (SHFTL) andBIT SHIFT RIGHT Instruction (SHFTR) 3 - 93. . . . . . .

3.9.11 COPY WORD Instruction (COPYW) 3 - 95. . . . . . . . . . .

3.9.12 BYTE SWAP Instruction (BSWAP) 3 - 96. . . . . . . . . . . .

3.10 Basic Function Instructions 3 - 98. . . . . . . . . . . .3.10.1 SQUARE ROOT Instruction (SQRT) 3 - 98. . . . . . . . . .

3.10.2 SINE Instruction (SIN) 3 - 99. . . . . . . . . . . . . . . . . . . . . . .

3.10.3 COSINE Instruction (COS) 3 - 100. . . . . . . . . . . . . . . . . . .

3.10.4 TANGENT Instruction (TAN) 3 - 101. . . . . . . . . . . . . . . . .

3.10.5 ARC SINE Instruction (ASIN) 3 - 102. . . . . . . . . . . . . . . . .

3.10.6 ARC COSINE Instruction (ACOS) 3 - 103. . . . . . . . . . . . .

3.10.7 ARC TANGENT Instruction (ATAN) 3 - 103. . . . . . . . . . . .

3.10.8 EXPONENT Instruction (EXP) 3 - 105. . . . . . . . . . . . . . . .

3.10.9 NATURAL LOGARITHM Instruction (LN) 3 - 106. . . . . .

3.10.10 COMMON LOGARITHM Instruction (LOG) 3 - 107. . . .

3.11 DDC Instructions 3 - 108. . . . . . . . . . . . . . . . . . . . .3.11.1 DEAD ZONE A Instruction (DZA) 3 - 108. . . . . . . . . . . . .

3.11.2 DEAD ZONE B Instruction (DZB) 3 - 109. . . . . . . . . . . . .

3.11.3 UPPER/LOWER LIMIT Instruction (LIMIT) 3 - 111. . . . .

3.11.4 PI CONTROL Instruction (PI) 3 - 113. . . . . . . . . . . . . . . . .

3.11.5 PD CONTROL Instruction (PD) 3 - 116. . . . . . . . . . . . . . .

3.11.6 PID Control Instruction (PID) 3 - 119. . . . . . . . . . . . . . . . .

3.11.7 FIRST-ORDER LAG Instruction (LAG) 3 - 123. . . . . . . . .

3

Ladder Instructions

3 -4

3.11.8 PHASE LEAD/LAG Instruction (LLAG) 3 - 125. . . . . . . . .

3.11.9 FUNCTION GENERATOR Instruction (FGN) 3 - 127. . .

3.11.10 INVERSE FUNCTION GENERATOR Instruction(IFGN) 3 - 130. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11.11 LINEAR ACCELERATOR/DECELERATOR 1Instruction (LAU) 3 - 133. . . . . . . . . . . . . . . . . . . . . . . . . .

3.11.12 LINEAR ACCELERATOR/DECELERATOR 2Instruction (SLAU) 3 - 137. . . . . . . . . . . . . . . . . . . . . . . . .

3.11.13 PULSE WIDTH MODULATION Instruction(PWM) 3 - 144. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.12 Table Data Manipulation Instructions 3 - 146. . . .

3.12.1 BLOCK READ Instruction (TBLBR) 3 - 147. . . . . . . . . . .

3.12.2 BLOCK WRITE Instruction (TBLBW) 3 - 148. . . . . . . . . .

3.12.3 ROW SEARCH Instruction (TBLSRL) 3 - 150. . . . . . . . .

3.12.4 COLUMN SEARCH Instruction (TBLSRC) 3 - 151. . . . .

3.12.5 BLOCK CLEAR Instruction (TBLCL) 3 - 152. . . . . . . . . .

3.12.6 BLOCK MOVE Instruction (TBLMV) 3 - 153. . . . . . . . . . .

3.12.7 Queue Table Read Instructions(QTBLR, QTBLRI) 3 - 155. . . . . . . . . . . . . . . . . . . . . . . . .

3.12.8 Queue Table Write Instructions(QTBLW, QTBLWI) 3 - 157. . . . . . . . . . . . . . . . . . . . . . . . .

3.12.9 QUEUE POINTER CLEAR Instruction (QTBLCL) 3 - 159

3

Instruction Descriptions

3 -5

Instruction Descriptions

This chapter describes the functions, format, register operation, and program examples of each lad-

der instruction under the following headings.

J Function

Describes the function of the instruction.

J Format

Describes the operands and format of the instruction.

J Register Operation

Shows the storage condition of each internal CPU register in the following table. The registers

shown in the table are provided inside the CPU. These registers are used to process user pro-

grams. The following example is for your reference. “Indeterminate” is not always provided.

Refer to the corresponding Machine Controller User’s Manual: Design and Maintenance for

details.

Register A F B I J

Storage Condition Indeterminate Indeterminate Not stored Stored Stored

Indeterminate: Stored or not stored depending on conditions.

Table 3.1 shows internal CPU registers and their application.

Table 3.1 Internal CPU Registers

Register Use

A register Used for logic, integer, and long integer operations.

F register Used for real number operations.

B register Used for relay circuit operations.

I register Used as index register (I).

J register Used as index register (J).

J Examples

Describes simple programming examples using the instruction.

3

Ladder Instructions

3 -6

J List of Ladder Instructions

Table 3.2 lists the ladder instructions.

Table 3.2 List of Ladder Instructions

Type of Instruction Word Symbols

Instructions with [ ] −

Program Control Instructions SEE, MSEE, FOR FEND, WHILE ON/OFF WEND, IFON/IFOFF ELSE IEND, FSTART, FIN, FOUT, DEND, COM-MENT, XCALL

Direct I/O Instructions INS, OUTS

Relay Circuit Instructions

s sT T

S R, , , ,

, ,,

, , ,

,

Logic Operation Instructions AND (∧), OR (∨), XOR (¨)

Numeric Operation Instructions , ,⇒, +, −, + +, − −, ×, ÷, MOD, REM, INC, DEC,TMADD, TMSUB, SPEND

Numeric Conversion Instructions INV, COM, ABS, BIN, BCD, PARITY, ASCII, BINASC,ASCBIN

Number Comparison Instructions <,≦, =,¸,≧, >, RCHK

Data Manipulation Instructions ROTL, ROTR, MOVB, MOVW, XCHG, SETW, BEXTD,BPRESS, BSRCH, SORT, SHFTL, SHFTR, COPYW,BSWAP

Basic Function Instructions SQRT, SIN, COS, TAN, ASIN, ACOS, ATAN, EXP, LN,LOG

DDC Instructions DZA, DZB, LIMIT, PI, PD, PID, LAG, LLAG, FGN, IFGN,LAU, SLAU, PWM

Table Data ManipulationInstructions

TBLBR, TBLBW, TBLSRL, TBLSRC, TBLCL, TBLMV,QTBLR, QTBLRI, QTBLW, QTBLWI, QTBLCL

System Functions COUNTER, FINFOUT, TRACE, DTRC-RD, FTRC-RD,MSG-SND, MSG-RCV

3

3.1 Instructions with [ ]

3 -7

3.1 Instructions with [ ]

This section describes the functions, formats, register operations, and program examples of instruc-

tions with [ ].

J Function

Using an instruction with [ ] enables conditional execution according to the immediately pre-

ceding value of the B register. The instruction enclosed in [ ] is executed only when the B regis-

ter is ON.

Only one instruction can be enclosed in a single pair of [ ].If [ ] is to be used for more than one instruction, enclose each instruction in [ ].

J Format

[Instruction]


B Register Is OFF

Register A F B I J

Storage Condition Stored Stored Stored Stored Stored

B Register Is ON

Register A F B I J

Storage Condition Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate

Indeterminate: Stored or not stored depending on conditions (depends on the instruction in [ ]).

J Examples

Example 1

Equivalent

MB000001

MB000011

MB000011

[SEE L01]

MB000001 MB000011

IFONSEE L01IEND

MB000011

3

IMPORTANT

Ladder Instructions

3 -8

Example 2

MB00000F

[ ⊦ MW00001] [+00100] [⇒MW00002]

MB00000F

MW00001 +00100 ⇒MW00002IEND

IFON

Equivalent

3

3.2 Program Control Instructions

3 -9


This section describes the functions, formats, and register operations of the program control

instructions.

3.2.1 CHILD DRAWING CALL Instruction (SEE)

The CHILD DRAWING CALL instruction is represented by SEE.

J Function

The SEE instruction is used to call a child drawing from a parent drawing or to call a grandchild

drawing from a child drawing. Calling is not possible between drawings of different types. For

example, SEE H01 cannot be specified in DWG.L.

J Format

SEE <child_drawing_No.>


Register A F B I J



SEE A01

Starts execution of child drawing A01

Completes execution of child drawing A01.

DWG.A

SEE A01

DWG.A01

DEND

3

Ladder Instructions

3.2.2 DRAWING END Instruction (DEND)

3 -10

3.2.2 DRAWING END Instruction (DEND)

The DRAWING END instruction is represented by DEND.

J Function

The DEND instruction defines the end of a drawing (DWG). Specify the DEND instruction

at the end of each drawing. This instruction is used to end all parent, child, and grandchild

drawings.

J Format

DEND


Register A F B I J



J Examples

Parent Drawing Child Drawing GrandchildDrawing

DWG.H

SEE H01

DEND

DWG.H01

SEE H01.01

DEND

DWG.H01.01

DEND

3


3 -11

3.2.3 MOTION PROGRAM CALL Instruction (MSEE)

The MOTION PROGRAM CALL instruction is represented by MSEE.

J Function

The MSEE instruction is used to call a motion program. The MSEE instruction can be used

only in H drawings. It cannot be used in A or L drawings.

J Format

Specify a motion program number and anMSEEwork register address after theMSEE instruc-

tion.

Example: MSEE MPM001 DA00000

Motion programnumber

MSEE work registeraddress

Motion program number

S Direct designation: MPM×××(×××: 001 to 256)

S Indirect designation: Any integer register

MSEE work register address

S Register address (except for # and C registers)


Register A F B I J



J Examples

Drawing H Motion Program

DWG.H MPM001

VEL [X] 6000 [Y] 6000;MOV [X] 1000 [Y] 1000;MVS [X] 2000;

END

MSEE MPM001 DA00000

The MSEE instruction can be used to call a motion program only from H drawings. It cannot be used from Aor L drawings.

3.2.4 FOR Structure

J Function

The instruction sequence surrounded by the FOR instruction and the corresponding FEND

instruction is executed by the number of times designated by {N = (B − A + 1)/C}. Variable

3

IMPORTANT

Ladder Instructions

3.2.4 FOR Structure

3 -12

V starts from initial value A and is incremented by C on each execution. The instruction se-

quence is ended when V > B. The registers shown in Figure 3.1 can be used for V, A, B, and

C.

V: Any integer register, any integer register with subscript, or any index register (I, J).A, B, C: Any integer register, any integer register with subscript, any constant register, or any

index register (I, J).(B > A > 0, C > 0)

Operation cannot be guaranteed for conditions other than the above.

Instruction sequence

To the next instruction

V = A

V = V + C

V : B

≦

>

Figure 3.1 Execution Control by the FOR Structure

Nesting Structures

The FOR, WHILE, and IF structures can contain other structures within themselves. Thisis called “nesting.” The maximum depth of a nested structures using FOR, WHILE, andIF is restricted to 9 levels.

J Format

Specify a variable, initial value, maximum value, and increment after the FOR instruction.

Variable Initialvalue

Maximumvalue

Increment

Example: FOR J = 00000 to 00099 by 00001 Variable:

S Any integer register

S Any integer register with subscript

S Any index register (I, J)

Initial value, maximum value, increment:



S Any constant

S Any index register (I, J)


Register A F B I J



3


3 -13

J Examples

The sum of values in 100 registers from MW00100 to MW00199 is stored in MW00200.

00000

MW00200 + MW00100jFEND

⇒ MW00200

⇒ MW00200FOR J = 00000 to 00099 by 00001

3.2.5 WHILE Structure

J Function

Instruction sequence 2 between WHILE and WEND is repeatedly executed as long as the

condition specified by instruction sequence 1 and the ON (or OFF) instruction is satisfied.

When the condition is no longer satisfied, instruction sequence 2 is not executed and the pro-

gram proceeds with the instruction immediately after WEND.

As shown in Figure 3.2, the execution condition of instruction sequence 2 is determined by

the value of the B register immediately before the ON (or OFF) instruction (i.e., the result of

instruction sequence 1).

If the execution condition is not satisfied as a result of the execution of instruction sequence

1, the program will proceed with the instruction following WEND without executing the

instruction sequence 2.

= ON

= ON

= OFF

= OFF

Instructionsequence 1

B register


(a) WHILE-ON-WEND Structure



B register



(b) WHILE-OFF-WEND Structure

Figure 3.2 Execution Controlled by the WHILE Structure

Nesting Structures

The FOR, WHILE, and IF structures can contain other structures within themselves. Thisis called “nesting.” The maximum depth of a nested structures using FOR, WHILE, andIF is restricted to 9 levels.

J Format

WHILE

Instruction sequence 1 (repetition condition)

ON/OFF

Instruction sequence 2 (processing instructions)

WEND

3

Ladder Instructions

3.2.5 WHILE Structure

3 -14

Write the program so that the condition specified by instruction sequence 1 in the WEND structure is not satisfiedat some point. If the repetition is continued endlessly and the program cannot leave the WHILE structure,thewatchdog timer will be activated and the CPU will stop.


Register A F B I J



J Examples

I < 00100

00000⇒MW00200⇒ I

WHILE

ONMW00200 + MW00100i

I + 00001WEND

⇒MW00200

⇒ I

Insert an NO contact instruction ( ) if an ON (or OFF) instruction is used after a coil instruction.

MB00000

MB000000

IB000000

ON (OFF)

WEND

IB00001WHILE

3

IMPORTANT

IMPORTANT


3 -15

3.2.6 IF Structure without ELSE

J Function

The IF structure takes one of two formats depending on whether an exclusive condition exists.

The IF structure without ELSE is described in this section, and the IF structure with ELSE is

described in the next section. Although the two formats are described separately, there are no

essential differences between them.

IFON Instruction

The instruction sequence between IFON and IEND will be executed if the current value of the

B register is ON and will not be executed if the current value of the B register is OFF.

IFOFF Instruction

The instruction sequence between IFOFF and IEND will be executed if the current value of

the B register is OFF and will not be executed if the current value of the B register is ON. The

process flows are shown in Figure 3.3.

B register


(a) IFON-IEND Structure

= OFF

= ON = OFF

= ON

Instructionsequence

B register


(b) IFOFF-IEND Structure

Instructionsequence

B register

Figure 3.3 Execution Controlled by the IF Structure without ELSE

J Format

IFON/IFOFF

Instruction sequence (processing instructions)

IEND


Register A F B I J



J Examples

If MB000108 is ON, the contents of MW00021 will be set to 0.

3

Ladder Instructions

3.2.7 IF Structure with ELSE

3 -16

⇒MW00021IFON

IEND

00000

MB000108

3.2.7 IF Structure with ELSE

J Function

IFON Instruction

If the current value of the B register is ON, only instruction sequence 1 will be executed and

instruction sequence 2 will not be executed. If the current value of the B register is OFF, only

instruction sequence 2 will be executed and instruction sequence 1 will not be executed.

IFOFF Instruction

If the current value of the B register is OFF, only instruction sequence 1 will be executed and

instruction sequence 2 will not be executed. If the current value of the B register is ON, only

instruction sequence 2 will be executed and instruction sequence 1 will not be executed. The

process flows are shown in Figure 3.4.

= ON

= OFF

(b) IFOFF-ELSE-IEND Structure

B register

= ON

= OFF

(a) IFON-ELSE-IEND Structure

To the next instruction To the next instruction



B register



Figure 3.4 Execution Control by the IF Structure with ELSE

Nesting Structures

The FOR, WHILE, and IF structures can contain other structures within themselves. Thisis called “nesting.” The maximum depth of a nested structure using FOR, WHILE, and IFstatements is restricted to 9 levels.

J Format

IFON

Instruction sequence 1

ELSE

Instruction sequence 2

IEND

3


3 -17


Register A F B I J



J Examples

The contents of MW00011 is set to 0 if MW00010 contains a positive number and to 1 if

MW00010 contains a negative value.

⇒MW00011IFON

IEND

00000

MW00010≧ 00000

00001

ELSE⇒MW00011

Insert an NO contact instruction ( ) if an IFON (or IFOFF) instruction is used after a coil instruction.

IB00000 IB00001

MB000000

MB000000

IFON (IFOFF)

IEND

3.2.8 FUNCTION CALL Instruction (FSTART)

The FUNCTION CALL instruction is represented by FSTART.

J Function

The FSTART instruction is used to call a user function or system function from a parent draw-

ing, child drawing, or user function. The user function to be called must be defined in advance.

System functions do not have to be defined by the user because they are already defined by

the system.

J Format

FSTART


Register A F B I J



3

IMPORTANT

Ladder Instructions

3.2.9 FUNCTION INPUT Instruction (FIN)

3 -18

When FSTART is input and the Enter Key is then pressed on the MPE720, a g raphic d isplay of a function willappear and the user will be prompted to input the function name. The “FSTART” instru ction itself will not bedisplayed.

Refer to the Machine Controller MP900/MP2000 Series MPE720 Software for Programming Device User'sManual (manual No. SIEPC88070005) for details on input methods.

3.2.9 FUNCTION INPUT Instruction (FIN)

The FUNCTION INPUT instruction is represented by FIN.

J Function

The FIN instruction is used to store input data in the function input registers. Table 3.3 shows

the forms of function input data.

Table 3.3 Function Input Data Forms

Input Data Form InputDesignation*

Description

Bit Input B-VAL Designates the input to be bit data.

Normally, the instruction or the instruction is used to call the function.

The bit data becomes the input to the function.

Integer Input I-VAL Designates the input to be integer data.

Normally, the ⊦ instruction is used to call the function. The contents (integer data) ofthe register number specified in the ⊦ instruction becomes the input to the function.

I-REG Designates the input to be the contents of an integer register. An integer register num-ber is specified when calling the function. The ⊦ instruction is not required.

The contents (integer data) of the register with the specified register number becomesthe input to the function.

Double Integer Input L-VAL Designates the input to be double integer data.

Normally, the ⊦ instruction is used to call the function. The contents (double integerdata) of the register with the specified register number becomes the input to the func-tion.

L-REG Designates the input to be the contents of a double integer register.

A long integer register number is specified when calling the function. The ⊦ instruc-tion is not required. The contents (double integer data) of the register with the speci-fied register number becomes the input to the function.

3

INFO


3 -19

Input Data Form DescriptionInputDesignation*

Real Number Input F-VAL Designates the input to be real number data.

Normally, the instruction is used to call the function. The contents (real numberdata) of the register number specified in the instruction becomes the input tothe function.

F-REG Designates the input to be the contents of a real number register.

A real number register number is specified when calling the function. Theinstruction is not required. The contents (real number data) of the register with thespecified register number becomes the input to the function.

Address Input − Passes the address of the specified register (arbitrary integer register) to the function.Only 1 input is allowed for a user function.

* Indicates the input designation on the MPE720.

J Format

FIN


Register A F B I J


When data is specified, FIN is input, and the Enter Key is then pressed on the MPE720, a graphic input displayfor the function will appear. The FIN instruction itself will not be displayed.

Refer to the Machine Controller MP900/MP2000 Series MPE720 Software for Programming Device User'sManual (manual No. SIEPC88070005) for details.

Normally use I-REG, L-REG, or F-REG if the I/O data is not bit data.

3.2.10 FUNCTION OUTPUT Instruction (FOUT)

The FUNCTION OUTPUT instruction is represented by FOUT.

J Function

The FOUT instruction is used to fetch the contents of a function output register as function

output data. Table 3.4 shows the forms of function output data.

3

INFO

IMPORTANT

Ladder Instructions


3 -20

Table 3.4 Function Output Data Forms

Output Data Form OutputDesignation*

Description

Bit Output B-VAL Designates the output to be bit data.

Normally, the instruction is used to call the function. The function output data(bit data) is stored in the register with the number specified in theinstruction.

Integer Output I-VAL Designates the output to be integer data.

Normally, the⇒ instruction is used to call the function. The function output data(integer data) is stored in the register with the number specified in the⇒ instruction.

I-REG Designates the output to be the contents of an integer register. An integer registernumber is specified when calling the function.

The⇒ instruction is not required. The function output data (integer data) is stored inthe register with the specified number.

Double IntegerOutput

L-VAL Designates the output to be double integer data.

Normally, the⇒ instruction is used to call the function. The function output data(double integer data) is stored in the register with the number specified in the⇒instruction.

L-REG Designates the output to be the contents of a double integer register. A double integerregister number is specified when calling the function.

The⇒ instruction is not required. The function output data (double integer data) isstored in the register with the specified number.

Real Number Output F-VAL Designates the output to be real number data.

Normally, the⇒ instruction is used to call the function. The function output data(real number data) is stored in the register with the number specified in the⇒ instruc-tion.

F-REG Designates the output to be the contents of a real number register. A real number reg-ister number is specified when calling the function.

The⇒ instruction is not required. The function output data (real number data) isstored in the register with the specified number.

* Indicates the output designation on the MPE720.

J Format

FOUT

3


3 -21


Register A F B I J

B-VAL Stored Stored Not stored Stored Stored

I-VAL Not stored Stored Stored Stored Stored

I-REG Stored Stored Stored Stored Stored

L-VAL Not stored Stored Stored Stored Stored

L-REG Stored Stored Stored Stored Stored

F-VAL Stored Not stored Stored Stored Stored

F-REG Stored Stored Stored Stored Stored

When data is specified, FOUT200 is input, and the Enter Key is then pressed on the MPE720, a graphic inputdisplay for the function will appear. The FOUT instruction itself will not be displayed.

Refer to the Machine Controller MP900/MP2000 Series MPE720 Software for Programming Device User'sManual (manual No. SIEPC88070005) for details.

J Examples

MB000000 OB00000

FUNC-030

IW0010 ======> ======> MW00200

MB000001 MB000021

ML00011 ======> ======> ML00201

INPUT-1 OUTPUT-1

INPUT-2 OUTPUT-2

INPUT-3 OUTPUT-3

INPUT-4 OUTPUT-4

INPUT-5MA00100

Table 3.5 shows the function I/O data forms defined by function definition in the programming

example above.

Table 3.5 Function I/O Data Forms

Input Data Data Form Output Data Input Data

INPUT-1 B-VAL OUTPUT-1 B-VAL

INPUT-2 I-REG OUTPUT-2 I-REG

INPUT-3 B-VAL OUTPUT-3 B-VAL

INPUT-4 L-REG OUTPUT-4 L-REG

3INFO

Ladder Instructions


3 -22

Normally use I-REG, L-REG, or F-REG if the I/O data is not bit data.

Table 3.6 shows the correspondence between I/O data and function I/O registers when I/O data

is referenced within a function.

Table 3.6 I/O Correspondence

Input Data Referenced within a Function Output Data

Function InputRegister

Function OutputRegister

B register (= MB000000) XB000000

IW0010 XW00001

B register (= MB000001) XB000001

ML00011 XL00002

MW00100 AW00000

MW00101 AW00001

ML00102 AW00002

MB001040 AB000040

… …

YB000000 B register (= OB00000)

YW00001 MW00200

YB000001 B register (= MB000021)

YW00002 ML00201

3

IMPORTANT


3 -23

3.2.11 COMMENT Instruction (COMMENT)

Comments can be entered at any position in a drawing program or a user function program.

Alphanumeric characters and symbols can be used as comments.

The COMMENT instruction is represented by COMMENT.

J Function

A character string enclosed in quotation marks is treated as a comment. The character string

is merely a comment, and it is not executed as an instruction. Character strings are included

in the number of steps in the user program.

A character string of 12 characters is equivalent to 1 step (1 basic instruction).

J Format

“character_string”


Register A F B I J


Do not enter a comment after the DEND instruction. Otherwise, an error message will be displayed indicatingthat an unnecessary instruction exists after END.

3.2.12 EXTENSION PROGRAM CALL Instruction (XCALL)

The EXTENSION PROGRAM CALL instruction is represented by XCALL.

J Function

The XCALL instruction is used to call an extension program.

Extension programs are table format programs. These extension programs are converted into

ladder programs for execution using the MPE720.

Converted ladder programs are executed with the XCALL instruction. Althoughmore than one

XCALL instruction can be used in one drawing, the same extension program cannot be called

more than once. Table 3.7 shows extension program types.

Table 3.7 Extension Program Types

Symbol Program Type

MCTBL Constant table (M register)

IOTBL I/O conversion table

ILKTBL Interlock table

ASMTBL Part composition table

3

INFO

Ladder Instructions

3.2.12 EXTENSION PROGRAM CALL Instruction (XCALL)

3 -24

J Format

Specify an extension program type after the XCALL instruction.

Extension program type

Example: XCALL IOTBL Extension program type:

S See Table 3.7.


Register A F B I J

Storage Condition Stored Indeterminate Stored Indeterminate Indeterminate


J Examples

Extension conversion program

Internal controller process.Cannot be viewed at theMPE720.

DWG.x.xx

XCALL ILKTBL XPROG ILKTBL

XPEND

XCALL ILKTBL

3

3.3 Direct I/O Instructions

3 -25


The direct I/O instructions are used to execute I/O in a user program independent of the system I/O

(batch inputs/batch outputs). I/O is performed when the direct I/O instruction is executed. The next

instruction is not executed until the I/O operation is completed.

3.3.1 INPUT STRAIGHT Instruction (INS)

The INPUT STRAIGHT instruction is represented by INS.

J Function

The INS instruction continuously performs direct input to a single Module according to the

contents of a previously set parameter table. INS can be used only for LIO, DI, and AIModules.

If no error occurs, the B register is turned OFF. If an error occurs even in a single word, the

B register is turned ON. Interrupts are disabled while the INS instruction is being executed.

Table 3.8 shows the INS instruction parameter/data table.

Table 3.8 INS Instruction Parameter/Data Table

ADR Type Symbol Name Specifications Input orOutput

0 W RSSEL Module designation 1 Designates the Module to per-form input

IN

1 W MDSEL Module designation 2form input.

IN

2 W STS Status Outputs the input status of eachword with bit response.

OUT

3 W N Number of words Designates the number of con-tinuous input words.

IN

4 W ID1 Input data 1 Outputs input data.

If 0 i t

OUT

… … … …If an error occurs, 0 is set.(Only one data for the MP930) …

N+3 W IDN Input data N OUT

RSSEL, MDSEL, and STS Designations

D MP900 Series

1. RSSEL

Designates the rack and slot where the target Module is mounted.

xxyyH

xx = rack number (1 to 4)yy = slot number (1 to 9)H: Hexadecimal

3

Ladder Instructions

3.3.1 INPUT STRAIGHT Instruction (INS)

3 -26

The following values are always used with the MP930: Rack number = 1 and Slot num-ber = 3.

2. MDSEL

a: Input Module type 0: Discrete Input Moduleb: Rack Number (1 to 4) 1: Register Input Modulec: Slot Number (1 to 9)d: Data Offset (0 to 7)The following values are always used with the MP930: Input Module type= 0, Rack number = 1, Slot number = 3, and Data offset = 0.

F C 8 4 0

a b c d Hexadecimal: abcdH

D MP2000 Series

The following table lists the setting ranges for each MP2000−series Module.

Module

DataCPU-I/O

LIO-01/02(LIO)

LIO-04/05(LIO32)

AI-01(AI)

MODEL 0 (Not used.) 0 (Not used.) 0 or 1 0 to 7

STS 0 0 0 Refer to3. STS.

N 1 1 1 or 2Max. value =2 −MDSEL

1 to 8Max. value =8 −MDSEL

1. RSSEL

Designates the rack, slot, and subslot where the target Module is mounted.

zxyyHx = rack number (1 to 4)yy = slot number (0 to 9)z = subslot number (1 or higher)(The maximum value of the subslot number depends on Module specifications.)H: Hexadecimal

2. MDSEL

The meaning of MDSEL depends on the Module.

IO, LIO, or LIO32 Module: Data offsetAI Module: Channel number − 1

3. STS

The above table shows that only the AI−01Module outputs data to STS. All other Modulesoutput 0.

If channels for which allocations have been deleted in AI Module detailed definitions arespecified for the INS instruction, bits corresponding to channels for which allocations havebeen deleted will be turned ON in STS (because the data for channels for which allocationshave been deleted cannot be read). The relationship between bits and channels is as fol-lows:

3


3 -27

Bit 0: Channel 1Bit 1: Channel 2Bit 2: Channel 3Bit 3: Channel 4Bit 4: Channel 5Bit 5: Channel 6Bit 6: Channel 7Bit 7: Channel 8

J Format

Specify MA00100 (leading address of parameter/data table) after the INS instruction.

Example: INS MA00100 MA00100: Leading address of parameter/data table

S Any register address (except # and C registers)

S Any register address with subscript (except # and Cregisters)


Register A F B I J

Storage Condition Stored Stored Not stored Stored Stored

J Examples (for the MP920)

Data is input from LIO Module mounted in slot 4 of rack 2.

⇒ MW00100

INS MA00100

0

H0204

1 ⇒ MW00103

⇒ MW00101

3

Ladder Instructions

3.3.2 OUTPUT STRAIGHT Instruction (OUTS)

3 -28


The OUTPUT STRAIGHT instruction is represented by OUTS.

J Function

The OUTS instruction continuously performs direct output to a single Module according to the

contents of a previously set parameter/data table. OUTS can be used only for LIO, DO, and

AO Modules.

If no error occurs during continuous output, the B register is set to OFF. If an error occurs even

in a single word, the B register is set to ON. Interrupts are disabled while the OUTS instruction

is being executed. Table 3.9 shows the OUTS instruction parameter/data table.

Table 3.9 OUTS Instruction Parameter/Data Table

ADR Type Symbol Name Specifications Input orOutput

0 W RSSEL Module designation 1 Specify a Module that performsoutputs.

IN

1 W MDSEL Module designation 2 Specify a Module that performsoutputs.

IN

2 W STS Status Outputs the output status of eachword with bit response.

OUT

3 W N Number of words Designates the number of contin-uous output words (fixed at 1).

IN

4 W OD1 Output data 1 Designates the data to be output.(Only one data for the MP930)

IN

… … … …(Only one data for the MP930)

…

N+3 W ODN Output data N IN

RSSEL, MDSEL, and STS Designations

D MP900 Series

Designations are the same as those for the INS instruction.

D MP2000 Series

The following table lists the setting ranges for each MP2000−series Module.

Module

DataCPU-I/O

LIO-01/02(LIO)

LIO-04/05(LIO32)

DO-01(DO)

AO-01(AO)

MODEL 0 (Not used.) 0 (Not used.) 0 or 1 0 to 3 0 to 3

STS 0 0 0 0 Refer to3. STS.

N 1 1 1 or 2Max. value =2 −MDSEL



3


3 -29

1. RSSEL

Designates the rack, slot, and subslot where the target Module is mounted.

zxyyHx = rack number (1 to 4)yy = slot number (0 to 9)z = subslot number (1 or higher)(The maximum value of the subslot number depends on Module specifications.)H: Hexadecimal

2. MDSEL

The meaning of MDSEL depends on the Module.

IO, LIO, LIO32, or DO Module: Data offsetAO Module: Channel number − 1

3. STS

The above table shows that only the AO−01 Module outputs data to STS. All other Mod-ules output 0.

If channels for which allocations have been deleted in AOModule detailed definitions arespecified for the INS instruction, bits corresponding to channels for which allocations havebeen deleted will be turned ON in STS (because the data for channels for which allocationshave been deleted cannot be read). The relationship between bits and channels is as fol-lows:

Bit 0: Channel 1Bit 1: Channel 2Bit 2: Channel 3Bit 3: Channel 4

J Format

Specify the leading address of the parameter/data table after the OUTS instruction.

Example: OUTS MA00100 MA00100: Leading address of parameter/data table




Register A F B I J


3

3 -30

J Examples (for the MP920)

Two words are output to LIO-01 Module mounted in slot 10 of rack 3.

⇒ MW00200

0

H030A

2 ⇒ MW00203

⇒ MW00201

xxxxx ⇒ MW00204

OUTS MA00200

yyyyy ⇒ MW00205

Output data 1

Output data 2

Local I/O is allocated by de fault for the MP930. Ou tputs can thus be perfo rmed twice during a single scan byusing the OUTS instruction.

3IMPORTANT

Ladder Instructions


3.4 Relay Circuit Instructions

3 -31


The circuit elements shown in Table 3.10 are used in combination to create relay circuits.

Table 3.10 Relay Circuit Elements

Relay Circuit Element Symbol Remarks

NO CONTACT instruction Connection elements

NC CONTACT instruction1. Branching

2. Parallel connection pointCOIL instruction

2. Parallel connection point3. Parallel connection

SET COIL instruction S

RESET COIL instruction R

RISING PULSE instruction

FALLING PULSE instruction

10-MS ON-DELAY TIMER instruction T

10-MS OFF-DELAY TIMER instruction T

1-S ON-DELAY TIMER instruction S

1-S OFF-DELAY TIMER instruction S

3.4.1 NO CONTACT Instruction

The NO CONTACT instruction is represented by .

J Function

The NO CONTACT instruction sets the value of the B register to ON when the value of the

referenced register is 1 (ON) and to OFF when the value of the referenced register is 0 (OFF).

J Format

Specify a relay number on the NO CONTACT instruction.

Example: MB00100A MB00100A: Relay number

S Any bit register

S Any bit register with subscript


Register A F B I J


3

Ladder Instructions

3.4.3 COIL Instruction

3 -32

J Examples

When MB000100 is set to ON, MB000101 is set to ON.

OFFON

MB000101

OFFON

MB000100

MB000100 MB000101

3.4.2 NC CONTACT Instruction

The NC CONTACT instruction is represented by .

J Function

The NC CONTACT instruction sets the value of the B register to OFF when the value of the

referenced register is 1 (ON) and to ON when the value of the referenced register is 0 (OFF).

J Format

Specify a relay number on the NC CONTACT instruction.

Example: MB00100A MB00100A: Relay number

S Any bit register

S Any bit register with subscript


Register A F B I J


J Examples

When MB000100 is set to ON, MB000101 is set to OFF.

OFFON

MB000101

OFFON

MB000100

MB000100 MB000101

3.4.3 COIL Instruction

The COIL instruction is represented by .

3


3 -33

J Function

The COIL instruction sets the value of the referenced register to 1 (ON) when the immediately

preceding value of the B register is ON and to 0 (OFF) when the immediately preceding value

of the B register is OFF.

J Format

Specify a coil number on the COIL instruction.

Example: MB00100A MB00100A: Coil number

S Any bit register (except # and C registers)

S Any bit register with subscript (except # and C regis-ters)


Register A F B I J


J Examples

When MB000100 is set to ON, MB000101 is set to ON.

OFFON

MB000101

OFFON

MB000100

MB000100 MB000101

3.4.4 SET COIL and RESET COIL Instructions

The SET COIL instruction is represented by S . The RESET COIL instruction is repre-

sented by R .

J Function

The SET COIL instruction turns ON the output when the execution condition is satisfied, and

maintains the ON state. Conversely, the RESET COIL instruction turns OFF the output when

the execution condition is satisfied, and maintains the OFF state.

J Format

Specify coil numbers on the SET COIL and RESET COIL instructions.

3

Ladder Instructions

3.4.4 SET COIL and RESET COIL Instructions

3 -34

D SET COIL

D RESET COIL

OB001001S

OB001001R

Example OB001001: Coil number


S Any bit register with subscript (except # and C regis-ters)


Register A F B I J


J Examples

Designating the Same Output Destination Multiple Times

MB000000 OB00000

MB000001 OB00000

MB000002 OB00000

MB000003 OB00000

[ S]

[ R]

[ S]

[ R]

The above code example acts as shown in the following graph.

(1) When OB00000 is OFF, the SETCOIL instruction turns ON OB00000.(2) When OB00000 is ON, theRESET COIL instruction turns OFFOB00000.

MB000000

MB000001

MB000002

MB000003

OB00000

(1) (2)

3


3 -35

All Execution Conditions Are ON

MB000002 OB00000

MB000001 OB00000

OB00000

MB000000 OB00000[ S]

[ R]

[ S]

During operation processing, the contents of the outputs are rewritten for each step.

In the above case, OB00000 is eventually set to ON.

3.4.5 RISING PULSE Instruction

The RISING PULSE instruction is represented by .

J Function

The RISING PULSE instruction sets the value of the B register to ON during one scan when

the immediately preceding value of the B register changes from OFF to ON. The designated

register is used to store the previous value of the B register.

J Format

Specify the number of the register for storing the previous value of the B register on the RIS-

ING PULSE instruction.

Example: MB001002 MB001002: Number of the register for storing theprevious value of the B register


S Any bit register with subscript (except # and Cregisters)


Register A F B I J


J Examples

When IB00001 changes from OFF to ON, MB000101 is set to ON and remains ON for one

scan. MB000100 is used to store the previous value of IB00001.

3

Ladder Instructions

3.4.6 FALLING PULSE Instruction

3 -36

1 scan

OFFON

IB00001

OFFON

MB000100

OFFON

MB000101

IB00001 MB000101MB000100

1 scan

Table 3.11 shows the register values of the RISING PULSE instruction.

Table 3.11 Register Values of RISING PULSE Instruction

Input Result

IB00001 MB000100(Previous value of

IB00001)

MB000100(Stored value of

IB00001)

MB000101

OFF OFF OFF OFF

OFF ON OFF OFF

ON OFF ON ON

ON ON ON OFF

3.4.6 FALLING PULSE Instruction

The FALLING PULSE instruction is represented by .

J Function

The FALLING PULSE instruction sets the value of the B register to ON for one scan when the

immediately preceding value of the B register changes from ON to OFF. The designated regis-

ter is used to store the previous value of the B register.

J Format

Specify the number of the register for storing the previous value of the B register on the FAL-

LING PULSE instruction.

3

IMPORTANT In the above example, the instruction is used to detect a rising pulse of IB00001, not a rising pulse of MB000100.MB000100 is used only to store the previous value of IB00001.


3 -37

Example: MB0001002 MB001002: Number of the register for storing theprevious value of the B register




Register A F B I J


J Examples

When IB00001 is set to OFF, MB000101 is set to ON and remains ON for one scan. MB000100

is used to store the previous value of IB00001.

IB00001 MB000101MB000100

OFFON

IB00001

OFFON

MB000100

OFFON

MB000101

1 scan 1 scan

Table 3.12 shows the register values of the FALLING PULSE instruction.

Table 3.12 Register Values of FALLING PULSE Instruction

Input Result

IB00001 MB000100(Previous value of

IB00001)

MB000100(Stored value of

IB00001)

MB000101

OFF OFF OFF OFF

OFF ON OFF OFF

ON OFF ON ON

ON ON ON OFF

3.4.7 10-MS ON-DELAY TIMER Instruction

The 10-MS ON-DELAY TIMER instruction has a resolution of 0.01 second and is represented

by T .

3

IMPORTANT In the above example, the instruction is used to detect a falling pulse of IB00001, not a falling pulse ofMB000100. MB000100 is used only to store the previous value of IB00001.

Ladder Instructions

3.4.7 10-MS ON-DELAY TIMER Instruction

3 -38

J Function

The 10-MS ON-DELAY TIMER instruction times time while the immediately preceding val-

ue of the B register is ON. The value of the B register is set to ON when the timer value reaches

the set value. The timer stops when the immediately preceding value of the B register is set

to OFF during timing. When the B register is set to ON again, timing restarts from the begin-

ning (0.00 s).

A value equal to the actual timed value × 100 is stored in the timer value register. The 10-MS

ON-DELAY TIMER instruction ( T ) times while it is being executed. Therefore, if the

10-MS ON-DELAY TIMER instruction is used in an IF, WHILE, or FOR structure, it may not

be executed normally.

Use in an IF Structure

MB000000

IEND

IFON

MB000100 MB000101

[T 5.00 MW00011]

Timer (1)

In the above example, when MB000000 is OFF, the instruction for timer (1) is not executed,

so time is not timed, i.e., the timer remains stopped.

Use in a WHILE Structure

Instruction sequence (1)

ON

WHILE

0

I < 00100

⇒ I

MB000100 MB000101

INCWEND

I

[T 5.00 MW00011]

Timer (1)

In the above example, instruction sequence (1) is executed 100 times (0 ≦ I ≦ 99), and so

timer (1) is also activated 100 times. Therefore, the time is timed for 100 × scan time setting,

and time is timed faster than the actual time lapse.

3


3 -39

Use in a FOR Structure

MB000000

MB000100

FEND

FOR

[T 5.00 MW00011]

I=00000 to 00099 by 00001

MB000101Timer (1)



timer (1) is also activated 100 times. Therefore, the timed is timed for 100 × scan time setting,


J Format

Specify a set value and a time value in the 10-MS ON-DELAY TIMER instruction.

Set value Time value

5.00 MW00100TExample: Set value:

S Any constant or integer register

S Any constant or integer register with subscript (0 to655.35 s: in 0.01 second increments)

Time value:

S Any integer register (except number and C registers)

S Any integer register with subscript (except # and Cregisters)


Register A F B I J


J Examples

(Ts = scan setting)

MB000100 MB000101[T 5.00 MW00011]

500

0MW000115.00s-Ts

OFFON

MB000101

OFFON

MB000100

3

Ladder Instructions

3.4.8 10-MS OFF-DELAY TIMER Instruction

3 -40

MW00011 works as a timer value register. Always set unused registers so that they do not overlap with eachother.

3.4.8 10-MS OFF-DELAY TIMER Instruction

The 10-MSOFF-DELAYTIMER instruction has a resolution of 0.01 second and is represented

by T .

J Function

The 10-MS OFF-DELAY TIMER instruction times while the immediately preceding value of

the B register is OFF. The value of the B register is set to OFF when the timer value reaches

the set value.

The timer stops when the immediately preceding value of the B register is set to ON during

timing. When the B register is set to OFF again, timing restarts from the beginning (0.00 s).

A value equal to the actual timed time × 100 is stored in the timer value register.


MB000000

MB000100 MB000101

IEND

IFON Timer (1)

[ 5.00MW00011 T]




ON

WHILE

[5.00 MW00011 T]

0

I < 00100

⇒ I

MB000100 MB000101

INCWEND

I

Timer (1)





3

IMPORTANT


3 -41


MB000000

MB000100

FEND

FOR

[5.00 MW00011 T]

I=00000 to 00099 by 00001

MB000101Timer (1)





The10-MS OFF-DELAY TIMER instruction ( T ) times while it is being executed. Therefore, if the 10-MSOFF-DELAY TIMER instruction is used in an IF, WHILE, or FOR structure, it may not be executed normally.

J Format

Specify a set value and a timer value in the 10-MS OFF-DELAY TIMER instruction.

Set value Timer value

5.00 MW00100 TExample: Set value:


S Any constant or integer register with subscript (0 to655.35 s: in 0.01 second increments)

Timer value:

S Any integer register (except # and C registers)



Register A F B I J


J Examples

(Ts = scan setting)

OFFON

OFFON

500

0

MB000100

MB000101

MW000115.00s-Ts

[5.00 MW00011 T]MB000100 MB000101

3

IMPORTANT

Ladder Instructions

3.4.9 1-S ON-DELAY TIMER

3 -42


3.4.9 1-S ON-DELAY TIMER

The 1-S ON-DELAY TIMER instruction has a resolution of 1 second and is represented byS .

J Function

The 1-S ON-DELAY TIMER instruction times while the immediately preceding value of the

B register is ON. The value of the B register is set to ON when the timer value reaches the set

value.

The timer stops when the immediately preceding value of the B register is set to OFF during

timing.When the B register is set to ON again, timing restarts from the beginning (0 s). A value

equal to the actual timed time × 1 is stored in the timer value register.


MB000000

IEND

IFON

MB000100 MB000101[S 500 MW00011]

Timer (1)


so time is not timed. The timer remains stopped.


ON

WHILE

[S 500 MW00011]

0

I < 00100

⇒ I

MB000100 MB000101

INCWEND

I

Timer (1)


In the above example, instruction sequence (1) is executed 100 times (0≦ I≦ 99), so timer

(1) is also activated 100 times. Therefore, the time is timed for 100 × scan time setting, and

time is timed faster than the actual time lapse.

3

IMPORTANT


3 -43


MB000000

MB000100

FEND

FOR

[S 500 MW00011]

I=00000 to 00099 by 00001

MB000101Timer (1)


In the above example, instruction sequence (1) is executed 100 times (0≦ I≦ 99), so timer

(1) is also activated 100 times. Therefore, the time is timed for 100 × scan time setting, and

time is timed faster than the actual time lapse.

J Format

Specify a set value and a timer value in the 1-S ON-DELAY TIMER instruction.


500 MW00100SExample: Set value


S Any constant or integer register with subscript (0 to65535 s: in 1 second increments)

Timer value




Register A F B I J


J Examples

(Ts = scan setting)

[S 500 MW00011]MB000100 MB000101

OFFON

OFFON

500

0

MB000100

MB000101

MW00011500s-Ts


3

IMPORTANT

Ladder Instructions

3.4.10 1-S OFF-DELAY TIMER

3 -44

3.4.10 1-S OFF-DELAY TIMER

The 1-S OFF-DELAY TIMER instruction has a resolution of 1 second and is represented byS .

J Function

The 1-S OFF-DELAY TIMER instruction times while the immediately preceding value of the

B register is OFF. The value of the B register is set to OFF when the timer value reaches the

set value.

The timer stops when the immediately preceding value of the B register is set to ON during

timing. When the B register is set to OFF again, timing restarts from the beginning (0 s). A

value equal to the actual timed time × 1 is stored in the timer value register.


MB000000

IEND

IFON

MB000100 MB000101[500 MW00011 S]

Timer (1)




ON

WHILE

[500 MW00011 S]

0

I < 00100

⇒ I

MB000100 MB000101

INCWEND

I

Timer (1)






MB000000

MB000100

FEND

FOR

[500 MW00011 S]

I=00000 to 00099 by 00001

MB000101Timer (1)


3


3 -45




J Format

Specify a set value and a timer value in the 1-S OFF-DELAY TIMER instruction.


500 MW00100 SExample: Set value:


S Any constant or integer register with subscript (0 to65535 s: in 1 second increments)

Timer value:




Register A F B I J


J Examples

(Ts = scan setting)

MB000100 MB000101[500 MW00011 S]

OFFON

OFFON

500

0

MB000100

MB000101

MW00011500s-Ts


3.4.11 Examples of Relay Circuit Combinations

J Serial Circuit

The following circuit example shows relays connected in series. Their logical product is output

to a coil.

3

IMPORTANT

Ladder Instructions

3.4.11 Examples of Relay Circuit Combinations

3 -46

MB000000 IB00001 MB00010A OB00100

J Branched Parallel Circuits

Branch indication elements are used to branch the contents of a B register to cover multiple

instructions. Parallel connection elements are used to obtain the logical sum of multiple relays.

In the following examples, relays are connected in series and in parallel, and the result is output

to a coil(s).

Example 1: Simple Branch and Parallel Connection

MB000000 IB00001 MB00010A OB00100

IB00002

MB000000 IB00001 MB00010A OB00100

IB00002

IB00003

MB00100F

Branch Parallel connection

Example 2: Multiple Branches and Parallel Connections

Branch Branch

Branch

Parallel connection

Parallelconnection

J Example of Sequence Circuits with Subscripts

A relay number may be used with a subscript.

The following example circuit shows the logical product of relays MB000000 to MB00000F

taken and set in MB000010.

MB000000 MB000010

MB000000 MB000010MB000010

FOR I = 00000 to 00015 by 00001

FEND

3

3.5 Logical Operation Instructions

3 -47


The AND (∧), OR (∨), and XOR (¨) instructions are available as logical operation instructions.

3.5.1 AND Instruction

The AND instruction is represented by∧.

J Function

The AND instruction outputs the logical product (AND) of the immediately preceding A regis-

ter and the designated register to the A register.

Table 3.13 One-bit Truth Table for Logical Product (AND: A∧ B = C)

A B C

0 0 0

0 1 0

1 0 0

1 1 1

J Format

Specify an operation data number after the AND instruction.

Example:∧ MW00200 MW00200: Operation data

S Any integer or double integer register

S Any integer or double integer register with subscript

S Any subscript register

S Any constant


Register A F B I J

Storage Condition Not stored Stored Stored Stored Stored

J Examples

The logical product of MW00100 and a constant is stored in MW00101.

⇒ MW00101(H0034)

MW00100∧ H00FF(H1234) (H00FF)

3

Ladder Instructions

3.5.2 OR Instruction

3 -48

3.5.2 OR Instruction

The OR instruction is represented by∨.

J Function

The OR instruction outputs the logical sum (OR) of the immediately preceding A register and

the designated register to the A register.

Table 3.14 One-bit Truth Table for Logical Sum (OR: A∨ B = C)

A B C

0 0 0

0 1 1

1 0 1

1 1 1

J Format

Specify an operation data number after the OR instruction.

Example: ∨ MW00200 MW00200: Operation data




S Any constant


Register A F B I J


J Examples

The logical sum of MW00100 and a constant is stored in MW00101.

⇒ MW00101(H12FF)

MW00100∨ H00FF(H1234) (H00FF)

3


3 -49

3.5.3 XOR Instruction

The XOR instruction is represented by¨.

J Function

The XOR instruction outputs the exclusive logical sum (XOR) of the immediately preceding

A register and the designated register to the A register.

Table 3.15 One-bit Truth Table for Exclusive Logical Sum (XOR: A¨ B = C)

A B C

0 0 0

0 1 1

1 0 1

1 1 0

J Format

Specify an operation data number after the XOR instruction.

Example: ¨ MW00200 MW00200: Operation data




S Any constant


Register A F B I J


J Examples

The exclusive logical sum of MW00100 and a constant is stored in MW00101.

⇒ MW00101(H55AA)

MW00100¨ H00FF(H5555) (H00FF)

3

Ladder Instructions

3.6.1 INTEGER ENTRY Instruction

3 -50

3.6 Numeric Operation Instructions

Data types for numeric operation instructions include integers, double-length integers, and real

numbers. Refer to the corresponding Machine Controller User’s Manual: Design and Maintenance

for details.

3.6.1 INTEGER ENTRY Instruction

The integer entry instruction is represented by ⊦.

J Description

The INTEGER ENTRY instruction enters data in the A register and starts an integer operation.

Real number data cannot be used until a REAL NUMBER ENTRY instruction appears.

J Format

Specify an entry data number after the INTEGER ENTRY instruction.

Example: ⊦ MW00100 MW00100: Entry data


S Any integer or double integer register with sub-script


S Any constant


Register A F B I J


J Examples

The contents of MW00100 is entered in the A register.

MW00100

The contents of ML00100 is entered in the A register.

ML00100

⇒ MW00200(01234)

MW00100(01234)

⇒ MW00201(00001)

MW00101(00001)

⇒ ML00200(66770)

ML00100(66770)

ML00100 = 66770 Lower-place 16 bits: MW00100 = 01234 = H04D2

Higher-place 16 bits: MW00101 = 00001 = H0001

3


3 -51

3.6.2 REAL NUMBER ENTRY Instruction

The REAL NUMBER ENTRY instruction is represented by .

J Description

The REAL NUMBER ENTRY instruction enters data in the F register and starts a real number

operation.

A series of operations beginning with a REAL NUMBER ENTRY instruction can be pro-

grammed using integer, double integer, and real number registers. When an integer or double

integer register is designated for a REAL NUMBER ENTRY instruction, the data is automati-

cally converted to real number data upon execution.

J Format

Specify an entry data number after the REAL NUMBER ENTRY instruction.

Example: MF00200 MF00200: Entry data

S Any integer, double integer or real number regis-ter

S Any integer, double integer or real number regis-ter with subscript


S Any constant


Register A F B I J

Storage Condition Stored Not stored Stored Stored Stored

J Examples

The contents of DF00200 is entered in the F register.

DF00200

The integer data in DW00100 is converted to real number data and then entered in the F regis-

ter.

DW00100

The double integer data in DL00100 is converted to real number data and then entered in the

F register.

DL00100

The following usage is not allowed.

12345 ⇒ DF00200

3

IMPORTANT

Ladder Instructions

3.6.3 STORE Instruction

3 -52

3.6.3 STORE Instruction

The STORE instruction is represented by⇒.

J Description

The STORE instruction stores the contents of the F register or the A register in the designated

register.

Whether the A register or the F register is selected depends on the type of the immediately pre-

ceding entry instruction.

D (INTEGER ENTRY instruction) => The contents of the A register is stored.

D (REAL NUMBER ENTRY instruction) => The contents of the F register is stored.

J Format

Specify the storage destination address after the storage instruction.

Example: ⇒ MW00200 MW00200: Storage destination address

S Any integer, double integer, or real number regis-ter (except # and C registers)

S Any integer, double integer, or real number regis-ter with subscript (except # and C registers)



Register A F B I J


J Examples

The contents of the A register is stored in MW00100.

12345 ⇒ MW00100

The contents of the A register is stored in ML00100.

1234567 ⇒ ML00100

The contents of the F register is stored in the DF00100 without converting the real number data.

1.23456 ⇒ DF00100(1.23456)

The contents of the F register is converted into integer data and then stored in DW00100.

1.234567 ⇒ DW00100(00001)

3


3 -53

The contents of the F register is converted into double integer data and then stored in DL00100.

123456.7 ⇒ DL00100(123457)

1. The following usage is not allowed.

12345 ⇒ DF00200

2. When double integer data is stored in an integer register, the lower 16 bits are stored as they are. An operating

error will not occur even if the data to be stored exceeds the integer range (−32768 to 32767).

ML00100(65535)

⇒ MW00200(−00001)

3.6.4 ADDITION Instruction (+)

The ADDITION instruction is represented by +.

J Function

The ADDITION instruction adds integer, double-length integer, and real number values. If the

result of adding integer values is greater than 32767, an overflow error will occur. If the result

of adding double integer values is greater than 2147483647, an overflow error will occur.

J Format

Specify addition data after the addition instruction.

Example: + MW00100 MW00100: Addition data

S Any integer, double integer, or real number regis-ter

S Any integer, double integer, or real number regis-ter with subscript


S Any constant


Register A F B I J

Storage Condition *1 *2 Stored Stored Stored

* 1. Data starting with an integer value will not be stored. Other data will be stored.

* 2. Data startingwith a real number valuewill not be stored.Other datawill be stored.

3

IMPORTANT

Ladder Instructions

3.6.5 SUBTRACTION Instruction (−)

3 -54

J Examples

Addition of Integer Values

⇒ MW00101(15345)

MW00100 + 12345(03000)

⇒ ML00106(300000)

ML00102 + ML00104(100000) (200000)

Addition of Real Number Values

⇒ DF00202(11.23456)

DF00200 + 1.23456(10.0)

⇒ DF00208(6.15)

DF00204 + DW00206(0.15) (00006)

⇒ DF00214(100003.51)

DF00210 + DL00212(3.51) (100000)

Normally, 32-bit addition and subtraction is used for double integers (+,−,++,−−). A 64-bit addition and sub-traction will be executed, however, when these instructions are used to correct for the remainder produced byan immediately preceding MULTIPLICATION instruction (×) and are followed by a DIVISION instruction (÷).

⇒ ML00408ML00400 × ML00402 + ML00404 ÷ ML00406

⇒ ML00404MOD

a b c d y

c

Remainder correction (y)= a× b+ cd

3.6.5 SUBTRACTION Instruction (−)

The SUBTRACTION instruction is represented by −.

J Function

The SUBTRACTION instruction subtracts integer, double-length integer, and real number

values. If the result of subtracting integer values is smaller than −32768, an underflow error

will occur. If the result of subtracting double-length integer values is smaller than

−2147483648, an underflow error will occur.

J Format

Specify subtraction data after the SUBTRACTION instruction.

3

IMPORTANT


3 -55

Example: − MW00100 MW00100: Subtraction data




S Any constant


Register A F B I J




J Examples

Subtraction of Integer Values

⇒ MW00101(−09345)

MW00100 − 12345(03000)

⇒ ML00106(−100000)

ML00102 − ML00104(100000) (200000)

Subtraction of Real Number Values

⇒ DF00202(8.76544)

DF00200 − 1.23456(10.0)

⇒ DF00208(−5.85)

DF00204 − DW00206(0.15) (00006)

⇒ DF00214(−99996.49)

DF00210 − DL00212(3.51) (100000)

Normally, 32-bit addition and subtraction is used for long integers (+,−, ++,−−). A 64-bit addition and subtrac-tion will be ex ecu ted, howev er, when these instru ctions are u sed to correct fo r the remainder p roduced by animmediately preceding MULTIPLICATION instruction (×) and are followed b y a DIVISION instruction (÷).


⇒ ML00408ML00400 × ML00402 + ML00404 ÷ ML00406

⇒ ML00404MOD

a b c d y

c

3.6.6 EXTENDED ADDITION Instruction (++)

The EXTENDED ADDITION instruction is represented by ++.

3

IMPORTANT

Ladder Instructions

3.6.6 EXTENDED ADDITION Instruction (++)

3 -56

J Function

The EXTENDED ADDITION instruction adds integer values. No operation error will occur

even if the operation results in an overflow. Otherwise, the EXTENDED ADDITION instruc-

tion is much the same as the ADDITION instruction.

Integer ValuesDecimal: 0→ 1 . . . 32767→ −32768 . . . −1→ 0

Hexadecimal: 0000→ 0001 . . . 7FFF→ 8000 . . . FFFF→ 0000

Double Integer ValuesDecimal: 0→ 1 . . . 2147483647→ −2147483648 . . . −1→ 0

Hexadecimal: 00000000→ 00000001 . . . 7FFFFFFF→ 80000000 . . . FFFFFFFF→ 00000000

J Format

Specify addition data after the EXTENDED ADDITION instruction.

Example: ++ MW00100 MW00100: Addition data


S Any integer or double integer register with sub-script


S Any constant

Note This instruction cannot beused in a real number operations startingwith aREALNUMBER ENTRY instruction ( ).


Register A F B I J


J Examples

This instruction can be used to adds integer values so that no operation error occurs.

⇒ MW00101(−32768)

MW00100 ++ 00001(32767)

Normally, 32-bit addition and subtraction is used for double integers (+,−, ++,−−). A 64-bit addition and sub-traction will be executed, however, when these instructions are used to correct for the remainder produced byan immediately preceding MULTIPLICATION instruction (×) and are followed by a DIVISION instruction (÷).


⇒ ML00408ML00400 × ML00402 + ML00404 ÷ ML00406

⇒ ML00404MOD

a b c d y

c

3

IMPORTANT


3 -57

3.6.7 EXTENDED SUBTRACTION Instruction (− −)

The EXTENDED SUBTRACTION instruction is represented by − −.

J Function

The EXTENDED SUBTRACTION instruction subtracts integer values. No operation error

will occur even if the operation results in an underflow. Otherwise, the EXTENDED SUB-

TRACTION instruction is much the same as the SUBTRACTION instruction.

Integer Values

Decimal: 0→ −1 . . . −32768→ 32767 . . . 1→ 0

Hexadecimal: 0000→ FFFF . . . 8000→ 7FFF . . . 0001→ 0000

Double Integer Values

Decimal: 0→ −1 . . . −2147483648→ 2147483647 . . . 1→ 0

Hexadecimal: 00000000→ FFFFFFFF . . . 80000000→ 7FFFFFFF . . . 00000001→

00000000

Example: − − MW00100 MW00100: Subtraction data


S Any integer or double integer register withsubscript


S Any constant

Note This instruction cannot be used in a real number operation startingwith aREALNUMBER ENTRY instruction ( ).


Register A F B I J


J Examples

This instruction can be used to execute subtraction of integer values so that no operation error

occurs.

⇒ MW00101(32767)

MW00100 −− 00001(−32768)

3

Ladder Instructions

3.6.8 MULTIPLICATION Instruction (×)

3 -58

Normally, 32-bit addition and subtraction is used for double integers (+, −, ++, −−). A 64-bit addition and sub-traction will be executed, however, when these instructions are used to correct for the remainder produced byan immediately preceding MULTIPLICATION instruction (×) and are followed by a DIVISION instruction (÷).


⇒ ML00408ML00400 × ML00402 + ML00404 ÷ ML00406

⇒ ML00404MOD

a b c d y

c

3.6.8 MULTIPLICATION Instruction (×)

The MULTIPLICATION instruction is represented by ×.

J Function

The MULTIPLICATION instruction multiplies integer, double integer, and real number val-

ues. For multiplication of integer and double integer values, × and ÷ are used in pairs. If the

result of integer multiplication is to be stored in a double integer register, however, only × is

used.

J Format

Specify a multiplier after the MULTIPLICATION instruction.

Example: × MW00100 MW00100: Multiplier




S Any constant


Register A F B I J




3

IMPORTANT


3 -59

J Examples

Multiplication of Integer Values

⇒ MW00101(00370)

MW00100 × 3 ÷ 10(01234)

⇒ ML00104(100000)

MW00102 × MW00103(00010) (10000)

Multiplication of Double Integer Values

⇒ ML00112(200000)

ML00106 × ML00108 ÷ ML00110(100000) (100000) (50000)

⇒ ML00104(050000)

ML00100 × ML00102 ÷ 18000(100000) (009000)

Multiplication of Real Number Values

⇒ DF00208(0.3)

DF00204 × DW00206(0.15) (00002)

⇒ DF00202(30.0)

DF00200 × DF00100(10.0) (3.0)

⇒ DF00214(15000.0)

DF00210 × DL00212(0.15) (100000)

3.6.9 DIVISION Instruction (÷)

The DIVISION instruction is represented by ÷.

J Function

The DIVISION instruction divides integer, double integer, and real number values. Although

× and ÷ are normally used in pairs, ÷ can be used alone. See 3.6.10 MOD Instruction and 3.6.11

REM Instruction for details on handling the remainder in a division operation.

If the value of the designated register is 0, a division-by-zero error will occur. An operation

error will also occur if the result of integer, double integer, or real number division in the F

register deviates from the numeric range of the A register.

J Format

Specify a divider after the DIVISION instruction.

Example: ÷ MW00100 MW00100: Divider




S Any constant

3

Ladder Instructions

3.6.10 MOD Instruction

3 -60


Register A F B I J




J Examples

Division of Integer Values

⇒ ML00104(00411)

MW00102 × MW00103(01234) (00003)

⇒ MW00101(00411)

MW00100 × 1 ÷ 3(01234)

Division of Double Integer Values

⇒ ML00114(000020)

ML00104 ÷ ML00110(1000000) (50000)

⇒ ML00112(200000)

ML00100 × ML00102 ÷ ML00110(100000) (100000) (50000)

Division of Real Number Values

⇒ DF00206(412.5)

DF00200 ÷ DF00204(1237.5) (3.0)

⇒ DF00202(412.5)

DF00200 ÷ 3.0(1237.5)

⇒ DF00210(412.5)

DF00200 ÷ DW00208(1237.5) (00003)

⇒ DF00216(2.5)

DF00212 ÷ DL00214(100000.0) (40000)

3.6.10 MOD Instruction

The MOD instruction is represented by MOD.

J Function

TheMOD instruction outputs the remainder of integer or double integer division to the A regis-

ter. Always execute the MOD instruction immediately after the division instruction. If the

MOD instruction is executed somewhere else, the operation results obtained before the next

entry instruction cannot be guaranteed.

J Format

MOD

3


3 -61


Register A F B I J


J Examples

The quotient of integer division is stored in MW00101 and the remainder is stored in

MW00102.

⇒ ML00102(00001)

MOD

⇒ MW00101(00003)

MW00100 × 1 ÷ 3(00010)

The quotient of double integer division is stored in ML00106 and the remainder is stored in

ML00108.

⇒ ML00108(32975)

MOD

⇒ ML00106(173575)

ML00100 × ML00102 ÷ ML00104(100000) (60000) (34567)

Note Thequotientandremainderaregenerallydetermined together. It is thereforecon-venient to use the instructions in the above manner.

3.6.11 REM Instruction

The REM instruction is represented by REM.

J Function

The REM instruction outputs the remainder of real number division to the F register. Here, the

remainder refers to the remainder obtained by repeatedly subtracting the variable value desig-

nated by the F register. Thus, the output value (Y) of the REM instruction can be determined

by the following formula, where A is the value of the F register, X is the value of the designated

variable, and n is the number of times subtraction is repeated.

Y = A − (X× n) (0≦ Y < X)

J Format

Specify a divider after the REM instruction.

Example: REM MF00100 MF00100: Divider

S Any real number register

S Any real number register with subscript

S Any constant

Note This instruction cannot be used in a real number operation startingwith aREALNUMBER ENTRY instruction ( ).

3

Ladder Instructions

3.6.12 INC Instruction

3 -62


Register A F B I J


J Examples

The remainder of the division of MF00200 by constant 1.5 is stored in MF00202.

⇒ DF00202(1.0)

MF00200 REM 1.5(4.0)

3.6.12 INC Instruction

The INC instruction is represented by INC.

J Function

The INC instruction adds 1 to the designated integer or double integer register. For integer reg-

isters, no overflow error will occur even if the result of addition exceeds 32767. Likewise, no

overflow error will occur for double integer registers.

Integer Values

Decimal: 0→ 1 . . . 32767→ −32768 . . . −1→ 0

Hexadecimal: 0000→ 0001 . . . 7FFF→ 8000 . . . FFFF→ 0000


Decimal: 0→ 1 . . . −2147483647→ −2147483648 . . . −1→ 0

Hexadecimal: 00000000→ 00000001 . . . 7FFFFFFF→ 80000000 . . . FFFFFFFF→ 00000000

J Format

Specify a register after the INC instruction.

Example: INC MW00100 MW00100: Register

S Any integer or double integer register (except# and C registers)

S Any integer or double integer register withsubscript (except # and C registers)



Register A F B I J


3


3 -63

J Examples

Integer Values

Equivalent

⇒ MW00100MW00100 ++ 1

INC MW00100


Equivalent

⇒ ML00100ML00100 ++ 1

INC ML00100


INC #W00100 (# register)INC DF00200 (real number register)

3.6.13 DEC Instruction

The DEC instruction is represented by DEC.

J Function

The DEC instruction subtracts 1 from the designated integer or double integer register. For in-

teger registers, no underflow error will occur even if the result of subtraction is less than

−32768. Likewise, no underflow error will occur for double integer registers.

Integer ValuesDecimal: 0→ −1 . . . −32768→ 32767 . . . 1→ 0

Hexadecimal: 0000→ FFFF . . . 8000→ 7FFF . . . 0001→ 0000

Double Integer ValuesDecimal: 0→ 1 . . . −2147483648→ 2147483647→ 0

Hexadecimal: 00000000→ FFFFFFFF . . . 80000000→ 7FFFFFFF . . . 00000001→

00000000

J Format

Specify a register after the DEC instruction.

Example: DEC MW00100 MW00100: Register




3IMPORTANT

Ladder Instructions

3.6.14 ADD TIME Instruction (TMADD)

3 -64


Register A F B I J


J Examples

Integer Values

Equivalent

⇒ MW00100MW00100 − − 1

DEC MW00100


Equivalent

⇒ ML00100ML00100 − − 1

DEC ML00100


DEC #W00100 (# register)DEC DF00200 (real number register)

3.6.14 ADD TIME Instruction (TMADD)

The ADD TIME instruction is represented by TMADD.

J Function

The TMADD instruction adds one time (hours/minutes/seconds) to another time.

The second parameter (time to add) is added to the first parameter (time to which another time

is added) and the result is stored in the first parameter.

Table 3.16 shows the format of parameters 1 and 2.

Table 3.16 Parameter Format

Register Offset Data Data Range (BCD)

0 Hours/minutes Higher-place byte (hours): 0 to 23Lower-place byte (minutes): 0 to 59

1 Seconds 0000 to 0059

If the contents of the first and second parameters and the operation result are within the ranges

shown above, the operation will be performed normally. After the operation is completed, the

3

IMPORTANT


3 -65

B register will be turned OFF. If the contents of the first and second parameters are outside the

data ranges, the operation will not be performed. In this case, 9999H will be stored in the se-

conds register and the B register will be turned ON.

If the operation result is outside the data ranges, the actual values will be stored and the B regis-

ter will be turned ON.

J Format

Specify the first parameter (time to which another time is added) and the second parameter

(time to add) after the TMADD instruction.

Time to whichanother time isadded

Time to add

Example: TMADD MW00000, MW00100 Time to which another time is added:



Time to add:




Register A F B I J


J Examples

The time in DW00000 and DW00001 is added to the time in MW00100 and MW00101.

TMADD MW00100, DW00000DB000100

8 hrs 40 min 32 s + 1 hr 22 min 16 s = 10 hrs 2 min 48 s(MW00100)(MW00101) (DW00000) (DW00001) (MW00100)(MW00101)

Time Data Before Execution After Execution

MW00100 0840H 1002H

MW00101 0032H 0048H

DW00000 0122H 0122H

DW00001 0016H 0016H

3.6.15 SUBTRACT TIME Instruction (TMSUB)

The SUBTRACT TIME instruction is represented by TMSUB.

J Function

The TMSUB instruction subtracts one time (hours/minutes/seconds) from another time.

3

Ladder Instructions

3.6.15 SUBTRACT TIME Instruction (TMSUB)

3 -66

The second parameter (time to subtract) is subtracted from the first parameter (time from

which another time is subtracted) and the result is stored in the first parameter. Table 3.17

shows the format of parameters 1 and 2.

Table 3.17 Parameter Format

Register Offset Data Data Range (BCD)

0 Hours/minutes Higher-place byte (hours): 0 to 23Lower-place byte (minutes): 0 to 59

1 Seconds 0000 to 0059

If the contents of the first and second parameters are within the ranges shown above, the opera-

tion will be performed normally. After the operation is completed, the B register will be turned

OFF. If the contents of the first and second parameters are outside the data ranges, the operation

will not be performed. In this case, 9999Hwill be stored in the seconds register and the B regis-




J Format

Specify the first parameter (time fromwhich another time is subtracted) and the second param-

eter (time to subtract) after the TMSUB instruction.

Time from which anothertime is subtracted

Time to subtract

Example: TMSUB MW00000, MW00100 Time from which another time is subtracted:



Time to subtract:




Register A F B I J


J Examples

The time in DW00000 and DW00001 is subtracted from the time inMW00100 andMW00101.

TMSUB MW00100, DW00000DB000100

8 hrs 40 min 32 s − 1 hr 22 min 16 s = 7 hrs 18 min 16 s(MW00100)(MW00101) (DW00000) (DW00001) (MW00100)(MW00101)

3


3 -67


MW00100 0840H 0718H

MW00101 0032H 0016H

DW00000 0122H 0122H

DW00001 0016H 0016H

3.6.16 SPEND TIME Instruction (SPEND)

The SPEND TIME instruction is represented by SPEND.

J Function

The SPEND instruction subtracts one time (year/month/day/hours/minutes/seconds) from

another time data and calculates the elapsed time.

The second parameter (time to subtract) is subtracted from the first parameter (time from

which another time is subtracted) and the result is stored in the first parameter. Tables 3.18 and

3.19 show the formats of parameters 1 and 2.

Table 3.18 Parameter 1 Format

Register Offset Data Data Range (BCD) I/O

0 Year (BCD) 0000 to 0099 IN/OUT

1 Month/day(BCD)

Higher-place byte (month): 1 to 12Lower-place byte (day): 1 to 31

IN/OUT

2 Hours/minutes(BCD)

Higher-place byte (hours): 0 to 23Lower-place byte (minutes): 0 to 59

IN/OUT

3 Seconds (BCD) 0000 to 0059 IN/OUT

4 Total number ofseconds

Obtained by converting the operation result(year/month/day/hours/minutes/seconds)

OUT

5seconds (year/month/day/hours/minutes/seconds)

into seconds (double-length integer).

Table 3.19 Parameter 2 Format

Register Offset Data Data Range (BCD) I/O

0 Year (BCD) 0000 to 0099 IN

1 Month/day(BCD)

Higher-place byte (month): 1 to 12Lower-place byte (day): 1 to 31

IN

2 Hours/minutes(BCD)

Higher-place byte (hours): 0 to 23Lower-place byte (minutes): 0 to 59

IN

3 Seconds (BCD) 0000 to 0059 IN

If the contents of the first and second parameters and the operation result are within the ranges

shown above, the operation will be performed normally. After the operation is completed, the

3

Ladder Instructions

3.6.16 SPEND TIME Instruction (SPEND)

3 -68

B register will be turned OFF. If the contents of the first and second parameters are outside the

data ranges, the operation will not be performed. In this case, 9999H will be stored in the se-

conds register and the B register will be turned ON.



J Format

Specify the first parameter (time from which another time is subtracted and operation result)

and the second parameter (time to subtract) after the SPEND instruction.

Time from which anothertime is subtracted andoperation result

Time to subtract

Example: SPEND MW00000, MW00100 Time from which another time is subtracted and opera-tion result:



Time to subtract:




Register A F B I J


J Examples

The time in DW00000 to DW00003 is subtracted from the time in MW00100 to MW00103

and the elapsed time is stored in MW00100 to MW00105.

SPEND MW00100, DW00000DB000100

98 yrs 5 mos 11 days 15 hrs 04 min 47 s − 98 yrs 4 mos 2 days 8 hrs 13 min 08 s(MW00100)(MW00101) (MW00102) (MW00103) (DW00000) (DW00101) (DW00102) (DW00103)

= 0 yrs 39 days 6 hrs 51 min 39 s(MW00100)(MW00101)(MW00102) (MW00103)

3


3 -69


MW00100 H0098 H0000

MW00101 H0511 H0039

MW00102 H1504 H0651

MW00103 H0047 H0039

MW00104

MW00105

DW00000 H0098 H0098

DW00001 H0402 H0402

DW00002 H0813 H0813

DW00003 H0008 H0008

In operation results, treat one year as 365 days. Leap years are not taken into consideration. Operation resultsare calculated as the number of days, not the number of months.

3

IMPORTANT

Ladder Instructions

3.7.1 SIGN INVERSION Instruction (INV)

3 -70

3.7 Numeric Conversion Instructions

The six numeric conversion instructions shown in Table 3.20 are used to change the contents of

the A register or the F register. These instructions use the contents of the A register or the F register

as the input and store the operation result in the A register or F register.

Table 3.20 Numeric Conversion Instructions

Numeric ConversionInstructions

Operation Numeric ConversionOperationInstructions

Integer DoubleInteger

RealNumber

Operation

SIGN INVERSIONinstruction (INV)

Applicable Applicable Applicable Inverts the sign of the contents ofthe A register or F register.

1’S COMPLEMENTinstruction (COM)

Applicable Applicable Not appli-cable

Determines the 1’s complement ofthe contents of the A register.

ABSOLUTE VALUECONVERSION instruc-tion (ABS)

Applicable Applicable Applicable Determines the absolute value ofthe contents of the A register or Fregister.

BINARY CONVER-SION instruction (BIN)


Performs binary conversion of thecontents of the A register.

BCD CONVERSIONinstruction (BCD)


Performs BCD conversion of thecontents of the A register.

PARITY CONVERSIONinstruction (PARITY)


Counts the number of bits in the Aregister that are set to ON (or 1).

3.7.1 SIGN INVERSION Instruction (INV)

The SIGN INVERSION instruction is represented by INV.

J Function

The INV instruction inverts the sign of the contents of the A register or F register.

J Format

INV


Register A F B I J




3


3 -71

J Examples

Integer Data (A Register)

⇒ MW00101(−00100)

MW00100 INV(00100)

Double Integer Data (A Register)

⇒ ML00102(−100000)

ML00100 INV(100000)

Real Number Data (F Register)

⇒ DF00202(−1.0)

DF00200 INV(1.0)

3.7.2 1’S COMPLEMENT Instruction (COM)

The 1’S COMPLEMENT instruction is represented by COM.

J Function

The COM instruction determines the 1’s complement of the contents of the A register.

J Format

COM


Register A F B I J


J Examples


⇒ MW00101(HAAAA)

MW00100 COM(H5555)

Double-length Integer Data (A Register)

⇒ ML00102(HAAAAAAAA)

ML00100 COM(H55555555)

3.7.3 ABSOLUTE VALUE CONVERSION Instruction (ABS)

The ABSOLUTE VALUE CONVERSION instruction is represented by ABS.

J Function

The ABS instruction determines the absolute value of the contents of the A register or F regis-

ter.

3

Ladder Instructions

3.7.4 BINARY CONVERSION Instruction (BIN)

3 -72

J Format

ABS


Register A F B I J




J Examples


⇒ MW00101(00100)

MW00100 ABS(−00100)


⇒ ML00102(100000)

ML00100 ABS(−100000)

Real Number Data (F Register)

⇒ DF00202(1.0)

DF00200 ABS(−1.0)

3.7.4 BINARY CONVERSION Instruction (BIN)

The BINARY CONVERSION instruction is represented by BIN.

J Function

The BIN instruction converts a binary coded decimal (BCD) value in the A register into a

binary value (binary conversion). If the 4-digit BCD value in the integer A register is abcd, the

output value (Y) of the BIN instruction can be determined by the following formula:

Y = (a× 1,000) + (b× 100) + (c× 10) + d

Although the above formula is applicable even if the value in the A register is not in BCD nota-

tion (e.g., 123FH), correct results will not be obtained in such cases.

J Format

BIN


Register A F B I J


3


3 -73

J Examples


⇒ MW00101(D01234)

MW00100 BIN(H1234)


⇒ ML00102(D12345678)

ML00100 BIN(H12345678)

3.7.5 BCD CONVERSION Instruction (BCD)

The BCD CONVERSION instruction is represented by BCD.

J Function

The BCD instruction converts a binary value in the A register into a BCD value (BCD conver-

sion). If the 4-digit decimal value in the A register is abcd, the output value (Y) of the BCD

instruction can be determined by the following formula:

Y = (a× 4,096) + (b× 256) + (c× 16) + d

Although the above formula is applicable even if the value in the A register cannot be expressed

in BCD notation (e.g., numbers greater than 9999 or negative numbers), correct results will

not be obtained in such cases.

J Format

BCD


Register A F B I J


J Examples


⇒ MW00101(H1234)

MW00100 BCD(D01234)


⇒ ML00102(H12345678)

ML00100 BCD(D12345678)

3

Ladder Instructions

3.7.7 ASCII CONVERSION 1 Instruction (ASCII)

3 -74

3.7.6 PARITY CONVERSION Instruction (PARITY)

The PARITY CONVERSION instruction is represented by PARITY.

J Function

The PARITY instruction counts the number of bits in the A register that are set to ON (or 1).

J Format

PARITY


Register A F B I J


J Examples


⇒ MW00101(00008)

MW00100 PARITY(HF0F0)


⇒ ML00102(00016)

ML00100 PARITY(HF0F0F0F0)

3.7.7 ASCII CONVERSION 1 Instruction (ASCII)

The ASCII CONVERSION 1 instruction is represented by ASCII.

J Function

The ASCII instruction converts the specified characters (character string) to the corresponding

ASCII character codes and stores them in the designated integer register. It recognizes upper-

case and lowercase characters separately.

The first character is stored in the lower-place byte of the first word and the second character

is stored in the higher-place byte of the first word. Other characters are stored in the same way.

If the number of characters is odd, the higher-place byte of the last word in the storage register

will be set to 0. Up to 32 characters can be entered.

3


3 -75

ASCII VWXXXXX <= Character string

Higher-place byte Lower-place byte

VWxxxxx Second character First character

VWxxxxx+1 Fourth character Third character

VWxxxxx+2 Sixth character Fifth character

VWxxxxx+3 Eighth character Seventh character V = S, I, O, M, D

⋮

nth character

↑ If the number of characters is odd, 0 is sethere.

J Format

Specify a storage register number and a character string after the ASCII instruction.

Character stringStorage registernumber

Example: ASCII MW00200 ”ABCDEFG” Storage register number:



Character string:

S ASCII characters


Register A F B I J


J Examples

D Character string ABCD is stored in MW00100 to MW00101.

ASCII MW00100 “ABCD”

Higher-placebyte

Lower-placebyte

MW00100 42H (‘B’) 41H (‘A’) MW00100 = 4241H

MW00101 44H (‘D’) 43H (‘C’) MW00101 = 4443H

D Character string ABCDEFG is stored in MW00100 to MW00103.

ASCII MW00100 “ABCDEFG”

3

Ladder Instructions

3.7.8 ASCII CONVERSION 2 Instruction (BINASC)

3 -76


MW00100 42H (‘B’) 41H (‘A’) MW00100 = 4241H

MW00101 44H (‘D’) 43H (‘C’) MW00101 = 4443H

MW00102 46H (‘F’) 45H (‘E’) MW00102 = 4645H

MW00103 00H 47H (‘G’) MW00103 = 0047H

↑ The remaining byte is set to 0.

3.7.8 ASCII CONVERSION 2 Instruction (BINASC)

The ASCII CONVERSION 2 instruction is represented by BINASC.

J Function

The BINASC instruction converts the 16-bit binary data stored in the A register into four-digit

hexadecimal ASCII character codes and stores them in the designated storage register (two

words).

HXTZW (Hexadecimal input data)

(Storage register)

BINASC VWxxxxx


VWxxxxx Third digit (Y) Fourth digit (X)

VWxxxxx+1 First digit (W) Second digit (Z) V = S, I, O, M, D

J Format

Specify a storage register number after the BINASC instruction.

Example: BINASC MW00100 MW00100: Storage register number




Register A F B I J


J Examples

The data 1234H stored in the A register is converted into a four-digit hexadecimal ASCII char-

acter codes and stored in MW00100 and MW00101.

H1234BINASC MW00100

3


3 -77


MW00100 32H (‘2’) 31H (‘1’) MW00100 = 3231H

MW00101 34H (‘4’) 33H (‘3’) MW00101 = 3433H

3.7.9 ASCII CONVERSION 3 Instruction (ASCBIN)

The ASCII CONVERSION 3 instruction is represented by ASCBIN.

J Function

The ASCBIN instruction converts four-digit hexadecimal ASCII character codes into 16-bit

binary data and stores it in the A register.

HXTZW (Hexadecimal input data)

(Conversion source register)

BINASC VWxxxxx

Conversion Source Data A Register

Higher-placebyte

Lower-placebyte

Higher-place byte

Lower-placebyte

VWxxxxx Third digit (Y) Fourth digit (Y) XY ZW

VWxxxxx+1 First digit (W) Second digit (Z) V = S, I, O, M, D

J Format

Specify a storage register number after the ASCBIN instruction.

Example: ASCBIN MW00100 MW00100: Storage register




Register A F B I J


J Examples

The four-byte ASCII character codes stored in MW00100 and MW00101 are converted into

two-byte binary data and then stored in MW00200.

ASCBIN MW00100⇒ MW00200

3

Ladder Instructions

3.7.9 ASCII CONVERSION 3 Instruction (ASCBIN)

3 -78

Conversion Source Data A Register

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte

MW00100 32H (‘2’) 31H (‘1’) MW00200 12H 34H

MW00101 34H (‘4’) 33H (‘3’)

3

3.8 Number Comparison Instructions

3 -79


3.8.1 Comparison Instructions

J Function

Six comparison instructions are used to check greater than, smaller than, and equal to relation-

ships between numeric values. These instructions compare the immediately preceding value

of the A or F register with the value of the specified register and stores the comparison result

in the B register (the result is ON when true).

J Format

Specify comparison data after the comparison instruction.

< 00100≦=≠≧>

Example: 00100: Comparison data




S Any constant


Register A F B I J


J Examples

D If the value of MW00100 is not 100, the instructions following IFON will be executed.

MW00100≠ 00100MB00010A

MB00010A

IFON⇒ MW00104MW00101 + MW00102 + MW00103

MW00102

…

IEND

3

Ladder Instructions

3.8.1 Comparison Instructions

3 -80

D If the comparison result needs to be used in a subsequent instruction, it is convenient to usea coil to store the comparison result. If the value of MW00100 is not 100, MW00010A willbe turned ON.

Instruction sequenceThis comparison result isused here.MB00010A

IFON⇒ MW00104MW00101 + MW00102 + MW00103

MW00102

…

IEND

…

MW00100≠ 00100MB00010A

1. Use the NO CONTACT instruction when a coil is used to store the comparison result and the IFON (IFOFF)or ON (OFF) instruction is used.

MW00100≠ 00100MB00010A

MB00010A

IFON

…

IEND

2. Use a instruction before each comparison instructionwhencomparing the contents of real number regis-

ters.

Incorrect

Correct

1.1 + 1.0 ⇒ DF00010

≠ 2.1DB000200

1.1 + 1.0 ⇒ DF00010

DF00010≠ 2.1DB000200

3. For real number data, there is a slight precision error in the data displayed on the MPE720, and so the datamay not match the execution result of the comparison instruction.

3IMPORTANT


3 -81

3.8.2 RANGE CHECK Instruction (RCHK)

The RANGE CHECK instruction is represented by RCHK.

J Function

The RCHK instruction checks whether the input value in the A register is within the specified

range, and then outputs the result to the B register. The contents of the A register is retained.

( Input value)

RCHK [Lower limit], [Upper limit]Result

Output value

B register = OFF

B register = OFFLower limit

Upper limit

B register = ONInput value

D If lower limit≦ input value (A register)≦ upper limit, ON is output as the result (B regis-ter).

D Otherwise, OFF is output to the B register.

When upper limit < lower limit, operation cannot be guaranteed.

J Format

Specify a lower limit and an upper limit after the RCHK instruction.

Lower limit Upper limit

Example: RCHK −1000, 1000 Lower limit:




S Any constant

Upper limit:




S Any constant

3

IMPORTANT

Ladder Instructions

3.8.2 RANGE CHECK Instruction (RCHK)

3 -82


Register A F B I J


J Examples

Integer Operation

MW00100DB000000

RCHK −1000, 1000

Input (MW00100) Output (DB000000)

−1000 > MW00100 OFF

−1000≦MW00100≦ 1000 ON

MW00100 > 1000 OFF

Double-length Integer Operation

MW00100DB000000

RCHK −100000, 100000

Input (ML00100) Output (DB000000)

−100000 > ML00100 OFF

−100000≦ML00100≦ 100000 ON

ML00100 > 100000 OFF

Real Number Operation

MW00100DB000000

RCHK −10.5, 10.5

Input (DF00100) Output (DB000000)

−10.5 > DF00100 OFF

−10.5≦ DF00100≦ 10.5 ON

DF00100 > 10.5 OFF

3

3.9 Data Manipulation Instructions

3 -83


This section describes the instructions for data bit and word manipulation, data exchange, table

initialization, data searches, and data sorting.

3.9.1 BIT ROTATION LEFT Instruction (ROTL) and BIT ROTATIONRIGHT Instruction (ROTR)

The BIT ROTATION LEFT instruction is represented by ROTL and the BIT ROTATION

RIGHT instruction is represented by ROTR.

J Function

The ROTL (or ROTR) instruction is used to rotate bits to the left (or right) the number of times

designated in the bit table designated by the leading bit address and bit width.

Bit width (m)

Leading bit addressm-1 m-2 m-3 4 3 2 1 0

Number of rotations

J Format

Specify the leading bit address, the number of rotations, and bit width after the ROTL or ROTR

instruction.

Leading bitaddress

Bit width(m)

Number ofbits shifted

Example: ROTL MB00100A→ N = 1 W = 20ROTR

Leading bit address:



Number of rotations:



S Any constant

Bit width (m):



S Any constant


Register A F B I J


3

Ladder Instructions

3.9.2 MOVE BITS Instruction (MOVB)

3 -84

J Examples

ROTL Instruction

The data starting with MB00000A (bit A of MW00000) with a bit width of 10 is rotated five

times to the left.

Rotation target range (bit width = 10)

Beforeexecution

Afterexecution

ROTL MB00000A N=5 W=10

0 0 1 1 1 0

1 0 0 0

F C 4 0MW00000

MW00001

9

0 1 0 0 0 0

0 1 1 1

F C 4 0MW00000

MW00001

9

ROTR Instruction

The data starting with MB000000 (bit 0 of MW00000) with a bit width of 10 is rotated once

to the right.

ROTR MB00000A N=1 W=10

F C 4 08

1 0F C 4 08

1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1

0 0 0 0 0 0

0 0 0 0 0 0 0

Rotation target range (bit width = 10)

Beforeexecution

Afterexecution

3.9.2 MOVE BITS Instruction (MOVB)

The MOVE BITS instruction is represented by MOVB.

J Function

The MOVB instruction moves the designated number of bits from the beginning of the move

source bits to the beginning of the move destination bits. The move process is performed one

bit at a time in the direction in which the relay number increases.

Unless the move source bits overlap with the move destination bits, the move source bit table

will be stored. If there is overlap between them, the move source bit table may not be stored.

3


3 -85

MOVB [Move source register number] => [Move destination register number] W = [Number of bits moved]

m-1 m-2 m-3 4 3 2 1 0

0 1 1 1 1 0 1 0 1

5

⇒

(a)

(b)

c

d

e

f

g

(h)

c

d

c

d

e

(f)

(g)

(h)

e

f

g

a

b

c

d

e

(f)

(g)

(h)

(a)

(b)

a

b

a

b

a

(h)

0 1 1 1 1 0 1 0 1

Move sourcedata area

Move destinationdata area

Number of bits moved (m)Leading bit addressof move source

Leading bit addressof move destination

Move source Move destination

Overlap Situation (1) Overlap Situation (2)


J Format

Specify the move source bit address, move destination bit address, and the number of bits to

be moved after the MOVB instruction.

Movesource bitaddress

Movedestinationbit address

Number ofbits moved

Example: MOVB MB00100A⇒ MB00200A W = 20 Move source bit address:

S Any bit register

S Any bit register with subscriptaddress bit address

Move destination bit address:



Number of bits moved (m):



S Any constant


Register A F B I J


3

Ladder Instructions

3.9.3 MOVE WORD Instruction (MOVW)

3 -86

J Examples

Ten bits of data are moved from MB000000 (bit 0 of MW00000) to MB000010 (bit 0 of

MW00001).

Move range

After move

MOVB MB000000 => MB000010 W=10

MW00000

MW00001

MW00000

MW00001

0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 1 0 0 0 0 0

1 1 1 1 1 1 1

1 1 1 1 1

1 1 1 1 1 1 1

1 0 1 1

Move range

3.9.3 MOVE WORD Instruction (MOVW)

The MOVE WORD instruction is represented by MOVW.

J Function

The MOVW instruction moves the designated number of words from the beginning of the

move source registers to the beginning of the move destination registers. The move process

is performed one word at a time in the direction in which the register number increases. Unless

the move source registers overlap with the move destination registers, the move source word

table will be stored. If there is an overlap between them, the move source bit table may not be

stored.

MOVW [Move source register number] => [Move destination register number] W = [Number of wordsmoved]






⇒

(a)

(b)

c

d

e

f

g

(h)

c

d

c

d

e(f)

(g)

(h)

e

f

g

a

b

c

d

e

(f)

(g)

(h)

(a)

(b)

a

b

a

b

a

(h)



J Format

Specify the move source register number, move destination register number, and the number

of words to be moved after the MOVW instruction.

3


3 -87

Movesourceregister

Movedestinationregister

Number ofwords tobe moved

Example: MOVW MW00100→ MW00200W = 20 Move source register number:


S Any integer register with subscriptregisternumber

registernumber

be moved(m) Move destination register number:


S Any integer register with subscript (except #and C registers)

Number of words to be moved (m):



S Any constant


Register A F B I J


J Examples

Word data in MW00000 to MW00009 is moved to MW00100 to MW00109.

MOVW MW00000 => MW00100 W=00010

1234H

2345H

3456H

⋮

9999H

1234H

2345H

3456H

⋮

9999H

MW00000

MW00001

MW00002

⋮

MW00009

MW00100

MW00101

MW00102

⋮

MW00109

After move→

3.9.4 EXCHANGE Instruction (XCHG)

The EXCHANGE instruction is represented by XCHG.

J Function

The XCHG instruction is used to exchange data between data tables 1 and 2.

3

Ladder Instructions

3.9.4 EXCHANGE Instruction (XCHG)

3 -88

⇒

⇒

a

b

c

d

e

f

g

h

i

j

n

o

p

k

l

m⇒

i

j

n

o

p

k

l

m

a

b

c

d

e

f

g

h

XCHG [Data table 1] => [Data table 2] W = [Amount of data exchanged]

Before execution After execution

Data table 1 Data table 2

Data table 1 Data table 2 Data table 1 Data table 2

J Format

Specify data table 1, data table 2, and the amount of data to be exchanged after the XCHG

instruction.

Amount ofdata to beexchanged

Example: XCHG MW00100⇒ MW00200W = 20

Data table 1 Data table 2

Data table 1:



Data table 2:



Amount of data to be exchanged (m):



S Any constant


Register A F B I J


3


3 -89

J Examples

The contents of MW00000 to MW00009 are exchanged with those of MW00100 to

MW00109.

Aftertransfer→

XCHG MW00000 => MW00100 W=00010

1031H

1032H

1033H

1034H

1035H

MW00000

MW00001

MW00002

MW00003

MW00004

MW00000

MW00001

MW00002

MW00003

MW00004

1036H

1037H

1038H

1039H

1030H

MW00005

MW00006

MW00007

MW00008

MW00009

MW00005

MW00006

MW00007

MW00008

MW00009

MW00100

MW00101

MW00102

MW00103

MW00104

MW00105

MW00106

MW00107

MW00108

MW00109

2050H

2051H

2052H

2053H

2054H

MW00100

MW00101

MW00102

MW00103

MW00104

2055H

2056H

2057H

2058H

2059H

MW00105

MW00106

MW00107

MW00108

MW00109

2050H

2051H

2052H

2053H

2054H

2055H

2056H

2057H

2058H

2059H

1031H

1032H

1033H

1034H

1035H

1036H

1037H

1038H

1039H

1030H

3.9.5 SET WORDS Instruction (SETW)

The SET WORDS instruction is represented by SETW.

J Function

The SETW instruction stores the designated data in all registers designated by the transfer des-

tination register number and the number of destination registers. The storage process is per-

formed one word at a time in the direction in which the register number increases.

Transfer dataTransfer destinationregister numberxxxxx xxxxx

xxxxx

xxxxx

xxxxx

…

xxxxx

xxxxx

VWxxxxx

VWxxxxx+1

VWxxxxx+2

VWxxxxx+3

VWxxxxx+ (n-1)

VWxxxxx+n

V=S, I, O, M, D

Transfer data

Number ofdestinationregisters

J Format

Specify the transfer destination register number, transfer data, and the number of destination

registers after the SETW instruction.

3

Ladder Instructions

3.9.6 BYTE-TO-WORD EXPANSION Instruction (BEXTD)

3 -90

Number ofdestinationregisters

Transferdestinationregisternumber

Transferdata

Example: SETW MW00200 D = 00000 W = 20 Transfer destination register number:



Transfer data:



S Any constant

Number of destination registers (m):



S Any constant


Register A F B I J


J Examples

The contents of MW00100 to MW00119 are set to 0.

Transfer data

SETW MW00100 D=00000 W=00020

00000 00000

00000

00000

00000

…

00000

00000

MW00100

MW00101

MW00102

MW00103

MW00118

MW00119

Transfer data

3.9.6 BYTE-TO-WORD EXPANSION Instruction (BEXTD)

The BYTE-TO-WORD EXPANSION instruction is represented by BEXTD.

J Function

The BEXTD instruction stores the byte sequence stored in the transfer source registers one byte

at a time in the word sequence in the transfer destination registers. The higher-place bytes of

the transfer destination registers are set to 0.

3


3 -91

VWyyyyy

VWyyyyy+1b

00H

VWyyyyy+2c

00H

VWyyyyy+3d

00H

VWyyyyy+4e

00H

VWyyyyy+5f

00H

VWxxxxx

VWxxxxx+1

VWxxxxx+2

c

d

e

f

V=S, I, O, M, D

Number of bytestransferred

a (Lower-place byte)

b (Higher-place byte)


00H (Higher-place byte)

BEXTD VWxxxxx to VWyyyyy B = N

J Format

Specify the transfer source register number, transfer destination register number, and the num-

ber of bytes to be transferred after the BEXTD instruction.

Transfersourceregister

Transferdestinationregister

Number ofbytes to betransferred

Example: BEXTD MW00100 to MW00200 B = 10 Transfer source register number:



registernumber

transferred

Transfer destination register number:



Number of bytes to be transferred:



S Any constant


Register A F B I J


J Examples

The five bytes starting with MW00100 are expanded to five words beginning with MW00200.

3

Ladder Instructions

3.9.7 WORD-TO-BYTE COMPRESSION Instruction (BPRESS)

3 -92

10H (Lower-place byte)


BEXTD MW00100 to MW00200 B=00005

11H

12H

13H

14H

00H

MW00200

MW0020111H

00H

MW0020212H

00H

MW0020313H

00H

MW0020414H

00H

MW00100

MW00101

MW00102

MW00103

MW00104

10H (Lower-place byte)

3.9.7 WORD-TO-BYTE COMPRESSION Instruction (BPRESS)

The WORD-TO-BYTE COMPRESSION instruction is represented by BPRESS.

J Function

The BPRESS instruction stores the lower-place bytes of the word sequence stored in the trans-

fer source registers in the byte sequence of the transfer destination registers. The higher-place

bytes of the transfer source registers are ignored. This function is the reverse of that of the

BEXTD instruction.

0 is set here when the number of bytestransferred is odd.V = S, I, O, M, D

VWxxxxx

VWxxxxx+1 b

xxH

VWxxxxx+2 c

xxH

VWxxxxx+3 d

xxH

VWxxxxx+4 e

xxH

VWyyyyy

VWyyyyy+1

VWyyyyy+2

c

d

e

00


b (Higher-place byte)


xxH (Higher-place byte)

Number of bytestransferred

BPRESS VWxxxxx to VWyyyyy B = N

J Format

Specify the transfer source register number, transfer destination register number, and the num-

ber of bytes to be transferred after the BPRESS instruction.

3


3 -93

Transfersourceregister

Transferdestinationregister

Number ofbytes to betransferred

Example: BPRESS MW00100 to MW00200B = 10 Transfer source register number:



registernumber

transferred

Transfer destination register number:



Number of bytes to be transferred:



S Any constant


Register A F B I J


J Examples

The five words starting with MW00100 are compressed into five bytes starting with

MW00200.

10H (Lower-place byte)10H (Lower-place byte)


BPRESS MW00100 to MW00200 B=00005

MW00200

MW00201

MW00202

MW00100

MW00101

MW00102

MW00103

11H

12H

13H

14H

00H

11H

00H

12H

00H

13H

00H

14H

00H

MW001040 is set here when the number ofbytes transferred is odd.

3.9.8 BINARY SEARCH Instruction (BSRCH)

The BINARY SEARCH instruction is represented by BSRCH.

J Function

The BSRCH instruction uses a binary search method to search the designated data within the

designated search range. The search result (offset from the leading register number of the

search range for the matching data) is stored in the designated register.

3

Ladder Instructions

3.9.8 BINARY SEARCH Instruction (BSRCH)

3 -94

Always sort the data within the search range in ascending order before executing the BSRCH instruction. Other-wise, the correct result will not be obtained. In most cases, −1 will be stored. Also, if there are two or more wordswith identical data, the first register number that matches the data will be stored. If no matching data is found,−1 will be stored.

J Format

Specify the leading register number of the search range, the number of words within the range,

search data, and search result after the BSRCH instruction.

Leading registernumber of thesearch range

Numberof wordswithin therange

Searchdata

Searchresult

Example:BSRCH MW00000W=20 D=100 R=MW00100

Leading register number of the search range andnumber of words within the range:



Search data:



S Any constant

Search result:




Register A F B I J

Storage Condition Not stored Not stored Stored Stored Stored

J Examples

Data that matches 01234 is searched from registers MW00100 to MW00199 and the result is

stored in DW00000.

The offset from MW00100 is stored in DW00000.DW00000←00102−00100

BSRCH MW00100 W=100 D=01234 R=DW00000

MW00100

MW00102

0

00321

01234

99765MW00199

MW00101

DW00000 00002

MW00102 MW00100

3

IMPORTANT


3 -95

3.9.9 SORT Instruction (SORT)

The SORT instruction is represented by SORT.

J Function

The SORT instruction sorts data within the designated register range in ascending order.

J Format

Specify the leading register number of the sort range and the number of registers within the

range after the SORT instruction.

Leading registernumber of thesort range

Number ofregisters withinthe range

Example: SORT MW00000W = 100 Leading register number of the sort range:



Number of registers within the range:



S Any constant


Register A F B I J


J Examples

The data in registers MW00100 to MW00119 is sorted in ascending order.

SORT MW00100 W=00020

3.9.10 BIT SHIFT LEFT Instruction (SHFTL) and BIT SHIFT RIGHTInstruction (SHFTR)

The BIT SHIFT LEFT instruction is represented by SHFTL and the BIT SHIFT RIGHT

instruction is represented by SHFTR.

J Function

The SHFTL (or SHFTR) instruction shifts the bit sequence designated by the leading bit ad-

dress and bit width to the left (or right) the designated number of bits.

As shown in the following figure, bit data that overflows the bit width is discarded and insuffi-

cient bits are set to 0.

3

Ladder Instructions

3.9.10 BIT SHIFT LEFT Instruction (SHFTL) and BIT SHIFT RIGHT Instruction (SHFTR)

3 -96

m-1 m-2 m-3 4 3 2 1 0

0

m-4 m-5

Xm-2Xm-1 Xm-3 Xm-4 Xm-5 X4 X3 X2 X1 X0

Xm-5 X0 0 0 0

Number of bits transferred (m)

Beforeexecution

Afterexecution

Leadingbitaddress

Number ofbits shifted 0 is set here.

Discarded

J Format

Specify the leading bit address, the number of bits shifted, and bit width after the SHFTL or

SHFTR instruction.

Leading bit address Bit width

Number of bits shifted

Example: SHFTL MB00100AN = 1W = 20SHFTR

Leading bit address:



Number of bits shifted:



S Any constant

Bit width:



S Any constant


Register A F B I J


J Examples

D Ten bits of data starting with SHFTL MB00000A (bit A of MW00000) are shifted five bitsto the left.

SHFTL MB00000A N=5 W=10

3

A

MW00000 1 1 0 0 1 . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 1 0 1MW00001

4

A

MW00000 1 0 0 0 0 . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 0 0MW000010 is set here.

Note The upper five bits are discarded.

3


3 -97

D Five bits of data starting with MB000005 (bit 5 of MW00000) are shifted three bits to theright.

Note The lower three bits are discarded.

SHFTR MB000005 N=3 W=5

5

MW00000

MW00000

. . . . . . . . . .1 1 1 1 1. . . . . . . . . . . . . .

. . . . . . . . . .0 0 0 1 1. . . . . . . . . . . . . .

0 is set here.

3.9.11 COPY WORD Instruction (COPYW)

The COPY WORD instruction is represented by COPYW.

J Function

The COPYW instruction copies the designated number of words from the beginning of the

copy source register to the beginning of the copy destination register. The copy process copies

the entire block of data from the copy source to the copy destination. Even if there is overlap

between the copy source and the copy destination, the full copy data block will be copied to

the copy destination.

COPYW [Copy source register number] => [Copy destination register number] W = [Number of words copied]

Copy source Copy destination


Copy source Copy destination

(a)

(b)

c

d

e

f

g

(h)

c

d

c

d

e(f)

(g)

(h)

e

f

g

a

b

c

d

e

(f)

(g)

(h)

(a)

(b)

a

b

c

d

e

(h)

⇒Copy sourcedata area

Copy destinationdata area

J Format

Specify the copy source register number, copy destination register number, and the number of

words to be copied after the COPYW instruction.

3

Ladder Instructions

3.9.12 BYTE SWAP Instruction (BSWAP)

3 -98

Copy source

Copy destinationregister number

Number of

Example: COPYW MW00100⇒ MW00200 W = 20 Copy source register number:

S Any bit register

S Any bit register with subscriptCopy sourceregister number

Number ofwords to becopied (m)

Copy destination register number:



Number of words to be copied:



S Any constant


Register A F B I J


J Examples

The word data in MW00000 to MW00009 is copied to MW00100 to MW00109.

After transfer→

COPYW MW00000 => MW00100 W=00010

1032H

1133H

1234H

⋮

1841H

MW00001

MW00002

⋮

MW00008

MW00100

MW00101

MW00102

⋮

MW00108

1842HMW00009 MW00109

1032H

1133H

1234H

⋮

1841H

1842H

3.9.12 BYTE SWAP Instruction (BSWAP)

The BYTE SWAP instruction is represented by BSWAP.

J Function

The BSWAP instruction swaps the higher-place and lower-place bytes of the designated regis-

ter.

D BSWAP VWxxxxx (Target Register)

Higher-placebyte

Lower-placebyte

Before swap After swap

a b ab

VWxxxxxVWxxxxx

V=S, I, O, M, DHigher-placebyte

Lower-placebyte

3


3 -99

J Format

Specify the register number after the BSWAP instruction.

Example: BSWAP MW00100 MW00100: Register number




Register A F B I J


J Examples

The higher-place and lower-place bytes of MW00100 to MW00102 are swapped.

FOR I = 00000 to 00002 by 00001BSWAP MW00100iFEND

12H 34H 12H34HMW00100MW00100

14H 54H 14H54HMW00102MW00102

13H 44H 13H44HMW00101MW00101

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte

Higher-placebyte

Lower-placebyte




3

Ladder Instructions

3.10.1 SQUARE ROOT Instruction (SQRT)

3 -100

3.10 Basic Function Instructions

This section describes the 10 basic function instructions, including square root, sine, and cosine.

3.10.1 SQUARE ROOT Instruction (SQRT)

The SQUARE ROOT instruction is represented by SQRT.

J Function

The SQRT instruction calculates the square root of an integer or real number value as the opera-

tion result. The input units and output results for integer and real number values are different.

This instruction cannot be used for double-length integer data.

Integer Data

The operation result of the SQRT instruction slightly differs from the square root in mathemati-

cal terms. To be more precise, the operation result is expressed by the following formula.

32768 × sign (A) × SQRT (|A|/32768)

sign (A): Sign of A register|A|: Absolute value of A register

In other words, the operation result is equal to the mathematical square root multiplied by

128√2 (approx. 181.02). If the input is a negative value, the square root of the absolute value

is calculated first and then the negative value of the square root is stored in the A register as

the operation result.

The maximum error of the output value is ±2.

Real Number Data

The immediately preceding operation result (F register) is used as the input and the square root

of the input is stored in the F register. If the input is a negative value, the square root of the

absolute value is calculated first and then the negative value of the square root is stored in the

F register as the operation result. This instruction can be used in a real number operation.

J Format

SQRT


Integer Data

Register A F B I J


3


3 -101

Real Number Data

Register A F B I J


J Examples

Integer Data

D Positive Number Input

⇒ MW00102(01448)

MW00100 SQRT(00064)

D Negative Number Input

⇒ MW00102(−01448)

MW00100 SQRT(−00064)

Real Number Data

D Positive Number Input

⇒ MW00202(8.0)

DF00200 SQRT(64.0)

D Negative Number Input

⇒ MW00202(−8.0)

DF00200 SQRT(−64.0)

3.10.2 SINE Instruction (SIN)

The SINE instruction is represented by SIN.

J Function

The SIN instruction calculates the sine of an integer or real number value as the operation re-

sult. The input units and output results for integer and real number values are different. This

instruction cannot be used for double-length integer data.

Integer Data

This instruction can be used between −327.68 and 327.67 degrees. The immediately preceding

operation result (A register) is used as the input (1 = 0.01 degree) and the operation result is

stored in the A register. Upon output, the operation result is multiplied by 10000.

If a value outside the range of −327.68 to 327.67 is entered, the correct result will not be ob-

tained. For example, if 360.00 is entered, −295.36 degrees will be output as the result.

3

Ladder Instructions

3.10.3 COSINE Instruction (COS)

3 -102

Real Number DataThe immediately preceding operation result (F register) is used as the input (unit = degrees)

and the sine of the input is stored in the F register. This instruction can be used in a real number

operation.

J Format

SIN


Integer Data

Register A F B I J


Real Number Data

Register A F B I J


J Examples

Integer Data

Input θ = 30 degrees (MW00100 = 30 × 100 = 3000)Output SIN (θ) = 0.50 (MW00102 = 0.50 × 10000 = 5000)

⇒ MW00102(05000)

MW00100 SIN(03000)

Real Number Data

⇒ DF00202(0.5)

DF00200 SIN(30.0)

3.10.3 COSINE Instruction (COS)

The COSINE instruction is represented by COS.

J Function

The COS instruction calculates the cosine of integer or real number values as the operation

result. The input units and output results for integer and real number values are different. This

instruction cannot be used for double-length integer data.

Integer DataThis instruction can be used between −327.68 and 327.67 degrees. The immediately preceding

operation result (A register) is used as the input (1 = 0.01 degree) and the operation result is

stored in the A register. Upon output, the operation result is multiplied by 10000.

3


3 -103

If a value outside the range of −327.68 to 327.67 is entered, the correct result will not be ob-

tained. For example, if 360.00 is entered, −295.36 degrees will be output as a result.

Real Number Data

The immediately preceding operation result (F register) is used as the input (unit = degrees)

and the cosine of the input is stored in the F register. This instruction can be used in a real num-

ber operation.

J Format

COS


Integer Data

Register A F B I J


Real Number Data

Register A F B I J


J Examples

Integer Data

⇒ MW00102(05000)

MW00100 COS(06000)

Input θ = 60 degrees (MW00100 = 60 × 100 = 6000)Output SIN (θ) = 0.50 (MW00102 = 0.50 × 10000 = 5000)

Real Number Data

⇒ DF00202(0.5)

DF00200 COS(60.0)

3.10.4 TANGENT Instruction (TAN)

The TANGENT instruction is represented by TAN.

J Function

The TAN instruction uses the immediately preceding operation result (F register) as the input

(unit = degrees) and stores the tangent of the input in the F register. This instruction can be used

in a real number operation.

3

Ladder Instructions

3.10.5 ARC SINE Instruction (ASIN)

3 -104

J Format

TAN


Register A F B I J


J Examples

The tangent of the input value (θ = 45.0 degrees) [TAN (θ) = 1.0] is calculated.

⇒ DF00202(1.0)

DF00200 TAN(45.0)

The TAN instruction cannot be used for integer or double integer data.

3.10.5 ARC SINE Instruction (ASIN)

The ARC SINE instruction is represented by ASIN.

J Function

The ASIN instruction uses the immediately preceding operation result (F register) as the input

and stores the arc sine (unit = degrees) of the input in the F register. This instruction can be

used in a real number operation.

J Format

ASIN


Register A F B I J


J Examples

The arc sine of the input value (θ = 0.5) [ASIN (0.5) = θ = 30.0 degrees] is calculated.

DF00200(0.5)

⇒ DF00202(30.0)

ASIN

The ASIN instruction cannot be used for integer or double integer data.

3IMPORTANT

IMPORTANT


3 -105

3.10.6 ARC COSINE Instruction (ACOS)

The ARC COSINE instruction is represented by ACOS.

J Function

The ACOS instruction uses the immediately preceding operation result (F register) as the input

and stores the arc cosine (unit = degrees) of the input in the F register. This instruction can be

used in a real number operation.

J Format

ACOS


Register A F B I J


J Examples

The arc cosine of the input value (θ = 0.5) [ACOS (0.5) = θ = 60.0 degrees] is calculated.

DF00200(0.5)

⇒ DF00202(60.0)

ACOS

The ACOS instruction cannot be used for integer or double integer data.

3.10.7 ARC TANGENT Instruction (ATAN)

The ARC TANGENT instruction is represented by ATAN.

J Function

The ATAN instruction calculates the arc tangent of integer or real number data as the operation

result. The input units and output results for integer and real number data are different. This

instruction cannot be used for double integer data.

Integer DataThis instruction can be used between −327.68 and 327.67. The immediately preceding opera-

tion result (A register) is used as the input (1 = 0.01) and the operation result is stored in the

A register. Upon output, the operation result is multiplied by 100.

Real Number DataThe immediately preceding operation result (F register) is used as the input (1 = 0.01) and the

arc tangent (unit = degrees) of the input is stored in the F register. This instruction can be used

in a real number operation.

3

IMPORTANT

Ladder Instructions

3.10.7 ARC TANGENT Instruction (ATAN)

3 -106

J Format

ATAN


Integer Data

Register A F B I J


Real Number Data

Register A F B I J


J Examples

Integer Data

Input X = 1.00 (MW00100 = 1.00 × 100 = 100)Output θ = 45 degrees (MW00102 = 45 × 100 = 4500)

MW00100(00100)

⇒ DF00102(04500)ATAN

Real Number Data

DF00200(1.0)

⇒ DF00202(45.0)

ATAN

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3 -107

3.10.8 EXPONENT Instruction (EXP)

The EXPONENT instruction is represented by EXP.

J Function

The EXP instruction uses the immediately preceding operation result (F register) as the input

(x) and stores the natural logarithmic base (e) to the power of the input (ex) in the F register

as the operation result. This instruction can be used only in a real number operation.

J Format

EXP


Register A F B I J


J Examples

Calculating e (e = 2.7183) to the power of the input value (x = 1.0)

⇒ DF00202(2.7183)

DF00200 EXP(1.0)

If the operation result of the EXP instruction overflows, the maximum value (3.4...E + 38) will be stored andan operation error will not occur.

3

INFO

Ladder Instructions

3.10.9 NATURAL LOGARITHM Instruction (LN)

3 -108

3.10.9 NATURAL LOGARITHM Instruction (LN)

The NATURAL LOGARITHM instruction is represented by LN.

J Function

The LN instruction uses the immediately preceding operation result (F register) as the input

(x) and stores the natural logarithm (Loge x) of the input in the F register as the operation result.

This instruction can be used only in a real number operation.

J Format

LN


Register A F B I J


J Examples

Calculating the natural logarithm of the input value (x = 10.0) [Loge x= 2.3026]

⇒ DF00202(2.3026)

DF00200 LN(10.0)

The LN instruction checks the input value (x) and performs the following processing.

S When the input value is negative [e.g., LN (−1)], the LN instruction calculates using the absolute valueof the input.

S When the input value is zero [i.e., LN (0)], the LN instruction produces −∞ as the result.

3

INFO


3 -109

3.10.10 COMMON LOGARITHM Instruction (LOG)

The COMMON LOGARITHM instruction is represented by LOG.

J Function

The LOG instruction uses the immediately preceding operation result (F register) as the input

(x) and stores the common logarithm (Log10 x) of the input in the F register as the operation

result. This instruction can be used only in a real number operation.

J Format

LOG


Register A F B I J


J Examples

Calculating the common logarithm of the input value (x = 10.0) [Log10 x = 1.0]

⇒ DF00202(1.0)

DF00200 LOG(10.0)

The LOG instruction checks the input value (x) and performs the following processing.

S When the input value is negative [e.g., LOG (−1)], the LOG instruction calculates using the absolutevalue of the input.

S When the input value is zero [i.e., LN (0)], the LOG instruction produces −∞ as the result.

3

INFO

Ladder Instructions

3.11.1 DEAD ZONE A Instruction (DZA)

3 -110

3.11 DDC Instructions

This section describes the 13 DDC instructions, including DEAD ZONE A/B, UPPER/LOWER

LIMIT, and PI CONTROL instructions.

3.11.1 DEAD ZONE A Instruction (DZA)

The DEAD ZONE A instruction is represented by DZA.

J Function

The DZA instruction executes a dead zone operation on integer, long integer, or real number

data. The following operation is performed, where X is the input value, D is the designated

dead zone value, and Y is the output value:

D Y = X (|X|≧ |D|)

D Y = 0 (|X| < |D|)

Y

X+D

−D

J Format

Specify a dead zone value after the DZA instruction.

Example: DZA 00100 00100: Designated dead zone value



S Any constant


Register A F B I J




3


3 -111

J Examples

Integer Operation

Outsidedead zone

Within deadzone

MW00100

⇒ MW00102(00150)(00000)

DZA 00100

(00050)(00150)


Outsidedead zoneWithin deadzone

(200000)(050000)

ML00100

⇒ ML00102(200000)(000000)

DZA 100000


Outsidedead zone

Within deadzone

(150.0)(50.0)

DF00200

⇒ DF00202(150.0)(0.0)

DZA 100.0

3.11.2 DEAD ZONE B Instruction (DZB)

The DEAD ZONE B instruction is represented by DZB.

J Function

The DZB instruction executes a dead zone operation on integer, long integer, or real number

data. The following operation is performed, where X is the input value, D is the designated

dead zone value, and Y is the output value:

D Y = X − |D| (|X|≧ |D|, X≧ 0)

D Y = X + |D| (|X|≧ |D|, X≦ 0)

D Y = 0 (|X| < |D|)

Y

X+D

−D

3

Ladder Instructions

3.11.2 DEAD ZONE B Instruction (DZB)

3 -112

J Format

Specify a dead zone value after the DZB instruction.

Example: DZB 00100 00100: Designated dead zone value



S Any constant


Register A F B I J




J Examples

Integer Operation

Outsidedead zone

Within deadzone

(00150)(00050)

MW00100

⇒ MW00102(00050)(00000)

DZB 00100

Double Integer Operation

Outsidedead zone

Within deadzone

(200000)(050000)

ML00100

⇒ ML00102(100000)(000000)

DZB 100000


Outsidedead zone

Within deadzone

(150.0)(50.0)

DF00200

⇒ DF00202(50.0)(0.0)

DZB 100.0

3


3 -113

3.11.3 UPPER/LOWER LIMIT Instruction (LIMIT)

The UPPER/LOWER LIMIT instruction is represented by LIMIT.

J Function

The LIMIT instruction executes an upper/lower limit operation on integer, long integer, or real

number data. The following operation is performed, where X is the input value, A is the lower

limit, B is the upper limit, and Y is the output value:

D Y = A (X < A)

D Y = X (A≦ X≦ B)

D Y = B (B < X)

Y

X

Upper limit: B

Lower limit: A

When upper limit B is smaller than lower limit A, operation cannot be guaranteed.

J Format

Specify a lower limit and an upper limit after the LIMIT instruction.

Lower limit Upper limit

Example: LIMIT −00100 00100 Lower limit:



S Any constant

Upper limit:



S Any constant

3

IMPORTANT

Ladder Instructions

3.11.3 UPPER/LOWER LIMIT Instruction (LIMIT)

3 -114


Register A F B I J




J Examples

Integer Operation

LIMIT −00100 00100 ⇒ MW00102MW00100

Input (MW00100) Output (MW0010)

−100 > MW00100 −00100 (under the lower limit)

−100≦MW00100≦ 100 Value of MW00100 (between the upperand lower limits)

MW00100 > 100 00100 (above the upper limit)


LIMIT −100000 100000 ⇒ ML00102ML00100

Input (ML00100) Output (ML00102)

−100000 > ML00100 −100000 (under the lower limit)

−100000≦ML00100≦ 100000 Value of ML00100 (between the upperand lower limits)

ML00100 > 100000 100000 (above the upper limit)


LIMIT −100.0 100.0 ⇒ MF00202MF00200

Input (MF00200) Output (MF00202)

−100.0 > DF00100 −100.0 (under the lower limit)

−100.0≦ DF00100≦ 100.0 Value of MF00200 (between the upperand lower limits)

DF00100 > 100.0 100.0 (above the upper limit)

3


3 -115

3.11.4 PI CONTROL Instruction (PI)

The PI CONTROL instruction is represented by PI.

J Function

The PI instruction executes a PI control operation according to the contents of a previously set

parameter table. The input (X) to the PI operation must be integer or real number data. Long

integer data cannot be used. The configurations of the parameter tables for integer and real

number data are different. Operations are performed by processing each parameter as an inte-

ger consisting of the lower-place 16 bits. See Tables 3.21 and 3.22.

Table 3.21 Parameter Table for Integer PI Instruction

ADR Type Symbol Name Specifications I/O

0 W RLY Relay I/O Relay input, relay output* IN/OUT

1 W Kp P gain Gain of the P correction (a gain of 1 isequivalent to 100)

IN

2 W Ki Integral adjust-ment gain

Gain of the integration circuit input (a gainof 1 is equivalent to 100)

IN

3 W Ti Integral time Integral time (ms) IN

4 W IUL Upper integrationlimit

Upper limit for the I correction value IN

5 W ILL Lower integra-tion limit

Lower limit for the I correction value IN

6 W UL Upper PI limit Upper limit for the P+I correction value IN

7 W LL Lower PI limit Lower limit for the P+I correction value IN

8 W DB PI output deadband

Width of the dead band for the P+I correc-tion value

IN

9 W Y PI output PI correction output (also output to the Aregister)

OUT

10 W Yi I correction value Storage of the I correction value OUT

11 W IREM I remainder Storage of the I remainder OUT

* Relay I/O Bit Allocations

BIT Symbol Name Specifications I/O

0 IRST Integration reset ON is input to reset integration IN

1 to 7 − (Reserved) Reserved relays for inputs IN

8 to F − (Reserved) Reserved relays for outputs OUT

3

Ladder Instructions

3.11.4 PI CONTROL Instruction (PI)

3 -116

Table 3.22 Parameter Table for Real Number PI Instruction



1 W − (Reserved) Reserved register

2 F Kp P gain Gain of the P correction IN

4 F Ki Integral adjust-ment gain

Gain of the integration circuit input IN

6 F Ti Integral time Integral time (s) IN

8 F IUL Upper integrationlimit


10 F ILL Lower integra-tion limit


12 F UL Upper PI limit Upper limit for the P+I correction value IN

14 F LL Lower PI limit Lower limit for the P+I correction value IN

16 F DB PI output deadband

Width of the dead band for the P+I correc-tion value

IN

18 F Y PI output PI correction output (also output to the Aregister)

OUT

20 F Yi I correction value Storage of the I correction value OUT



0 IRST Integration reset ON is input to reset integration IN



Here, the PI operation is expressed as follows:

YX= Kp+ Ki× 1

Ti× S

X: Error input valueY: Output value

The following operation is performed with the PD instruction:

Y= Kp× X+ (Ki× X+ IREM)∕ TiTs+ Yi′

Yi’: Previous I output valueTs: Scan time setting

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3 -117

Block Diagram

Kp+

LIMIT, DB

Ki Ts/Ti+

+

+

I LIMIT

Z−1

InputX

OutputY

D When the P+I correction value reaches the upper or lower PI limit (UL, LL) or the PI deadband (DB) and the present P and I correction values have the same sign (diverging), the Icorrection value is not updated but is kept at the previous value. Conversely, when the Pand I correction values have different signs (converging towards 0), the I correction valueis updated with the present value.

D When the integration reset (IRST) is “ON,” Yi = 0 and IRST = 0 are output.

J Format

Specify the leading address of the parameter table after the PI instruction.

Example: PI MA00200 MA00200: Leading address of parameter table




Register A F B I J




J Examples

Integer Operation

MW00100 to MW00111 are used as a parameter table.

PI MA00100 ⇒ MW00011MW00010 Error input value

Leading address of parameter table PI output value


MF00200 to MF00220 are used as a parameter table.

3

Ladder Instructions

3.11.5 PD CONTROL Instruction (PD)

3 -118

PI MA00200 ⇒ MF00022MF00200 Error input value

Leading address of parameter table PI output value


The PD CONTROL instruction is represented by PD.

J Function

The PD instruction executes a PD control operation according to the contents of a previously

set parameter table. The input (X) to the PD operation must be integer or real number data.

Double integer data cannot be used. The configurations of the parameter tables for integer and

real number data are different. Operations are performed by processing each parameter as an

integer consisting of the lower-place 16 bits. See Tables 3.23 and 3.24.

Table 3.23 Parameter Table for Integer PD Instruction




IN

2 W Kd D gain Gain of the derivative circuit input (a gainof 1 is equivalent to 100)

IN

3 W Td1 Divergence de-rivative time

Derivative time used for diverging input(ms)

IN

4 W Td2 Convergence de-rivative time

Derivative time used for converging input(ms)

IN

5 W UL Upper PD limit Upper limit for the P+D correction value IN

6 W LL Lower PD limit Lower limit for the P+D correction value IN

7 W DB PD output deadband

Width of the dead band for the P+D correc-tion value

IN

8 W Y PD output PD correction output (also output to the Aregister)

OUT

9 W X Input preserva-tion

Storage of the present error input value OUT





3


3 -119

Table 3.24 Parameter Table for Real Number PD Instruction



1 W − (Reserved) Reserve register −


4 F Kd D gain Gain of the derivative circuit input IN

6 F Td1 Divergence de-rivative time

Derivative time used for diverging input (s) IN

8 F Td2 Convergence de-rivative time

Derivative time used for converging input(s)

IN

10 F UL Upper PD limit Upper limit for the P+D correction value IN

12 F LL Lower PD limit Lower limit for the P+D correction value IN

14 F DB PD output deadband

Width of the dead band for the P+D correc-tion value

IN

16 F Y PD output PD correction output (also output to the Aregister)

OUT

18 F X Input preserva-tion

Storage of the present error input value OUT





Here, the PD operation is expressed as follows:

YX= Kp+ Kd× Td× S


The following operation is performed with the PD instruction:

Y= Kp× X+ Kd× (X− X′)× TdTs

X’: Previous input valueTs: Scan time setting

3

Ladder Instructions


3 -120

Block Diagram

Z−1

Kd Td/Ts

Kp

+−

++

LIMIT, DB

InputX

OutputY

D When the change in error input (X − X’) and the previous error input (X’) have the samesign (diverging) in the derivative (D) operation, the divergence derivative time (Td1) isused as the derivative time.

D When the change in error input (X − X’) and the previous error input (X’) have differentsigns (converging) in the derivative (D) operation, the convergence derivative time (Td2)is used as the derivative time.

J Format

Specify the leading address of the parameter table after the PD instruction.

Example: PD MA00200 MA00200: Leading address of parameter table




Register A F B I J




3


3 -121

J Examples

Integer Operation


PD MA00100 ⇒ MW00011MW00010 Error input value

Leading address of parameter table PD output value



PD MA00200 ⇒ MF00022

MF00200 Error input value

Leading address of parameter table PD output value

3.11.6 PID Control Instruction (PID)

The PID Control instruction is represented by PID.

J Function

The PID instruction executes a PID control operation according to the contents of a previously

set parameter table. The input (X) to the PID operation must be integer or real number data.




3

Ladder Instructions


3 -122

Table 3.25 Parameter Table for Integer PID Instruction




IN

2 W Ki I gain Gain of the integration circuit input (a gainof 1 is equivalent to 100)

IN

3 W Kd D gain Gain of the derivative circuit input (a gainof 1 is equivalent to 100)

IN

4 W Ti Integral time Integral time (ms) IN

5 W Td1 Divergence de-rivative time

Derivative time used for diverging input(ms)

IN

6 W Td2 Convergence de-rivative time

Derivative time used for converging input(ms)

IN

7 W IUL Upper integrationlimit


8 W ILL Lower integra-tion limit


9 W UL Upper PID limit Upper limit for the P+I+D correction value IN

10 W LL Lower PID limit Lower limit for the P+I+D correction value IN

11 W DB PID output deadband

Width of the dead band for the P+I+Dcorrection value

IN

12 W Y PID output PID correction output (also output to the Aregister)

OUT

13 W Yi I correction value Storage of the I correction value OUT

14 W IREM I remainder Storage of the I remainder OUT

15 W X Input storage Storage of the present error input value OUT



0 IRST Integration reset ON is input when integration is reset IN



3


3 -123

Table 3.26 Parameter Table for Real Number PID Instruction





4 F Ki I gain Gain of the integration circuit input IN

6 F Kd D gain Gain of the derivative circuit input IN

8 F Ti Integral time Integral time (s) IN

10 F Td1 Divergence de-rivative time

Derivative time used for diverging input (s) IN

12 F Td2 Convergence de-rivative time

Derivative time used for converging input(s)

IN

14 F IUL Upper integrationlimit


16 F ILL Lower integra-tion limit


18 F UL Upper PID limit Upper limit for the P+I+D correction value IN

20 F LL Lower PID limit Lower limit for the P+I+D correction value IN

22 F DB PID output deadband

Width of the dead band for the P+I+Dcorrection value

IN

24 F Y PID output PID correction output (also output to the Aregister)

OUT

26 F Yi I correction value Storage of the I correction value OUT

28 F X Input storage Storage of the present error input value OUT



0 IRST Integration reset ON is input when integration is reset IN



Here, the PID operation is expressed as follows:

YX= Kp+ Ki× 1

Ti× S+ Kd× Td× S


The following operation is performed with the PID instruction:

Y= Kp× X+ (Ki× X+ IREM)∕ TiTS+ Yi′ + Kd× (X− X′)× TdTs

3

Ladder Instructions


3 -124

X’: Previous input valueYi’: Previous output valueTs: Scan time setting

Block Diagram

InputX

OutputY

Z−1

Kd Td/Ts

Kp

+−

++

LIMIT, DB

Ki Ts/Ti+

+

+

I LIMIT

Z−1

D When the P+I+D correction value reaches the upper or lower PID limit (UL, LL) or the PIDdead band (DB) and the present P and I correction values have the same sign (diverging),the I correction value is not updated but is kept at the previous value. Conversely, when theP and I correction values have different signs (converging towards 0), the I correction valueis updated with the present value.

D When the change in error input (X − X’) and the previous error input (X’) have the samesign (diverging) in the derivative (D) operation, the divergence derivative time (Td1) isused as the derivative time.

D When the change in error input (X − X’) and the previous error input (X’) have differentsigns (converging) in the derivative (D) operation, the convergence derivative time (Td2)is used as the derivative time.

D When the integration reset (IRST) is “ON,” Yi = 0 and IRST = 0 are output.

J Format

Specify the leading address of the parameter table after the PID instruction.

Example: PID MA00200 MA00200: Leading address of parameter table




Register A F B I J




3


3 -125

J Examples

Integer Operation


PID MA00100 ⇒ MW00011MW00010 Error input value

Leading address of parameter table PID output value



Leading address of parameter table PID output value

PID MA00200 ⇒ MF00022MF00200 Error input value

3.11.7 FIRST-ORDER LAG Instruction (LAG)

The FIRST-ORDER LAG instruction is represented by LAG.

J Function

The LAG instruction calculates the first-order lag according to the contents of a previously set

parameter table. The input (X) to the LAG operation must be integer or real number data.




Table 3.27 Parameter Table for Integer LAG Instruction



1 W T First-order lagtime constant

First-order lag time constant (ms) IN

2 W Y LAG output LAG output (also output to the A register) OUT

3 W REM Remainder Storage of remainder OUT



0 IRST LAG reset ON is input when LAG is reset IN



3

Ladder Instructions

3.11.7 FIRST-ORDER LAG Instruction (LAG)

3 -126

Table 3.28 Parameter Table for Real Number LAG Instruction



1 W − (Reserved) Reserved register −

2 F T First-order lagtime constant

First-order lag time constant (s) IN

4 F Y LAG output LAG output (also output to the F register) OUT



0 IRST LAG reset ON is input when LAG is reset IN



Here, the LAG operation is expressed as follows:

YX= 1

1+ T× Sor T× (dY∕dt)+ Y= X

The following operation is performed with the LAG instruction with dt = Ts and dY = Y −Y’:

Y= T× Y′ + Ts× X+ REMT+ Ts

X: Input valueY: Output valueY’: Previous output valueTs: Scan time setting

Y = 0 and REM = 0 are output when the LAG reset (RST) is ON.

J Format

Specify the leading address of the parameter table after the LAG instruction.

Example: LAG MA00200 MA00200: Leading address of parameter table




Register A F B I J




3


3 -127

J Examples

Integer Operation


Leading address of parameter table LAG output value

LAG MA00100 ⇒ MW00011

MW00010 Input value



Leading address of parameter table LAG output value

LAG MA00200 ⇒ MW00022

MW00200 Input value

3.11.8 PHASE LEAD/LAG Instruction (LLAG)

The PHASE LEAD/LAG instruction is represented by LLAG.

J Function

The LLAG instruction calculates the phase lead/lag according to the contents of a previously

set parameter table. The input (X) to the LLAG operation must be integer or real number data.

Long integer data cannot be used. The configurations of the parameter tables for integer and



Table 3.29 Parameter Table for Integer LLAG Instruction



1 W T2 Phase lead timeconstant

Phase lead time constant (ms) IN

2 W T1 Phase lag timeconstant

Phase lag time constant (ms) IN

3 W Y LLAG output LLAG output (also output to the A regis-ter)

OUT

4 W REM Remainder Storage of remainder OUT

5 W X Input preserva-tion

Storage of the input value OUT

3

Ladder Instructions

3.11.8 PHASE LEAD/LAG Instruction (LLAG)

3 -128



0 IRST LLAG reset ON is input when LLAG is reset IN



Table 3.30 Parameter Table for Real Number LLAG Instruction



1 W − (Reserved) Reserved register −

2 F T2 Phase lead timeconstant

Phase lead time constant (s) IN

4 F T1 Phase lag timeconstant

Phase lag time constant (s) IN

6 F Y LLAG output LLAG output (also output to the F register) OUT

8 F X Input storage Storage of the input value OUT



0 IRST LLAG reset ON is input when LLAG is reset IN



Here, the LLAG operation is expressed as follows:

YX= 1+ T2× S

1+ T1× Sor T1× (dY∕dt)+ Y= T2× (dX∕dt)+ X

The following operation is performed with the LLAG instruction with dt = Ts, dY = Y − Y’,

and dX = X −X’:

Y= T1× Y′ + (T2+ Ts)× X− T2× X′ + REMT1+ Ts

X: Input valueY: Output valueX’: Previous input valueY’: Previous output valueTs: Scan time setting

Y = 0, REM = 0, and X = 0 are output when the LLAG reset (RST) is ON.

J Format

Specify the leading address of the parameter table after the LLAG instruction.

3


3 -129

Example: LLAG MA00200 MA00200: Leading address of parameter table




Register A F B I J




J Examples

Integer Operation


LLAG MA00100 ⇒ MW00011MW00010

Leading address of parameter table LLAG output value

Input value



Leading address of parameter table LLAG output value

LLAG MA00200 ⇒ MW00022MW00200 Input value

3.11.9 FUNCTION GENERATOR Instruction (FGN)

The FUNCTION GENERATOR instruction is represented by FGN.

J Function

The FGN instruction generates a function curve according to the contents of a previously set

parameter table. The input to the FGN instruction can be integer, double-length integer, or real

number data. The configuration of the parameter table differs according to the type of data.

See Tables 3.31 and 3.32.

3

Ladder Instructions

3.11.9 FUNCTION GENERATOR Instruction (FGN)

3 -130

Table 3.31 Parameter Table for Integer FGN Instruction


0 W N Number of data Number of X/Y pairs IN

1 W X1 Data 1 IN

2 W Y1 Data 1 IN

3 W X2 Data 2 IN

4 W Y2 Data 2 IN

… … … … … …

2N−1 W XN Data N IN

2N W YN Data N IN

Table 3.32 Parameter Table for Double Integer or Real Number FGN Instruction


0 W N Number of data Number of X/Y pairs IN

1 W − (Reserved) Reserve register IN

2 L/F X1 Data 1 IN

4 L/F Y1 Data 1 IN

6 L/F X2 Data 2 IN

8 L/F Y2 Data 2 IN

… … … … … …

4N−2 L/F XN Data N IN

4N L/F YN Data N IN

If the data set in the parameter table for the FGN instruction are Xn and Yn, the data must be

set so that Xn≦ Xn+1. The FGN instruction searches for an Xn /Yn pair within the parameter

table that satisfies Xn≦ X≦ Xn+1 from input value X and calculates the output value Y ac-

cording to the following formula.

Y= Yn+Yn+1–Yn

Xn+1–Xn× (X–Xn) (1≦ n≦ N–1)

3


3 -131

Figure 3.5 shows the relationship between the data set in a parameter table, input value X, and

output value Y.

Outputvalue(Y)

Input value (X)→

X1 X2 X X3 X4

Y1

Y2

Y

Y3Y4↑

Y

Figure 3.5 Relationship between Input and Output Values

If no Xn /Yn pair that satisfies Xn≦X≦Xn+1 is found in the parameter table from input value

X, the result will be calculated as follows:

D If X < X1

Y= Y1+Y2− Y1

X2− X1(X− X1)

D If X > X1

Y= Yn+1+Yn− Yn−1

Xn− Xn−1(X− X1)

An operation error may occur if the parameters are not set correctly. A division error will occur if the numberof data (number of X/Y pairs) is 0.When using the FGN instruction for a long integer operation, be sure to execute “⊦ double integer register” im-mediately before the FGN instruction.

J Format

Specify the leading address of the parameter table after the FGN instruction.

Example: FGN #A00200 #A00200: Leading address of parameter table




Register A F B I J




3

IMPORTANT

Ladder Instructions

3.11.10 INVERSE FUNCTION GENERATOR Instruction (IFGN)

3 -132

J Examples

Integer Data (Number of Data = 20)

#W00000 to #W00040 are used as a parameter table.

FGN #A00000 ⇒ MW00011MW00010 Input value

Leading address of parameter table Output value

Double Integer Data (Number of Data = 20)

#L00000 to #L00080 are used as a parameter table.

FGN #A00000 ⇒ MW00102MW00100


Input value

Real Number Data (Number of Data = 20)

#F00000 to #F00080 are used as a parameter table.


FGN #A00000 ⇒ MW00022MW00020 Input value


FGN MA00100 ⇒ ML00004ML00000 + 10 ⇒ ML00002

⇒ ML00006

ML00000

FGN MA00100“Comment”


The INVERSE FUNCTION GENERATOR instruction is represented by IFGN.

J Function

The IFGN instruction generates a function curve according to the contents of a previously set

parameter table. The input to the IFGN instruction can be integer, double-length integer, or real

number data. The configuration of the parameter table differs according to the type of data.

See Tables 3.31 and 3.32.

If the data set in the parameter table for the IFGN instruction are Xn and Yn, the data must be

set so that Yn≦ Yn+1. The IFGN instruction searches for an Xn /Yn pair within the parameter

table that satisfies Yn≦ Y≦ Yn+1 from input value Y and calculates the output value X ac-

cording to the following formula.

3

IMPORTANT


3 -133

X= Xn+Xn+1–Xn

Yn+1–Yn× (Y–Yn)

Figure 3.6 shows the relationship between the data set in a parameter table, input value Y, and

output value X.

Inputvalue (Y)

Output value (X)→

↑

Y

X1 X2 X X3 X4

Y1

Y2

Y

Y3Y4

Figure 3.6 Relationship between Input and Output Values

If no Xn /Yn pair that satisfies Yn≦Y≦Yn+1 is found in the parameter table from input value

Y, the result will be calculated as follows:

D If Y < Y1

X= X1+X2− X1

Y2− Y1(Y− Y1)

D If Y > Y1

X= X1+Xn–Xn–1

Yn–Yn–1(Y–Yn–1)

An operation error may occur if the parameters are not set correctly. A division error will occur if the numberof data (number of X/Y pairs) is 0.When using the IFGN instruction for a double integer operation, be sure to execute “⊦ double integer register”immediately before the IFGN instruction.

J Format

Specify the leading address of the parameter table after the IFGN instruction.

Example: IFGN #A00200 #A00200: Leading address of parameter table




Register A F B I J




3

IMPORTANT

Ladder Instructions


3 -134

J Examples

Integer Data (Number of Data = 20)

#W00000 to #W00040 are used as a parameter table.

IFGN #A00000 ⇒ MW00011

MW00010


Input value

Double Integer Data (Number of Data = 20)

#L00000 to #L00080 are used as a parameter table.

IFGN #A00000 ⇒ ML00102ML00100


Input value

Real Number Data (Number of Data = 20)

#F00000 to #F00080 are used as a parameter table.

IFGN #A00000 ⇒ MF00022MF00200


Input value


IFGN MA00100 ⇒ ML00004ML00100 + 10 ⇒ ML00002

⇒ ML00006

ML00100

IFGN MA00100“Comment”

3

IMPORTANT


3 -135

3.11.11 LINEAR ACCELERATOR/DECELERATOR 1 Instruction (LAU)

The LINEAR ACCELERATOR/DECELERATOR 1 instruction is represented by LAU.

J Function

The LAU instruction performs acceleration and deceleration at a fixed acceleration/decelera-

tion rate upon input of a speed reference (value of the A register). The operation is performed

according to the contents of a previously set parameter table.

The input (X) to the LAU operation must be integer or real number data. Long integer data

cannot be used. The configurations of the parameter tables for integer and real number data

are different. Operations are performed by processing each parameter as an integer consisting

of the lower-place 16 bits. See Tables 3.33 and 3.34.

Table 3.33 Parameter Table for Integer LAU Instruction



1 W LV 100% input level Scale of the 100% input IN

2 W AT Acceleration time Time for acceleration from 0% to 100%(0.1 s)

IN

3 W DT Deceleration time Time for deceleration from 100% to 0%(0.1 s)

IN

4 W QT Quick stop time Time for quick stop from 100% to 0% (0.1s)

IN

5 W V Current speed LAU output (also output to the A register) OUT

6 W DVDT Current accelera-tion/deceleration

Scaled with the normal acceleration rate be-ing set to 5000

OUT

7 W (Re-served)

−

8 W VIM Previous speedreference

For storage of the previous value of speedreference input

OUT

9 W DVDTK DVDTcoefficient

Scaling coefficient of the current accelera-tion/deceleration (DVDT)(−32768 to 32767)

IN

10 L REM Remainder Remainder of the acceleration/decelerationrate

OUT


3

Ladder Instructions


3 -136


0 RN Line running ON is input while the line is running. IN

1 QS Quick stop OFF is input upon quick stop.* IN

2 DVDTF DVDT operationnot executed

ON is input at non-execution of DVDT op-eration.

IN

3 DVDTS DVDT operationselection

Selection of DVDT operation method IN


8 ARY Accelerating ON is output during acceleration. OUT

9 BRY Decelerating ON is output during deceleration. OUT

A LSP Zero speed ON is output at a speed of 0. OUT

B EQU Coincidence ON is output when input value = output val-ue.

OUT

C to F − (Reserved) Reserved relays for outputs OUT

* Quick stop time (QT) is used as acceleration/deceleration time when Quick Stop(QS) is OFF.

Table 3.34 Parameter Table for Real Number LAU Instruction




2 F LV 100% input level Scale of the 100% input IN

4 F AT Acceleration time Time for acceleration from 0% to 100% (s) IN

6 F BT Deceleration time Time for deceleration from 100% to 0% (s) IN

8 F QT Quick stop time Time for quick stop from 100% to 0% (s) IN

10 F V Current speed LAU output (also output to the F register) OUT

12 F DVDT Current accelera-tion/deceleration

Current acceleration/deceleration is output. OUT


3


3 -137



1 QS Quick stop OFF is input upon quick stop. IN



9 BRY Decellerating ON is output during deceleration. OUT



OUT


The following operations are performed with the LAU instruction.

Integer LAU Instruction

Acceleration rate (ADV)= LV× Ts (0.1ms)+ REMAT (0.1s)× 1000

When VI > V’ (V’≧ 0): V = V’ + ADV; Accelerating (ARY) ON

When VI < V’ (V’≦ 0): V = V’ −ADV; Accelerating (ARY) ON

Deceleration rate (BDV)= LV× Ts (0.1ms)+ REMBT (0.1s)× 1000

When VI > V’ (V’ < 0): V = V’ + BDV; Decelerating (BRY) ON

When VI < V’ (V’ > 0): V = V’ −BDV; Decelerating (BRY) ON

Quick stop rate (QDV)= LV× Ts (0.1ms)+ REMQT (0.1s)× 1000

When QS = ON (VI > V’): V = V’ + QDV; Decelerating (BRY) ON

When QS = ON (VI < V’): V = V’ −QDV; Decelerating (BRY) ON

V’: Previous speed output valueVI: Speed reference inputTs: Scan time setting (ms)

• If DVDT Operation Not Executed (DVDTF) is ON, Current Acceleration/Decelera-tion (DVDT) will be performed.

• If DVDTF is OFF, DVDT = 0 will be output.

If DVDTF is ON, the result of Current Acceleration/Deceleration (DVDT) will be out-put after either of the following operations, depending on the setting of DVDT Opera-tion Selection (DVDTS).

If DVDTS is ON : DVDT= V–V′ADV

× 5000

If DVDTS is OFF : DVDT= (V× DVDTK)–(V′ × DVDTK); DVDTK: DVDT coefficient

When V = 0, Zero Speed (LSP) turns ON. When VI = V, Coincidence (EQU) turns ON.

3

3 -138

• When Line Running (RN) is OFF, V = 0 and DVDT = 0 are output.

Real Number LAU Instruction

Acceleration rate (ADV)=LV×Ts (0.1 ms)

10000 + REM

AT (s)

When VI > V’ (V’ > 0): V = V’ + ADV

When VI < V’ (V’ < 0): V = V’ −ADV

Deceleration rate (BDV)=–LV×Ts (0.1 ms)

10000 + REM

BT (s)

When VI < V’ (V’ > 0): V = V’ + BDV

When VI > V’ (V’ < 0): V = V’ −BDV

Quick stop rate (QDV)=–LV×Ts (0.1 ms)

10000 + REM

QT (s)

When QS = ON (V’ > VI≧ 0): V = V’ + QDV

When QS = ON (V’ < VI≦ 0): V = V’ −QDV


• The result of Current Acceleration/Deceleration (DVDT) is output after the followingoperation:

DVDT= V− V′ADV

× 5000

While Line Running (RN) is OFF, V = 0 and DVDT = 0 are output.

J Format

Specify the leading address of the parameter table after the LAU instruction.

Example: LAU MA00200 MA00200: Leading address of parameter table




Register A F B I J




3

Ladder Instructions



3 -139

J Examples

Integer Operation


LAU MA00100 ⇒ MW00011MW00010

Leading address of parameter table LAU output value

Input value



Leading address of parameter table LAU output value

LAU MA00200 ⇒ MF00022MF00200 Input value

3.11.12 LINEAR ACCELERATOR/DECELERATOR 2 Instruction (SLAU)

The LINEAR ACCELERATOR/DECELERATOR 2 instruction is represented by SLAU.

J Function

The SLAU instruction performs acceleration and deceleration at a variable acceleration/decel-

eration rate upon input of a speed reference (value of the A register). The operation is per-

formed according to the contents of the previously set parameter table.

Positive and negative values can be entered for speed reference input. Always set a value so

that the linear acceleration or deceleration time (AT or BT) is greater than or equal to the S-

curve acceleration or deceleration time (AAT or BBT).

The input (X) to the SLAU operation must be integer or real number data. Doulbe integer data

cannot be used. The configurations of the parameter tables for integer and real number data

are different. Operations are performed by processing each parameter as an integer consisting

of the lower-place 16 bits. See Tables 3.35 and 3.36.

3

Ladder Instructions


3 -140

Table 3.35 Parameter Table for Integer SLAU Instruction



1 W LV 100% input level Scale of the 100% input IN

2 W AT Acceleration time Time for acceleration from 0% to 100%(0.1 s)

IN

3 W BT Deceleration time Time for deceleration from 100% to 0%(0.1 s)

IN

4 W QT Quick stop time Time for quick stop from 100% to 0%(0.1 s)

IN

5 W AAT S-curve accelera-tion time

S-curve region during acceleration(0.01 to 32.00 s)

IN

6 W BBT S-curve decelera-tion time

S-curve region during deceleration (0.01to 32.00 s)

IN

7 W V Current speed SLAU output (also output to the A regis-ter)

OUT

8 W DVDT1 Current accelera-tion/deceleration1

Scaled with the normal acceleration ratebeing set to 5000

OUT

9 W (Reserved)

10 W ABMD Speed increaseupon holding

Amount of speed change until the speedstabilizes after the hold command isexecuted

OUT

11 W REM1 Remainder Remainder of the acceleration/decelerationrate

OUT

12 W (Reserved)

13 W REM2 Remainder For storage of the previous value of speedreference input

OUT

14 L DVDT2 Current accelera-tion/deceleration2(DVDT2)

1000 times of the actual acceleration/de-celeration

OUT

16 L DVDT3 Current accelera-tion/deceleration3(DVDT3)

Current acceleration/deceleration(= DVDT2/1000)

OUT

18 L REM2 Remainder Remainder of the acceleration/decelerationrate in the S-curve region

OUT

20 W REM3 Remainder Remainder of the current speed OUT

21 W DVDTK DVDT1 coeffi-cient

Scaling coefficient of the current accelera-tion/deceleration 1 (DVDT1)(−32768 to 32767)

IN

3


3 -141




1 QS Quick stop OFF is input upon quick stop.* IN

2 DVDTF DVDT1 opera-tion not executed

OFF is input at non-execution of DVDT1operation

IN

3 DVDTS DVDT1 opera-tion selection

Selection of DVDT1 operation method IN






OUT

C EQU (Reserved) Reserved relay for output OUT

D CCF Work relay Internal system work relay OUT

E BBF Work relay Internal system work relay OUT

F AAF Work relay Internal system work relay OUT

* Quick stop time (QT) is used as acceleration/deceleration time when Quick Stop(QS) is OFF.

3

Ladder Instructions


3 -142

Table 3.36 Parameter Table for Real Number SLAU Instruction




2 F LV 100% input lev-el

Scale of the 100% input IN

4 F AT Accelerationtime

Time for acceleration from 0% to 100% (s) IN

6 F BT Decelerationtime

Time for deceleration from 100% to 0% (s) IN

8 F QT Quick stop time Time for quick stop from 100% to 0% ( s) IN

10 F AAT S-curve accel-eration time

S-curve region during acceleration (s) IN

12 F BBT S-curve decel-eration time

S-curve region during deceleration (s) IN

14 F V Current speed SLAU output (also output to the register) OUT

16 F DVDT Current accel-eration/decel-eration

Current acceleration/deceleration is output. OUT

18 F ABMD Speed increaseupon holding

Amount of speed change until the speed sta-bilizes after the hold command is executed

OUT




1 QS Quick stop OFF is input upon quick stop. IN






OUT


The following operations are performed with the SLAU instruction.

Integer SLAU Instruction

Acceleration rate (ADV)= LV× Ts (0.1 ms)+ REM1AT (0.1 s)× 1000

3


3 -143

When VI > V’ (V’≧ 0) outside the S-curve region (ADVS > ADV):V = V’ + ADV; Accelerating (ARY) ON

When VI < V’ (V’≦ 0) outside the S-curve region (ADVS > ADV):V = V’ −ADV; Accelerating (ARY) ON

Deceleration rate (BDV)= LV× Ts (0.1 ms)+ REM1BT (0.1 s)× 1000

When VI > V’ (V’ < 0) outside the S-curve region (BDVS < BDV):V = V’ + BDV; Decelerating (BRY) ON

When VI < V’ (V’ > 0) outside the S-curve region (BDVS < BDV):V = V’ −BDV; Decelerating (BRY) ON

Quick stop rate (QDV)= LV× Ts (0.1 ms)+ REM1QT (0.1 s)× 1000

When QS = ON (VI > V’, V’ < 0): V = V’ + QDV; Decelerating (BRY) ON

When QS = ON (VI < V’, V’ > 0): V = V’ −QDV; Decelerating (BRY) ONNote Atquick stop, themovement is not S-curve but linear (the sameas duringVLAU

quick stop).

AADVS= ADV× Ts (0.1 ms)+ REM2AAT (0.01 s)× 100

Acceleration rate in the S−curve region(ADVS)= ADVS′ AADVS

When VI > V’ (V’≧ 0) inside the S-curve region (ADVS < ADV):V = V’ + ADVS; Accelerating (ARY) ON

When VI < V’ (V’≦ 0) inside the S-curve region (ADVS < ADV):V = V’ −ADVS; Accelerating (ARY) ON

Deceleration rate in the S-curve region (BDVS)= BDVS′ BBDVS

BBDVS= BDV× Ts (0.1 ms)+ REM2BBT (0.01 s)× 100

When VI > V’ (V’ < 0) inside the S-curve region (BDVS < BDV):V = V’ + BDVS; Decelerating (BRY) ON

When VI < V’ (V’ > 0) inside the S-curve region (BDVS < BDV):V = V’ −BDVS; Decelerating (BRY) ON


• If DVDT1 Operation Not Executed (DVDTF) is ON, Current Acceleration/Decelera-tion 1 (DVDT1) will be performed.

• If DVDTF is OFF, DVDT1 = 0 will be output.

If DVDTF is ON, the result of Current Acceleration/Deceleration 1 (DVDT1) will beoutput after either of the following operations, depending on the setting of DVDT1Op-eration Selection (DVDTS).

If DVDTS is ON : DVDT1= (V–V′)ADV

× 5000

If DVDTS is OFF : DVDT= (V× DVDTK) – (V′ × DVDTK)

3

Ladder Instructions


3 -144

; DVDTK: DVDT coefficient

• The result of Current Acceleration/Deceleration 2 (DVDT2) is output as follows:

During acceleration inside the S-curve region: DVDT2 = ±ADVSDuring acceleration outside the S-curve region: DVDT2 = ±ADV

During deceleration inside the S-curve region: DVDT2 = ±BDVSDuring deceleration outside the S-curve region: DVDT2 = ±BDV

• The result of Speed Increase Upon Holding (ABMD) is output after the following op-eration is performed.

ABMD= DVDT2′ × DVDT2′2× AADVS (BBDVS)

;DVDT2’ = Previous value of Current Acceleration/Deceleration 2 (DVDT2)

• When V = 0, Zero Speed (LSP) turns ON. When VI = V, Coincidence (EQU) turns ON.

• When Line Running (RN) isOFF, V = 0, DVDT1 = 0, DVDT2 = 0, DVDT3 = 0, ABMD= 0, REM1 = 0, REM2 = 0, and REM3 = 0 are output.

Real Number SLAU Instruction

Acceleration rate (ADV)= LV× Ts (0.1 ms)AT (s)× 10000

When VI > V’ (V’ > 0) outside the S-curve region (ADVS > ADV):V = V’ + (ADV + REM1)/100

Deceleration rate (BDV)= –LV× Ts (0.1 ms)BT (s)× 10000

When VI < V’ (V’ > 0) outside the S-curve region (BDVS < BDV):V = V’ + (BDV + REM1)/100

Quick stop rate (QDV)= –LV× Ts (0.1 ms)QT (s)× 10000

When QS = ON (V’ > VI≧ 0): V = V’ + (QDV + REM1)/100

AADVS= ADV× Ts (0.1 ms)+ REM2AAT (s)× 10000

Acceleration rate in the S−curve region (ADVS)= ADVS′ AADVS

When VI > V’ (V’ > 0) inside the S-curve region (ADVS < ADV):

V = V’ + (ADVS + REM1)/100

BBDVS= BDV× Ts (0.1 ms)+ REM2BBT (s)× 10000

Deceleration rate in the S−curve region (BDVS)= BDVS′ BBDVS

When VI < V’ (V’ > 0) inside the S-curve region (BDVS > BDV):

V = V’ + (BDVS + REM1)/100

V’: Previous speed output valueVI: Speed reference inputTs: Scan time setting

3


3 -145


DVDT1= V – V′ADV

× 5000


During acceleration inside the S-curve region: DVDT2 = ADVSDuring acceleration outside the S-curve region: DVDT2 = ADV

During deceleration inside the S-curve region: DVDT2 = BDVSDuring deceleration outside the S-curve region: DVDT2 = BDV

• The result of Speed Increase upon Holding (ABMD) is output after the following op-eration is performed.

ABMD= DVDT2× DVDT22× AADVS (BBDVS)

When Line Running (RN) is OFF, V = 0, DVDT1 = 0, DVDT2 = 0, , and ABMD = 0are output.

J Format

Specify the leading address of the parameter table after the SLAU instruction.

Example: SLAU MA00200 MA00200: Leading address of parameter table




Register A F B I J




J Examples

Integer OperationMW00100 to MW00111 are used as a parameter table.

SLAU MA00100 ⇒ MW00011

MW00010

Leading address of parameter table SLAU output value

Input value

Real Number OperationMF00200 to MF00218 are used as a parameter table.

SLAU MA00200 ⇒ MF00022MF00200

Leading address of parameter table SLAU output value

Input value

3

Ladder Instructions

3.11.13 PULSE WIDTH MODULATION Instruction (PWM)

3 -146

3.11.13 PULSE WIDTH MODULATION Instruction (PWM)

The PULSE WIDTH MODULATION instruction is represented by PWM.

J Function

The PWM instruction converts the value of the A register to PWM as an input value (between

−100.00 and 100.00%, with increments of 0.01%) and outputs the result to the B register and

the parameter table.

Double-length integer and real number operations are not allowed.

PWM ON output time and the number of ON outputs are expressed as follows:

ON output time= PWMT (X+ 10000)20000

Number of ON outputs= PWMT (X+ 10000)Ts× 20000

X: Input valueTs: Scan time setting (ms)

At 100.00% input: All ONAt 0% input: 50% duty (50% ON)At −100.00% input: All OFF

When the PWM reset (PWMRST) is ON, all internal operations are reset and PWM operations

are performed with that instant as the starting point. After turning the power ON, set PWMRST

to ON to clear all internal operations, then use the PWM instruction.

Table 3.37 Parameter Table for PWM Instruction



1 W PWMT PWM cycle PWM cycle (1 ms) (1 to 32767 ms) IN

2 W ONCNT ON output set-ting timer

ON output setting timer (1 ms) OUT

3 W CVON ON output counttimer

ON output count timer (1 ms) OUT

4 W CVONREM ON output counttimer remainder

ON output count timer remainder(0.1 ms)

OUT

5 W OFFCNT OFF output set-ting timer

OFF output setting timer (1 ms) OUT

6 W CVOFF OFF outputcount timer

OFF output count timer (1 ms) OUT

7 W CVOFFREM OFF outputcount timer re-mainder

OFF output count timer remainder(0.1 ms)

OUT


3


3 -147


0 PWMRST PWM reset ON is input when PWM is reset. IN


8 PWMOUT PWM output PWM is output(two-value output: ON = 1, OFF = 0)

OUT


J Format

Specify the leading address of the parameter table after the PWM instruction.

Example: PWM MA00200 MA00200: Leading address of parameter table



J Examples

MW00100 is used as PWM input and MW00200 to MW00207 are used as a parameter table.

SB000003 MB002000

PWM MA00200

MW00100

Leading address of parameter table

PWM input value

PWM is reset with the first scan of DWG.L (SB000001 when used with DWG.H).

3

Ladder Instructions

3 -148

3.12 Table Data Manipulation Instructions

This section describes the function, format, register operation, and program examples of each table

data manipulation instruction. Table 3.38 lists the table data manipulation instructions.

Table 3.38 Table Data Manipulation Instructions

Table Data Manipulation Instruction Symbol

BLOCK READ instruction TBLBR

BLOCK WRITE instruction TBLBW

ROW SEARCH instruction TBLSRL

COLUMN SEARCH instruction TBLSRC

BLOCK CLEAR instruction TBLCL

BLOCK MOVE instruction TBLMV

Queue table read instructions QTBLR, QTBLRI

Queue table write instructions QTBLW, QTBLWI

QUEUE POINTER CLEAR instruction QTBLCL

If an error occurs while a table data manipulation instruction is being executed, the corresponding

error code will be set in the A register and the B register will be turned ON. See Table 3.39 for error

codes.

Table 3.39 List of Error Codes

Error Code Error Name Meaning

0001H Table undefined The target table is undefined.

0002H Row number out of range The row number of the table element is outside thetarget table.

0003H Column number out ofrange

The column number of the table element is outside thetarget table.

0004H Invalid number of ele-ments

The number of target elements is invalid.

0005H Insufficient storage area The storage area is insufficient.

0006H Invalid element type The type of the specified element is abnormal.

0007H Queue buffer error An attempt was made to read from an empty queuebuffer, or write to a full queue buffer by advancing thepointer.

0008H Queue table error The specified table is not a queue table.

0009H System error An unexpected error was detected in the system duringinstruction execution.

3


3 -149

3.12.1 BLOCK READ Instruction (TBLBR)

The BLOCK READ instruction is represented by TBLBR.

J Function

The TBLBR instruction consecutively reads file register table elements in block format that

are specified by table name, row number, and column number. It then stores the elements in

a continuous region starting with the specified register. The type of the element being read is

automatically determined according to the specified table. The type of the storage destination

register is ignored and the read data is stored according to the table element type without con-

verting the data type.

If errors such as invalid table names, invalid row numbers, invalid column numbers, or insuffi-

cient storage register data length are found, they will be reported and the contents of the storage

destination register will be retained without reading the data.

Upon normal termination, the number of words transferred is set in the A register and the B

register is turned OFF.

When an error occurs, the corresponding error code is set in the A register and the B register

is turned ON. See Table 3.39 for error codes. Table 3.40 shows the parameter table for the

TBLBR instruction.

Table 3.40 Parameter Table for TBLBR Instruction


0 L ROW1 Table element leadingrow number

Leading row number of the target tableelement (1 to 65535)

IN

2 L COL1 Table element leadingcolumn number

Leading column number of the targettable element (1 to 32767)

IN

4 W RLEN Number of row ele-ments

Number of row elements(1 to 32767)

IN

5 W CLEN Number of columnelements

Number of column elements(1 to 32767)

IN

3

Ladder Instructions

3.12.2 BLOCK WRITE Instruction (TBLBW)

3 -150

J Format

Specify the source table name, the leading address of the destination data, and the leading ad-

dress of the parameter table after the TBLBR instruction.

Example: TBLBR TABLE1, MA00100, DA00010 Source table name:

Sourcetable name

Leadingaddress ofdestinationdata

Leadingaddress ofparametertable

Leading address of destination data:


S Any register address with subscript (except #and C registers)

Leading address of parameter table:

S Any register address

S Any register address with subscript


Register A F B I J

Storage Condition Not stored Stored Not stored Stored Stored

J Examples

The data (integer data) from the table element starting position to the end of the table defined

as TABLE1 is stored in the area starting from MW00100 in block format by using DW00010

to DW00013 as a parameter table.

TBLBR TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3.12.2 BLOCK WRITE Instruction (TBLBW)

The BLOCK WRITE instruction is represented by TBLBW.

J Function

The TBLBW instruction writes the contents of a continuous region starting with the specified

register to the file register table elements in block format that are specified by table name, row

number, and column number. The data is processed assuming that the type of the table elements

in the storage destination register is the same as that of the table elements in the storage source

register.


cient storage register data length are found, they will be reported and the contents of the storage

destination register will be retained without writing the data.

3


3 -151




is turned ON. See Table 3.39 for error codes.

Table 3.41 Parameter Table for TBLBW Instruction



Leading row number of the targettable element (1 to 65535)

IN

2 L COL1 Table element leadingcolumn number

Leading column number of the tar-get table element (1 to 32767)

IN



IN



IN

J Format

Specify the destination table name, the leading address of source data, and the leading address

of the parameter table after the TBLBW instruction.

Example: TBLBW TABLE1, MA00100, DA00010 Destination table name:

Destinationtable name

Leadingaddress ofsource data


Leading address of source data:







Register A F B I J


J Examples

The data in the table defined as TABLE1 in the area starting from MW00100 is stored in the

area (integer data) from the table element starting position to the end in block format by using

DW00010 to DW00013 as a parameter table.

TBLBW TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3

Ladder Instructions

3.12.3 ROW SEARCH Instruction (TBLSRL)

3 -152

3.12.3 ROW SEARCH Instruction (TBLSRL)

The ROW SEARCH instruction is represented by TBLSRL.

J Function

The TBLSRL instruction searches for the column element of the file register table specified

by the table name, row number, and column number. If there is data that matches the data in

the specified register, the instruction reports that row number. The type of the data to be

searched is automatically determined according to the specified table.


cient storage register data length are found, they will be reported.

Upon normal termination, if a matching column element is found, 1 is set in the search result,

the row number is set in the A register, and the B register is turned OFF. If no matching column

element is found, 0 is set in the search result.



Table 3.42 Parameter Table for TBLSRL Instruction




IN

2 L ROW2 Table element endrow number

End row number of the target tableelement (1 to 65525)

IN

4 L COLUMN Table element col-umn number

Column number of the target tableelement (1 to 32767)

IN

6 W FIND Search result Search result

0: No matching row exists.1: Matching row exists.

OUT

J Format

Specify the table name to be searched, the leading address of the destination data, and the lead-

ing address of the parameter table after the TBLSRL instruction.

Example: TBLSRL TABLE1, MA00100, DA00010 Table name to be searched:

Table nameto besearched









3


3 -153


Register A F B I J


J Examples

Data that matches MW00100 (when the element type of the searched table is integer) is

searched in the table defined as TABLE1 by using DW00010 to DW00013 as a parameter table.

TBLBSRL TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3.12.4 COLUMN SEARCH Instruction (TBLSRC)

The COLUMN SEARCH instruction is represented by TBLSRC.

J Function

The TBLSRC instruction searches for the row element of the file register table specified by

a table name, row number, and column number. If there is data that matches the data of the

specified register, the instruction reports that column number. The type of the data to be

searched is automatically determined according to the specified table.


cient storage register data length are found, they will be reported.

Upon normal termination, if a matching row element is found, 1 is set in the search result, the

row number is set in the A register, and the B register is turned OFF. If no matching column

element is found, 0 is set in the search result.



Table 3.43 Parameter Table for TBLSRC Instruction


0 L ROW Table element rownumber

Row number of the target table ele-ment (1 to 65535)

IN

2 L COLUMN1 Table element leadingcolumn number


IN

4 L COLUMN2 Table element endcolumn number

End column number of the targettable element (1 to 32767)

IN

6 W FIND Search result Search result

0: No matching row exists.1: Matching row exists.

OUT

3

Ladder Instructions

3.12.5 BLOCK CLEAR Instruction (TBLCL)

3 -154

J Format

Specify the table name to be searched, the leading address of the destination data, and the lead-

ing address of the parameter table after the TBLSRC instruction.

Example: TBLSRC TABLE1, MA00100, DA00010 Table name to be searched:

Table nameto besearched










Register A F B I J


J Examples

Data that matches MW00100 (when the element type of the searched table is integer) is

searched in the table defined as TABLE1 by using DW00010 to DW00013 as a parameter table.

TBLSRC TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3.12.5 BLOCK CLEAR Instruction (TBLCL)

The BLOCK CLEAR instruction is represented by TBLCL.

J Function

The TBLCL clears the data of the block element of the file register table specified by a table

name, row number, and column number. If the element type is a character string, space will

be written. If the element type is a numeric value, 0 will be written.

If both the table element leading row number and the table element leading column number

are 0, the entire table will be cleared.


cient storage register data length are found, they will be reported and data will not be written.

Upon normal termination, the number of words cleared is set in the A register and the B register

is turned OFF.

3


3 -155



Table 3.44 Parameter Table for TBLCL Instruction


0 L ROW Table element leadingrow number


IN

2 L COL Table element leadingcolumn number


IN



IN



IN

J Format

Specify the target table name and the leading address of the parameter table after the TBLCL

instruction.

Example: TBLCL TABLE1, DA00010 Target table name:

Target tablename

Leading addressof parameter table





Register A F B I J


J Examples

The designated block in the table defined as TABLE1 is cleared using DW00010 to DW00013

as a parameter table.

TBLCL TABLE1, DA00010MB00000

⇒ MW00011

3.12.6 BLOCK MOVE Instruction (TBLMV)

The BLOCK MOVE instruction is represented by TBLMV.

J Function

The TBLMV instruction transfers the data of the block elements of the file register table speci-

fied by the table name, row number, and column number to another block. Block transfer be-

3

Ladder Instructions

3.12.6 BLOCK MOVE Instruction (TBLMV)

3 -156

tween different tables and data transfer within the same table are both possible. If the column

element types of the source and destination blocks are different, an error will be reported and

data will not be written.

If errors such as invalid table names, invalid row numbers, invalid column numbers, or un-

matched storage destination element type are found, they will be reported and data will not be

written.





Table 3.45 Parameter Table for TBLMV Instruction



Leading row number of the sourcetable element(1 to 65535)

IN


Leading column number of thesource table element(1 to 32767)

IN


Number of row elements to betransferred (1 to 32767)

IN


Number of column elements to betransferred (1 to 32767)

IN


Leading row number of the des-tination table element(1 to 65535)

IN


Leading column number of thedestination table element (1 to32767)

IN

J Format

Specify the source table name, destination table name, and the leading address of the parameter

table after the TBLMV instruction.

Example: TBLMV TABLE1, TABLE2, DA00010 Source table name:

Source table Leadingdd f

Destinationt bl

Destination table name:name

gaddress ofparametertable

table nameLeading address of parameter table:



3


3 -157


Register A F B I J


J Examples

The designated block in the table defined as TABLE 1 is transferred to the designated block

in the table defined as TABLE2 by using DW00010 to DW00015 as a parameter table.

TBLMV TABLE1, TABLE2, DA00010MB00000

⇒ MW00011

3.12.7 Queue Table Read Instructions (QTBLR, QTBLRI)

The QUEUE TABLE READ and QUEUE TABLEREADAND INCREMENT instructions are

represented by QTBLR and QTBLRI.

J Function

The QTBLR/QTBLRI instruction consecutively reads file register table column elements spe-

cified by table names, row numbers, and column numbers and stores the elements in the contin-

uous region starting with the specified register. The type of the element being read is automati-

cally determined according to the specified table. The type of the storage destination register

is ignored and the read data is stored according to the table element type without converting

the data type.

The QTBLR instruction does not change the queue table read pointer. The QTBLRI instruction

advances the queue table read pointer by one row.

If errors such as invalid table names, invalid row numbers, invalid column numbers, insuffi-

cient storage register data length, or empty queue buffers are found, they will be reported, data

will not be read, and the queue table read pointer will not advance. The contents of the storage

destination register will be retained.




is turned ON. The pointer value does not change. See Table 3.39 for error codes.

3

Ladder Instructions

3.12.7 Queue Table Read Instructions (QTBLR, QTBLRI)

3 -158

Table 3.46 Parameter Table for QTBLR and QTBLRI Instructions


0 L ROW Table element relativerow number

Relative row number of the targettable element (1 to 65535)

IN

2 L COLUMN Table element leadingcolumn number

Leading column number of thesource table element(1 to 32767)

IN


Number of column elements to betransferred (1 to 32767)

IN

5 W Reserved

6 L RPTR Read pointer Read pointer of the queue afterexecution

OUT

8 L WPTR Write pointer Write pointer of the queue afterexecution

OUT

By setting relative row numbers for the table elements, the actually read row position will vary

as shown in Table 3.47.

Table 3.47 Setting Relative Row Numbers for Table Elements

Relative RowNumber

Read Row Remarks

0 Read pointer row Pointer advance for QTBLRI only

1 Write pointer row No pointer advance

2 (Write pointer row) − 1 No pointer advance


… … …

n (Write pointer row) − (n−1) No pointer advance

J Format

Specify the source table name, the leading address of the destination data, and the leading ad-

dress of the parameter table after the QTBLR/QTBLRI instruction.

Example: QTBLR TABLE1, MA00100, DA00010(QTBLRI)

Source table name:

Source tablename


(QTBLRI)








3


3 -159


Register A F B I J


J Examples

From the table defined as TABLE1, data of the column elements (integer) starting from

MW00100 is stored by using DW00010 to DW00012 as a parameter table.

QTBLRI TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3.12.8 Queue Table Write Instructions (QTBLW, QTBLWI)

The QUEUE TABLE WRITE and QUEUE TABLE WRITE AND INCREMENT instructions

are represented by QTBLW and QTBLWI.

J Function

The QTBLW/QTBLWI instruction writes the contents of the continuous region starting with

the specified register to the file register table column elements specified by table names, row

numbers, and column numbers. The data is processed assuming that the type of the table ele-

ments in the storage destination register is the same as that of the table elements in the storage

source register.

The QTBLW instruction does not change the queue table write pointer. The QTBLWI instruc-

tion advances the queue table write pointer by one row.

If errors such as invalid table names, invalid row numbers, invalid column numbers, insuffi-

cient storage register data length, or full queue buffers are found, they will be reported, data

will not be written, and the queue table write pointer will not advance.




is turned ON. The pointer value does not change. See Table 3.39 for error codes.

3

Ladder Instructions

3.12.8 Queue Table Write Instructions (QTBLW, QTBLWI)

3 -160

Table 3.48 Parameter Table for QTBLW and QTBLWI Instructions


0 L ROW Table element relativerow number

Relative row number of the targettable element (1 to 65535)

IN

2 L COLUMN Table element leadingcolumn number


IN


Number of column elements to bewritten continuously (1 to 32767)

IN

5 W Reserved

6 L RPTR Read pointer Read pointer of the queue afterexecution

OUT

8 L WPTR Write pointer Write pointer of the queue afterexecution

OUT

By setting relative row numbers for the table elements, the actually written row position will

vary as shown in Table 3.49.

Table 3.49 Setting Relative Row Numbers for Table Elements

Relative RowNumber

Written Row Remarks

0 Write pointer row Pointer advance for QTBLWI only

1 Write pointer row No pointer advance



… … …

n (Write pointer row) − (n−1) No pointer advance

J Format

Specify the destination table name, the leading address of the source data, and the leading ad-

dress of the parameter table after the QTBLW/QTBLWI instruction.

Example: QTBW TABLE1, MA00100, DA00010(QTBLWI)

Source table name:

Destinationtable name

Leadingaddress ofsource data


(QTBLWI)







3


3 -161


Register A F B I J


J Examples

Consecutive integer data of the column elements starting from MW00100 is stored in the col-

umn element data in the table defined as TABLE1 by using DW00010 to DW00013 as a param-

eter table.

QTBLWI TABLE1, MA00100, DA00010MB00000

⇒ MW00011

3.12.9 QUEUE POINTER CLEAR Instruction (QTBLCL)

The QUEUE POINTER CLEAR instruction is represented by QTBLCL.

J Function

The QTBLCL instruction returns the queue read and queue write pointers of the file register

table specified by a table name to their initial state (first row).

Upon normal termination, 0 is set in the A register and the B register is turned OFF.



J Format

Specify the source table name after the QTBLCL instruction.

Example: QTBLCL TABLE1 TABLE1: Source table name


Register A F B I J


J Examples

The queue read and queue write pointers of TABLE1 are returned to their initial state.

QTBLCL TABLE1MB00000

⇒ MW00011

3

4 -1

4Table Programming

This chapter describes the types and execution of table programs, includ-

ing constant tables, I/O conversion tables, interlock tables, and part com-

position tables.

4.1 Types and Execution of Table Programs 4 - 2. .4.1.1 Types of Table Programs 4 - 2. . . . . . . . . . . . . . . . . . . . .4.1.2 Execution of Table Programs 4 - 3. . . . . . . . . . . . . . . . . .

4.2 Constant Tables (M Registers) 4 - 4. . . . . . . . . .4.2.1 Overview of the M Register Constant Table 4 - 4. . . . .4.2.2 Preparation of an M Register Constant Table 4 - 5. . . .

4.3 Constant Tables (# Registers) 4 - 6. . . . . . . . . . .4.3.1 Overview of a # Register Constant Table 4 - 6. . . . . . . .4.3.2 Preparation of a # Register Constant Table 4 - 7. . . . . .

4.4 I/O Conversion Tables 4 - 8. . . . . . . . . . . . . . . . . .4.4.1 Overview of an I/O Conversion Table 4 - 8. . . . . . . . . . .4.4.2 Preparation of an I/O Conversion Table 4 - 9. . . . . . . . .

4.5 Interlock Tables 4 - 13. . . . . . . . . . . . . . . . . . . . . . .4.5.1 Overview of Interlock Tables 4 - 13. . . . . . . . . . . . . . . . . .4.5.2 Preparation of Interlock Tables 4 - 14. . . . . . . . . . . . . . . .

4.6 Part Composition Tables 4 - 16. . . . . . . . . . . . . . . .4.6.1 Overview of a Part Composition Table 4 - 16. . . . . . . . . .4.6.2 Preparation of a Part Composition Table 4 - 17. . . . . . . .4.6.3 Preparation of the Function Programs for Parts 4 - 18. .

4.7 Constant Tables (C Registers) 4 - 19. . . . . . . . . . .4.7.1 Overview of a C Register Constant Table 4 - 19. . . . . . .4.7.2 Preparation of a C Register Constant Table 4 - 20. . . . .

4

Table Programming

4.1.1 Types of Table Programs

4 -2

4.1 Types and Execution of Table Programs

This section describes the types of table programs and the execution methods.

4.1.1 Types of Table Programs

Table 4.1 shows the uses and functions of table programs.

For functions, only the M register constant table and the # register constant table can be used.

For execution of table programming, use the MPE720.

Table 4.1 Types of Table Programs

Name Use and Function DWG Function

Constant table (M register) S Used for setting various types of constant data common to alldrawings, such as the mechanical and electrical specifications ofequipment.

S Data names, symbols, units, and setting ranges can be designated.

Yes Yes

Constant table (# register) S Used for setting various types of constant data unique to eachdrawing, such as tension control parameters and position controlparameters.


Yes Yes

I/O conversion table S The I/O conversion process parts of the various processing pro-grams can be prepared as a table.

S A scale conversion function and a bit signal conversion functionare provided.

S Data names, symbols, units, and input conversion ranges can bedesignated.

Yes No

Interlock table S Used for preparing various types of interlock.

S A signal name and symbol can be designated for each input andoutput.

S An interlock can be prepared using a combination of logical ANDand logical OR, using NO contact and NC contact signals.

Yes No

Part composition table S Used to simultaneously prepare multiple fixed-pattern circuits,such as solenoid circuits and auxiliary sequence circuits.

S Fixed-pattern circuits can be prepared and registered as standardsoftware parts for the required types only.

Yes No

Constant table (C register) S Used for setting various types of constant data common to alldrawings, such as the mechanical and electrical specifications ofequipment.


No No

Yes: Can be used, No: Cannot be used

4

4.1 Types and Execution of Table Programs

4 -3

4.1.2 Execution of Table Programs

Each table program is executed with the XCALL instruction. See Figure 4.1.

XCALL MCTBL

XCALL ASMTBL

XCALL ILKTBL

XCALL IOTBL

Drawing/Function Program

Constant table(M register)

I/O conversion table

Interlock table

Part composition table

Figure 4.1 Execution Method for a Table Program

Set values are stored directly in the # register by the # register constant table, and in the C regis-

ter by the C register constant table.

There is no need to use the XCALL instruction for the # register constant table and the C regis-

ter constant table.

4

Table Programming

4.2.1 Overview of the M Register Constant Table

4 -4

4.2 Constant Tables (M Registers)

An M register constant table is used for setting various types of constant data common to all draw-

ings, such as the mechanical and electrical specifications of equipment.

4.2.1 Overview of the M Register Constant Table

To use an M register constant table, first define the constant table. Then use the defined

constant table to set the various types of constant data. When the constant table is stored, M

register comments are automatically prepared or refreshed according to the data name, sym-

bol, unit, and register number of each row.

These comments are used for the comment display in the program screens, and for the com-

ment printout when documents are printed.

Figure 4.2 shows the preparation of a M register constant table.

Definition of Constant Table

MW10000 ABCDEF……

MW10001 AAAAAA……

MW100002 BBBBBB……

D Designation of table name and drawing number

D Designation of data names, symbols, units,setting ranges, and storage addresses

D Input of set values

Input of Various Set Values

Constant Setting Program

D The register commentsare automaticallyprepared or refreshedwhen the constant table(register) is stored.

Generated M Register Comments

Figure 4.2 Preparation of an M Register Constant Table

4

4.2 Constant Tables (M Registers)

4 -5

4.2.2 Preparation of an M Register Constant Table

This section describes the preparation of an M register constant table and the input of the set

values.

J Definition of the M Register Constant Table

The items listed below are set in the definition of the M register constant table.

Up to 200 constants can be set.

D Name

Designates the data name of the constant.

D Symbol

Designates the symbol of the constant.

D Unit

Designates the unit of the constant.

D Lower limit

Designates the lower input limit of the constant.

D Upper limit

Designates the upper input limit of the constant.

D Storage address

Designates the M register in which the set values are to be stored.

J Input of Set Values in the M Register Constant Table

The set values are input after the definition of the M register constant table has been completed.

For details on the input method, refer to the Machine Controller MP900/MP2000 Series


Figure 4.3 Constant Table (M Registers)

4

Table Programming

4.3.1 Overview of a # Register Constant Table

4 -6

4.3 Constant Tables (# Registers)

A # register constant table is used for setting various types of constant data unique to each drawing,

such as tension control parameters and position control parameters.

4.3.1 Overview of a # Register Constant Table

A # register constant table is prepared in the same way as anM register constant table. Multiple

pages (up to 10 pages per drawing) can be used for the # register constant table. With a # register

constant table, the multiple page settings are stored in the number registers of the designated

drawings. Also, the # register comments are prepared at the same time as when the set values

are stored.

When the constant table is stored, the # register comments are automatically prepared or re-

freshed according to the data name, symbol, unit, and register number of each row. These com-

ments are used for the comment display in the program screens, and for the comment printout

when documents are printed.

Figure 4.4 shows the preparation of a # register constant table.

#W00000 ABCDEF……

#W00001 AAAAAA……

#W00002 BBBBBB……

Generated # Register Comments

D Generation of # registerdata and comments

D Designation of table name and drawing numberD Designation of data names, symbols, units,setting ranges, and storage addresses

D Input of set values

Definition of Constant Table

Input of Various Set Values

Storage of Constantsin # Registers

Figure 4.4 Preparation of the # Register Constant Table

4

4.3 Constant Tables (# Registers)

4 -7

4.3.2 Preparation of a # Register Constant Table

This section describes the preparation of a # register constant table and the input of the set val-

ues.

J Definition of the # Register Constant Table

The items listed below are set in the definition of the # register constant table.

Up to 100 constants can be set per page.

D Name

Designates the data name of the constant.

D Symbol

Designates the symbol of the constant.

D Unit

Designates the unit of the constant.

D Lower limit

Designates the lower input limit of the constant.

D Upper limit

Designates the upper input limit of the constant.

D Storage address

Designates the number register in which the set values are to be stored.

J Input of Set Values in the # Register Constant Table

The set values are input after the definition of the # register constant table has been completed.

When the input of the set values has been completed, the set values for the various types of

definition data are stored in the # registers of the designated drawing.

Figure 4.5 Constant Table (# Registers)

4

Table Programming

4.4.1 Overview of an I/O Conversion Table

4 -8

4.4 I/O Conversion Tables

An I/O conversion table enables the I/O conversion process parts of the various processing pro-

grams to be prepared as a table. Changes in the I/O specifications can also be made simply by

changing the definitions in the table.

4.4.1 Overview of an I/O Conversion Table

Input conversion tables and output conversion tables are prepared using different drawings for

each processing program.

Figure 4.6 shows the preparation of an I/O conversion table.

Input

Definition of InputConversion Table

ProcessingProgram

Definition of OutputConversion Table

Output

D With the input conversion table, the input registers (I registers) arenormally used for input, and the M registers used by the processingprogram are normally used for output.

D With the output conversion table, the registers used by the processingprogram are normally used for input, and the output registers (Oregisters) are normally used for output.

Figure 4.6 Preparation of an I/O Conversion Table

4


4 -9

4.4.2 Preparation of an I/O Conversion Table

Scale conversion of numeric data and various signal conversions of bit signals can be desig-

nated with an I/O conversion table. Up to 1,200 I/O conversions can be designated in one table

(drawing).

J Scale Conversion Functions

Addition, subtraction, multiplication, and division operations, which use constants and arbi-

trary registers, can be used as scale conversion functions. Set the following items:

D Name

Designates the data name of the data to be converted.

D Input

Designates the input data register number, the input data unit, and the input data symbolin each row.

D Scale conversion designation

Addition, subtraction, multiplication, and division operations, which use constants and ar-bitrary registers, can be designated.

D Output conversion range

Designates the upper output limit and the lower output limit.

D Output

In each row, designates the number of the register in which the conversion results are tobe stored, as well as the output data unit and the output data symbol.

Scale conversionfunction

Bit signal conversionfunction

Figure 4.7 I/O Conversion Table

The I/O conversion designation in the first row performs the same function as the follow-ing instructions:

IW0100 × 10000 ÷ 1024 ⇒ MW01000

The I/O conversion designation in the third row performs the same function as the follow-ing instructions:

IW0102 < 00000

00000] < 10000

10000]

[

[ ⇒ MW01002

4

Table Programming


4 -10

The I/O conversion designation in the fifth row performs the same function as the follow-ing instructions:

01000] > 30000

30000]

[

[ ⇒ MW02002

IW020 + MW05000 × MW03330 ÷MW01000 − MW02220 < 01000

J Bit Signal Conversion Function

The nine conversions shown in Table 4.2 can be designated for bit signal conversion functions.

Table 4.2 List of Conversion Symbols

Name Conversion Symbol

NO contact A ( )

NC contact B ( )

Pulse NO contact PA ( )

Pulse NC contact PB ( )

NO contact timer TA (xxx, xx)

NC contact timer TB (xxx, xx)

Designated time pulse for NO contact PTA (xxx, xx)

Designated time pulse for NC contact PTB (xxx, xx)

NO contact chattering prevention CTA (xxx, xx)

Set the following items:

D Name

Designates the name of the signal to be converted.

D Input

In each row, designates the input signal relay number and symbol.

D Bit signal conversion designation

Any of nine bit signal conversion can be designated.

4


4 -11

D Output

In each row, designates the number and symbol of the relay in which the conversion resultsare to be stored.

Scale conversionfunction

Bit signal conversionfunction

Figure 4.8 I/O Conversion Table

Equivalent Ladder ProgramsThe bit signal conversion designation in the first row performs the same function as the follow-

ing instructions:

A ( )MB040001IB04001

The bit signal conversion designation in the second row performs the same function as the fol-

lowing instructions:

B ( )MB040002IB04002

The bit signal conversion designation in the third row performs the same function as the follow-

ing instructions:

PA ( )MB040003IB04003 EBxxxxxxx

The bit signal conversion designation in the fourth row performs the same function as the fol-


PB ( )MB040004IB04004 EBxxxxxxx

The bit signal conversion designation in the fifth row performs the same function as the follow-

ing instructions:

IB04005T001.00 EWxxxxxx MB040005

TA (1.00)

The bit signal conversion designation in the sixth row performs the same function as the fol-


IB04006T001.00 EWxxxxxx MB040006

TB (1.00)

4

Table Programming


4 -12

The bit signal conversion designation in the seventh row performs the same function as the

following instructions:

EBxxxxxxx

MB040007T001.00 EWxxxxx EBxxxxxx

PTA (1.00)MB040007IB04007

The bit signal conversion designation in the eighth row performs the same function as the fol-


EBxxxxxxx

MB040008T001.00 EWxxxxx EBxxxxxx

PTB (1.00)

MB040008IB04008

The bit signal conversion designation in the ninth row performs the same function as the fol-


Note The E registers are the work registers used by the Controller.The user cannot read and write data directly.

EBxxxxxxxIB04009T001.00 EWxxxxx

EBxxxxxxCTA (1.00)

MB040009

T001.00 EWxxxxxIB04009

MB040009

4

4.5 Interlock Tables

4 -13


Interlock tables are used to prepare various interlocks, such as the starting conditions and running

conditions of each device, in table format.

4.5.1 Overview of Interlock Tables

As shown in Figure 4.9, the interlock tables consist of one main interlock table and the corre-

sponding sub-interlock tables. One sub-interlock table can be set for one row of the main inter-

lock table.

The sub-interlock tables are used to prepare specific input signals for the main interlock table.

The main interlock table can be divided into multiple blocks. The maximum number of blocks

is 26, and each block is treated as an independent interlock.

When the interlock tables are stored, the comments for the registers (relays) are automatically

prepared or refreshed according to the data name, symbol, unit, and register number (relay

number) of each row. These comments are used for the comment display in the program

screens, and for the comment printout when documents are printed.

Figure 4.9 shows the preparation of the interlock tables.

Main Interlock TableSub-Interlock Table

Sub-Interlock Table

Figure 4.9 Preparation of the Interlock Tables

4

Table Programming

4.5.2 Preparation of Interlock Tables

4 -14

4.5.2 Preparation of Interlock Tables

All interlock tables (main and sub-interlock tables) are prepared in the same way. A maximum

of 500 rows and 25 columns of data can be set. The tables are prepared according to the proce-

dure shown below.

1. Classification of the I/O signals

The following four classifications can be designated:

• I: Designates an input signal.

• S: Designates that an output signal from a sub-interlock table is to be used as an inputsignal.

• O: Designates an output signal.

• X: Designates that the contact of an output signal is to be used for input (self-hold cir-cuit).

2. Name designation

Designates the name of the interlock condition to be input in each row.

3. Symbol designation

Designates the symbol of the interlock condition to be input in each row.

4. Register number designation

Designates the register number of the interlock condition to be input in each row.

5. Interlock condition designation

• For each input signal, designates the interlock condition to be used as the logical AND

condition in each column. The NO contact condition ( ) and the NC contact condi-

tion ( ) can be used as interlock conditions.

• For each output signal, designates the interlock condition ( ) to be used as the logicalOR condition in each row.

The input signal designated as the interlock condition is used as the logical AND ineach column. The output signal is prepared as the logical OR of the columns designatedfor each row. Therefore, the following interlock table will be equivalent to the ladderprogram shown under it.

4


4 -15

Figure 4.10 Interlock Table

M2-USEMB010000

M2-USEMB010000

M2-USEMB010000

M4-USEMB010001

M4-USEMB010001

M4-USEMB010001

M1-PREPMB010010

M1-PREPMB010010

M1-PREPMB010010

M2-PREPMB010011

M2-PREPMB010011

M3-PREPMB010012

M3-PREPMB010012

M3-PREPMB010012

M4-PREPMB010013

M4-PREPMB010013

M5-PREPMB010014

M5-PREPMB010014

RUNINTLMB01001F

M5-PREPMB010014

M2-USEMB01000

M1-PWRIB01001

M4-USEMB010001

M2-PWRIB01002

M1-PREPMB010010

M3-PWRIB01003

M4-PWRIB01004

M5-PWRIB01005

M3-PREPMB010012

M4-PREPMB010014

POWERMB010020

Figure 4.11 Equivalent Ladder Program

4

Table Programming

4.6.1 Overview of a Part Composition Table

4 -16

4.6 Part Composition Tables

A part composition table is used to simultaneously prepare multiple fixed-pattern circuits, such as

solenoid circuits and auxiliary sequence circuits.

4.6.1 Overview of a Part Composition Table

A part composition table consists of functions that are used as parts and the part composition

table. The functions to be used as parts should be prepared before they are used in a part com-

position table.

Figure 4.12 shows the preparation of the part composition table.

Part Database

Function: ABCDEFG

Program Function I/Odefinition

D Each part consists of the body of the functionprogram and the function I/O definition.

Part Composition Table

D Multiple circuits that use the designated parts areprepared simultaneously.

D The circuits are prepared by defining the I/O for eachcircuit with the register number

Figure 4.12 Preparation of a Part Composition Table

4

4.6 Part Composition Tables

4 -17

4.6.2 Preparation of a Part Composition Table

Items such as the following can be prepared for the part composition table:

D Multiple circuits with the same pattern can be prepared simultaneously using the desig-nated parts.

D Each row corresponds to one circuit.

D The names, inputs, and outputs for each row can be designated and multiple circuits canbe prepared.

D The parts to be used can be designated for each row. The maximum values for the numberof inputs and the number of outputs are designated by the user.

D Up to 100 circuits can be prepared.

Use the following procedure to prepare a part composition table:

1. Designate the name of each circuit.

2. Designate the function symbol or the user function name to be used as a part.

3. Use register numbers to designate the input of each circuit. The register number set herewill be the input for the user function.

4. Use register numbers to designate the output of each circuit.

5. Designate, in word form, the number of the D register or # register that is to be the headwork register used for each circuit.

Figure 4.13 Part Composition Table (Ordinary Display)

4

Table Programming

4.6.3 Preparation of the Function Programs for Parts

4 -18

4.6.3 Preparation of the Function Programs for Parts

Each of the parts (bodies of function programs and function I/O definitions) to be used in the

part composition table should be prepared in advance. Although the preparation method is the

same as for ordinary function programs, the data below is used for the inputs and outputs of

parts and the work register.

J Inputs for Parts

The inputs designated in the function I/O definition will be used as the inputs for the parts. For

the relationship between the input definition for a function and the input variables (X registers)

used in the function, see Chapter 2 Managing Registers

J Outputs for Parts

The outputs designated in the function I/O definition will be used as the outputs for the parts.

For the relationship between the output definition for a function and the output variables (Y

registers) used in the function, see Chapter 2 Managing Registers.

J Work Registers

The Z registers correspond to the D registers of a drawing, and the # register corresponds to

the # register of a drawing. The sum of the leading work register number of the part composi-

tion table and the relative register number of that register is used as the number of the actual

work register.

4

4.7 Constant Tables (C Registers)

4 -19


The C registers are used for setting various types of constant data common to all drawings, such

as equipment specifications and product specifications. Up to 200 C register constant tables can

be prepared.

4.7.1 Overview of a C Register Constant Table

Multiple definitions of the set values are stored in the C registers shown in Figure 4.14 by a

C register constant table. Also, the C register comments are prepared at the same time as the

set values are stored. When a constant table is stored, C register comments are automatically

prepared or refreshed according to the data name, symbol, unit, and register number of each

row.

These comments are used for the comment display in the program screens, and for the com-

ment printout when documents are printed.4

Table Programming

4.7.2 Preparation of a C Register Constant Table

4 -20

Figure 4.14 shows the preparation of a C register constant table.

CW00000 ABCDEF……

CW00001 AAAAAA……

CW00002 BBBBBB……

…………

…………

…………

Constant Table(C Register) Map Definition of Constant Table

D Designation of datanames, symbols, units,setting ranges, andstorage addresses

Input of Set Values

D Input of various set values

Storage of constantsin C registers

GeneratedC Register Comments

D Generation of C registerdata and comments

Figure 4.14 Preparation of a C Register Constant Table

4.7.2 Preparation of a C Register Constant Table

Use the following procedure to prepare a C register constant table:

J Definition of the C Register Constant Table

The items listed below are set in the definition of the C register constant table.

Up to 16,384 constants can be set per definition.

1. Designate the data name of the constant.

2. Designate the symbol of the constant.

3. Designate the unit of the constant.

4. Designate the lower input limit of the constant.

4


4 -21

5. Designate the upper input limit of the constant.

6. Designate the C register in which the set values are to be stored.

J Input of Set Values in the C Register Constant Table

The set values are input after the definition of the C register constant table has been completed.

For details on the input methods, refer to the Machine Controller MP900/MP2000 Series


Figure 4.15 Constant Table (C Registers)

4

5 - 1

5Standard System Functions

This chapter describes the functions, status, parameters, and I/O of the

DATA TRACE READ function, TRACE function, FAILURE TRACE

READ function, SENDMESSAGE function, RECEIVEMESSAGE func-

tion, COUNTER function, and FIRST-IN FIRST-OUT function.

5.1 DATA TRACE READ Function (DTRC-RD) 5 - 35.1.1 Data Readout 5 - 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.1.2 Readout Data Configuration 5 - 5. . . . . . . . . . . . . . . . . . .

5.2 TRACE Function (TRACE) 5 - 7. . . . . . . . . . . . . .5.3 FAILURE TRACE READ Function

(FTRC-RD) 5 - 9. . . . . . . . . . . . . . . . . . . . . . . . . .5.3.1 Failure Occurrence Data Readout 5 - 10. . . . . . . . . . . . . .5.3.2 Readout Data Configuration

(Failure Occurrence Data) 5 - 11. . . . . . . . . . . . . . . . . .5.3.3 Failure Recovery Data Readout 5 - 12. . . . . . . . . . . . . . .5.3.4 Readout Data (Failure Recovery Data)

Configuration 5 - 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.4 INVERTER TRACE READ Function(ITRC-RD) 5 - 14. . . . . . . . . . . . . . . . . . . . . . . . . . .5.4.1 Data Readout 5 - 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.4.2 Readout Data Configuration 5 - 16. . . . . . . . . . . . . . . . . . .

5.5 SEND MESSAGE Function (MSG-SND) 5 - 17. .5.5.1 Parameters 5 - 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.2 Inputs 5 - 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.3 Outputs 5 - 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5.4 Programming Example 5 - 29. . . . . . . . . . . . . . . . . . . . . . .

5

Ladder Instructions

5 - 2

5.6 RECEIVE MESSAGE Function(MSG-RCV) 5 - 30. . . . . . . . . . . . . . . . . . . . . . . . . .5.6.1 Parameters 5 - 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.2 Inputs 5 - 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.3 Outputs 5 - 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.6.4 Programming Example 5 - 37. . . . . . . . . . . . . . . . . . . . . . .

5.7 COUNTER Function (COUNTER) 5 - 38. . . . . . .5.8 FIRST-IN/FIRST-OUT Function (FINFOUT) 5 - 395.9 INVERTER CONSTANT WRITE Function

(ICNS-WR) 5 - 40. . . . . . . . . . . . . . . . . . . . . . . . . .5.9.1 Write Data Configuration 5 - 42. . . . . . . . . . . . . . . . . . . . . .5.9.2 Writing to EEPROM 5 - 43. . . . . . . . . . . . . . . . . . . . . . . . . .5.9.3 Programming Example 5 - 44. . . . . . . . . . . . . . . . . . . . . . .

5.10 INVERTER CONSTANT READ Function(ICNS-RD) 5 - 45. . . . . . . . . . . . . . . . . . . . . . . . . . .

5

5.1 DATA TRACE READ Function (DTRC-RD)

5 - 3


This section describes the function, I/O, and data readout of the DATA TRACE READ function.

Table 5.1 shows the function and I/O of the DATA TRACE READ function.

Table 5.1 Function and I/O of the DATA TRACE READ Function

FunctionName

DTRC-RD

Function S Reads out the trace data of the main controller unit and stores this data in the user registers.

S The data in the trace memory can be read out by designating the record number and the number of records.

S Readout can be performed by designating only the necessary items in the record.

FunctionDefinition

DTRC-RDEXECUTE

GROUP-NO

REC-NO

REC-SIZE

SELECT

DAT-ADR

=======>

=======>

=======>

=======>

=======>

=======>

=======>

COMPLETE

ERROR

STATUS

REC-SIZE

REC-LEN

I/O Definition No. Name I/ODesignation *

Description

Input 1 EXECUTE B-VAL Designation of the execution of DATA TRACE READ

2 GROUP-NO I-REG Designation of the data trace group number (1 to 4)

3 REC-NO I-REG Designation of the leading record number for readout (0 to maxi-mum record number − 1)

4 REC-SIZE I-REG Designation of the number of records requested for readout (1 tomaximum record number)

5 SELECT I-REG Item to be read out (0001H to FFFFH)Bits 0 to F correspond to data designations 1 to 16 of the tracedefinition.

6 DAT-ADR Address input Designation of the leading register number for readout (MW orDW address)

Output 1 COMPLETE B-VAL End of trace read

2 ERROR B-VAL Error occurred

3 STATUS I-REG DATA TRACE READ execution status

4 REC-SIZE I-REG Number of records read

5 REC-LEN I-REG Length (in words) of one record read

* Indicates the I/O designation on the MPE720.

5

Ladder Instructions

5.1.1 Data Readout

5 - 4

Table 5.2 shows the configuration of the DATA TRACE READ execution status (STATUS).

Table 5.2 Configuration of the DATA TRACE READ Execution Status

Name Bit No. Remarks

Reserved by the system Bit 0 to Bit 7

No trace definition Bit 8 The function will not be executed.

Group number error Bit 9 The function will not be executed.

Designated record number error Bit 10

Error in the designated number of records Bit 11 The function will not be executed.

Data storage error Bit 12 The function will not be executed.

Reserved by the system Bit 13


Address input error Bit 15 The function will not be executed.

5.1.1 Data Readout

Figure 5.1 shows the readout of data.

0

Data trace memory

Record number

Leading recordnumber forreadout

Old

New

Number ofrecords read

Readout

User registerLeading address ofregister for readout

n

Figure 5.1 Data Readout

5


5 - 5

Themost recent record numbers of the trace groups are stored in SW00100 to SW00103.When

reading the most recent trace data, designate the most recent record number as the record num-

ber to be read out. See Table 5.3.

Table 5.3 Most Recent Record Number

System Register No. Data Trace Definition

SW00100 For group 1

SW00101 For group 2

SW00102 For group 3

SW00103 For group 4

SW00104 −

SW00105 −

SW00106 −

SW00107 −

5.1.2 Readout Data Configuration

Figure 5.2 shows the readout data configuration.

.

.

.

.

Record 1

1 to 32 words

Trace data

32,512 words max.

1 to 32 words

DAT→ ADR→ 1 to 32 words Old

New

Item 1..

Item 16

Record 2

Record n

Figure 5.2 Readout Data Configuration

5

Ladder Instructions


5 - 6

J Record Length

A record consists of selected data items.

Word length of 1 record = Bn × 1 word + Wn × 1 word Ln × 2 words + Fn × 2 words

Bn: Number of selected points in bit register

Wn: Number of selected points in word register, maximum of 16 points in total

Ln: Number of selected points in long register

Fn: Number of selected points in real number register

Maximum record length = 32 words (when a double-length integer register or a real number

register has 16 points)

Minimum record length = 1 word (when a bit register or an integer register has 1 point)

J Number of Records

The following table shows the number of records.

Maximum Number of Records 32512/Record Length

Number of records with the maximum record length 0 to 1,015

Number of records with the minimum record length 0 to 32,5115

5.2 TRACE Function (TRACE)

5 -7

5.2 TRACE Function (TRACE)

This section describes the function of the TRACE function and the TRACE execution status con-

figuration. Table 5.4 shows the function and I/O of the TRACE function.

Table 5.4 Function and I/O of the TRACE Function

FunctionName

TRACE

Function Controls the execution of the tracing of the trace data designated by the trace group number The trace definition isexecuted on the Data Trace Definition Window. Refer to the Machine Controller MP900/MP2000 SeriesMPE720 Software for Programming Device User’s Manual (manual No. SIEPC88070005) for details.

S The trace is executed when the TRACE EXECUTION command (EXECUTE) is turned ON.

S The trace counter is reset when the TRACE RESET command (RESET) is turned ON. The end of trace (TRC-END) is also reset at this time.

S The end of trace (TRC-END) is turned ON when the trace execution count becomes equal to the set count (setin trace definition).

FunctionDefinition

TRACEEXECUTE

RESET

GROUP-NO =======>=======>

TRC−END

ERROR

STATUS


Description

Input 1 EXECUTE B-VAL TRACE EXECUTION command

2 RESET B-VAL TRACE RESET command

3 GROUP-NO I-REG Designation of the trace group number (1 to 4)

Output 1 TRC-END B-VAL End of trace


3 STATUS I-REG TRACE execution status


5


5 -8

Table 5.5 shows the configuration of the TRACE execution status (STATUS).

Table 5.5 Configuration of the TRACE Execution Status (STATUS)


Trace data full Bit 0 Turned ON after the contents of the data tracememory of the designated group have been readonce.



Designated group number er-ror

Bit 9 The function will not be executed.


Execution timing error Bit 13 The function will not be executed.



5

5.3 FAILURE TRACE READ Function (FTRC-RD)

5 -9


This section describes the function of the FAILURE TRACE READ function, the execution status

configuration, and data readout. Table 5.6 shows the function of the FAILURE TRACE READ

function.

Table 5.6 Function and I/O of the FAILURE TRACE READ Function

FunctionName

FTRC-RD

Function S Reads the failure trace data and stores it in the user registers.

S Data can be read from the trace buffer by designating the required number of records.

S Designates either the failure occurrence data or the recovery data for readout.

S Enables resetting (initialization) of the failure trace buffer.

FunctionDefinition

FTRC-RDEXECUTE

RESET

TYPE

REC-SIZE

DAT-ADR

=======>

=======>

=======>

=======>

=======>

COMPLETE

ERROR

STATUS

REC-SIZE


Description

Input 1 EXECUTE B-VAL FAILURE TRACE READ command

2 RESET B-VAL FAILURE TRACE BUFFER RESET command

3 TYPE I-REG Type of data read1: Occurrence data2: Recovery data

4 REC-SIZE I-REG Number of records readOccurrence: 1 to 64Recovery: 450

5 DAT-ADR Address input Leading register address for readout (MW or DW address)

Output 1 COMPLETE B-VAL End of failure trace readout


3 STATUS I-REG FAILURE TRACE READ execution status


5 REC-LEN I-REG Length of record read


5


5.3.1 Failure Occurrence Data Readout

5 -10

Table 5.7 shows the configuration of the FAILURE TRACE READ execution status (STATUS).

Table 5.7 Configuration of the FAILURE TRACEREADExecution Status (STATUS)




Designated group number error Bit 9 The function will not be executed.







5.3.1 Failure Occurrence Data Readout

Figure 5.3 shows the readout of failure occurrence data. The readout will always be started

from the most recent record.

Failure occurrence trace memory

Most recent record

Old

New

Number ofrecords read Readout

User registerLeading address ofregister for readout

Figure 5.3 Failure Occurrence Data Readout

5


5 -11

5.3.2 Readout Data Configuration (Failure Occurrence Data)

J Data Configuration

5 words

Time of occurrence: Old

Trace data

320 words max.

Time of occurrence: New

.

.

.

.

Record 1

Record 2

DAT→ ADR→ 5 words

5 words Record n

Figure 5.4 Data Configuration

J Record Configuration

Register designation number

Year and month of occurrence

Day and hour of occurrence

Minute and second of occurrence

1 record (5 words)

2 words

1 word

1 word

1 word

Figure 5.5 Record Configuration

J Structure of Register Designation Number (2 Words)

This contains the failure detection relay information.

01

07D0

F 8 7 0

08

Data address

Example: MB020001 (hexadecimal expression)

(2) (1)1 word

1 word

Figure 5.6 Structure of Register Designation Number

5


5.3.3 Failure Recovery Data Readout

5 -12

Table 5.8 Bit Configuration

No. Bit Configuration of (1) Bit Configuration of (2)

7 Defined Flag (1 = defined, 0 = undefined) Reserved by the system (= 0)

6 Reserved by the system (= 0)

0 = NO contact designation, 1 = NC contact

Data type

Bit = 05

0 = NO contact designation, 1 = NC contactdesignation

Bit = 0

Integer = 1

D bl i t 24

Double integer = 2

Real number = 3

3 Register type Bit address 0 to F

2 S = 0

I = 11

I = 1

O = 2

0

O = 2

M = 3

J Number of Records


Minimum number of records 0 (no failure occurrence data)

Maximum number of records 64

5.3.3 Failure Recovery Data Readout

Figure 5.7 shows the readout of failure recovery data. The recovery data items are stored in

SW00093 (ring counter for 1 to 9999).

Record number read n

Failure occurrence trace memory

Old

New

Number ofrecords read Readout

User registerLeading address ofregister for readoutOld

New

Figure 5.7 Failure Recovery Data Readout

5


5 -13

5.3.4 Readout Data (Failure Recovery Data) Configuration

Figure 5.8 shows the data configuration.

8 words

Time of occurrence: Old

Trace data

Time of occurrence: New

.

.

.

.

Record 1

Record 2

DAT→ ADR→ 8 words

8 words Record n

Figure 5.8 Data Configuration

J Record Configuration

Figure 5.9 shows the record configuration.

Register designation number




1 record (8 words)




2 words

1 word

1 word

1 word

1 word

1 word

1 word

Figure 5.9 Record Configuration

J Number of Records


Minimum number of records 0 (no failure recovery data)

Maximum number of records 450

5


5 -14

5.4 INVERTER TRACE READ Function (ITRC-RD)

This section describes the function, data readout, and read data configuration of the INVERTER

TRACE READ function.

Table 5.9 Function of the INVERTER TRACE READ

Function Name ITRC-RD

Function S Reads out the Inverter trace data and stores it in user registers. Data can be read from the trace buffer bydesignating the required number of records. Readout can be performed by designating only the necessaryitems in the record.

S Applicable Inverters: Inverters with MP930, SVB-01, and 215IF connection

FunctionDefinition

ITRC-RD

EXECUTEABORT

DEV-TYP

CIR-NO

ST-NO

DAT-ADR

=======>

=======>

=======>

=======>

=======>

BUSY

COMPLETE

ERROR

STATUS

REC-SIZE

CH-NO

REC-SIZE

SELECT

=======>

=======>

=======>

=======>

REC-LEN


Description

Input 1 EXECUTE B-VAL Designation of execution of INVERTER TRACE READ.

2 ABORT B-VAL Designates aborting the readout.

3 DEC-TYP I-REG Transmission device type215IF = 1; MP930 = 4; SVB-01 = 10

4 CIR-NO I-REG Line number215IF = 1, 2; MP930 = 1; SVB-01 = 1 to 16

5 ST-NO I-REG Slave station number215IF = 1 to 64; MP930 = 1 to 14; SVB-01 = 1 to 14

6 DH-NO I-REG Transmission buffer channel number215IF = 1 to 3; MP930 = 1; SVB-01 = 1 to 8

7 REC-SIZE I-REG Number of records read (1 to 64)

8 SELECT I-REG Item to be read (0001H to FFFFH)Bits 0 to F correspond to trace data items 1 to 26.

9 DAT-ADR Address input Leading address of data buffer register (MW or DW address)

5

5.4 INVERTER TRACE READ Function (ITRC-RD)

5 -15

Function Name ITRC-RD

Output 1 BUSY B-VAL INVERTER TRACE READ in progress

2 COMPLETE B-VAL End of INVERTER TRACE READ


4 STATUS I-REG INVERTER TRACE READ execution status


6 REC-LEN I-REG Length of one record read


Table 5.10 Configuration of INVERTER TRACE READ Execution Status


Reserved by the system Bit 0 to bit 8 −

Transmission parameter error Bit 9 The function will not be executed.

Reserved by the system Bit 10 −



Transmission error Bit 13 The function will not be executed.

Reserved by the system Bit 14 −


5.4.1 Data Readout

Inverter Trace Memory

Old

New

Number ofrecords read

Readout

User registersLeading address ofregister for readout

Most recent record

The readout will always be started from the most recent record.

5



5 -16


J Data Configuration

.

.

.

.

Record 1

1 to 16 words

Trace data

1,920 words max.

1 to 16 words

DAT→ ADR→ 1 to 16 words Old

New

Item 1..

Item 16

Record 2

Record n

J Record Length

A record consists of selected data items.

Word length of 1 record = 1 to 16 words

J Number of Records

Maximum number of records = 120

5

5.5 SEND MESSAGE Function (MSG-SND)

5 -17


This section describes the function, I/O, and parameters of the SEND MESSAGE function, and

gives some programming examples. Table 5.11 shows the function of the SENDMESSAGE func-

tion.

5


5.5.1 Parameters

5 -18

Table 5.11 Function of the SEND MESSAGE

FunctionName

MSG-SND

Function Sends a message to the called station on the line designated by the transmission device type. Supports multipleprotocol types. The EXECUTION command (EXECUTE) should be held until COMPLETE or ERROR isturned ON.Transmission devices: CPU Module, 215IF, 217IF, 218IF, SVB-01Protocols: MEMOBUS, non-procedural

FunctionDefinition

MSG-SND

EXECUTE

ABORT

DEV-TYP

PRP-TYP

CIR-NO

CH-NOPARAM

=======>

=======>

=======>

=======>

BUSY

COMPLETE

ERROR


Description

Input 1 EXECUTE B-VAL SEND MESSAGE command

2 ABORT B-VAL SEND MESSAGE FORCED INTERRUPT command

3 DEV-TYP I-REG Transmission device typeCPU Module = 8, 215IF = 1, 217IF = 5, 218IF = 6,SVB-01 = 11

4 PRO-TYP I-REG Transmission protocolMEMOBUS = 1Non-procedural = 2

5 CIR-NO I-REG Line numberCPU Module = 1, 2, 215IF = 1 to 8, 217IF = 1 to 24,218IF = 1 to 8, SVB-01 = 1 to 16

6 CH-NO I-REG Transmission buffer channel numberCPU Module = 1, 215IF = 1 to 13, 217IF = 1, 218IF = 1 to 10,SVB-01 = 1 to 8

7 PARAM Address input Leading address of set data (MW, DW, #W)

Output 1 BUSY B-VAL Message being sent

2 COMPLETE B-VAL Message sending completed


5.5.1 Parameters

This section describes the contents and functions of the parameters in order of parameter num-

ber. Table 5.12 shows the parameter list.

5


5 -19

Table 5.12 Parameter List

Parameter No. IN/OUT Description

MEMOBUS Non-procedural

PARAM00 OUT Process result Process result

PARAM01 OUT Status Status

PARAM02 IN Called station number Called station number

PARAM03 SYS Reserved by the system Reserved by the system

PARAM04 IN Function code

PARAM05 IN Data address Data address

PARAM06 IN Data size Data size

PARAM07 IN Called CPU number Called CPU number

PARAM08 IN Coil offset

PARAM09 IN Input relay offset

PARAM10 IN Input register offset

PARAM11 IN Holding register offset Register offset

PARAM12 SYS For system use For system use





J Process Result (PARAM00)

The process result is output to the upper byte. The lower byte is used for system analysis.

D 00xx: Processing (BUSY)

D 10xx: Process completed (COMPLETE)

D 8xxx: Error occurred (ERROR)

5


5.5.1 Parameters

5 -20

Error Classification

D 81xx: Function code error

The sending of an unused function code was attempted, or an unused function code wasreceived.

D 82xx: Address setting error

The data address, coil offset, input relay offset, input register offset, or holding registeroffset setting is out of range.

D 83xx: Data size error

The size setting of the sent or received data is out of range.

D 84xx: Line number setting error

The line number setting is out of range.

D 85xx: Channel number setting error

The channel number setting is out of range.

D 86xx: Station address error

The station number setting is out of range.

D 88xx: Transmission unit error

An error response was returned from the transmission unit.

D 89xx: Device selection error

An unusable device was selected.

J Status (PARAM01)

Outputs the status of the transmission unit.

Bit Allocations

Parameter

Command

Result

Request

F 78 6 5 4 3 2 1 09ABCDE

5


5 -21

Command

The following table shows the command list.

Code Abbreviation Meaning

1 U_SEND Sending of generic message

2 U_REC Receiving of generic message

3 ABORT Forced interrupt

8 M_SEND Sending of MEMOBUS command: completed on receipt of response.

9 M_REC Receiving of MEMOBUS command: accompanies sending of re-sponse.

C MR_SEND Sending of MEMOBUS response

Result

Table 5.13 shows the RESULT list abbreviations and meanings.

Table 5.13 RESULT List

Code Abbreviation Meaning

0 − Excuting normally.

1 SEND_OK Sending has been completed normally.

2 REC_OK Receiving has been completed normally.

3 ABORT_OK Completion of forced interruption

4 FMT_NG Parameter format error

5 SEQ_NG orINIT_NG

Command sequence error

Token not yet received. Not connected to a transmission system.

6 RESET_NG orO_RING_NG

Reset condition

Out-of-ring. The token could not be received even after the token mon-itoring time was exceeded.

7 REC_NG Data receive error (error detected by a lower-level program)

5


5.5.1 Parameters

5 -22

Parameter

Indicates one of the error codes in Table 5.14 if RESULT = 4 (FMT_NG). Otherwise, the pa-

rameter indicates the address of the called station.

Table 5.14 List of Error Codes

Code Error Description

00 No error

01 Station address out of range

02 Monitored MEMOBUS response receiving time error

03 Resending count setting error

04 Cyclic area setting error

05 Message signal CPU number error

06 Message signal register number error

07 Message signal word count error

REQUEST

1 = request

0 = completion of receipt report

J Called Station Number (PARAM02)

Serial

1 to 254: Sent to the designated device address station.

5


5 -23

J Function Code (PARAM04)

The MEMOBUS function code to be sent is set. See Table 5.15.

Table 5.15 Function Codes

Function Code Setting

00H Unused No

01H Read coil condition Yes

02H Read input relay condition Yes

03H Read contents of holding register Yes

04H Read contents of input register Yes

05H Change condition of single coil Yes

06H Write a single holding register Yes

07H Unused No

08H Loop-back test Yes

09H Read contents of holding register (expanded) Yes

0AH Read contents of input register (expanded) Yes

0BH Write holding register (expanded) Yes

0CH Unused No

0DH Discontinuous read of holding register (expanded) Yes

0EH Discontinuous write holding register (expanded) Yes

0FH Change conditions of multiple coils (expanded) Yes

10H Write multiple holding registers Yes

11H to 20H Unused No

21H to 3FH Reserved for system use No


50H and later Unused No

Yes: Can be set, No: Cannot be set

Note Only MW (MB) can be used as the sending or receiving register during masteroperations.MB,MW,IB,andIWcanbeusedrespectivelyas thecoil,holdingreg-ister, input relay, and input register during slave operations.

5


5.5.1 Parameters

5 -24

J Data Address (PARAM05)

The set contents will differ according to the function code, as shown in Table 5.16.

Table 5.16 Address Setting Range

Function Code Data Address Setting Range

00H Unused Not valid

01H Read coil condition 0 to 65535 (0 to FFFFH) *

02H Read input relay condition 0 to 65535 (0 to FFFFH) *

03H Read contents of holding register 0 to 32767 (0 to 7FFFH) †

04H Read contents of input register 0 to 32767 (0 to 7FFFH) †

05H Change condition of single coil 0 to 65535 (0 to FFFFH) *

06H Write a single holding register 0 to 32767 (0 to 7FFFH) †


08H Loop-back test Not valid

09H Read contents of holding register (expanded) 0 to 32767 (0 to 7FFFH) †

0AH Read contents of input register (expanded) 0 to 32767 (0 to 7FFFH) †

0BH Write holding register (expanded) 0 to 32767 (0 to 7FFFH) †

0CH Unused Not valid

0DH Discontinuous read of holding register (expanded) 0 to 32767 (0 to 7FFFH) ‡

0EH Discontinuous write holding register (expanded) 0 to 32767 (0 to 7FFFH) ‡

0FH Change conditions of multiple coils 0 to 65535 (0 to FFFFH) *

10H Write multiple holding registers 0 to 32767 (0 to 7FFFH) †

* Request for read from or write to a coil or relay:

Set the leading bit address of the data.

† Request for continuous read from or write to a register:

Set the leading word address of the data.

‡ Request for discontinuous read from or write to a register:

Set the leading word address of the address table.

5


5 -25

J Data Size (PARAM06)

Set the size (number of bits or number of words) of the data that is requested for read or write.

The setting range will differ according to the function code. See Table 5.17.

Table 5.17 Size Setting Range for Serial Data

Function Code Data Size Setting Range

215IF/218IF CPU Module/217IF/SVB-01


01H Read coil condition 1 to 2,000 (1 to 07D0H) bits

02H Read input relay condition 1 to 2,000 (1 to 07D0H) bits

03H Read contents of holding register 1 to 125 (1 to 007DH) words

04H Read contents of input register 1 to 125 (1 to 007DH) words

05H Change condition of single coil Not valid

06H Write a single holding register Not valid


08H Loop-back test Not valid

09H Read contents of holding register (ex-panded)

1 to 508 (1 to 01FCH)words


0AH Read contents of input register (ex-panded)



0BH Write holding register (expanded) 1 to 507 (1 to 01FBH)words

1 to 252 (1 to 00FBH)words

0CH Unused Not valid

0DH Discontinuous read of holding register(expanded)



0EH Discontinuous write holding register(expanded)

1 to 254 (1 to 00FEH)words

1 to 126 (1 to 007EH)words

0FH Change conditions of multiple coils 1 to 800 (1 to 0320H) bits

10H Write multiple holding registers 1 to 100 (1 to 0064H) words

J Called CPU Number (PARAM07)

Set 0 as the called CPU number.

J Coil Offset (PARAM08)

Set the offset word address of the coil. This parameter is valid with function codes 01H, 05H,

and 0FH.

5


5.5.1 Parameters

5 -26

J Input Relay Offset (PARAM09)

Set the offset word address of the input relay. This parameter is valid with function code 02H.

J Input Register Offset (PARAM10)

Set the offset word address of the input register. This parameter is valid with function codes

04H and 0AH.

J Holding Register Offset (PARAM11)

Set the offset word address of the holding register. This parameter is valid with function codes

03H, 06H, 09H, 0BH, 0DH, 0EH, and 10H.

J For System Use (PARAM12)

The channel number being used is stored. Make sure this is set to 0000H by the user program

during the first scan after the power is turned ON. After this, do not change the value in the

user program, because it will be used by the system.

J Relationship Between the Data Address, Size, and Offset

Figure 5.10 shows the relationship between the data address, size, and offset.

A = Sending side offset addressB = Sending side data addressC = Receiving side offset address

B

A

B

C

MW00000

MWxxxxx

[MSG-SND] [MSG-RCV]

Offset

Data address

Data size

Offset

Data address

Data size

Data

Data

Figure 5.10 Relationship Between the Data Address, Size, and Offset

J Non-Procedural Transmission Protocol

PARAM04, PARAM08, PARAM09, and PARAM10 need not be set. Only MW can be used

as a sending register. PARAM11 will be the offset word address.

5


5 -27

5.5.2 Inputs

J EXECUTE (SEND MESSAGE EXECUTION Command)

When this command is turned ON, the message is sent.

J ABORT (SEND MESSAGE FORCED INTERRUPT Command)

Forcibly interrupts sending of the message. Has priority over EXECUTE (SEND MESSAGE

EXECUTION command).

J DEV-TYP (Transmission Device Type)

Designates the transmission device type.

CPU Module = 8, 215IF = 1, 217IF = 5, 218IF = 6, SVB-01 = 11

J PRO-TYP (Transmission Protocol)

Designates the transmission protocol. With a non-procedural protocol, no response is sent from

the called station.

MEMOBUS: Setting = 1

Non-procedural: Setting = 2

J CIR-NO (Line Number)

Designates the line number

CPU Module = 1, 2, 215IF = 1 to 8, 217IF = 1 to 24, 218IF = 1 to 8, SVB-01 = 1 to 16

J CH-NO (Channel Number)

Designates the channel number of the transmission unit. Set the channel number so that the

same number is not used twice on the same line.

CPU Module = 1, 215IF = 1 to 13, 217IF = 1, 218IF = 1 to 10, SVB-01 = 1 to 8

J PARAM (Set Data Leading Address)

Designates the leading address of the set data. For details of the set data, see section 5.5.1 Pa-

rameters.

5


5.5.3 Outputs

5 -28

5.5.3 Outputs

J BUSY (Processing)

Indicates that the process is being executed. Keep EXECUTE turned ON.

J COMPLETED (Process Completed)

At normal termination, turns ON for only one scan.

J ERROR (Error Occurred)

At error occurrence, turns ON for only one scan.

For the causes of errors, see PARAM00 and PARAM01 in section 5.5.1 Parameters.

5


5 -29

5.5.4 Programming Example

Figure 5.11 shows a programming example.

(LINK status)⊦ DW00001

[ ⊦ 00000][ ⇒ DW00012]

(EXECUTE)DB000201

MSG-SND

EXECUTE

ABORT

DEV-TYP

PRP-TYP

CIR-NO

CH-NO

(Completed)DB000211

(Error)DB000212

SB000003

DB000211

DB000212

⇒ DW00027

⇒ DW00026

IFON

DEND

IEND

BUSY

COMPLETE

ERROR

(Set the system register to 0 in the first scan.)

(Start every 1 s)SB000032

(Completed)DB000211

(Error)DB000212

(1-s risedelay)

SB000038(EXECUTE)DB000201

(Command held)DB000201

(System function)(Executing)DB000210

(FORCED INTERRUPT)DB000208

(Transmission device type)

(Transmission protocol)

(Line No.)

(Transmission buffer channel No.)

(Parameter address)PARAMDA00000

(Pass counter)[INC DW00024]

(Error counter)INC DW00025

(Process result stored)⊦ DW00000

00008 =========>

00001 =========>

00001 =========>

00001 =========>

Figure 5.11 Programming Example

5


5 -30

5.6 RECEIVE MESSAGE Function (MSG-RCV)

This section describes the function, I/O, and parameters of the RECEIVEMESSAGE function, and

gives some programming examples. Table 5.18 shows the function of the RECEIVE MESSAGE

function.

Table 5.18 Function and I/O of the RECEIVE MESSAGE Function

FunctionName

MSG-RCV

Function Receives a message from the calling station on the line designated by the transmission device type. Supports mul-tiple protocol types. The EXECUTION command (EXECUTE) should be held until COMPLETE or ERROR isturned ON.Transmission devices: CPU Module, 215IF, 217IF, 218IF, SVB-01Protocols: MEMOBUS, non-procedural

FunctionDefinition

MSG-RCV

EXECUTE

ABORT

DEV-TYP

PRP-TYP

CIR-NO

CH-NO

PARAM

=======>

=======>

=======>

=======>

BUSY

COMPLETE

ERROR

I/O Definition No. Name I/ODesignation

Description

Input 1 EXECUTE B-VAL RECEIVE MESSAGE command

2 ABORT B-VAL RECEIVE MESSAGE FORCED INTERRUPT command

3 DEV-TYP I-REG Transmission device typeCPU Module = 8, 215IF = 1, 217IF = 5, 218IF = 6,SVB-01 = 11

4 PRO-TYP I-REG Transmission protocol (Settings of RTU and ASCII are con-ducted in Module Definitions Screen.)MEMOBUS = 1Non-procedural = 2

5 CIR-NO I-REG Line numberCPU Module = 1, 2, 215IF = 1 to 8, 217IF = 1 to 24,218IF = 1 to 8, SVB-01 = 1 to 16

6 CH-NO I-REG Transmission buffer channel numberCPU Module = 1, 215IF = 1 to 13, 217IF = 1, 218IF = 1 to 10,SVB-01 = 1 to 8

7 PARAM Address input Leading address of set data (MW, DW, #W)

5


5 -31

FunctionName

MSG-RCV

Output 1 BUSY B-VAL Message being received

2 COMPLETE B-VAL Message receiving completed


5.6.1 Parameters

This section describes the contents and functions of the parameters in order of parameter num-

ber. Table 5.19 shows the parameter list.

Table 5.19 Parameter List

Parameter No. IN/OUT Description

MEMOBUS Non-procedural

PARAM00 OUT Process result Process result

PARAM01 OUT Status Status

PARAM02 OUT Calling station number Calling station number


PARAM04 OUT Function code

PARAM05 OUT Data address Data address

PARAM06 OUT Data size Data size

PARAM07 OUT Calling CPU number Calling CPU number

PARAM08 IN Coil offset

PARAM09 IN Input relay offset

PARAM10 IN Input register offset

PARAM11 IN Holding register offset Register offset

PARAM12 IN Write range low (LO) Register offset

PARAM13 IN Write range high (HI) Register offset

PARAM14 SYS For system use For system use



5


5.6.1 Parameters

5 -32

J Process Result (PARAM00)

The process result is output to the upper byte. The lower byte is used for system analysis.

D 00xx: Processing (BUSY)

D 10xx: Process completed (COMPLETE)

D 8xxx: Error Occurred (ERROR)

Error Classification

D 81xx: Function code error

An unused function code was received.

D 82xx: Address setting error

The data address, coil offset, input relay offset, input register offset, or holding registeroffset setting is out of range.

D 83xx: Data size error

The size setting of the sent or received data is out of range.

D 84xx: Line number setting error

The line number setting is out of range.

D 85xx: Channel number setting error

The channel number setting is out of range.

D 86xx: Station address error

The station number setting is out of range.

D 88xx: Transmission unit error

An error response was returned from the transmission unit. (see section 5.6.1).

D 89xx: Device selection error

An unusable device was selected.

J Status (PARAM01)

Outputs the status of the transmission unit. For details, see Status (PARAM 01) in Section5.5.1, Parameters.

J Calling Station Number (PARAM02)

Outputs the number of the station sending the message.

5


5 -33

J Function Code (PARAM04)

Outputs the MEMOBUS function code received. See Table 5.20.

Table 5.20 MEMOBUS Function Code

Function Code Output

00H Unused No

01H Read coil condition Yes

02H Read input relay condition Yes

03H Read contents of holding register Yes

04H Read contents of input register Yes

05H Change condition of single coil Yes

06H Write a single holding register Yes

07H Unused No

08H Loop-back test Yes

09H Read contents of holding register (expanded) Yes

0AH Read contents of input register (expanded) Yes

0BH Write holding register (expanded) Yes

0CH Unused No

0DH Discontinuous read of holding register (expanded) Yes

0EH Discontinuous write holding register (expanded) Yes

0FH Change conditions of multiple coils Yes

10H Write multiple holding registers Yes

11H to 20H Unused No



50H and later Unused No

Yes: Can be output, No: Cannot be output

Note MB,MW, IB, and IWcanbe used respectively as the coil, holding register, inputrelay, and input register during slave operations.

J Data Address (PARAM05)

The data address requested by the sending side is output.

J Data Size (PARAM06)

The data size (number of bits or number of words) requested for read or write is output.

5


5.6.1 Parameters

5 -34

J Calling CPU Number (PARAM07)

The calling CPU number is output as 0 (fixed).

J Coil Offset (PARAM08)

Set the offset word address of the coil. This parameter is valid with function codes 01H, 05H,

and 0FH.

J Input Relay Offset (PARAM09)

Set the offset word address of the input relay. This parameter is valid with function code 02H.

J Input Register Offset (PARAM10)

Set the offset word address of the input register. This parameter is valid with function codes

04H and 0AH.

J Holding Register Offset (PARAM11)

Set the offset word address of the holding register. This parameter is valid with function codes

03H, 06H, 09H, 0BH, 0DH, 0EH, and 10H.

J Write Range Low (PARAM12), Write Range High (PARAM13)

Set the write permissible range for the write request. A request that is outside this range will

result in an error. This parameter is valid with function codes 0BH, 0EH, 0FH, and 10H.

0 ≤ write range LO ≤ write range HI ≤ maximum value of MW address

J For System Use (PARAM14)

The channel number being used is stored. Make sure this is set to 0000H by the user program

during the first scan after the power is turned ON. After this, do not change the value in the

user program, because it will be used by the system.

J Non-Procedural Transmission Protocol

PARAM04, PARAM08, PARAM09, PARAM10, and PARAM11 need not be set. PARAM12

is also used as the write destination MW offset word address.

5


5 -35

5.6.2 Inputs

J EXECUTE (RECEIVE MESSAGE EXECUTION Command)

When this command is turned ON, the message is sent.

This command must be held until COMPLETED (process completed) or ERROR (error oc-

curred) is turned ON.

J ABORT (RECEIVE MESSAGE FORCED INTERRUPT Command)

Forcibly interrupts receiving of the message. Has priority over EXECUTE (RECEIVE MES-

SAGE EXECUTION command).

J DEV-TYP (Transmission Device Type)

Designates the transmission device type.

CPU Module = 8, 215IF = 1, 217IF = 5, 218IF = 6, SVB-01 = 11

J PRO-TYP (Transmission Protocol)

Designates the transmission protocol. With a non-procedural protocol, no response is sent to

the calling station.

MEMOBUS: Setting = 1

Non-procedural: Setting = 2

J CIR-NO (Line Number)

Designates the line number

CPU Module = 1, 2, 215IF = 1 to 8, 217IF = 1 to 24, 218IF = 1 to 8, SVB-01 = 1 to 16

J CH-NO (Channel Number)

Designates the channel number of the transmission unit. Set the channel number so that the

same number is not used more than once on the same line.

CPU Module = 1, 215IF = 1 to 13, 217IF = 1, 218IF = 1 to 10, SVB-01 = 1 to 8

J PARAM (Set Data Leading Address)

Designates the leading address of the set data. For details of the set data, see section 5.6.1 Pa-

rameters.

5


5.6.3 Outputs

5 -36

5.6.3 Outputs

J BUSY (Processing)

Indicates that the process is being executed. Keep EXECUTE set to ON.

J COMPLETE (Process Completed)

At normal termination, turns ON for only one scan.

J ERROR (Error Occurred)

At error occurrence, turns ON for only one scan.

For the causes of errors, see PARAM00 and PARAM01 in section 5.6.1 Parameters.

5


5 -37


Figure 5.12 shows a programming example.

[ ⊦ 00000] [⇒ DW00012]

MSG-RCV

EXECUTE

ABORT

DEV-TYP

PRP-TYP

CIR-NO

CH-NO

SB000003

DB000211

DB000212

⇒ DW00027

⇒ DW00026

IFON

DEND

IEND

BUSY

COMPLETE

ERROR

(LINK status)⊦ DW00001

(EXECUTE)DB000004

(Completed)DB000211

(Error)DB000212

(Set the system register to 0 at the first scan.)

(System function)(Executing)DB000210

(FORCED INTERRUPT)DB000208


(Transmission protocol)

(Line No.)

(Transmission buffer channel No.)

(Pass counter)[INC DW00024]

(Error counter)INC DW00025

(Process result stored)⊦ DW00000

00008 =========>

00001 =========>

00001 =========>

00001 =========>

(Parameter address)PARAMDA00000

Figure 5.12 Programming Example

5


5 - 38

5.7 COUNTER Function (COUNTER)

This section describes the function and I/O of the COUNTER function. Table 5.21 shows the func-

tion and I/O of the COUNTER function.

Table 5.21 Function and I/O of the COUNTER Function

Function Name COUNTER

Function S Increments or decrements the current value when the COUNT INCREMENT command or the COUNTDECREMENT command (UP-CMD, DOWN-CMD) changes from OFF to ON.

S Sets the current counter value to zero (0) when the RESET COUNTER command (RESET) turns ON.Also compares the current counter value and the set value and outputs the result.

S The current value will not be incremented or decremented if a counter error (current value > set value)occurs.

FunctionDefinition

COUNTERUP-CMD

DOWN-CMD

RESET

CNT-DATA

CNT-UP

CNT-ZERO

CNT-ERR


Description

Input 1 UP-CMD B-VAL COUNT INCREMENT command(OFF→ ON)

Data area for counter pro-cess

2 DOWN-CMD B-VAL COUNT DECREMENT command(OFF→ ON)

1: Set value2: Current value3: Work flag

3 RESET B-VAL RESET COUNTER command3: Work flag

4 CNT-DATA Address input Data area for counter process

Leading address (MW or DW register)

Output 1 CNT-UP B-VAL ON when current counter value = set value

2 CNT-ZERO B-VAL ON when current counter value = 0

3 CNT-ERR B-VAL ON when current counter value > set value


5

5.8 FIRST-IN/FIRST-OUT Function (FINFOUT)

5 - 39

5.8 FIRST-IN/FIRST-OUT Function (FINFOUT)

This section describes the function and I/O of the FIRST-IN/FIRST-OUT function. Table 5.22

shows the function and I/O of the FIRST-IN/FIRST-OUT function.

Table 5.22 Function and I/O of the FIRST-IN FIRST-OUT Function

Function Name FINFOUT

Function This is a first-in/first-out block data move function.

The FIFO data table consists of a 4-word header and a data buffer. Three words of the header (data size, inputsize, and output size) must be set before this function is called.

S When the DATA INPUT command (IN-CMD) is ON, the designated number of data items from the desig-nated data input area are stored sequentially in the data area of the FIFO table.

S When the DATA OUTPUT command (OUT-CMD) is ON, the designated number of data items are trans-ferred from the beginning of the data area of the FIFO table to the designated data output area.

S When the RESET command (RESET) is ON, the number of data storage items is set to zero, and the FIFOtable empty output (TBL-EMP) is turned ON.

S If the data empty size < input size or data size < output size, the FIFO table error (TBL-ERR) will turnON.

FunctionDefinition

FINFOUT

IN-CMD

OUT-CMD

RESET

FIFO-TBLIN-DATAOUT-DATA

TBL-FULL

TBL-EMP

TBL-ERR


Description

Input 1 IN-CMD B-VAL DATA INPUT command FIFO table configuration

2 OUT-CMD B-VAL DATA OUTPUT command 0: Data size1: Input size

3 RESET B-VAL RESET command1: Input size2: Output size3: Number of data items stored

4 FIFO-TBL Address input Leading address of FIFO table(MW or DW address)

3: Number of data items stored4: Data

:

5 IN-DATA Address input Leading address of input data(MW or DW address)

6 OUT-DATA Address input Leading address of output data(MW or DW address)

Output 1 TBL-FULL B-VAL FIFO table full

2 TBL-EMP B-VAL FIFO table empty

3 TBL-ERR B-VAL FIFO table error


5

Ladder Instructions

5 - 40

5.9 INVERTER CONSTANT WRITE Function (ICNS-WR)

This section describes the function and write data configuration of the INVERTER CONSTANT

WRITE function.

Table 5.23 Function of the INVERTER CONSTANT WRITE

FunctionName

ICNS-WR

Function S Writes Inverter constants. The types and range of the Inverter constants to be written can be specified.

S Applicable Inverters: Inverters with MP930, SVB-01, and 215IF connection

FunctionDefinition

ICNS-WR

EXECUTE

ABORT

DEV-TYP

CIR-NO

ST-NO

DAT-ADR

=======>=======>

=======>

=======>

BUSY

COMPLETE

ERROR

STATUS

CH-NO

CNS-TYP

CNS-NO

=======>

=======>

=======>

CNS-SIZE=======>

5


5 - 41

FunctionName

ICNS-WR


Description

Input 1 EXECUTE B-VAL Designation of execution of INVERTER CONSTANT WRITE.

2 ABORT B-VAL Designates aborting the write.

3 DEV-TYPE I-REG Transmission device type215IF = 1, MP930 = 4, SVB-01 = 10

4 CIR-NO I-REG Line number215IF = 1, 2, MP930 = 1, SVB-01 = 1 to 16

5 ST-NO I-REG Slave station number215IF = 1 to 64, MP930 = 1 to 14, SVB-01 = 1 to 14

6 DH-NO I-REG Transmission buffer channel number215IF = 1 to 3, MP930 = 1, SVB-01 = 1 to 8

7 CNS-TYP I-REG Inverter constant type0 = Direct designation of reference number, 1 = An, 2 = Bn, 3 =Cn, 4 = Dn, 5 = En, 6 = Fn, 7 = Hn, 8 = Ln, 9 = On, 10 = Tn

8 CNS-NO I-REG Inverter constant number (1 to 99)The upper limit of Inverter constant numbers depends on theInverter type.When CNS-TYPE = 0, specify a reference number.

9 CNS-SIZE I-REG Number of Inverter constants to be written(Number of data items to be written) 1 to 100

10 DAT-SIZE Address input Register address of setting data (MW, DW or #W address)

Output 1 BUSY B-VAL INVERTER CONSTANT WRITE in progress

2 COMPLETE B-VAL End of INVERTER CONSTANT WRITE


4 STATUS I-REG INVERTER CONSTANT WRITE execution status


Table 5.24 Configuration of INVERTER CONSTANT WRITE Execution Status



Execution sequence error Bit 8 The function will not be executed.


Error in the designated type Bit 10 The function will not be executed.

Error in the designated number Bit 11 The function will not be executed.

5


5.9.1 Write Data Configuration

5 - 42

Name RemarksBit No.

Error in the designated data Bit 12 The function will not be executed.


Inverter response error Bit 14 The function will not be executed.


Note WhenanInverter responseerroroccurs, oneof thefollowingerrorcodes fromtheInverter is set in bit 0 to bit 7.01H (1): Function code error02H (2): Reference number error03H (3): Error in the number of data items written21H (33): Error in the upper/lower limit of write data22H (34): Write error (during operation or UV)The values in parentheses are decimal numbers.

5.9.1 Write Data Configuration

Acceleration time 1bn-01

bn-05

bn-06

bn-14

.

.

.

ASR proportional gain

ASR integration time

.

.

.

PG dividing ratio setting

.

.

.

AO option output gain

CNS-NO

bn-25

CNS-TYP

Constant data 1

Constant data 2

.

.

.

Constant data 10

DAT-ADR

CNS-SIZE

User register

Inverter constants

Words

5


5 - 43

5.9.2 Writing to EEPROM

The following figure shows the procedure for writing constants to EEPROM (constant storage

memory inside the Inverter).

Write Inverter constants to workmemory.

Execute WRITE ENTERcommand.

The constants written by the ICNS-WR system function are temporarily stored in the work

memory of the Inverter. To store the constants in EEPROM, execute theWRITE ENTER com-

mand as shown in the following figure.

Inverter

Work memory

EEPROM

Sharedmemory

Digital Operator

ICNS-WR function

WRITE ENTERcommand

ENTER WRITE Command

Execute the WRITE ENTER command for the Inverter by using the ICNS-WR function to

write data “0” to reference “FEED.”

5

Ladder Instructions


5 - 44


The following example program writes “200” to constant C1-01 (for MP930).

(Error status)⊦ DW00002

(Execution)DB00004

ICNS-WR

EXECUTE

ABORT

DEV-TYP

CIR-NO

ST-NO

CNS-TYP

(Completed)DB000002

(Error)DB000003

DB000002

SB000004

(Status held)⇒ DW00003

(Status held)⇒ DW00003

IFON (Error termination)

DEND

IEND

BUSY

COMPLETE

ERROR

DB000000 DB000001 DB000002 DB000003 DB000004

(Command held)DB000004

(System function)(Writing)DB000006

(Abort)DB000005


(Line No.)

(Slave station No.)

(Inverter constant type)

(Parameter address)PARAM

DA00001 (=200)

IFON (Normal termination)

⊦ 00004 =========>

⊦ 00001 =========>

⊦ 00001 =========>

⊦ 00000 =========>

STATUS =========>

(Inverter constant writeexecution status)

DW00002

CNS-NO

CNS-SIZE

(Inverter constant No.)

(No. of Inverter constants)

⊦ 000512=========>

⊦ 00001 =========>

(200H)

DB000003

SB000004

(Normal status)⊦ 00000

IEND

(Command reset)DB000000

(Command reset)DB000000

5

5.10 INVERTER CONSTANT READ Function (ICNS-RD)

5 - 45


This section describes the function and I/O of the ICNS-RD function.

Table 5.25 Function of the INVERTER CONSTANT READ

FunctionName

ICNS-RD

Function S Reads the Inverter constants and stores them in registers. The types and range of the Inverter constants to beread can be specified.

S Applicable Inverters: Inverters MP930, SVB-01, and 215IF connection

FunctionDefinition

ICNS-RD

EXECUTE

ABORT

DEV-TYP

CIR-NO

ST-NO

DAT-ADR

=======>=======>

=======>

=======>

BUSY

COMPLETE

ERROR

STATUS

CH-NO

CNS-TYP

CNS-NO

=======>

=======>

=======>

CNS-SIZE=======>

5


5 - 46

FunctionName

ICNS-RD


Description

Input 1 EXECUTE B-VAL Designation of execution of INVERTER CONSTANT READ

2 ABORT B-VAL Designates aborting read.

3 DEV-TYP I-REG Transmission device type215IF = 1, MP930 = 4, SVB-01 = 10

4 CIR-NO I-REG Line number215IF = 1, 2, MP930 = 1, SVB-01 = 1 to 16

5 ST-NO I-REG Slave station number215IF = 1 to 64, MP930 = 1 to 14, SVB-01 = 1 to 14

6 DH-NO I-REG Transmission buffer channel number215IF = 1 to 3, MP930 = 1, SVB-01 = 1 to 8

7 CNS-TYP I-REG Inverter constant type0 = Direct designation of reference number, 1 = An, 2 = Bn, 3 =Cn, 4 = Dn, 5 = En, 6 = Fn, 7 = Hn, 8 = Ln, 9 = On, 10 = Tn

8 CNS-NO I-REG Inverter constant number (1 to 99)The upper limit of Inverter constant numbers depend on the In-verter type.When CNS-TYPE = 0, specify a reference number.

9 CNS-SIZE I-REG Number of Inverter constants to be written(Number of data items to be written) 1 to 100

10 DAT-SIZE Address input Register address of settings data (MW, DW or #W address)

Output 1 BUSY B-VAL INVERTER CONSTANT READ in progress

2 COMPLETE B-VAL End of INVERTER CONSTANT READ


4 STATUS I-REG INVERTER CONSTANT READ execution status


Table 5.26 Configuration of INVERTER CONSTANT READ Execution Status



Execution sequence error Bit 8 −


Error in the designated type Bit 10 The function will not be executed.

Error in the designated number Bit 11 The function will not be executed.

Error in the designated data Bit 12 The function will not be executed.

5


5 - 47

Name RemarksBit No.


Inverter response error Bit 14 The function will not be executed.


Note WhenanInverter responseerroroccurs,oneof the followingerror codes fromtheInverter is set in bit 0 to bit 7.01H (1): Function code error02H (2): Reference number errorThe values in parentheses are decimal numbers.

Read Data Configuration

Acceleration time 1bn-01

bn-05

bn-06

bn-14

.

.

.

ASP proportional gain

ASP integration time

.

.

.

PG dividing ratio setting

.

.

.

AO option output gain

CNS-NO

bn-25

CNS-TYP

Constant data 1

Constant data 2

.

.

.

Constant data 10

DAT-ADR

CNS-SIZE

User register

Inverter constants

5

A -1

ALadder Instructions and Standard

System Functions

This appendix gives a description of each instruction in the ladder instruc-

tion list. It also shows the reference pages and can also be used as an index.

A

Ladder Instructions and Standard System Functions

A -2

Table A.1. lists the ladder instructions and standard system functions

Table A.1. Ladder Instructions and Standard System Functions

Type Name Symbol AbbreviatedInstructions

Description Page

ProgramControl

Instructions with [ ] [−] [ ] − 3 -7ControlInstructions CHILDDRAWING

CALLSEE SEE Designate the child drawing number or the grand-

child drawing number to be called after SEE.

SEE H01

3 -9

DRAWING END DEND END End of drawing (DWG) 3 -10

MOTION PRO-GRAM CALL

MSEE MSEE Designate the motion program number and theMSEE work register address to be called afterMSEE.

MSEE MPM001 DA00000

3 -11

FOR Structure FOR::

FEND

FOR Repeats execution statement 1

FOR V = a to b by c

V: Can designate any integer register I or J.a, b, c: Can designate an any integer value

(b > a > 0, c > 0).FEND: End of FOR instruction.

3 -11

WHILE Structure WHILE:

ON/OFF:

WEND

WHILE

ON

OFF

Repeats execution statement 2

WEND: End of WHILE-ON/OFF instruction

3 -13

IF Structure IFON/IFOFF:

ELSE:

IEND

IFON

IFOFF

ELSE

Conditional execution statement

IEND: End of IFON/IFOFF instruction

3 -15

FUNCTION CALL FSTART FSTART Calls a function. 3 -17FUNCTION IN-PUT

FUNCTION OUT-PUT

FIN FIN Function input instructionStores input data from the designated input registerin the function input register.

3 -18

PUTFOUT FOUT Function output instruction

Stores output data from the function output registerin the designated output register.

3 -19

COMMENT “nnnnnnn” ” A character string enclosed in quotation marks istreated as a comment.

3 -23

EXTENSIONPROGRAM CALL

XCALL XCALL Calls an extension program. 3 -23

Direct I/OInstructions

INPUTSTRAIGHT

INS INS INS MA00100

Executes the input and storage of data with inter-rupts disabled.

3 -25

OUTPUTSTRAIGHT

OUTS OUTS OUTS MA00100

Executes the setting and output of data with inter-rupts disabled.

3 -28

A

A -3

Type PageDescriptionAbbreviatedInstructions

SymbolName

RelayCircuitInstructions

NO CONTACT ][ No limit in a series circuit.Bit designation of any register as a relay number ispossible.

3 -31

NC CONTACT ]/ No limit in a series circuit.Bit designation of any register as a relay number ispossible.

3 -32

COIL @MW0200 = 0001

MB000000

MB000000

IFON

3 -32

SET COIL S @S MB000010MB000000

S

3 -33

RESET COIL R @R MB000010MB000020

R

3 -33

RISING PULSE ]P No limit in a series circuit.Bit designation of any register as a relay number ispossible.

3 -35

FALLING PULSE ]N No limit in a series circuit.Bit designation of any register as a relay number ispossible.

3 -36

10-MS ON-DELAY TIMER

T [ON Set value: Timer register

Set value = any register or constant (setting unit:

T

3 -37

10-MS OFF-DELAY TIMER

T [OFFSet value = any register or constant (setting unit:10 ms)

Timer register = M or D register

3 -40

1-S ON-DELAYTIMER

S [SON Set value: Timer register

Set value = any register or constant (setting unit:

S

3 -42

1-S OFF-DELAYTIMER

S [SOFFSet value = any register or constant (setting unit:1 s)

Timer register = M or D register

3 -44

Branching/conver-gence

, A branching or convergence symbol can be con-nected to any of the above relay instructions.

−g

.

y y

,.

LogicOperationI t ti

AND < & Integer designation of any register or constant ispossible.

3 -47

InstructionsOR > | Integer designation of any register or constant is

possible.3 -48

XOR ¨ ^ Integer designation of any register or constant ispossible.

3 -49

A


A -4


SymbolName

NumericOperationInstructions

INTEGER ENTRY ; Starts an integer operation.

⊦MW00280 + 00100⇒MW00220

3 -50

InstructionsREAL NUMBERENTRY

;; Starts a real number operation.

MW00280 + 00100⇒MW00220

3 -51

STORE ⇒ : Stores the operation result in the designated regis-ter.

3 -52

ADDITION + + Ordinary numeric addition (with operation error)

⊦MW00280 +00100⇒MW00220

3 -53

SUBTRACTION − − Ordinary numeric subtraction (with operation er-ror)

⊦MW00280 −00100⇒MW00220

3 -54

EXTENDEDADDITION

++ ++ Closed numeric addition (without operation error)

0→ 32767→ −32768→ 0

3 -55

EXTENDED SUB-TRACTION

− − − − Closed numeric subtraction (without operation er-ror)

0→ 32768→ −32767→ 0

3 -57

MULTIPLICA-TION

× * For integer and double integer, use × and ÷ in com-bination.

3 -58

DIVISION ÷ / 3 -59

MOD MOD MOD Gets the remainder of the division result.

⊦MW00100 × 0100 ÷ 00121MOD ⇒MW00101

3 -60

REM REM REM Gets the remainder of the division result.

MF00200 REM 1.5⇒MF00202

3 -61

INCREMENT INC INC Adds 1 to the designated register.

INC MW00100

3 -62

DECREMENT DEC DEC Subtracts 1 from the designated register.

DEC MW00100

3 -63

ADD TIME TMADD TMADD Addition of hours, minutes, and seconds

TMADD MW00000, MW00100

3 -64

NumericOperationInstructions

SUBTRACT TIME TMSUB TMSUB Subtraction of hours, minutes, and seconds

TMSUB MW00000, MW00100

3 -65

InstructionsSPEND TIME SPEND SPEND Calculates the elapsed time between two times.

SPEND MW00000, MW00100

3 -67

A

A -5


SymbolName

NumericConversionInstructions

SIGN INVERSION INV INV ⊦MW00100 INV

If MW00100 = 99, the operation result = −99.

3 -70

Instructions1’S COMPLE-MENT

COM COM ⊦MW00100 COM

If MW00100 = FFFFH, the operation result =0000H.

3 -71

ABSOLUTE VAL-UE CONVERSION

ABS ABS ⊦MW00100 ABS

If MW00100 = −99, the operation result = 99.

3 -71

BINARY CON-VERSION

BIN BIN ⊦MW00100 BIN

If MW00100 = 1234H (hexadecimal), the opera-tion result = 1234 (decimal).

3 -72

BCD CONVER-SION

BCD BCD ⊦MW00100 BCD

If MW00100 = 1234 (decimal), the operation re-sult = 1234H (hexadecimal).

3 -73

PARITY CON-VERSION

PARITY PARITY Calculates the number of binary bits that are ON.

If MW00100 PARITYMW00100 = F0F0H, theoperation result = 8.

3 -74

ASCII CONVER-SION 1

ASCII ASCII The designated character string is converted toASCII code and substituted in the register.

MW00200 “ABCDEFG”

3 -74

ASCII CONVER-SION 2

BINASC BINASC Converts 16-bit binary data to 4-digit hexadecimalASCII code.

BINASC MW00100

3 -76

ASCII CONVER-SION 3

ASCBIN ASCBIN Converts the numeric value indicated by a 4-digithexadecimal ASCII code to 16-bit binary data.

ASCBIN MW00100

3 -77

NumericComparison

< < <MW00000 < 10000

MB000010 3 -79ComparisonInstructions ≦ ≦ < =

MW00000 < 10000MB000010 3 -79

= = = IFON 3 -79

≠ ≠ < >

IFON

3 -79

≧ ≧ > = 3 -79

> > > 3 -79

RANGE CHECK RCHK RCHK Checks whether or not the value in the A register isin range.

⊦MW00100 RCHK −1000, 1000

3 -81

A


A -6


SymbolName

DataOperationInstructions

BIT ROTATIONLEFT and BITROTATIONRIGHT

ROTR

ROTL

ROTR

ROTL

Example: ROTR

Bit-addr Count WidthROTR MB00100A→ N = 1 W = 20

3 -83

MOVE BITS MOVB MOVB Source Desti. WidthMOVB MB00100A→MB00200A W = 20

3 -84

MOVE WORD MOVW MOVW Source Desti. WidthMOVW MB00100→MB00200 W = 20

3 -86

EXCHANGE XCHG XCHG Source1 Source2 WidthXCHG MB00100→ MB00200W = 20

3 -87

SET WORDS SETW SETW Desti. Data WidthSETW MW00200 D = 00000 W = 20

3 -89

BYTE-TO-WORDEXPANSION

BEXTD BEXTD Expands the byte data stored in the word registersinto words.

BEXTD MW00100 to MW00200 B = 10

3 -90

WORD-TO-BYTECOMPRESSION

BPRESS BPRESS Collects the lower bytes of the word data stored inthe word register area.

BPRESS MW00100 to MW00200 B = 10

3 -92

BINARY SEARCH BSRCH BSRCH Retrieves the register position that matches the datawithin the designated register range.

BSRCH MW00000 W = 20 D = 100 R =MW00100

3 -93

SORT SORT SORT Sorts registers within the designated register range.

SORT MW00000 W = 100

3 -95

BIT SHIFT LEFT SHFTL SHFTL Shifts the designated bit strings to the left.

SHFTL MB00100A N = 1 W = 20

3 -95

BIT SHIFT RIGHT SHFTR SHFTR Shifts the designated bit strings to the right.

SHFTR MB00100A N = 1 W = 2

3 -95

COPY WORD COPYW COPYW Copies the designated register range.

COPYW MW00100→MW00200 W = 20

3 -97

BYTE SWAP BSWAP BSWAP The upper and lower bytes of the designated wordare swapped.

BSWAP MW00100

3 -98

A

A -7


SymbolName

BasicFunctionInstructions

SQUARE ROOT SQRT SQRT Taking the square root of a negative number willresult in the square root of the absolute value mul-tiplied by −1.

MF00100 SQRT

3 -100

SINE SIN SIN Input = degrees

MF00100 SIN

3 -101

COSINE COS COS Input = degrees

MF00100 COS

3 -102

TANGENT TAN TAN Input = degrees

MF00100 TAN

3 -103

ARC SINE ASIN ASIN MF00100 ASIN 3 -104

ARC COSINE ACOS ACOS MF00100 ACOS 3 -105

ARC TANGENT ATAN ATAN MF00100 ATAN 3 -105

EXPONENT EXP EXP MF00100 EXP

e MF00100

3 -107

NATURAL LOG-ARITHM

LN LN MF00100 LN

loge (FM00100)

3 -108

COMMON LOG-ARITHM

LOG LOG MF00100 LOG

log10 (FM00100)

3 -109

A


A -8


SymbolName

DDCInstructions

DEAD ZONE A DZA DZA ⊦MW00100 DZA 00100 3 -110Instructions

DEAD ZONE B DZB DZB ⊦MW00100 DZB 00100 3 -111

UPPER/LOWERLIMIT

LIMIT LIMIT ⊦MW00100 LIMIT −00100 00100 3 -113

PI CONTROL PI PI ⊦MW00100 PI MA00200 3 -115

PD CONTROL PD PD ⊦MW00100 PD MA00200 3 -118

PID CONTROL PID PID ⊦MW00100 PID MA00200 3 -121

FIRST-ORDERLAG

LAG LAG ⊦MW00100 LAG MA00200 3 -125

PHASE LEAD/LAG

LLAG LLAG ⊦MW00100 LLAG MA00200 3 -127

FUNCTION GEN-ERATOR

FGN FGN ⊦MW00100 FGN MA00200 3 -129

INVERSE FUNC-TION GENERA-TOR

IFGN IFGN ⊦MW00100 IFGN MA00200 3 -132

LINEAR ACCEL-ERATOR/DECEL-ERATOR 1

LAU LAU ⊦MW00100 LAU MA00200 3 -135

LINEAR ACCEL-ERATOR/DECEL-ERATOR 2

SLAU SLAU ⊦MW00100 SLAU MA00200 3 -139

PULSE WIDTHMODULATION

PWM PWM ⊦MW00100 PWM MA00200 3 -146

A

A -9


SymbolName

Table DataOperation

TABLE READ TBLBR TBLBR TBLBR TBL1, MA00000, MA00100 3 -149OperationInstructions TABLE WRITE TBLBW TBLBW TBLBW TBL1, MA00000, MA00100 3 -150Instructions

ROW SEARCH TBLSRL TBLSRL TBLSRL TBL1, MA00000, MA00100 3 -152

COLUMNSEARCH

TBLSRC TBLSRC TBLSRC TBL1, MA00000, MA00100 3 -153

TABLE CLEAR TBLCL TBLCL TBLCL TBL1, MA00000 3 -154

TABLE BLOCKMOVE

TBLMV TBLMV TBLMV TBL1, TBL2, MA00000 3 -155

QUEUE TABLEREAD

QTBLR QTBLR QTBLR TBL1, MA00000, MA00100 3 -157

QUEUE TABLEREAD AND IN-CREMENT

QTBLRI QTBLRI QTBLRI TBL1, MA00000, MA00100 3 -157

QUEUE TABLEWRITE

QTBLW QTBLW QTBLW TBL1, MA00000, MA00100 3 -159

QUEUE TABLEWRITE AND IN-CREMENT

QTBLWI QTBLWI QTBLWI TBL1, MA00000, MA00100 3 -159

QUEUE POINTERCLEAR

QTBLCL QTBLCL QTBLCL TBL1 3 -161

StandardSystemF ti

DATA TRACEREAD

DTRC-RD DTRC-RD Data readout from data trace memory to usermemory

5 -3

FunctionsTRACE TRACE TRACE Data trace execution control 5 -7

FAILURE TRACEREADOUT

FTRC-RD FTRC-RD Data readout from failure trace memory to usermemory

5 -9

SEND MESSAGE MSG-SND MSG-SND Sending a message from a Communication Mod-ule

5 -18

RECEIVE MES-SAGE

MSG-RCV MSG-RCV Receiving a message from a Communication Mod-ule

5 -31

COUNTER COUNTER COUNTER Increments or decrements a counter. 5 -39

FIRST-IN FIRST-OUT

FINFOUT FINFOUT First-in, first-out 5 -40

INVERTERTRACE READ

ITRC-RD ITRC-RD Reads inverter trace data to store it in user memory. 5 -15

INVERTERCONSTANTWRITE

ICNS-WR ICNS-WR Writes inverter constant. 5 -41

INVERTERCONSTANTREAD

ICNS-RD ICNS-RD Reads inverter constant to register. 5 -45

A

Revision History

The revision dates and numbers of the revised manuals are given on the bottom of the back cover.

MANUAL NO. SIEZ-C887-1.2Published in Japan October 1998 98-7

Date of publication

Date of original publication

Revision number 1

Date of Publication

Rev. No. Section Revised Contents

June 2011 Front cover Revision: Format

Back cover Revision: Address, format

December 2009 – Based on Japanese user’s manual, SI-C887-1.2E <17> published in October 2009.

Preface Revision: General precautionsAddition: PL on fumigation and warranty

1.3 Addition: Characteristics of registers in user functions

2.3.2Revision: Integer input for registers in functionsAddition: Notes on the use of registers (X, Y, Z, and D) in functions

5.2 Revision: Definition of TRACE function

Back cover Revision: Address

October 2008 Back cover Revision: Address

March 2007 – Based on Japanese user’s manual, SI-C887-1.2D <14> published in July 2006.


April 2006 – Based on Japanese user’s manual, SI-C887-1.2D <13> published in February 2006.

3.3.1 Revision: RSSEL, MDSEL, and STS designations

August 2005 Back cover Revision: Address

March 2005 All chapters Completely revised


June 2003 Back cover Revision: Address

December 2002 Back cover Revision: Address

February 2001 All chapters Completely revised

October 1998 All chapters Partly revised

July 1998 – – First edition

11

10

9

8

7

6

5

4

3

2

1

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Published in Japan June 2011 98-7

MANUAL NO. SIEZ-C887-1.2C

10-10-411 -0

YASKAWA ELECTRIC CORPORATION

USER'S MANUALLADDER PROGRAMMING

Machine Controller MP900/MP2000 Series

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