LTC4450 (Rev. 0)

LTC4450

1Rev. 0

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TYPICAL APPLICATION

FEATURES DESCRIPTION

18V, 12A Ideal Diode

The LTC®4450 is a high performance Schottky diode replacement using an integrated N-Channel power MOSFET. It easily ORs power supplies together to increase system reliability and prevent reverse conduction.

The LTC4450 regulates the forward voltage at 15mV to minimize power loss compared to Schottky diodes. Regulation ensures smooth current transfer without oscil-lation in diode-OR applications. When the power MOSFET is fully enhanced, the RDS(ON) of the transistor is 7mΩ and rated for forward conduction up to 12A while dissipating 1W. A high performance gate driver with fast transient response minimizes both forward power dissipation and reverse current. The VCC input allows VIN to work down to ground for low voltage applications. The LTC4450 is available in a small 16-Lead 2mm × 3mm LQFN Package.

Power Dissipation vs Load Current

APPLICATIONS

n Reduces Power Dissipation by Replacing a Power Schottky Diode with No External Components

n Internal 12A, 7mΩ N-Channel MOSFET n 15mV Regulated Forward Voltage n 20µA Operating Current, 0.8µA Shutdown n Wide 0V to 18V Input Range with VCC > 2.75V n Fast Turn-ON Minimizes Voltage Droop n Fast Reverse Recovery Time Minimizes Reverse

Transient Current n Smooth Switchover in Diode-OR Applications n 16-Lead 2mm × 3mm LQFN Package

n Schottky Diode Replacement n Industrial, Medical and Consumer Portable Devices n Battery and Wall Adapter Diode-ORing All registered trademarks and trademarks are the property of their respective owners.

POWER SAVED

B520 SCHOTTKYLTC4450

LOAD CURRENT (A)0 2 4 6 8 10 12

0

1

2

3

4

5

6

7

POW

ER D

ISSI

PATI

ON (W

)

4450 TA01b

LTC4450

GND

OUTIN

VCC

VOUT12V, 12A

SHDN#

VIN12V

4450 TA01a

STATUS STATUSOUTPUT

0.1μF

https://www.analog.com/LTC4450?doc=LTC4450.pdf

https://www.analog.com

https://form.analog.com/Form_Pages/feedback/documentfeedback.aspx?doc=LTC4450.pdf&product=LTC4450&Rev=0



LTC4450

2Rev. 0

For more information www.analog.com

PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS

Supply Voltages IN, OUT, SHDN#, STATUS ..................... –0.3V to 20V VCC .......................................................... –0.3V to 6VIN to OUT (Note 3) .................................... –20V to 0.3VOperating Junction Temperature Range LTC4450A .......................................... –40°C to 125°CStorage Temperature Range .................. –65°C to 150°C

(Note 1)

ORDER INFORMATION

TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTIONMSL

RATING TEMPERATURE RANGE

LTC4450AV#TRMPBF LTC4450AV#TRPBF LHKJ 16-Lead (2mm × 3mm) Plastic LQFN 3 –40°C to 125°C

Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

1

2

3

4

5

6

VCC

IN

IN

IN

IN

IN

14

13

12

11

10

9

GND

OUT

OUT

OUT

OUT

OUT

TOP VIEW

16 15

7 8

SHDN

#

STAT

US

IN

OUT

LQFN PACKAGE16-LEAD (2mm × 3mm × 0.75mm)

MSL RATING 3, θJA = 45°C/W, θJC = 7°C/W



https://www.analog.com/media/en/package-pcb-resources/package/tape-reel-rev-n.pdf

LTC4450

3Rev. 0


ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

The l denotes the specifications which apply over the full junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VCC = 0V, SHDN# = 12V, IOUT = 50mA, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VIN Operating Voltage Range 2.75V < VCC < 5.5V l

l

0 2.75

18 18

V V

IIN VIN Net Current VIN = 2.75V, VCC = 5.5V SHDN# = 0V, IOUT = 10µA

l

l

l

20 0.5 0.8

40 5 5

µA µA µA

VCC Operating Supply Range l 2.75 5.5 V

ICC VCC Current VIN = 2.75V, VCC = 5.5V VIN = 12V, VCC = 5.5V SHDN# = 0V, IOUT = 10µA, VCC = 5.5V, VIN = 0V

l

l

l

20 0

0.8

45 1

2.5

µA µA µA

IREV N-Channel Reverse Leakage Current VIN = 0V, VOUT = 18V 10 µA

RDS(ON) N-Channel MOSFET On-Resistance IOUT = 12A l 7 15 mΩ

∆VFWD Forward Regulation Voltage (VIN − VOUT) l 5 15 25 mV

∆VBODY Body Diode Forward Voltage Drop SHDN# = 0V l 0.25 0.6 0.95 V

tON Fast Turn-On Time IOUT Step from 50mA to 6A, VIN – VOUT Settles to within 25mV of IOUT • RDS(ON)

l 0.3 1 µs

tOFF Fast Turn-Off Time VFWD = 15mV Step to –500mV, Reverse Current <40mA

l 0.45 2 µs

tSTART Start-Up Time SHDN# Rising Edge to (VIN – VOUT) < 200mV l 250 550 µs

tSHDN# SHDN# Turn-Off Delay SHDN# Falling Edge to STATUS Falling Edge l 10 20 µs

VSHDN#(TH) SHDN# Threshold SHDN# Falling l 0.4 0.85 1.3 V

VSHDN#(HYS) SHDN# Hysteresis 70 mV

VSTATUS(VOL) STATUS Output Voltage Low ISTATUS = 1mA, SHDN# = 0V ISTATUS = 3mA, SHDN# = 0V

l

l

0.25 0.7

0.5 1.4

V V

ILEAK SHDN#, STATUS Leakage Current V = 18V l ±1 µA

Note 2: All currents into pins are positive, all voltages are referenced to GND unless otherwise specified.Note 3: This voltage is set by the MOSFET’s body diode and will safely exceed 0.3V during start-up for a limited time determined by the body diode thermal dissipation.



LTC4450

4Rev. 0


TYPICAL PERFORMANCE CHARACTERISTICS

VIN Current in Regulation VCC Current in Regulation VIN Current in Shutdown

VCC Current in ShutdownOUT Reverse Leakage vs Temperature

STATUS Output Low Voltage vs Current

MOSFET RDS(ON) vs TemperatureForward Regulation Voltage vs Temperature

MOSFET Turn-Off Time vs Final Overdrive

VCC = 0V

VIN (V)0 4 8 12 16 20

0

5

10

15

20

25

30

35

I IN (µ

A)

IN

4450 G01

–40°C

125°C

25°C

VIN = 0V

VCC (V)0 1 2 3 4 5 6

0

5

10

15

20

25

30

35

I CC

(µA)

CC

4450 G02

–40°C

125°C25°C

SHDN# = 0V

VIN (V)0 4 8 12 16 20

0

0.5

1.0

1.5

2.0

2.5

I IN (µ

A)

IN

4450 G03

–40°C

25°C

125°C

SHDN# = 0V

VCC (V)0 1 2 3 4 5 6

0

0.5

1.0

1.5

2.0

2.5

I CC

(µA)

VCC Current in Shutdown

4450 G04

–40°C

125°C

25°C

OUT = 0.1VOUT = 1VOUT = 10VOUT = 18V

TEMPERATURE (°C)–50 –25 0 25 50 75 100 125

0.01

0.1

1

10

100

500

I VOU

T (µ

A)

4450 G05

VIN = 12V

ISTATUS (mA)0 1 2 3 4 5

0

0.5

1.0

1.5

2.0

V STA

TUS(

VOL)

(V)

STATUS Output Low Voltage vs. Current

4450 G06

–40°C

125°C25°C

VIN = 12V, IFWD = 12A

TEMPERATURE (°C)–50 –25 0 25 50 75 100 125

5

6

7

8

9

10

R DS(

ON) (

mΩ

)

4450 G07

VIN = 12V, IFWD = 50mA

TEMPERATURE (°C)–50 –25 0 25 50 75 100 125

10

12

14

16

18

20

∆VFW

D (m

V)

vs. Temperature

4450 G08

VIN = 12V∆VFWD = 20mV, STEP TO VFINAL

VFINAL (V)0 –0.2 –0.4 –0.6 –0.8 –1

300

500

700

900

1100

1300

1500

1700

T OFF

(ns)

FET Turn-Off Time vs. Reverse Voltage

4450 G09



LTC4450

5Rev. 0


PIN FUNCTIONSGND (Pin 14): Device Ground.

IN (Pins 2 - 7): Input Voltage and Positive Supply. IN is the ideal diode anode and source of the internal N-channel MOSFET. Connect these pins to the power supply input that delivers power to the load. Bypass with a 0.1µF or larger capacitor to suppress load transients.

OUT (Pins 8 - 13): Output Voltage. OUT is the ideal diode cathode and drain of the internal N-channel MOSFET. This is the common output when multiple LTC4450s are diode OR-ed. Bypass with a 0.1µF or larger capacitor.

SHDN# (Pin 16): Shutdown Control Input. Driving this pin below 0.4V (VSHDN#(TH)) disables the internal MOSFET between IN and OUT and lowers the current consumption of LTC4450 below 5µA. STATUS is pulled low to indicate that the LTC4450 is disabled. When driven low, a con-nection from IN to OUT still exists through the MOSFET’s body diode. Driving SHDN# above 0.85V (VSHDN#(TH)) + 0.07V (VSHDN#(HYS)) enables the LTC4450, allowing it to

operate as an ideal diode. Connect to the highest on IN or VCC or when not used. If the highest supply voltage is changing over time due to supplies being swapped in and out, connect SHDN# to a diode-OR of IN and VCC when not used.

STATUS (Pin 15): Gate Status Output. STATUS pulls low when the gate of the N-channel MOSFET is pulled low indicating that the LTC4450 operates in reverse bias or in shutdown. Otherwise, STATUS pulls high indicating that the LTC4450 is operating in forward bias. Connect through a pull-up resistor to the highest of IN or VCC. If the highest supply voltage is changing over time due to supplies being swapped in and out, connect to a diode-OR of IN and VCC. Leave open or tie to GND when not used.

VCC (Pin 1): Positive Supply Input. This pin provides aux-iliary power for the LTC4450 when VIN < 2.75V. Connect to ground if unused.

BLOCK DIAGRAM

GND

IN

VCC

CHARGEPUMP

CPO

SHDN#

0.85V

4450 BD

OR

15mV

INTERNALN-CHANNEL MOSFET

OUT

STATUS

+–

–

+

+ –OTA

OR



LTC4450

6Rev. 0


OPERATIONThe LTC4450 is an 18V Schottky diode replacement con-sisting of an integrated N-channel power MOSFET and controller. The ideal diode regulates the forward voltage to 15mV to minimize power loss and ensure smooth current transfer without oscillation in diode-OR applications. The power MOSFET can deliver up to 12A output current from its input supply with a forward conduction resistance of 7mΩ when fully enhanced.

The LTC4450 features a high performance precision OTA which senses the voltage on the IN and OUT pins and drives the power MOSFET gate in regulation. The OTA senses when the forward voltage drop across the power MOSFET is sufficiently large and drives its gate to achieve full enhancement within 1µs. When the power MOSFET is fully enhanced, the forward voltage drop is equal to RDS(ON) • IOUT. The OTA also senses when reverse conditions are present and drives the gate of the power MOSFET to IN within 1µs to disable the ideal diode allow-ing the LTC4450 to have a fast reverse recovery time.

The STATUS open-drain output pulls low when the gate of the N-Channel MOSFET is pulled low indicating that

the LTC4450 operates in reverse bias or in shutdown. Otherwise, STATUS pulls high indicating that the LTC4450 is operating in forward bias. Connect STATUS to an external supply through a pull-up resistor. Leave open when unused.

When the SHDN# pin is pulled below 0.4V (VSHDN#(TH)), the gate drive for the power MOSFET is disabled and the LTC4450 enters a low current state. STATUS is pulled low and the power MOSFET body diode conducts the load current under forward biased condition. A SHDN# low to high transition allows the LTC4450 to power up and operate normally.

IN can operate down to 0V when the VCC auxiliary supply voltage is above 2.75V. When either IN or VCC exceeds 2.75V the LTC4450 activates an internal burst-mode charge pump to drive the gate of the N-Channel power MOSFET. The burst-mode charge pump requires tSTART to turn on. During that delay the power MOSFET body diode conducts the load and inrush current if forward biased.

APPLICATIONS INFORMATIONBlocking diodes, commonly implemented by Schottky diodes, are typically placed in series with supply inputs for the purpose of ORing redundant power sources and protecting against supply reversal. The LTC4450 replaces diodes in these applications. Under forward conduction both the voltage drop and power loss are greatly reduced compared to a passive solution. When blocking voltage under reverse bias, the LTC4450 has significantly less reverse leakage than a typical Schottky diode.

The LTC4450 has a wide operating voltage range of 2.75V to 18V. When an auxiliary supply voltage is connected to VCC the ideal diode can operate down to 0V making it ideal for applications that must tolerate large voltage transients.

Ideal diodes, like their non-ideal counterparts, exhibit a behavior known as reverse recovery. The presence of par-asitic input inductance may cause large and potentially

damaging reverse recovery current spikes during a reverse mode commutation. Spikes and protection schemes are discussed in detail in the Input Short-Circuit Faults section.

It is important to note that the SHDN# pin, while disabling the LTC4450 and reducing its current consumption, does not disconnect the load from the input since the internal MOSFET’s body diode is ever-present.

Paralleling Supplies (Diode-OR)

In many electrical systems, it is common to have a backup power source in addition to the primary power source. When the primary power source droops or is removed, the system runs from the backup power source. The outputs of two or more LTC4450s can be combined for redundancy or for droop sharing as shown in Figure 1.



LTC4450

7Rev. 0


Figure 1. Redundant Diode-OR Power Supplies

For redundant supplies, the highest input supply voltage conducts all or most of the load current. If this supply’s voltage droops or is short-circuited, the ideal diode senses the reverse condition and activates a fast pull-down of the gate of the internal N-Channel MOSFET. The LTC4450 can withstand a reverse voltage of up to 18V differential between its power supply and output.

The reverse recovery time is dependent on the high per-formance OTA’s transient response and gate slew rate. The reverse recovery current may cause the input supply voltage to rise, with the amount of voltage rise dependent on the input supply’s impedance. The safest course of action is to use capacitors on the input supply whose volt-age rating is higher than the highest voltage in the system, or to consider protecting those capacitors with a TVS, for example.

Following a supply transient, the output voltage droops until the ideal diode connected to the next highest supply detects a forward condition and enhances the gate of its N-Channel MOSFET. The OTA regulates the forward drop to 15mV (∆VFWD). If a larger forward drop is detected the LTC4450 fully enhances the gate of its N-Channel MOSFET within 0.3µs (tON) typical from a regulation condition and 3µs from a reverse bias condition.

To ensure there is minimal droop at the output, select a low ESR capacitor large enough to ride through the fast-on delay time. A low ESR bulk capacitor will reduce IR drops to the output voltage while the load current is

sourced from the capacitor. Use Equation 1 to calculate the value of the load capacitor that will ride through the fast-on delay time from reverse mode.

CLOAD ≥

ILOAD(MAX) •3µs

∆VOUT(DROOP) −ESR•ILOAD(MAX) (1)

Shutdown Mode

Driving SHDN# below 0.4V (VSHDN#(TH)) reduces the cur-rent consumption of the part to less than 5µA and pulls the gate of the internal N-Channel MOSFET to IN to dis-able it. The STATUS pin is pulled low to indicate that the LTC4450 is disabled.

Shutdown does not interrupt forward current flow since a path is still present through the internal MOSFET’s body diode. The forward voltage drop is 0.6V (∆VBODY) and power dissipation increases for a given load current. The LTC4450 enters a shutdown state within 20µs (tSHDN#) of a SHDN# falling edge. Driving SHDN# above 0.85V (VSHDN#(TH)) + 0.07V (VSHDN#(HYS))(typical) enables the gate driver allowing the LTC4450 to operate as an ideal diode. In shutdown the internal charge pump and gate drive are disabled. The part requires 250µs (tSTART) to re-activate the charge pump and fully enhance the gate of the N-Channel MOSFET.

If the shutdown feature is not needed then connect the pin to an external supply voltage above 1.5V. SHDN# may be driven with a 3.3V or 5V logic signal or with an external pull-down transistor and pull-up resistor to an external supply as shown in Figure 2. Ensure that the pull-up resis-tor is low enough such that the pull-up current overcomes any leakage present at this pin. If capacitive coupling onto the SHDN# pin is a concern, a capacitor to ground can be included.

APPLICATIONS INFORMATION

Figure 2. External SHDN# Control

R1

M1

LTC4450

GND

OUTIN

SHDN#

VIN2.75V TO 20V

CAPACITOR(OPTIONAL)

4450 F02ONOFF

4450 F01

CLOAD

LTC4450

GND

OUTINVOUT

VINA12V

LTC4450

GND

OUTINVINB12V

CIN10.1μF

CIN20.1μF



LTC4450

8Rev. 0


Input Short-Circuit Faults

The dynamic behavior of an active LTC4450 ideal diode entering reverse bias mode is most accurately character-ized by a delay followed by a period of reverse recovery. During the delay phase, when the gate driver is disabling the internal N-Channel MOSFET, a reverse current is pres-ent from OUT to IN. The magnitude of this current depends on the timing of the part, reverse voltage and parasitic impedances along the power path. After reverse recovery, energy stored in the parasitic inductances is transferred to other elements in the circuit, resulting in high current transients and potentially destructive voltage spikes.

High slew rates coupled with parasitic inductances in series with the input and output paths may cause poten-tially destructive transients to appear at the IN and OUT pins of the LTC4450 during reverse recovery.

A zero impedance short-circuit directly across the input and ground is especially troublesome because it permits the highest possible reverse current to build up during the delay phase. When the internal MOSFET turns off to interrupt the reverse current, the LTC4450 IN pin experi-ences a negative voltage spike while the OUT pin spikes in the positive direction.

To prevent damage to the LTC4450 under conditions of an input short-circuit, protect the IN and OUT pins as shown in Figure 3. The IN pin is protected by clamping to the GND pin with a Schottky diode. Negative spikes, seen after the MOSFET turns off during an input short are clamped by D1. D1 and COUT absorb the reverse recovery energy and protect the LTC4450. When the input short condition disappears, the current stored in the parasitic inductance, LS, flows through the body diode of the MOSFET charging up CLOAD. If CLOAD is small or nonexistent, both the IN and OUT pins may rise to a level that can damage the LTC4450. In this case, D1 needs to be a TransZorb or TVS to limit the voltage difference between the IN and GND pins.

OUT is protected by the MOSFET’s avalanche breakdown and COUT. Nevertheless, the internal MOSFET could be damaged by excessive current in higher voltage applica-tions. A TVS (D2) also can be used to protect the MOSFET and OUT pin. COUT preserves the fast turn-off time when output parasitic inductance causes the IN and OUT volt-ages to drop quickly.


Figure 3. Input Short Protection Circuit with Parasitic Inductances

COUTSW D2(OPTIONAL)

CLOADD1MBRS1201A20V

LTC4450

GND

OUTINVOUTVIN

INPUTSHORT

SWITCH

INPUT PARASITICINDUCTANCE

OUTPUT PARASITICINDUCTANCE

REVERSERECOVERY CURRENT

SOURCE PARASITICINDUCTANCE

LS LIN LOUT

4450 F03

+ –+ –+ –

CIN10.1μF



LTC4450

9Rev. 0


Automatic PowerPath™ Control

Figure 4 illustrates an application circuit for automatic switchover of a load between a battery and a wall adapter. With application of the battery, VOUT will initially be pulled up by the drain-to-body diode of the LTC4450’s internal power MOSFET. Typically, 250µs (tSTART) after application of the battery, the LTC4450 will turn on its power MOSFET, reducing the IN-to-OUT voltage drop from a diode voltage to 15mV. Should the wall adapter then be applied, MP1’s body diode will pull the VOUT voltage above the battery

voltage, and the LTC4450 will turn off its power MOSFET. At the same time, the LTC4450 will sink current into the STATUS pin, turning on MP1 and reducing the voltage drop from the wall adapter to VOUT.

For wall adapter and/or battery voltages exceeding 5.5V, a voltage source ranging from 2.75V to 5.5V must be generated from VOUT to power VCC, as shown by devices RCL, DZ1 and MN1 in Figure 5. DCL1 and STAT2 are used to clamp MP1’s VGS voltage to 5V.

Figure 4. Automatic Switchover of Load Between a Battery and a Wall Adapter with Auxiliary P-Channel MOSFET In a Low Voltage Application

Figure 5. Automatic Switchover of Load Between a Battery and a Wall Adapter with Auxiliary P-Channel MOSFET in a High Voltage Application


Si4465DY COUT47µF

RSTAT11k

VOUT

BATTERYCELL INPUT

(UP TO 3.7V)

SHDN#

GND

LTC4450

STATUS

VCC

IN OUT

WALLADAPTER

INPUT (5V) MP1

4450 F04

CIN10.1μF

FDS4465 C147µF

RSTAT11k

RSTAT210k

RCL10k

MN12N7002

VOUT

SHDN#

GND

STATUS

VCC

IN OUT

DCL1BZX84C5V1L

5V GENERATED FROM VOUT

MP1

DZ1BZX84C5V1L

4450 F05

BATTERYINPUT(7.2V)

WALLADAPTER

INPUT (12V)

LTC4450

CIN10.1μF



LTC4450

10Rev. 0


Layout Considerations

High current applications demand careful attention to trace resistances. The PCB trace associated with the IN/OUT pins should have low resistance to reduce conduc-tion power loss. Keep the traces to the IN and OUT pins wide and short to minimize resistive losses. To ensure a low contact resistance, solder the device’s IN/OUT pins to the board using a reflow process. Include holes underneath the exposed pads to keep solder in place to


Figure 6. Recommended Layout

avoid high voltage shorts between pins. The wide IN/OUT traces also act as a heat sink to remove the heat in the presence of a high current load. Place COUT, surge sup-pressors and necessary transient protection components close to the LTC4450 using short lead lengths. Transient voltage suppressors should have short wide traces to GND. Place decoupling capacitors close to the IN and VCC pins. Figure 6 shows the recommended PCB layout for the LTC4450. The temperature rise of the recommended PCB layout with 6A load current is 25°C.

SHDN

#

STAT

US

VIN VOUT

GND

GND

CVCC

GND

COUTOPTIONALTVS OR SCHOTTKY

1

2

3

4

5

6

VCC

IN

IN

IN

IN

IN

14

13

12

11

10

9

GND

OUT

OUT

OUT

OUT

OUT

16 15

7 8

IN

OUT

4450 F06

CIN



LTC4450

11Rev. 0


TYPICAL APPLICATIONS12V Diode-OR with Reverse Recovery Protection

5V Diode-OR with Reverse Voltage Protection

VOUT

D1MMBD717

CLOAD100μF120mΩ ESR

CIN10.1μF

LTC4450

GND

OUTIN

SHDN#

VCC

STATUS N/C

GND

OUTIN

SHDN#

VCC

STATUS N/C

4450 TA04D2MMBD717

VINA5V

VINB5V

LTC4450

CIN20.1μF

VOUT

VCC

SHDN#

GND

LTC4450

IN OUTVINA12V

VCCGND

LTC4450

IN OUT

CLOAD100µF120mΩ ESR

SHDN#

STATUS NC

STATUS NC

VINB12V

4450 TA03

MBRS1201A20V

MBRS1201A20V

CIN10.1μF

CIN20.1μF



LTC4450

12Rev. 0


1.2V Diode-OR Using Auxiliary Supply to VCC for Low Voltage Operation

TYPICAL APPLICATIONS

12V Output Disconnect Switch Controlled by LTC2965

ENABLE

R1294k

R2121k

R3590k

R4120

R510k

R62k

C10.1µF

CSS6.8nF

CLOAD33µF

VOUT12V

SHDN#

GND

LTC4450

STATUS

VCC

M1FDS4465IN OUT

Q22N2222SOT-23

D1BZX84C6V2L

Q12N2222SOT-23

30mΩ ESR(OPTIONAL)

REF

INH

INL

GND

OUT

VIN

LTC2965

RSPS

OPTIONAL CONNECTION

UV THRESHOLD = 7VUV HYSTERESIS = 3V (10V RISE)

4450 TA06

VOUT

CLOAD82μF30mΩ ESR

LTC4450

GND

OUTIN

SHDN#

STATUS N/C

4450 TA05

LTC4450

GND

OUTIN

STATUS N/C

VCC

SHDN#

VCC

VINA1.2V

VAUX2.75V

TO 5.5V

VINB1.2V

CIN20.1μF

CIN10.1μF



LTC4450

13Rev. 0


Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

PACKAGE DESCRIPTION

0.15

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0.65

0.01

0.30

0.22

NOM

0.75

0.02

0.40

0.25

2.00

3.00

0.50

0.25

REF

0.50

REF

MAX

0.85

0.03

0.50

0.28

0.10

0.10

0.10

0.15

0.08

NOTE

S

PAD

DIM

ENSI

ON

SUBS

TRAT

E TH

KM

OLD

CAP

HT

DIM

ENSI

ONSZ

A1 DETA

IL C

NOTE

S:1.

DIM

ENSI

ONIN

G AN

D TO

LERA

NCIN

G PE

R AS

ME

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5M-1

994

2. A

LL D

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S AR

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MIL

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PACK

AGE

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INE



LTC4450

14Rev. 0

For more information www.analog.com ANALOG DEVICES, INC. 2021

09/21www.analog.com

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CIN10.1μF

















Documents

LTC4450 (Rev. 0)