Upload
ngodang
View
214
Download
0
Embed Size (px)
Citation preview
1
Low-Power Oscillator Design
Presented byKen PedrottiUniversity of CaliforniaSanta Cruz, CA 95064
831-459-1229 Phone831-459-4829 [email protected]
Notes for Mead course on Low-Power Oscillator Design Santa Cruz, CA 95064
2
3
Outline•A quick history of accurate time keeping
•Analogies to Electrical Oscillators
•Oscillator Fundamentals
•Amplitude Limiting
•Phase Noise and Figure of Merit
•Colpitts Oscillator
•Single Transistor Oscillators
•Differential Oscillators
•Low Power, Low Phase Noise Differential Oscillator Design Example
•Bonus Material
•Rotary Traveling Wave Oscillators
4
Oscillator fundamentals
Characterized principally by its natural frequency and how wide a range of frequencies it will respond to resonantly its resonance response (Q or Quality Factor)
High Q implies oscillator puts out a narrow range of frequencies and is difficult to “disturb”
Energy of systemQ=2Energy lost per period
Rff
π ≈Δ
5
Ancient Oscillator: Verge and Foliot
Verge and Foliot
•Period directly dependent on power source
•No resonator
•Low Energy Storage
•Accuracy Measured in Hours per day
•Electrical Analog:Ring Oscillators
From Horology Room, British Museum, Fusees and Escapements
6
Ring Oscillator
01
pLH pHL
f nτ τ
=+
N must be odd to insure oscillation
For startup the small signal gain of each stage viewed as an amplifier must be greater than 1.
7
Wien bridge oscillator
1 2
1 2
2a b
R RC CR R
===
If
01
RCω =
The the bridge will be in balance at
Vin will then be in phase with Vout so we have positive feedback around the loop. The loop gain will be >1 as long as Ra>2Rb
RC
RLC
+
-
R1
Ra
RbR2
C1
C2
Amplitude
Phase
8
Major Advance Add a Resonator
Pendulum added by Christian Huygens
•The pendulum acts as a resonator and energy storage device
•Less sensitivity to the power source
•Power variation results in amplitude change but little change in period
•Pendulum still in constant contact with power source, this is bad
Electrical Analogy
•LC oscillator at low amplitude (constant power input)
9
Impulsing a Pendulum:Anchor Escapement•Greatly improved on the Verge
•Allowed much smaller amplitude swings, pendulum became more isochronous
•Allowed longer slower moving pendulums, less loss: higher Q
•Disadvantage still highly coupled to Power source so noise in gearing and spring directly leads to phase noise in the resonator.
•Pendulum is never swinging entirely free
www.angelfire.com/ut/horology/escapement.html
10
Deadbeat EscapementContact surfaces curved to better isolate the pendulum from the variable power source
First to separate the locking and impulsingfunction
11
Impulsing a Pendulum:Gravity Escapement
With the gravity escapement the resonator was detached from the power source.
One arm unlocks the escape wheel which rather than impulsing the pendulum directly raises the arm that is not in contact.
The impulse is provided when the arm ends at a lower height than when it starts.
Impulse supplied at the wrong time i the cycle
Electrical lesson: isolate your drive from the power source.
12
Riefler ClockInvar Pendulum Rod (Low Thermal Expansion)
Pendulum highly detached, impulsed solely through suspension point.
Evacuate housing for low loss, high Q and environmental isolation
Powered using a remontoire, a small weight that was rewound by an electric motor every 30 sec.
Accuracy 10 ms/day
Electrical Analogy:
Careful attention to isolate from PVT, High Q, optimal impulsing time.
13
Demise of the Pendulum
Balance Wheels and Springs let to a truly harmonic resonator.
This shifted design emphasis to the escapement and constancy of the power train.
14
Summary:Your first clock will be a thermometer
And if you are really good your final clock will be a seismometer
Your next clock will be a barometer
And what does this mean for oscillators?
A good design will
•Use a high Q resonator
•Interact minimally with the power source
•Be impulsed at the optimum time
•Tolerate PVT variations
15
Over Damped Oscillator
2
2 ld V dVV LC LGdt dt
= − −
H(ω)
VoutG
jω
σ
ω0
R
+900
-900
H(ω)
2 1 0LCs LGs+ + =
16
Under damped Oscillator
2
2 0gd V dVLC LG Vdt dt
− + =
H(ω)
VoutG
jω
σ
ω0
R
+900
-900
H(ω)
2 1 0gLCs LG s− + =
17
Critically Damped
H(ω)
VoutG
jω
σ
ω0
R
+900
-900
H(ω)
L C
2
2 0d Vdt
LC V+ =
2 1 0LCs + =
Position
Velocity
Acceleration
18
Van der Pol ApproximationL C
[ ]2
2 ( ) 0ld V dLC L GV F V Vdt dt
+ + + =
2
2 0d VLC Vdt
+ =
2
2 0ld V dVLC LG Vdt dt
+ + =
L C Gl F(v)
2 1 0LCs + =
L C Gl2 1 0LCs LGs+ + =
V
F(v)
3( ) g satF V G V G V= − +
23
2 0l g satd V dLC L GV G V G V Vdt dt
⎡ ⎤+ − + + =⎣ ⎦
19
Amplitude limitation
• Directly through the gain saturation • Indirectly via a bias shift
• Startup Condition:
23
2 0l g satd V dLC L GV G V G V Vdt dt
⎡ ⎤+ − + + =⎣ ⎦
As amplitude grows eventually this term wins
Gain term
Loss term
( ) 1g lL G GC
− ≥1 1( ) exp( ( ) ) cos( )2 g l
LV t A G G t tC LC
= −
20
HP 200C Audio Amplifier
http://oak.cats.ohiou.edu/~postr/bapix/HP200C.htm
1943 Catalog Copy
The lamp served as a non-linear resistance that was used to stabilize the output amplitude
21
Oscillator Figure of Merit
( )
( )mWin Power
frequencycenter from offset at noise PhaseFrequencyCenter fromOffset
FrequencyCenter Oscillator
1
==
==
⎟⎠⎞
⎜⎝⎛=
PL
PLFOM
o
o
ωωωω
ωωω
So for a low power design what we mean is low phase noise for a given power
22
Oscillator Phase Noise Phase Noise:
Caused by fluctuations in the oscillator
Qualified by sideband power over carrier power (unit dBc/Hz):
{ } ( )⎥⎦
⎤⎢⎣
⎡ Δ+=Δ
carrier
osidebandtotal P
HzwwPwL
1,log10
α Ps
α Pnoise
1/f3
1/f2
L{Δ w}
Log(f)31/ f
ω
1/f noise
Thermal noise in the oscillatorThermal noise in the external circuit eg. 50 Ohm line
23
Leeson’s Model
32
1/0
0
2{ } 10log 1 12
Signal power Oscillation Frequency Frequency offset from the carrier Quality factor of the fully loaded resonator
F= Devic
f
s L
S
L
FkTL wP Q
P
Q
ωωω ω
ωω
⎛ ⎞⎡ ⎤ ⎛ ⎞⎛ ⎞⎜ ⎟⎢ ⎥Δ = + +⎜ ⎟⎜ ⎟ ⎜ ⎟⎜ ⎟Δ Δ⎢ ⎥⎝ ⎠ ⎝ ⎠⎣ ⎦⎝ ⎠=
=Δ =
=
3 3 21/
e excess noise factor (empirical)1 1= Corner frequency between and regions (also empirical)f ff
ω
1/f3
1/f2
L{Δ w}
Log(f)31/ f
ω
Leeson’s model is commonly used to represent the phase noise in oscillators. It does capture the empirical behavior but relys on “fitting factors” that are not in general known apriori.
This model is based on a Linear Time Invarient (LTI) analysis with the empirical inclusion of the 1/f noise which cannot be handled by an LTI analysis
D.B. Leeson, “ A Simple Model of Feed-back Oscillator Noise Spectrum”, Proc. IEEE, vol. 54 , pp. 329-330, Feb. 1966.
J. Craninckx, M. Steyaert, “ Low-noise Voltage Controlled Oscillators Using Enhanced LC-tanks ”, IEEE Trans. Circuits Syst.-II, vol. 42 ,pp. 794-904, Dec. 1995.
24
Theory Background of Phase Noise Model
• Oscillator is a time-variant system!
• Traditional phase noise model (Leeson’s model) based on Linear Time Invariant (LTI) theory does not apply for quantitative prediction.
• Linear Time Variant Theory introduced by Hajimiri, known in the Horology community since 1827*. Perturbations at different times in
a cycle create different amounts of phase noise & amplitude noise
*Airy, Sir Georg Biddle, Cambridge Philosophical Transactions, 1827, Vol. 3, Part 1, pp. 105-128
25
Linear Time Varying (LTV) TheoryImpulse Sensitivity Function (ISF)
• Only depends on wave shape• Unitless• Periodic• Indicate the sensitivity to noise injection
Sinewave oscillator Squarewave oscillator
26
Phase Noise Predicted by LTV• White noise induced
• Flicker noise induced
⎟⎟⎠
⎞⎜⎜⎝
⎛
Δ⋅ΔΓ
=Δ 2
2
2max
2
2/log10}{
wfi
qwL nrms
⎟⎟⎠
⎞⎜⎜⎝
⎛
ΔΔ⋅Δ
=Δw
wwfi
qcwL fn /1
2
2
2max
20
2/log10}{
2rmsΓ --rms value of ISF Fourier expansion
Co --DC value of ISF Fourier expansionmaxmax Vcq node ⋅=
1/f3
1/f2
L{Δ w}
Log(f)Typical phase noise log-log plot
27
Figure of Merit
{ }
{ }
2110log
= Oscillator frequency = Deviation for center frequency at which phase noise is measured
= Phase noise spectral density from the oscillator frequency = O
o
s
o
s
fFOMf L f P
ff
L f fP
⎛ ⎞⎛ ⎞⎜ ⎟= ⎜ ⎟⎜ ⎟Δ Δ⎝ ⎠⎝ ⎠
Δ
Δ Δ
scillator power in mW
32
1/0
2
0
2
0
2{ } 1 12
at high frequency
2{ }2
1{ }
f
s L
s L
L s
FkTLP Q
FkTL wP Q
fFkTL wQ f P
ωωωω ω
ωω
⎡ ⎤ ⎛ ⎞⎛ ⎞⎢ ⎥Δ = + +⎜ ⎟⎜ ⎟ ⎜ ⎟Δ Δ⎢ ⎥⎝ ⎠ ⎝ ⎠⎣ ⎦
⎛ ⎞Δ ≈ ⎜ ⎟Δ⎝ ⎠
⎛ ⎞Δ ∝ ⎜ ⎟Δ⎝ ⎠
α Ps
α Pnoise
28
Colpitts
VDD
Vbias
L
C1
C2
Edwin H. Colpitts
29
Capacitive Transformer
21
21
CCCCCEQ +
=
L
C1
C2 R L Ceq
21
1
CCC+
=η
R2
1η
VDD
Vbias
L
C1
C2
30
Rs
LS
LP RP
( )( )
2 2
20
2
2
0
0
1
1
P S S
S
S
P S S
S P
S S
R R Q R Q
LR
QL L LQ
whereL RQ
R L
ω
ωω
= + ≅
=
⎛ ⎞+= ≅⎜ ⎟
⎝ ⎠
= =
Inductor Loss Transformation
31
Colpitts Simplification
VDD
Vbias
L
C1
C2
VDD
Vbias
L
Ceq
+-
RPoutV
21
21
CCCCCEQ +
=
mg11
2η
Pm
Rg
||112η
VDD
LCeq
outm Vg η−outV
21
1
CCC+
=η
outm Vg η
Pm
Rg
||112ηLCeq outm Vg η−
Small Signal Model-Useful for Startup
01 2
1 2
1
2f
C CLC C
π=
+
32
Equivalent Arrangements of the Colpitts Oscillator
VDD
Vbias
L
C1
C2 Vdd
VDD
L
C1
C2
Basic Topology without bias
Common Gate
Common Drain
33
Colpitts Impulsing
VDD
Vbias
L
C1
C2
Drain Current
Resonator Voltage
Amplitude regulation mechanism is due to a bias shift on C2 as the oscillation grows.
The amplitude is somewhat difficult to predict, best attempted using the Describing Function Method.*
The impulse timing occurs at the point in the cycle that the circuit is least sensitive to the drain noise.
See for example T. H Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition 2003
34
Clapp Oscillator
VDD
Vbias
L1
C1
C2
L2
Clapp
James K Clapp, 1948
VDD
L C1
C2C0
C0
Essentially a Colpitts oscillator with an additional capacitor in series with the inductor.
Often preferred for VCOs
In a Colpitts using either of the divider capacitors to tune the oscillator results in a variable feedback voltage.
Here using C0 for tuning decouples the two functions.
35
Hartley Oscillator
Colpitts Hartley
Ralph V. L. Hartley 1915Electrical Dual of the Colpitts Oscillator
Inductive divider provides feedback signal
Best tuned using a variable capacitor ( )01 2
12
fC L Lπ
=+
36
Differential OscillatorsVDD
Vbias
VDD
Vbias
VDD
Vbias
2
mg−
VDD
Often preferred for modern integrated applications due to greater noise immunity, inverse phases
Better PVT Performance
37
Low Phase Noise Design Design Example
After D.H. Ham Chapt 18, “Tradeoffs in Analog Design” pp. 517-549
12 independent design variables:
Mosfets: Wn, Ln, Wp, Lp (Assuming symmetry)
Inductor: metal width W, metal spacing S, number of turns N, lateral dimension D
Maximum and minimum varactor values Cv,max, Cv,min
Bias Current I
How do we optimize for best Figure of Merit?
Put otherwise: for a given amount of power how do we get the lowest phase noise?
VDD
Vbias
Vtune
CloadCload
38
w
SS
D
S
Inductor Model
Capacitance and
Leakage to Substrate
Inter-turn Capacitance
Series ResistanceCS
L RS
CPRP CP RP
39
Design Constraints
tan ,max ,min
maxmin
minmax
min
tan ,max
max
1
1
Max
sw k sw
k
I I
V IR V
LC
LC
gR
D D
ω
ω
α
≤
= ≥
≤
≥
≥
≤
Power Constraint
Need a large enough swing to reduce phase noise
Required Tuning range
Startup constraint, small signal gain must exceed loss
Maximum inductor dimension, area constraint
Power is VddImax
VDD
Vbias
Vtune
CloadCload
40
Oscillator Simplicfication
go,n+ go,p go,n+ go,p
-(gm,n+ gm,p) -(gm,n+ gm,p)
Cn+Cpm Cn+Cpm
CV RV
L RS
Cs+Cp
Cload Cload
Cs+Cp
L RS
CVRV
MOSTransistors
Tuning Varactors
Spiral inductors
Input CapacitanceOfOutput driversVDD
Vbias
Vtune
CloadCload
41
Oscillator Simplicfication
L
C
gres
2(go,n+ go,p)
-2(gm,n+ gm,p)
CV/2
gV/2
gL/2
½(Cs+Cp+ Cn+Cp+Cload)
2L
MOSTransistors
Tuning Varactors
Spiral inductors
go,n+ go,p go,n+ go,p
-(gm,n+ gm,p) -(gm,n+ gm,p)
Cn+Cpm Cn+Cpm
CV RV
L RS
Cs+Cp
Cload Cload
Cs+Cp
L RS
CVRV
MOSTransistors
Tuning Varactors
Spiral inductors
Input CapacitanceOfOutput drivers
go,n+ go,p go,n+ go,p
-(gm,n+ gm,p) -(gm,n+ gm,p)
Cn+Cpm Cn+Cpm
CV RV
L RS
Cs+Cp
Cload Cload
Cs+Cp
L RS
CVRV
MOSTransistors
Tuning Varactors
Spiral inductors
Input CapacitanceOfOutput drivers
VDD
Vbias
Vtune
CloadCload
VDD
Vbias
Vtune
CloadCload
-g
, ,1 ( )2res o n o p v Lg g g g g= + + +
42
Objective Function• Objective is to
minimize the phase noise subject to the given constraints
( )
( ) ( )
( )
22
,2 2max
2
,max ,maxmax 2
4 22
2 2,max, ,
2,
0,
1 1{ }8 2
2
1 1{ } 16
12
2
nrms n
n
d dn dp
sw sw
swn sat n p sat p
rms n
draind
n sat n
iL ff q f
i kT g g f
V Vq
C L
f L IL f kTf VL E L E
IgL E
π
γ
ω
π γ
⎛ ⎞Δ = Γ⎜ ⎟⎜ ⎟Δ ⋅ Δ⎝ ⎠
= + Δ
= =
⎡ ⎤⎢ ⎥Δ = +
Δ⎢ ⎥⎣ ⎦
Γ
=
∑
Turns out that the start up condition that g>gres
Means that the MOSFET drain noise will be dominant, so we consider only that term
43
Objective Function Simplification
The Phase noise Expression can be simplified to show the portions that depend on our design parameters.
In the current limited regime we can decrease the phase noise by increasing the current
Once the supply limits the voltage swing then further current increases actually increase the phase noise
The optimum point to operate is thus on the border between the current and voltage limited regimes
( ) ( )
( ) ( )
4 22
2 2,max, ,
,max
,max sup
42
2, ,
2 2
1 1{ } 16
Current Limited
Voltage Limited
1 116
{ } Current Limited
{
swn sat n p sat p
swres
sw ply
n sat n p sat p
res
f L IL f kTf VL E L E
IVg
V V
fkTfL E L E
L gL fI
L
π γ
η π γ
η
⎡ ⎤⎢ ⎥Δ = +
Δ⎢ ⎥⎣ ⎦
=
=
⎡ ⎤⎢ ⎥= +
Δ⎢ ⎥⎣ ⎦
Δ =
Δ2
2sup
} Voltage Limitedply
L IfVη
=
44
Reduction of Design Variables
Set Ln and Lp to the process minimum to reduce parasitic capacitances and maximize gm
Constrain gm,n=gm,p to maintain symmetry and reduce 1/f noise (this constrains Wn and Wp)
This leaves only one independent variable Wn now called just W
MOSFETs
CloadSet by input capacitance of output drive amplifier
Choose to drive 50 Ohm load with minimum voltage swing
The specifies an output differential pair with a specific W/L and hence a specific Cload
L C gres -g
VDD
Vbias
Vtune
CloadCload
VDD
Vbias
Vtune
CloadCload
45
w
SS
D
S
Area Constrained Inductor Design
Lower L and Lower Rs
InductorReduced inductor area always leads to higher inductor resistanceso choose D=Dmax
So the independent design variables are w, s, and n
46
Design Constraints in the C-w Plane
min
Start up
resg gα≥
minmax
1LC
ω≥
maxmin
1LC
ω≤
w
Cv,max
Current Limited
Voltage Limited
Voltage Swing
Region for feasible designs
47
Contours of Constant Phase noise
min
Start up
resg gα≥
minmax
1LC
ω≥
w
Cv,max
Current Limited
Voltage Limited
Voltage Swing
Region for feasible designs
{ } constantL fΔ =
2 2
{ } Current LimitedresL gL fI
ηΔ =
maxmin
1LC
ω≤
Optimum Design
For this inductor
48
Effect of inductor gL
minmax
1LC
ω≥
w
Cv,max
Current Limited
Voltage Limited
Voltage Swing
maxmin
1LC
ω≤
What happens if we keep the same inductance but change the geometrical design parameters so that we have higher loss?
min
Start up
resg gα≥
Voltage Swing
Low gL
High gL
Conclusion: Minimum phase noise for a given inductance occurs for the inductor design that has the minimum gL
,maxswres
IVg
=
49
What happens as we change the inductor?
2 2
{ } Current LimitedresL gL fI
ηΔ =
gL
Inductance
RL
Minimum gL as a function of L for spiral inductor designs
( )( )
( )
2 2
20
20
1P S S
Sp
S
SL
S
R R Q R Q
LR
RRgL
ω
ω
= + ≅
=
=
w
SS
D
S
w
SS
D
S
2
2sup
{ } Voltage Limitedply
L IL fVη
Δ =
, ,1 ( )2res o n o p v Lg g g g g= + + +
L C gres -g
For minimum phase noise use the smallest inductor that you can and still meet the design constraints.
50
Design Constraints in the C-w Plane
min
Start up
resg gα≥
minmax
1LC
ω≥
maxmin
1LC
ω≤
w
Cv,max
Current Limited
Voltage Limited
Voltage Swing
Region for feasible designs
51
Optimization Process
1) Set bias current to Imax
2) Choose an Inductor value and then choose and inductor design that minimizes gL
3) Draw design constraints in the c-w plane
4) If a feasible design point exists decrease inductance and repeat
5) Continue until the feasible design area shrinks to a point in the c-w plane or either the tuning, swing or stat up conditions cannot be satisfied
VDD
Vbias
Vtune
CloadCload
w
SS
D
S
w
SS
D
S
52
Bonus Material
• Rotary Traveling Wave Oscillators– A low power, high frequency, low phase noise
oscillator with and “infinite” number of available phases.
53
Genesis of the RTWOVDD VDD
54
Rotary Wave Genesis
+ +-
00
00 0
0
00
0
0
0
0
Wave
-
Transmission line NOT LC tuned circuit characteristic.
Z L per_m
Cper_m
vp1.Lper_mCper_m
55
Möbius “Termination”
Wave
NullTail
00
fosc1.Ltotal Ctotal[ ]. 2
+- +
-
+-
+-
-
-
+
+
Supports a Square Wave.
2 lapsrequired
Transmission line NOT LC tuned circuit characteristic.
56
Rotary Clock Visualization1
.Lper_m
Cper_m
Phili
p R
estle
, IB
M
fosc 1.Ltotal Ctotal . 2
57
Distributed AmplifierThe design of the distributed amplifiers was first formulated by William S. Percival in 1936
Percival proposed a design by which the transconductances of individual vacuum tubes could be added linearly, thus arriving at a circuit that achieved a gain-bandwidth product greater than that of an individual tube.
Not well known until a publication on the subject was authored by Ginzton, Hewlett, Jasberg, and Noein 1948
58
An alternative derivation: Modern Integrated Distributed Amplifier
59
A Differential Distributed Amplifier
Transmission lines
60
A Differential Distributed Oscillator
Which can be "unwound" into this:
61
Analytic Formulation of RTWO PDE
……
( )2 2
'2 2
Nonlinear PDE describing differential mode on Transmission line
( ) ( ) 0
Consider steady traveling wave solutions of the type:z zF t- substitute to get an ODE in x t-v v
V V VLC RC LG V RG Vz t t
∂ ∂ ∂− − + − =
∂ ∂ ∂
⎛ ⎞ ≡⎜ ⎟⎝ ⎠
( )
( )
" ' '2
31 3
" 2 ' 31 3 1 32
1 ( ) ( ) 0
Consider ( ) - simplist "Van der Pol" like driving term.1 3 0
LC F RC LG F F RG FV
G V g V g V
LC F RC Lg Lg F F Rg F Rg FV
⎛ ⎞− + + + =⎜ ⎟⎝ ⎠
= +
⎛ ⎞− + − + − + =⎜ ⎟⎝ ⎠
"Mass" Loss and saturable gain Nonlinear "soft" spring
Modeled as continuous conductance G(V) per length
Transmission line with L, C, R per length
Imposition of periodic boundary conditions on F:F(x)=F(x+2l0)Defines RTWO Solutions, where lo is the transmission line length
Van der Pol-Duffing Equation Perturbation solutions possible using Jacobi-Elliptic Functions as basis
62
Approximate Solution Using Harmonic Balance
( ) ( ) ( )1
22 2
1 1 3, 2 cos sin 3 cos 364 4 32
F x k x k x k x εε ε ω ε ω ε ωη
⎛ ⎞⎡ ⎤⎛ ⎞ ⎛ ⎞ ⎛ ⎞= + ⋅ + − ⋅ + − ⋅ ×⎜ ⎟⎜ ⎟ ⎜ ⎟ ⎜ ⎟⎢ ⎥⎝ ⎠ ⎝ ⎠ ⎝ ⎠⎣ ⎦ ⎝ ⎠
( )
322 4 2
3 3 32 1 2 2 2 423 3 3 3 3 3 1/ 220 1 0 1
10
4 321 2 1
2 2o
o
L L Ll g R l g R RC C C l Rg
l LC l LCπω
π
− −⎡ ⎤
⎛ ⎞ ⎛ ⎞ ⎛ ⎞⎢ ⎥⋅ ⋅ ⋅ ± ⋅ ⋅ ⋅ + ⋅ ⋅ ⋅⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎡ ⎤⎢ ⎥ ⎛ ⎞⎝ ⎠ ⎝ ⎠ ⎝ ⎠= × ≈ −⎢ ⎥⎢ ⎥ ⎜ ⎟⎝ ⎠⎢ ⎥⎣ ⎦⎢ ⎥
⎢ ⎥⎣ ⎦
( ) 221 13
21 1
13 1
1
RC Lg v LC RgLg v LCk
Rg Rg v LCη ε
− × −− −= = =
−
1 1/ 222 121 23 320 01 1
10 0
1 1 11 132
oL L lg gV RgR C R CLC LC
ω ωω ω π
−⎧ ⎫⎡ ⎤ ⎡ ⎤⎛ ⎞ ⎛ ⎞⎪ ⎪⎛ ⎞ ⎛ ⎞ ⎛ ⎞⎛ ⎞ ⎢ ⎥= + ⋅ ⋅ + ⋅ ≈ −⎢ ⎥⎨ ⎬⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎜ ⎟
⎝ ⎠ ⎝ ⎠ ⎝ ⎠ ⎝ ⎠⎢ ⎥ ⎢ ⎥⎝ ⎠ ⎝ ⎠⎪ ⎪ ⎣ ⎦⎣ ⎦⎩ ⎭
Where
Effective Velocity of wave
Oscillator FrequencyVelocity of unloaded lossless line
Correction terms due to line loss and gain
Frequency of Fundamental mode of Mobiusterminated lossless transmission line
Simplified results for reasonable component values
Results verified against exact simulation
1 0Lg RC− >Oscillation Condition
63
Number of allowed modes
For a realization that yields a given fundamental frequency more possible modes n can exist if the stages are more finely divided (Greater N)
Lm
L
L
Cm
C
C
For an RTWO of length L equal to N the oscillation frequency will be
or integer multiples of this frequency 2 2
12 ( )(2 )
using
( )(2 )
p posc osc
m m
pm m
v vf f n
N N
N L L C C
vL L C C
= =
=+ +
=+ +
( )( )
Recall cutoff frequency, above this frequency propagation ceases1
2
so for a lumped or periodically loaded realizationmodes can exist up to which impliesthat the number of allowed m
cm m
osc c
fL L C C
f f
π=
+ +
<odes n is
2Nn=π
N=5
64
Implication of Finite Number of Modes
1
2 1( ) sin((2 1) )2 1
n
mf x m x
mπ == +
+∑n=4 (9x)
n=1 (2x)
n=0
1
2'( ) cos((2 1) )
2'(0)
n
mf x m x
nf
π
π
== +
=
∑ Oscillator risetime increases with the number of allowed modes which depends on the number of stages used in the oscillator design.
65
Phase Noise CharacteristicsFor RTWO
Z0=T-line impedance, it2/Δf Thermal noise, N=Number of sections, QL=Q of loaded T-line, ω0=oscillator frequency, Δω=frequency offset
G. Le Grand de Mercey PhD. Thesis
66
Bandwidth Rise Time• Distributed structure leads to very high bandwidth
– Parasitic capacitance absorbed into transmission lines impedance– Gates and drains driven by differential signal – Transistor doesn’t need to drive drain capacitance– Similarly the gate capacitance is part of the transmission line– Load capacitance also becomes transmission line impedance– Switching speed determined by the gate resistance Rg and Cgs.
• Rise/fall time can be controlled by segment number– Cutoff frequency:
– Rise/fall time depends on the cutoff frequency– Practically the limit is the capacitive load
lumplumpcutoff CL
f⋅⋅
=π2
1
67
Inverter Sizing
2 2 20
0
1 12 1 / 2 / 6
Loaded line impedance transmission line attenuation coefficient number of stages length of each section
mGZ nl n l
WhereZn l
α α
α
>− +
= =
= =
As with a more standard differential L-C oscillator sufficient gain must be supplied to overcome the line losses, this leads to a condition on the total transconductance due to all the inverters necessary for startup and sustained oscillations.
68
Low Power Design Considerations
•For low power operation the resistive losses in the transmission line must be mimimized and the circulating current must be reduced by using a high transmission line impedance
•ZO is maximized by increasing L this implies the use of narrow conductors that are widely separated to construct the differential transmission line
•To achieve wide tuning however the necessary varactor loading will increase the power at low frequencies
Where s is the line spacing w is the conductor width and t is the metal thickness
2
2odd
dissodd
VP RZ
=
( ) 2
modd
m
L LZC C
+=
+
s log 1w+t
omL L μ π
π⎛ ⎞⎛ ⎞+ ≈ +⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠
69
ReferencesY. Chen, K. Pedrotti “Rotary Traveling Wave Oscillators, Analysis and Simulation” to
be published IEEE TCAS-1
A. Hajimiri, T. H. Lee, “A general theory of phase noise in electrical oscillators”, IEEE Journal of Solid State Circuits, vol. 33, no. 2, February 1998
D. Ham, A. Hajimiri, “Design and Optimization of a Low Noise 2.4GHz CMOS VCO with Integrated LC Tank and MOSCAP Tuning”, IEEE International Symposium on circuits and systems, part 1, pp I-331-I-334, 2000
Ali Hajimiri, Thomas H. Lee, "The Design of Low Noise Oscillators" Kluwer Academic Publishers, March 1999
E. Hegazi, J. Rael, A. Abidi, The Designers Guide to High Purity Oscillators, Klewer, 2005
D. B. Leeson, “A Simple model of feedback oscillator noise spectrum”, Proceeding of the IEEE, vol. 54, pp. 290-307, August 1967
G. Le Grand de Mercey “18 GHz-36 GHz Rotary Traveling Wave Voltage Controlled Oscillator in a CMOS Technology” PhD. Thesis Universitat der BundeswehrMunchen August 2004
70
ReferencesUlrich L. Rohde, Ajay K. Poddar, Georg Böck "The Design of Modern Microwave Oscillators for Wireless Applications ", John Wiley & Sons, New York, NY, May, 2005
C. Toumazou et. Al. eds, Tradeoffs in Analog Circuit Design: The Designers Companion, Klewer, 2002
L. Rawlings, The Science of Clocks and Watches, British Horological Institute, 3rd ed., 1993
E. Vittoz, M. Degrauwe, S. Bitz, “High-Performance Crystal Oscillator Circuits: Theory and Application: IEEE, JSSC, Vol. 20, No. 3, June 1988
C.J. White, and A. Hajimiri “ Phase Noise in Distributed oscillators ”, Electronics Letters 2002, vol. 38, NO. 23 pp. 1453-1454
J. Wood, T.C. Edwards, and S. Lipa, “Rotary Traveling-Wave Oscillator Arrays: A New Clock Technology”, IEEE Journal of Solid-State Circuits, vol. 36 , pp. 1654-1665.