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Escola Politécnica da Universidade de São Paulo GSEIS - LME Logic Synthesis in IC Design and Associated Tools Logic Minimization Wang Jiang Chau Grupo de Projeto de Sistemas Eletrônicos e Software Aplicado Laboratório de Microeletrônica – LME Depto. Sistemas Eletrônicos Universidade de São Paulo

Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Logic Synthesis in IC Design and Associated Tools Logic Minimization. Wang Jiang Chau Grupo de Projeto de Sistemas Eletrônicos e Software Aplicado Laboratório de Microeletrônica – LME Depto. Sistemas Eletrônicos Universidade de São Paulo. Boolean Algebra-1. Boolean algebra - PowerPoint PPT Presentation

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Page 1: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Logic Synthesis in IC Design and Associated Tools

Logic Minimization

Wang Jiang Chau

Grupo de Projeto de Sistemas Eletrônicos e Software Aplicado

Laboratório de Microeletrônica – LMEDepto. Sistemas EletrônicosUniversidade de São Paulo

Page 2: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean Algebra-1 Boolean algebra

Quintuple (B,upperbound operation (+), lowerbound operation (.), minimum element (0), maximum element (1))

Satisfies commutative and distributive laws Each element has a complement: a + a’=1 ; a . a’ = 0 The maximum (minimum) are identities: a + 1=1 ; a . 1 = a

Example: set containment B= set of sets = {, {a},{b},{c},{a,b},{b,c},{a,c},{a,b,c}} Upperbound and lowerbound operations = and Maximum and minimum elements = {a,b,c} and Therefore:

As complements, {a,b}{c} = {a,b,c} ; {a,b} {c} = Not complements: {a,b}{b,c} = {a,b,c} ; {a,b} {b,c} = {b} Identity: {a,b}{a,b,c} = {a,b,c} and {a,b} {a,b,c} = {a,b}

Page 3: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean Algebra-2 Some properties of Boolean algebraic systems

Binay Boolean algebra (Switching Algebra) Quintuple (B,+, . , 0, 1) Binary Boolean algebra B = {0, 1}

(a’)’=aInvolution

(a.b)’=a’+b’(a+b)’=a’.b’De Morgan

a(a+b)=aa+(ab)=aAbsorption

a.a=aa+a=aIdempotence

a(bc)=(ab)ca+(b+c)=(a+b)+cAssociativity

Page 4: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean Algebra-3 Example of Two-element Boolean Algebra: ({0,1},+,.,0,1)

111

100

10+

101

000

10.

Page 5: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean FormulaThe set of Boolean formulas on B is defined as:

1. The elements of B are Boolean formulas

2. The symbols x1,…, xn are Boolean formulas

3. If g and h are Boolean formulas, then so are:

(g) + (h) , (g).(h) , (/g)

Examples: (a) or (x1)

(a)+(x1)

(a).(x1)

(/a) or (/x1)

(a)+(a).(x1 )

Page 6: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean Function- 1The set of Boolean functions on B is defined as:

1. bB, the constant function f(x1,…, xn)=b is a Boolean function

2. i, the projection function f(x1,…, xn)= xi is a Boolean function

3. If g and h are Boolean functions, then so are:

(g) + (h) , (g).(h) , (/g), where

(g+h)(x1,…, xn)= g(x1,…, xn)+h(x1,…, xn)

(g.h)(x1,…, xn)= g(x1,…, xn).h(x1,…, xn)

(/g)(x1,…, xn)= /g(x1,…, xn)

The distinction between a Boolean formula and a Boolean function is important: a Boolean function is a mapping f:BnB which hasmany distinct representation as a Boolean formula

Example: formulas (a) and (a)+(a).(x1 ) refers to the same function

Page 7: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean Function- 2

Boolean function Single output: Multiple output:

BBf n :mn BBf :

Example: 3-dimensional Boolean Space

Page 8: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Switching Functions Again, it is important to distinguish between a switching function

and its representation as a Boolean formula.

Truth Table: x1 x2 x3 f1 f2

0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 1 1 0 0 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 1

Boolean formulas:

xxxxxxxxxxxxxxF 3231323213131.21 ........

xF 12

x1

x2

x3x3

x2

x1

F1 F2

Binary n-space:

Page 9: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Boolean literal: variable or its complement (a, b, b’, x5’). Literals are the half-space of the binary n-cube.

Product or cube: product of literals (a.b’.d or x2.x5’.x7). Cubes are a subspace of the binary n-cube and is denoted by c1…cn, ci {0,1.x}

Minterm: product of all input variables implying a value of a function (for B4, x1.x2’.x3 .x4’).

Vertex in the binary n-cube and is denoted by c1…cn, ci {0,1}.

Definitions …

x1

x2

x3

000 ( ) is a mintermxxx 3.21.

x0x ( ) is a cube (and a literal) andcontains minterms 000,001,100,101

x2

11x ( ) is a cube andcontains minterms 110 and 111

xx 21.

Page 10: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Representation of Boolean Functions Sum of Products: A function can be represented by a sum of cubes (products):

f = ab + ac + bc

Since each cube is a product of literals, this is a “sum of products” (SOP) representation

A SOP can be thought of as a set of cubes F

F = {ab, ac, bc}

A set of cubes that represents f is called a cover of f.

F1={ab, ac, bc} and F2={abc,abc,abc,abc,bc}

are covers of

f = ab + ac + bc.

Page 11: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Incompletely specified functions is a mapping:

don't care symbol *. Input patterns that never occur. Input patterns, for which some output condition is never observed.

It can be specified as with three logic functions (F,D,R): F: ON-Set, subset of the domain such that f is true (F(x)=1). R: Off-Set, subset of the domain such that f is false (F(x)=0). D: Don’t care Set, subset of the domain such that f is a don't care

(F(x)=*). The incompletely specified function (F,D,R) can also be

thought as an interval (set) of logic functions:{G| F(x) G(x) F(x)+D(x), x {0,1}n}

mnBf ,*}1,0{:

Incompletely Specified Functions

Page 12: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Example

x1

x2

x3

1

0

*

x1

x2

x1

x2

x1

x2

F R D

Page 13: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

… More Definitions …-1

n1,2,...,i )).((

..),...,,...,,( .: 21

ii

ii

xixi

xixinin

fxfx

fxfxxxxxfThenBBfLet

• Let f(x1,x2,…,xn) be a Boolean function of n variables.• The set (x1,x2,…,xn) is called the support of the function.• The cofactor of f(x1,x2,…,xi,…,xn) with respect to variable

xi is fxi = f(x1,x2,…,xi=1,…,xn) • The cofactor of f(x1,x2,…,xi,…,xn) with respect to variable

xi’ is fxi’ = f(x1,x2,…,xi=0,…,xn) • Theorem: Shannon's Expansion

• Any function can be expressed as sum of products (product of sums) of n literals, minterms (maxterms), by recursive expansion (it is a canonical form).

• Let f(x1,x2,…,xn) be a Boolean function of n variables.• The set (x1,x2,…,xn) is called the support of the function.• The cofactor of f(x1,x2,…,xi,…,xn) with respect to variable

xi is fxi = f(x1,x2,…,xi=1,…,xn) • The cofactor of f(x1,x2,…,xi,…,xn) with respect to variable

xi’ is fxi’ = f(x1,x2,…,xi=0,…,xn) • Theorem: Shannon's Expansion

• Any function can be expressed as sum of products (product of sums) of n literals, minterms (maxterms), by recursive expansion (it is a canonical form).

Page 14: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

… More Definitions …-2 Example: f = ab + ac + bc

fa = b + c

fa’ = bc

f = a fa + a’ fa’ = a (b + c) + a’ (bc)

A Boolean function can be interpreted as the set of its minterms.

Operations and relations on Boolean functions can be viewed as operations on their minterm sets

Sum of two functions is the Union of their minterm sets Product of two functions is the Intersection ( ) of their

minterm sets Implication between two functions corresponds to containment

() of their minterm sets f1 f2 f1 f2 f1’ + f2 = 1

Page 15: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

… More Definitions …-3

A function f(x1,x2,…,xi,…,xn) is positive (negative) Unate with respect to variable xi if fxi fxi’ (fxi fxi’ ).

A function is (positive/negative) Unate if it is (positive/negative) unate in all support variables; otherwise it is Binate (or mixed).

Example: f= a + b + c’ f is positive unate with respect to variable a

fa=1 fa’= b + c’

Minterms of fa ={bc, b’c,bc’,b’c’} minterms of fa’={bc,bc’,b’c’}

f is positive unate with respect to variable b f is negative unate with respect to variable c Thus, f is binate.

Page 16: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

… More Definitions…-4 The Consensus of a function f(x1,x2,…,xi,…,xn) with respect to

variable xi is fxi . fxi’

Represents the component that is independent of variable xi

The Smoothing of a function f(x1,x2,…,xi,…,xn) with respect to variable xi is fxi + fxi’

Corresponds to dropping the variable from the function

Example: f= ab + ac + bc fa=b+c fa’= bc

Consensus = fa . fa’= (b+c) . bc = bc

Smoothing = fa + fa’= (b+c) + bc = b+c

Page 17: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Representations of Boolean Functions

There are three different ways of representing Boolean functions: Tabular forms

Truth table Implicant table

Logic expressions Expressions of literals linked by the + and . operators Expressions can be nested by parenthesis Two-level: sum of products or products of sum Multilevel: factored form

Binary decisions diagrams Represents a set of binary-valued decisions, culminating in

an overall decision that can be either TRUE or FALSE

Page 18: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Tabular Representations Truth table (canonical form)

List of all minterms of a function.

Implicant table or cover List of implicants of a function sufficient to define a function.

Implicant tables are smaller in size.

Example: x = ab+a’c; y = ab+bc+ac

Truth Table

Implicant Table

Page 19: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Cubical Representation of Minterms andImplicants

f1 = a’b’c’+a’b’c+ab’c+abc+abc’= a’b’+b’c+ac+ab

f2 = a’b’c+ab’c = b’c

Page 20: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Binary Decision Diagrams Reduced form is canonical

Example: f=(a+b)c Vertices {v1,v2,v3,v4,v5} (Fig. 2.20 (c) ) Variable x1=a, x2=b, x3=c; v1 is the root; index(v1)=1 meaning that v1 is related to first

variable in the order i.e. x1=a

Page 21: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Equivalence of Functions

“Two switching functions are equivalent if and only if their canonical forms are identical”

“Two switching functions are equivalent if and only if their sum-of-products canonical forms are identical”

Comparison of up to 2n terms

“Two switching functions are equivalent if and only if their BDD canonical forms are identical”

Comparison of up to n nodes

Page 22: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Function Minimization Function minimization is expression simplification

Criterion for minimum

Number of literals

Number of cube terms (sum-of-products)

f(x,y,z)= x’yz’+ x’y’z’+ xy’z’+ x’yz+ xyz+ xy’z

f(x,y,z)= x’z’ + y’z’ + yz + xz

f(x,y,z)= x’z’ + xy’ + yz

f(x,y,z)= x’y + y’z’ + xz Irredundant and Minimal

Irredundant

Irredundant Expression Minimal

Minimal Expression Unique

Page 23: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Irredundant Cubes

Let F = {c1, c2, …, ck} be a cover for f, i.e.

f = ik

=1 ci

A cube ci F is irredundant if F\{ci} f

Example: f = ab + ac + bc

bc ac

abc

a

b

bc

acNot covered

F\{ab} f

Page 24: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

71

42

53

60

Revisiting Karnaugh Maps

xyz0

1

00 01 11 10

10

01

00

10

xyz0

1

00 01 11 10

f(x,y,z)= = x’yz’ + xyz’ + xyz = yz’+xy 7,6,2

Page 25: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Irredundant Coverswx

yz 00 01 11 10

102

11153

131

84

146

7

95

12000

01

11

10

f(x,y,z)= 15,13,9,8,7,5,4,0

yz 00 01 11 10

00

010

10

11

00

1

11

0100

01

11

10

yz 00 01 11 10

00

010

10

11

00

1

11

0100

01

11

10

f(x,y,z)= x’y’z’+w’xy’+wy’z+xz f(x,y,z)= w’y’z’+wx’y’+xz

Minimalwx wx

Page 26: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

With Don’t Cares

f(x,y,z)= y’z’+yz

yz 00 01 11 10

0

1

0

11

0

1

00

100

01

11

10

wx

f(x,y,z)=

15,14,13,12,11,108,7,4,3,0

Page 27: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Prime Implicants A function f g (f covers g ) if f=1 whenever g=1 If f g and g f then f g If f h, then

h implies f and h is an implicant of f (h f )

Definition: the prime implicant p of a function f is a cube (product) covered by f | the elimination of any literal results in one new cube not covered by f.

yz 00 01 11 10

00

1111

01

00

01

1000

01

11

10

wx

hpf

f p h

Page 28: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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GSEIS - LME

Def. Prime Cubes A literal j of cube ci F ( =f ) is prime if

(F \ {ci }) {c’i } f

where c’i is ci with literal j of ci deleted.

A cube of F is prime if all its literals are prime.

Example

f = ab + ac + bc

ci = ab; c’i = a (literal b deleted)

F \ {ci } {c’i } = a + ac + bc

bc

aca

c

a

b

Not equal to f sinceoffset vertex is covered

F=ac + bc + a =F \{ci } {c’i }

Page 29: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

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Prime and Irredundant Covers- 1

Definition 1 A cover is prime (irredundant) if all its cubes are prime (irredundant).

Definition 2 A prime of f is essential (essential prime) if there is a minterm (essential vertex) in that prime that is in no other prime.

Definition 3 Two cubes are orthogonal if they do not have any minterm in common E.g. c1= ab c2 = bc are orthogonal

c1= ab c2 = bc are not orthogonal

Page 30: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

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Prime and Irredundant Covers- 2Example

f = abc + bd + cd is prime and irredundant.

abc is essential since abcdabc, but not in bd or cd or ad

Why is abcd not an essential vertex of abc?

What is an essential vertex of abc?

What other cube is essential? What prime is not essential?

abc

bd

cdda

cb

Page 31: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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GSEIS - LME

Essential Prime Implicants

Conclusion: The se S of all Essential Prime Implicants must be contained in any SOP irredundant expression. All other prime implicants contained in S must not be in the irredundant expression.

yz 00 01 11 10

00

01

11

10

z 00 01 11 10

0

1

00

110

11

00

01

1

01

10

wx xy

01

11

11

10

Page 32: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

Quine-McCluskey Procedure (Exact)

Given G and D (covers for F = (f,d,r) and d), find a minimum cover GG of primes where:

f GG f+d(GG is a prime cover of F )

Q-M Procedure:

1. Generate all the primes of F , {Pj} (i.e. primes of (f+d)=G+D)

2. Generate all the minterms of f=G.D, {mi}3. Build Boolean matrix B where

Bij = 1 if mi Pj

= 0 otherwise4. Solve the minimum column covering problem for B (unate covering

problem)

Page 33: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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DifficultyNote: Can be ~ 2n minterms ~ 3n/n primes

Thus O(2n) rows and O(3n/n ) columns AND minimum covering problem is NP-complete. (Hence can probably be double exponential in size of input, i.e. difficulty is O(23n)

0

1

0

0

10

3n/n

minterms

primes

2n

Page 34: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Primes: y + w + xz

Covering Table

Solution: {1,2} y + w is minimum prime

cover. (also w+ xz)

F x yzw xyzw x yzw xyzw

D yz xyw x yzw x yw xyzw

dd

ddd

dd

dd

00

1

11

01xy

xz

w

Example

xy xyxy

zw

zw

zw

zw

010

011

110

101y w xz

xyz w

x y z w

x yz w

xyzw

y

Page 35: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

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Generating the Prime Implicant Set- 1

F x yzw xyzw x yzw xyzw

D yz xyw x yzw x yw xyzw

dd

ddd

dd

dd

00

1

11

01xy xy xyxy

zw

zw

zw

zw

102

11153

131

84

146

7

95

120xy xy xyxy

zw

zw

zw

zw

F = (0,5,7,9)

D = (1,2,3,4,8,10,11,13,15)

Page 36: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

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x y z w 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 4 0 1 0 0 8 1 0 0 0 3 0 0 1 1 5 0 1 0 1 9 1 0 0 1 10 1 0 1 0 7 0 1 1 1 11 1 0 1 1 13 1 1 0 1 15 1 1 1 1

Generating the Prime Implicant Set- 2 x y z w

0,1 0 0 0 - 0,2 0 0 - 0 0,4 0 - 0 0 0,8 - 0 0 0 1,3 0 0 - 1 1,5 0 - 0 1 1,9 - 0 0 1 2,3 0 0 1 -

2,10 - 0 1 0 4,5 0 1 0 - 8,9 1 0 0 -

8,10 1 0 - 0 3,7 0 - 1 1

3,11 - 0 1 1 5,7 0 1 - 1

5,13 - 1 0 1 9,11 1 0 - 1 9,13 1 - 0 1 10,11 1 0 1 - 7,15 - 1 1 1 11,15 1 - 1 1 13,15 1 1 - 1

x y z w 0,1,2,3 0 0 - - 0,1,8,9 - 0 0 -

0,2,8,10 - 0 - 0 0,1,4,5 0 - 0 - 1,3,5,7 0 - - 1

1,3,9,11 - 0 - 1 1,5, 9,13 - - 0 1 2,3,10,11 - 0 1 - 8,9,10,11 1 0 - - 3,7,11,15 - - 1 1 5,7,13,15 - 1 - 1 9,11,13,15 1 - - 1

x y z w 0,1,2,3,8,9,10,11 - 0 - - 1,3,5,7,9,11,13,15 - - - 1

xzy

y

w

Page 37: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Covering Table

Definition: An essential prime is any prime that uniquely covers a minterm of f.

010

011

110

101

Primes of f+d

Minterms of f

Row singleton(essential minterm)

Essential prime

xyz w

x y z w

x yz w

xyzw

y w xz

Anyone

Page 38: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Row and Column DominanceDefinition: A row i1 whose set of primes is contained in the set of primes of row i2 is said

to dominate i2.

Example:

minterm i1 011010

minterm i2 011110

i1 dominates i2

We can remove row i2, because we have to choose a prime to cover i1, and any such prime also covers i2. So i2 is automatically covered.

Page 39: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Row and Column Dominance

Definition: A column j1 whose rows are a superset of another column j2 is said to dominate j2.

Example:

j1 dominates j2

We can remove column j2 since j1 covers all those rows and more. We would never choose j2 in a minimum cover since it can always be replaced by j1 (j1 will always cover more minterms).

prime prime j1 j2

1 0 0 0 1 1 0 0 1 1

Page 40: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Pruning the Covering Table1. Remove all rows covered by essential primes (columns in row

singletons). Put these primes in the cover GG.

2. Group identical rows together and remove dominated rows.

3. Remove dominated columns. For equal columns, keep one prime to represent them.

4. Newly formed row singletons define n-ary essential primes.

5. Go to 1 if covering table decreased.

The resulting reduced covering table is called the cyclic core. This has to be solved (unate covering problem).

A minimum solution is added to G - the set of n-ary essential primes.

The resulting GG is a minimum cover.

Page 41: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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GSEIS - LME

Example

0001110

0001101

0000110

0001011

0011100

0110000

1100001

1000000

01110

01101

00110

01011

11100

10000

34567

n-ary Essential Prime and

Column DominanceGG=P1 + P3

111

110

011

101

456

110

011

101

456

Essential Prime and Column Dominance

GG=P1

Row dominanceCyclic Core

essential

dominated

essential

dominated

dominated

Page 42: Logic Synthesis in IC Design and Associated Tools Logic Minimization

Escola Politécnica da Universidade de São Paulo

GSEIS - LME

0

A C

Solving the Cyclic Core

Best known method (for unate covering) is branch and bound with some clever bounding heuristics.

Independent Set Heuristic:

Find a maximum set of “independent” rows I. Two rows Bi1 ,Bi2

are independent if j such that Bi1j

=Bi2j=1. (They have no column in common)

Example: Covering matrix B rearranged with independent sets first.

Independent set = I of rows11

1111111

B=

Page 43: Logic Synthesis in IC Design and Associated Tools Logic Minimization

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Example of Cyclic Core

f(x,y,z)= 15,14,10,8,7,5,1,0

yz 00 01 11 10

10

010

01

10

10

1

01

0100

01

11

10

wx

0 1 0 0 0 0 0 0 1

15 0 0 0 1 1 0 0 0

1 1 1 0 0 0 0 0 0

5 0 1 1 0 0 0 0 07 0 0 1 1 0 0 0 0

8 0 0 0 0 0 0 1 1

10 0 0 0 0 0 1 1 0

14 0 0 0 0 1 1 0 0

A B C D E F G H

To impose A in solution to cover minterm 0

To impose H in solution to cover minterm 0

15 0 0 1 1 0 0 0

5 1 1 0 0 0 0 07 0 1 1 0 0 0 0

8 0 0 0 0 0 1 1

10 0 0 0 0 1 1 0

14 0 0 0 1 1 0 0

B C D E F G H

15 0 0 0 1 1 0 0

1 1 1 0 0 0 0 0

5 0 1 1 0 0 0 0

7 0 0 1 1 0 0 0

10 0 0 0 0 0 1 1

14 0 0 0 0 1 1 0

A B C D E F G