29
lektronik abor Linear Control Loop Theory Prof. Dr. Martin J. W. Schubert Electronics Laboratory Regensburg University of Applied Sciences Regensburg

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lektronik

abor

Linear Control Loop Theory

Prof. Dr. Martin J. W. Schubert

Electronics Laboratory

Regensburg University of Applied Sciences

Regensburg

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M. Schubert Linear Conrol Loop Theory Regensburg Univ. of Appl. Sciences

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Abstract. A general control loop model consisting of a forward networks A, N and an feedback-loop network C is studied theoretically and approximated with electronic circuitry such, that first and second order system models result. The particular circuit models are compared to the generalized first and second order models.

1 Introduction Feedback loops dominate our life. This document considers fundamental aspects of linear control loops from a general aspect, i.e. regardless whether they are time-continuous (modeled in s) or time-discrete (modeled in z). The organization of this document is as follows:

Section 2 presents the definition of what is linear in a signal processing sense. Section 3 evaluates the control loop model. Section 4 investigates function inversion and error attenuation obtainable with control loops. Section 5 extends the nested loop topologies to higher order systems. Section 6 is concerned with stability, Section 7 is concerned with PID controller design, Section 8 brings the theory to application as required in the laboratories for this course and Section 9 draws relevant conclusion and Section 10 offers references.

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M. Schubert Linear Conrol Loop Theory Regensburg Univ. of Appl. Sciences

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2 Definition of Linear and Time-Invariant (LTI) Systems 2.1 Linearity

2.1.1 The Linearity Axiom

y[ c1x1(t) + c2x2(t) ] = c1y[ x1(t) ] + c2y[x2(t)]. (2.1)

H

c1

c2

x1(t)

x2(t)

y(t)

(a) (b)

x1(t)

x2(t)

c1

c2

y(t)H

H

Fig. 2.1.1: (a) linear superposition of two signals, (b) equivalent system. Linearity for signal processing systems is defined according equation (2.1), illustrated by Fig. 2.1. 2.1.2 The Proportionality Implication.

Setting c2=0 in equation (2.1) shows: Linearity implies proportionality: y[ cx(t)] = cy[x(t)] (2.2) as illustrated in Fig. 2.1.1-2. Proportionality allows to shift constants over LTI systems and therefore to combine several constants within the circuit mathematically to a single constant.

Hcx(t) y(t)

(a) (b)

cx(t) y(t)H

Fig. 2.1.2: Proportionality: Systems (a) and (b) are equivalent for linear circuits. 2.1.3 The Zero-Offset Implication.

Setting c=0 in equation (2.2) shows: Proportionality implies zero offset: y[0] = 0y[x(t)] = 0 (2.3) Conclusion : The resistive divider in Fig. 2.1.1-3(a) is linear, because U2 = constant U1.

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The circuit with OpAmp in Fig. system in Fig. 2.1.1-3(b) is non-linear, as U20 when U1=0.

R1

R2

Uoff

R1 R2(a) (b)

U1

U2

U2U1

Fig. 2.1.3: (a) resistive divider, (b) circuit using OpAmp with offset voltage Uoff0. Remark: Linearity according to Eq. (2.1) is a signal processing definition. From a mathematical point of view any system Uout = aUin + b with any constants a, b is be linear.

2.2 Time-Invariance A system is time-invariant when its impulse response h(t) is not a function of time: h(t) = h(t-) (2.4) Fig. 2.1.4: Time-variant system when Uctrl varies with time

UctrlUin Uout

CvLCk1 Ck2

Most systems we use are time-invariant. An example for a time-variant system is shown in Fig. 2.1.2, where response of Uout to impulses at Uin depends on the control voltage Uctrl, which varies with time.

2.3 Causality : y(t) = f[x()] with t The present state of a system, y(t), is a function of the past and present state of its input, but not of future inputs.

2.4 Stability : Bounded Input Bounded Output (BIBO) There exist constant values for M and K, so that from |x(t)|M follows |y[x(t)]| KM. Question: Is an ideal integrator BIBO stable? (Hint: consider f0!)

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3 General Considerations for LTI Systems with Feedback

Fig. 3: Evaluation of the loop equations. In Fig. part (a) the transfer function of the system is Y = AX + NE + CW In Fig. part (b) closing the loop delivers W=Y and therefore

EC

NX

C

AY

11.

The so-called signal-transfer function is then

C

A

C

A

X

YSTF B

E

10

. (3.1)

In Fig. part (c) forward and open-loop network C=kA have a common part A. Network N is typically a part of network A and may be incorporated into the loop as well.

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According to the linearity axiom (2.1) parts (c) and (d) of the figure are identical. For high loop amplification C the STF becomes

kkA

A

C

A

C

ASTF C 1

1

. (3.2)

In Fig. part (d) signal (EꞏN) with typically N=1 (or at least constant) is introduced into the loop. Its error-suppression capability is termed noise transfer function:

01

,

0

constNC

X C

N

E

YNTF (3.3)

The main goal of any control circuit is to obtain a STF ≈ k-1 together with a high noise suppression NTF 0. Fig. part (d) also suggests a cut in the loop to distinguish Y from W to measure forward networks A, N and open-loop network C. Open the loop at any point of the feedback network k. The two forward networks N and A are measured as

0

WXE

YN (3.4)

0

WEX

YA (3.5)

and the open-loop network C in Fig. part (f) is obtained from

0

EXW

YC (3.6)

Remarks: C can be measured at any cut of the feedback loop. In most cases it is easiest to measure C from C=Y/W as shown in Fig. part (d). E=0 is sometimes difficult to realize, e.g. when E is the built-in error of a device.

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4 Objectives Obtainable with Control Loops 4.1 Function Inversion It is seen from (3.2) that the loop itself has the behavior ~k-1, i.e. the reverse behavior of its feedback network k. We take advantage from this fact in many situations, where we can construct k directly but not its reverse function k-1. Examples: If k is the resistive divider k=R1/(R1+R2), then

the loop behaves as 1/k for kA>>1. If k is a D/A-converter (DAC), then k-1 is an

A/D-converter (ADC). If k is a voltage controlled oscillator (VCO),

then k-1 is a phase-locked loop (PLL).

R2

R1

Uip

Uim

UoutUin

Av

Fig. 4.1

4.2 Error Attenuation by NTF

(a) (b)

A

k

x y

xk

xerr

kerr

aerr

A

k

x y

xk

2 2 2 2xerr,ges = xerr + kerr + (aerr/A)

Fig. 4.2: Error aerr is attenuated by the NTF while xerr , kerr cannot be attenuated by the loop. (Time-averaged signals add in ampliude (~x) when they are correlated (i.e. interdependent) and in power (~x2) when they are uncorrelated (independent from each other). So error sources were assumed to be uncorrelated in Fig. 4.2(b).)

Fig. 4.2(a) illustrates a control loop with three error sources: (i) xerr at the loop’s input, (ii) kerr located at the feedback networks output and (iii) aerr at the output of the feedback network, e.g. nonlinearities of the amplifier. Input error xerr, e.g. an OpAmp’s offset + other input noise, becomes part of the input signal.

The output error of the feedback loop (kerr), e.g. tolerances in R1, R2 in Fig. 4.1, adds directly to the input node and cannot be suppressed by the loop, we will get STF ~ 1/(k+kerr).

The output error of the forward network (aerr) can be translated to aerr,in,equiv=aerr/A and then processed like an input signal: yerr = STFaerr,in,equiv = STFaerr/A = NTF aerr.

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5 Network Topologies Higher order systems come often in one of two topologies:

Topology 1: distributed feed-in common network, concentrated feed-out of it,

Topology 2: distributed feed-out of common network, concentrated feed-in to it.

5.1 Topology 1: Distributed Feed-In to the Common Network

5.1.1 Transfer Functions for Topology 1

Fig. 5.1:

(a) Closed loop with the common feed-forward network of type distri-buted feed-in, concentrated feed-out.

(b) Breaking the loop at its concentrated point to mea-sure networks A and B.

F F

ak

bk

F

a0

Y

Ea2

b2

a1

b1

W

Y

F F

ak

bk

F

a0

Y

a2

b2

a1

b1

X

X

Open the loop at its concentrated point as shown in Fig. 5.1(b). Then determine the feed forward network A for W=0. Add any path from X to Y. In linear systems solutions superpose linearly. Using coefficients ax for analog and dx for time-discrete (digital) numerators obtains

analog kk

W

FaFaFaaX

YA

...2210

0

, digital kk FdFdFddA ...2

210 (5.1)

using bx for analog and cx for time-discrete denominator coefficients obtains open-loop C as:

analog: kk

X

FbFbFbW

YC

...221

0

, digital kk FcFcFcC ...2

21 (5.2)

Signal and noise transfer functions can be computed from

kk

kk

FbFbFb

FaFaFaa

C

A

X

YSTF

...1

...

1 221

2210 , digital:

kk

kk

FcFc

FdFddSTF

...1

...

1

10 (5.3)

kk FbFbFbCE

YNTF

...1

1

1

12

21

, digital: k

k FcFcNTF

...1

1

1

(5.4)

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5.1.2 Stage Amplifications for Topology 1

Fig. 5.1.2: Stage-amplifi-cation study. F F F

b2 b1bk

A2: Common Forward Network

YX2 X1Xin Xk-1

Particularly for modulators, where function F is an integrator, we have to estimate the voltage amplitudes or required bit-widths of numbers for the internal quantities Xi of Fig. 5.1.2, where Xin is the input signal. In Fig. 5.1.2 we set the feed-in coefficients to ak=1, ai=0 for i=0...k-1. Then consider the coefficient bk as feedback network and all the rest of the network in the dashed box as common feed-forward network – corresponding to A2 in Fig. 3. For |bkA2| we obtain according to (3.2) the closed-loop amplification 1/bk, or

k

in

b

XY when |bkA2| .

Note the precondition that the open-loop amplification >> 1! It is typically fulfilled for low frequencies when F is an integrator, but not in digital filters where |F|=|z-1|=1. As we can remove the outer loop and apply the same procedure to the k-1 loop, we can say

1

1

2

2...b

X

b

X

b

XY

k

in for high open-loop amplification in any loop (5.5)

Amplification with respect to input signal Xin is then

ink

ii X

b

bX for high open-loop amplification in any loop (5.7)

Often we find bk=1.

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5.2 Topology 2: Distributed Feed-Out of the Common Network (a)

b1 b2

F FWV Y

E(b)

a1

b1 b2

a0 a2

F F FX

(c)

(d)

a1a0 a2

F F F

b1 b2

X

W

V

F F F

U

U

E

bk

F Y

bk

ak Y

ak Y

bk

Fig. 5.2: (a) Topology (AX+E) [1/(1-C)]. (b) Topology [1/(1-C)] broken to measure open-loop gain B, (c) Topology [1/(1-C)] A(X+E) and (d) the typical structure.

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Fig. 5.2(a) illustrates the System Y=(AX+E) [1/(1-B)]. In this form we need the twice number of blocks F than in (d), but we can distinguish between STF and NTF:

kk

alityproportionk

k FaFaFaaaFaFFaaX

VA ...... 2

21022

10 . (5.7)

Fig. 5.2 (b) shows how to break the feedback loop to measure open-loop gain B:

kk

alityproportionk

k

EV

FbFbFbbFbFFbW

YB

...... 2212

21

0

. (5.8)

As (5.7) = (5.1) and (5.8) = (5.2), the STF in Fig. part (a) is the same as given by (5.3). To obtain the NTF we set X=0 → V=0 and compute Y=BW + E. Substituting W=B yields the same NTF as given by (5.4) for Fig. part (a). Fig. 5.2(c) illustrates the System [1/(1-C)] AX (i.e. coefficients ai after the feedback loop) with common forward network. In this case the STF is the same as given by (5.3). It is pointless to introduce an error function E as shown in Fig. part (b) because STF and NTF are both [1/(1-B)] A(X+E). The loop is broken between points W and V to show a possibility how we can measure loop-gain as 0/ EXWVC delivering the same result as (5.8). Fig. 5.2(d): The branches realizing blocks F of feed-forward and feed-back network were combined. No error is introduced, This was pointless as the NTF is equal to the STF. Consequently, the topology in Fig. 5.2(d) can be used to obtain the same STF like Fig. 5.1 and is frequently seen in digital filter structures.

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6 Stability 6.1 The Phase-Margin Criterion

Fig. 6.1: C=kA, (a) with summation point, (b) with difference point: C' = -C . In many control loops we see a difference point as shown in Fig. 6.1(b) instead of the summation point in (a). Substituting for the difference point B = -B' delivers

'11 C

A

C

A

X

YSTF

(6.1)

'1

1

1

1

CCE

YNTF

(6.1.1)

It is obvious from (6.1) and (6.2) that STF and NTF when C 1 C' -1. The significance of TF is that there may be |Y|>0 while |X|=0 (e.g. an oscillator). We define | C | = 1 corresponds MM jj eeC )2( with phase margin φM, (6.1.2)

| C' | = -1 corresponds )(' MjeC with phase margin φM. (6.1.3) For a summation point we measure the phase margin against -2 or 0 -370° or 0°. (6.1.45) For a difference point we measure the phase margin against - -180° . (6.1.5)

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6.2 Considering Poles and Zeros

6.2.1 Poles Describing the Momentum of a System

Computing poles (i.e. zeros of the denominator) and zeros (of the numerator) of STF and NTF is often complicated and requires computer-aided tools. If we have these poles and zeros, we have deep system insight. Zeros describe the stimulation (dt. Anregung) and poles the momentum (dt. Eigendynamik) of a system. For X=0 both STF and NTF deliver Y(1-C) = Y(1+C') = 0 (6.2.1) Consequently, the output signal must follow the poles that fulfill (6.7):

Time-continuous: i

tsi

ipeCty )( (6.2.2)

Time-discrete: i

npi

i

nTsi i

p zCeCny )( (6.2.3)

With Ci being constants and index pi indicating pole No. i. Fig. 6.2 illustrates the relation between the location of poles sp=σp+jp in the Laplace domain s=σ+j and the respective transient behavior. For a polynomial with real coefficients complex poles will always come as

complex pairs sp=σpjp that can be combined to )cos( te ptp

or )sin( te ptp

, because

ejx+e-jx=2cos(x) and ejx-e-jx=2jsin(x). It is obvious that these functions increase with σp>0 and decay with negative σp<0.

The conclusion from a time-continuous to time-discrete is obvious from z=esT and Ts pe with

T=1/fs being the sampling interval. Increasing time corresponds to increasing n for npz .

Consequently, stability requires σp<0 or |zp|<1 for all poles sp,i or zp,1, respectively. 6.2.2 Computing 2nd Order Poles and Zeros

Any polynomial with real coefficients can be subdivide into polynomial factors of 1st and 2nd order. Equation 001

22 ksksk devided by k2 delivers

0012 axax with zeros

1

41

2

411

2 21

0121

012,1 a

aj

a

a

aaxn (6.2.4)

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6.3 Second-Order Lowpasses

6.3.1 Poles of Second Order Lowpasses

-j0

j = j o2-

j0 = j 1/LC

Zeit

(b) step response

sp1

sp2

aperiodic(dead-beat)limit case

s'p1s'p2

A(1-es'p1t)

spa

(a) Location of poles

A(1-espat)

A(1-espt)

0

A

45°

Butterworth

Butterworth

4.29%

Butterworth

Fig. 6.3.1: (a) locus of poles, (b) transient response using these poles. A technically particularly important system is the 2nd order lowpass, frequently modeld as

200

2

200

20

212)(

sDs

A

DSS

AsH LP (6.3.1)

with A0 being the DC amplification, D stability parameter, ω0 bandwith and S = s/ω0. The poles are computed as

1

11

111

222,1 DjD

DDS p (6.3.2)

1

11

111

20202,1 DjD

DDs p (6.3.3)

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6.3.2 Characteristic Lowpasses

The Butterworth lowpass is the mathematically flattest characteristics in frequency domain and has always –3dB attenuation in its bandwith freuency, regardless ist order. It can behaviorally modeled by

N

js

NBW

ssH

2

0

2

0

1

1

1

1)(

NBW

f

ffH

2

0

1

1)(

(6.3.4)

Note that this is a behavioral model obtaining always –3dB at f=f0. Butterworth coefficients for order N=1,2,3 taken from [https://de.wikipedia.org/wiki/Butterworth-Filter] are Table 6.3.2: Poles and their complex phases for Butterworth lowpasses of 1st, 2nd, 3rd order, 45°-phae-margin technique and aperiodic borderline case (AP)

Lowpass Type

Denominator Poly. with S=s/ω0

D Poles, represented as σp±jωp

Φp, pj

pe step resp. overshoot

AP1=BW1 S+1 - Sp = 1 sp = ω0 0° 0% AP2 S2+2S+1 = (S+1)2 1 Sp1,2 = 1 sp1,2 = ω0 0° 0% BW2 S2 + 2 S + 1 2/1 Sp1,2 = j 12/1 ±45° 4%

BW3 (S2 + S + 1) (S+1) - Sp1,2 =½ (1+j 3 ), Sp3=1 ±60°, 0° 8%

PM45 S2 + S + 1 1/2 Sp1,2 = ½ (1 + j 3 ) ±60° 16%

Fig. 6.3.2: Characteristics of 1st (bl.), 2nd (red), 3rd (ye.) Butter-worth and a 45°-phase-margin lowpasses (pink).

(a) Bode diagram

(b) Step responses Listing 6.3.2: Matlab code for Fig. 6.3

% Filter: 2 polesHs_BW1=tf([1],[1 1]); Hs_BW2=tf([1],[1 sqrt(2) 1]) Hs_BW3=tf([1],[1 2 2 1]); Hs_M45=tf([1],[1 1 1]) figure(1); step(Hs_BW1,Hs_BW2,Hs_BW3,Hs_M45); grid on; figure(2); h=bodeplot(Hs_BW1,Hs_BW2,Hs_BW3,Hs_M45); grid on; %setoptions(h,'FreqUnits','Hz','PhaseVisible','on');

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6.3.3 Example: RLC Lowpass

An RLC lowpass according to Fig. 6.3.3 is modeld as

21

1)(

sLCsRCsH LP (6.3.4)

R is a sum of both voltage-source output impedance and inductor’s copper resistor. Compring

(6.3.1) to (6.3.4) yields 10 A , cut-off frequency LC

f2

10 and

L

CRD

2 .

(a) RLC lowpass

OSC: D=0.1: oscillating case M45: D=½: phase marg. 45°

BW2: D= 2/1 : Butterworth AP2: D=1: aperiodic borderline

(b) Bode diagram

(c) Step responses

Fig. 6.3.3: Characteristics of an RLC lowpass. Listing 6.3.3: Matlab code generating screen shots of Fig. 6.3.3 (b) and (c).

% RLC lowpass as filter with 2 poles % ---------------------------------- % setting cut-off frequency f0 and restor R: f0 = 10000; % set cut-off frequency in Hz R = 1; % set resistor in Ohms % Stability settings: D_OSC = 0.1 ; % 2nd order oscillating D_BW2 = sqrt(1/2); % Butterworth 2nd order D_M45 = 1/2 ; % phase margin 45°, 2n order D_AP2 = 1.0001 ; % aperiodic borderline case, 2nd order % conclusions: w0 = 2*pi*f0; LC = 1/w0^2; L_OSC = R/(2*D_OSC*w0); C_OSC = 2*D_OSC/(R*w0); L_M45 = R/(2*D_M45*w0); C_M45 = 2*D_M45/(R*w0); L_BW2 = R/(2*D_BW2*w0); C_BW2 = 2*D_BW2/(R*w0); L_AP2 = R/(2*D_AP2*w0); C_AP2 = 2*D_AP2/(R*w0); % set up LTI systems: Hs_AP2=tf([1],[LC R*C_AP2 1]); % aperiodic borderline case, 2nd order Hs_BW2=tf([1],[LC R*C_BW2 1]); % Butterworth 2nd order Hs_M45=tf([1],[LC R*C_M45 1]); % phase margin 45°, 2n order Hs_OSC=tf([1],[LC R*C_OSC 1]); % 2nd order oscillating % Graphical postprocessing figure(1); step(Hs_AP2,'k-.',Hs_BW2,'g',Hs_M45,'b',Hs_OSC,'r'); grid on; figure(2); h=bodeplot(Hs_AP2,'k-.',Hs_BW2,'g',Hs_M45,'b',Hs_OSC,'r'); grid on; p = bodeoptions; setoptions(h,'FreqUnits','Hz');

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6.4 Placing a Pole on a 1st Order Integrator According to Fig. 6.4(a) a integrating open loop amplification is modeled as

skAC 1

11

j

jC 11 )( →

f

ffC 1

1 )( (6.4.1)

with A1 being the 1st order feed-forward and k the feedback network. In Fig. 6.4 we use ω’=ωꞏsec as both a log-functoin’s argument and a closed-loop amplification must be dimensionless. The Signal transfer function of the loop will be

10

1

11

1

11

1

11

1

1

/1

/

11)(

k

sk

s

sk

kA

kAk

kA

AsSTF s

(6.4.2)

The system has a phase of -90° and is stable due to a rest of 90° phase margin against -180°. In the model above the low pole is spl = 0, but a finite pole, ωpl, as indicatd in Fig. part (c) might be reasonable or necessary to respect limited amplification of an operational amplifier, compute an operatin point in LTspice (divide by zero at s=jω=0 ) or avoid digital number overflow. A low pole ωpl << ω1 has few impact on the closed loop behavior. To model the a second pole, ωp, in the open loop we model

)()/1()()( 11

1212p

p

p ssssskAsC

(6.4.3)

10

12

11

12

121

12

12 1

11)(

k

ssk

kA

kAk

kA

AsSTF s

pp

p

(6.4.4)

Comparing it with the general system (6.3.1) we find A0=k -1 , (6.4.5)

1/5.0 pD . (6.4.6)

120 p , (6.4.7)

Fig. 6.4: (a) ideal integrator: ωpl=0, (b) including second pole ωp, (c) low pole 0<ωpl<<ωp.

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PM45: ωp = ω1. The most usual strategy to set the pole to ωp = ω1, which is typically said to optimize to 45° phase margin, because it results into a total phase shift of -135° at ω1. This corresponds to D=½ and poles at sp1,2 = -Dꞏω1ꞏexp(±60°). They cause 1.25dB peking in frequency domain and 16% step-response voltage overshoot in time-domain. BW3: 3rd order Butterworth: PM45 + ωp3=ω1 The PM45 polynomial is contained in a 3rd order Butterworth polynomial. Appending a simple 1st order lowpass to a PM45-system obtains a 3rd order Butterworth characteristics, i.e. no peaking and 8% voltage overshoot in time domain.

BW2: 2nd order Butterworth: ωp = 2ꞏω1. This yields 2/1D and poles at sp1,2 = -Dꞏω0ꞏexp(±45°). No peking in frequency domain, ca. 4% step-response voltage overshoot. Typically considered optimal with respect to settling time. AP2: ωp = 4ꞏω1. This yields D=1 and consequently the aperiodic borderline case, corresponding to two 1st order lowpasses in series, -6dB at ω1 and poles sp1,2 = -ω0. No peaking and no voltage overshoot, but slow.

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6.5 Placing a Zero on a 2nd Order Integrator According to Fig. 6.5(a) a integrating loop amplification is modeled as

2

222

skAC

2

22

2 )(

jC → 2

22

2 )(f

ffC (6.5.1)

with A2 being the 2nd order feed-forward and k the feedback network. In Fig. 6.5 we use ω’=ωꞏsec as both a log-functoin’s argument and a closed-loop amplification must be dimensionless. The Signal transfer function of the loop will be

10

22

2

221

222

2221

2

21

2

2

/1

/

11)(

k

sk

s

sk

kA

kAk

kA

AsSTF s

(6.5.2)

The system has a phase of -180° and is an ideal oscillator 0° phase margin against -180. To regain positive phase margin we have to place a zero, ωn, in the open loop we model:

2

22

2

22

2121 )/1()()(s

ss

sskAsC n

nn

(6.5.3)

10

22

22

2

22

221

21

211

21

21 1

)/(

)/(

11)(

kss

sk

kA

kAk

kA

AsSTF s

n

n

(6.5.4)

Comparing it with the general system (6.3.1) we find A0=k -1 , (6.4.5)

n

D2

2 , (6.4.6)

20 . (6.4.7)

Fig. 6.5: (a) ideal integrator: ωpl=0, (b) including zero ωn

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PM45: ωn = ω2. The most usual strategy is to place the zero at ωn = ω2. This corresponds to D=½ and consequently poles at sp1,2 = -Dꞏω1ꞏexp(±60°). Together with the zero this obtains 3.3dB peking in the frequency domain and 30% step-response voltage overshoot.

BW2: 2nd order Butterworth: ωn = ꞏω2 / 2 . This yields 2/1D and poles at sp1,2 = -Dꞏω0ꞏexp(±45°). Together with the zero this obtains 2.1dB peking in the frequency domain and 21% step-response voltage overshoot in time-domain. AP2: ωn = ω2 / 2. This yields D=1 and consequently two poles at sp1,2 = -ω2. However, together with the zero the system is not aperiodic but features 1.3dB peking in the frequency domain and 14% step-response voltage overshoot in time-domain.

(a) Bode diagram (b) step response

Photo 6.5: Matlab screen: yellow: ωn= ω2, PM=45°, red: Butterworth poles: ωn= ω2/ 2D , blue: ωn= ω2/2, poles of aperiodic borderline case.

Listing 6.5: Matlab code generating Fig. 6.3

% Filter: 2 poles, 1 zero Hs_M45=tf([1/1 1],[1 1 1]); Hs_BW2=tf([1/sqrt(0.5) 1],[1 sqrt(2) 1]) Hs_AP=tf([1/0.5 1],[1 2 1]); figure(1); step(Hs_AP,Hs_BW2,Hs_M45); grid on; figure(2); h=bodeplot(Hs_AP,Hs_BW2,Hs_M45); grid on; %setoptions(h,'FreqUnits','Hz','PhaseVisible','on');

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7 Designing PID Controllers

2210

2210)(

sbsbb

sasaasH

pidpidpid

pidpidpidspid

22

11

22

110

1)(

zczc

zdzddzH

pidpid

pidpidpidzpid

7.1 General Control System Considerations

Fig. 7.1: (a) PID controller and (b) its Bode diagram A PID controller as illustrated in Fig. 7.1(a) is often written as

s

sKsKKsKK

s

KsH dpi

dpi

PID

2

)(

(7.1.1)

Using Ki = ωi = 1/Ti and Kd = 1/ωd = Td yields

dp

iPID

sK

ssH

)( (7.1.2) or D

lp

iPID

sTK

sTsH

1

)( . (7.1.3)

The significance of ωi and ωd is isllustrated in Fig. 7.1(b) as cross-over frequencies of integrator and differentiator part. Including poles ωp1, ωp2:

21 /1)(

pdp

p

iPID s

sKK

s

KsH

(7.1.4)

1. The inclusion of a pole ωp1 > 0 is optional. It may model a finite amplification of an

amplifier and LTspice needs it to avoid a divide-by-zero error at s=0 (i.e. operating point). 2. The inclusion of an additional pole ωp < ∞ is physically sound and mathematically

inevitable. It avoids infinite step and impulse responses and stabilizes the digital sysem. Exercise 7.1: Matlab/Simulink (R2018a) models the differential part as Kd N / (1+N/s). How does N depend on ωp2 ? (Find the solution on the bottom of the next page.)

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7.2 Setting Kp , poles and zeros independently Ansatz:

2

2121

21

2

2121

21

21

21

1

1

))((

))(()(

ss

ss

Kpss

ssconstsH

pppp

pp

nnnn

nn

pp

nnPID

(7.1.5)

Comparing it to

2210

2210)(sbsbb

sasaasH PID

(7.1.6)

delivers

21

210

nn

nnpKa

, pKa 1 , 21

2nn

pKa

, (7.1.7)

21

210

pp

ppb

, 11 b , 21

2

1

pp

b

. (7.1.8)

Translation to the time-discrete domain yields

221

2210

1)(

zczc

zdzddzH PID

(7.1.9)

Listing 7.2: Function f_c2d_bilin translating HPID(s) → HPID(z) using bi-linear substitution.

function Hz = f_c2d_bilin_order2(Hs,T) % fs2=2/T; a0=Hs(1,1); a1=Hs(1,2); a2=Hs(1,3); if size(Hs,1)==1; b0=1; b1=0; b2=0; else b0=Hs(2,1); b1=Hs(2,2); b2=Hs(2,3); end; as0=a0; as1=a1*fs2; as2=a2*fs2*fs2; bs0=b0; bs1=b1*fs2; bs2=b2*fs2*fs2; cs0=bs0+bs1+bs2; cs1=2*(bs0-bs2); cs2=bs0-bs1+bs2; ds0=as0+as1+as2; ds1=2*(as0-as2); ds2=as0-as1+as2; Hz = [[ds0 ds1 ds2];[cs0 cs1 cs2]]; if cs0~=1; Hz=Hz/cs0; end; -------------------------------------------- Solution to exercise 7.1: N = ωp2.

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8 Applications 8.1 Time-Continuous Applications

8.1.1 Linearization of a Time-Continuous Integrator

Rx

Cx

OAx

Rb

Ra

(a)Ua

Ub

Ux

Uvg

UB

Uy

0V

(c)

-xs

ax

bx

Rx

Cx

OAx

Rb

Ra

(a)U'a

U'b

U'x U'y

0VU'a

U'b

U'x U'y

Fig. 7.1.1: (a) Real Situation, (b) circuit linearized, (c) equivalent signal-flow model. First of all we have to linearize the circuit. Assume a 3-input integrator as shown in part (a) of the figure above. Its behavior is described by

xb

vgb

xx

vgx

xa

vgavgout CsR

UU

CsR

UU

CsR

UUUU

(7.1)

where the virtual ground voltage Uvg is given by VoutoffBvg AUUUU / (7.2)

with AV being the OpAmp’s amplification. To linearize (7.1) we have to remove the constant term, i.e. UB-Uoff. The amplifier’s offset voltage, Uoff, is either compensated for or neglected assuming Uoff0V. To remove UB we remember that any voltage in the circuit can be defined to be reference potential, i.e. 0V, and define U' = U – UB (7.3) U = U' + UB (7.4) This yields the circuit in Fig. part (b) which is linear in the sense of (2.1). Things are facilitated assuming also AV→ so that Uvg=UB so that U'vg=0V. Then (7.1) facilitates to

xb

b

xx

x

xa

aout CsR

U

CsR

U

CsR

UU

'''' (7.5)

It is always possible to factor out coefficients such, that the weight of one input is one, e.g.

sbUUaUU x

bxaout

'''' (7.7) with kx

x CR

1 (7.7),

a

x

R

Ra (7.8),

b

x

R

Rb (7.9)

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8.1.2 Application to a Time-Continuous 1st-Order System

R1

C1

OA1

Rb1

U'outU'in

0V

Uerr1

U'out1

F1

a0

Y

E1a1

b1

X(a) (b)

1

1s

U'in

U'out

E1

b1

(c)

Fig. 7.1.2: (a) Real Circuit, (b) general model, (c) particular model for circuit in (a). Fig. 7.1.2 (a) shows the analog circuit under consideration. Fig. part (b) illustrates the very general form of the topology. To get forward network A set b1=E1=0. Identify all paths a signal can take from X to Y. Assuming a linear system the sum of all those partial transfer function delivers the STF. Open-loop network B is found by summing all paths from Y to Y:

110011

FaaX

YA

bE

, (7.10) 110

FbY

YB

X

(7.11)

Adapting the general topology in part (b) to the particular model in Fig. part (c) we can select either ak or bk free. Let’s set ak=1. Here, with order k=1, we get

11 a , 00 a , 1

11

bR

Rb ,

111

1

CR ,

sF 1

1

(7.12)

Signal and noise transfer functions can then be computed from

11

1

11

1

1

1

11

110

)/(1

)/(

111

bssb

s

F

F

Fb

Faa

B

ASTF

.

Hence : 1

1

1

0

111

1

11

1 1

1

1

R

R

bCsRR

R

bsSTF bs

b

b

(7.13)

)/(1

1

1

1

1

1

1111 sbFbBNTF

=> 0

10

11

11

11

s

b

b

CsR

CsR

bs

sNTF

(7.14)

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8.1.3 Application to a Time-Continuous 2nd-Order System

F2 F1

a0

Y

E1a2

-b2

a1

b1

X

Y

E1

-b2

1

b1

X

1s

2s

R2U'in

C2 R1C1

OP2 OP1

Rb1Rb2

U'out

Uerr1

-1

Uerr2

0V 0V

U'out2 U'out1

(a)

(b)(b) (c)

Fig. 7.1.3: (a) Real Circuit, (b) general model, (c) particular model for circuit in (a). Fig. 7.1.3 (a) shows the analog circuit under consideration. Fig. part (b) illustrates the very general form of the topology. To get forward network A set b1=b2=E1=0. Identify all paths a signal can take from X to Y. Assuming a linear system the sum of all those partial transfer function delivers the STF. Open-loop network B is found by summing all paths from Y to Y:

2121100211

FFaFaaX

YA

bbE

, (7.15) 212110

FFbFbY

YB

X

(7.17)

Adapting the general topology in part (b) to the particular model in Fig. part (c) we can select either ak or bk free. Let’s set ak=1. Here, with order k=2, we get

12 a , 001 aa , 2

22

bR

Rb ,

1

11

bR

Rb ,

222

1

CR ,

111

1

CR ,

sF 2

2

,

sF 1

1

(7.17)

The signal transfer function can then be computed from

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ssb

sb

ssFFbFb

FF

FFbFb

FFaFaa

B

ASTF

212

11

21

12211

12

12211

122110

11)(11

=>

212112

21

bsbsSTF

(7.18)

We compare this result to the general 2nd-order model 200

2

200

2 2

sDs

AH ndOrder (7.19)

with DC amplification A0, cutoff frequency ω0 and damping constant D. (7.18)=(7.19) delivers

ndOrderHsDs

A

bsbsSTF 22

002

200

212112

21

2

Comparing coefficients of s delivers for DC amplification, cutoff frequency, damping factor

2

2

20

1

R

R

bA b (30)

2211

2120

1

CRCRb

b

(31) 1

2

1

21

0

11

22 C

C

R

RRbD

b

b

(7.20)

The noise transfer function is computed from

212112

2

212

11

1221112211 1

1

1

1

)(1

1

1

1

bsbs

s

ssb

sbFFbFbFFbFbB

NTF

Hence : 20200

2

2

212112

2

02

s

sDs

s

bsbs

sNTF

(7.21)

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8.2 Time-Discrete Applications

8.2.1 Time-Discrete Finite Impulse Response (FIR) Filter

z-1 z-1

a0a2ak

z-1

a1ak-1

yn

Y(z)

xn , X(z)

z-1 z-1 z-1

a0

a1

a2ak yn

Y(z)

xn

X(z)

Fig. 8.2.1: FIR filters in 1st (top) and second (bottom) canonical direct structure. Fig. 8.2.1 shows some time-discrete FIR-filters. FIR filters have no recursion, i.e. B=0. Therefore, there impulse response is finite and always stable. The symbol z-1 stands for a signal delay by one sampling-clock cycle. Can you identify the different topologies introduced in chapter 5? In a direct structure the impulse response taps can be directly adjusted by the coefficients. The topologies are canonic because the number of delay elements is equal to the filter order. 8.2.2 Time-Discrete Infinite Impulse Response (FIR) Filter

Fig. 8.2.2 shows some time-discrete IIR-filters. IIR filters have recursion, i.e. B≠0. Therefore, there impulse response is theoretically infinite. IIR filter design requires uppermost care to obtain stability. Can you identify the different topologies introduced in chapter 5?

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z-1

a0

a2

yn

Y(z)

z-1 ak

a1

z-1 z-1 z-1

-b2

-b1

xn,

X(z)

-bk

-bk

z-1

yn,Y(z)

xn , X(z)d2

-b2

z-1

-b1

z-1

d1dk d0

z-1

a0

-b1-b2

-bk

a2

yn

Y(z)z-1 ak

a1

xn

X(z)

Fig. 8.2.2: IIR filters in 1st (top) and second (bottom) canonical direct structure. The structure in the middle is not canonic because the number of delay elements is larger than the filter order.

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9 Conclusions A control loop model valid for both time-continuous and time-discrete domain descriptions is evaluated, discussed and applied to different circuit topologies. Stability issues are addressed.

10 References [1] M. Schubert, Laboratory "Analog Systems of 1. and 2. Order", available: http://homepages.fh-

regensburg.de/~scm39115/homepage/education/courses/psk/psk.htm. [2] M. Schubert, Laboratory "Delta-Sigma Modulation", available: http://homepages.fh-

regensburg.de/~scm39115/homepage/education/courses/psk/psk.htm. [3] Regensburg University of Applied Sciences, available: http://www.hs-regensburg.de/.