Leveraging Performance and Power Savings for Embedded Systems

8/7/2019 Leveraging Performance and Power Savings for Embedded Systems

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LEVERAGING PERFORMANCE ANDPOWER SAVINGS FOR EMBEDDED

SYSTEMS USING MULTIPLE TARGETDEADLINES

Presentation By:

DHANESH.M.S

Roll.No:2007

M.Tech (Electronics) with specialization inVLSI and Embedded systems

Guided By:

Mr.MANU.T.SLecturer

Dept. of ECE

TKI, Karuvelil


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CONTENTS:

INTRODUCTION

DVFS

TGPM-ALL FLOWCHART

FLOW CHART EXPLANATION TGPM-ALL ALGORITHM

TGPM-N FLOWCHART

TGPM-N ALGORITHM

PERFORMANCE COMPARISON

CONCLUSION

REFERENCES2


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INTRODUCTION:

Increasing the performance is one of thefundamental aim of embedded system design.

Our aim is to increase performance while keepingenergy consumption low.

To achieve this we define TGPM algorithm.

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DYNAMIC VOLTAGE AND FREQUENCYSCALING(DVFS):

P f V2

V f

P f 3

3 approaches: interval, inter-task , intra-task

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TGPM-ALL ALGORITHM.


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TGPM-ALLFLOW CHART:

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Pre processing steps

Queue

Compute f*

All constraints

met ?

Remove all test casesFrom queue.

Execute task at f*

Start

stop

Remove that testcases from queue.

Is queueempty ?

Execute task at full

speed.

Yes

YesNo

No


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PREPROCESSING STEP:

Task(Ti) Task cases(Tij)Dij , Pij , tij

tij = tijon + tij

off

Pass these values to a queue.

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Case P(ij

) tij

on tij

off Dij

i1 0.1 40 0 100

i2 0.1 10.001 0 20

i3 0.1 10 0 20

i4 0.3 30 0 60

i5 0.4 20 0 40

Case P(ij) t

ij

on tij

off Dij

i1 0.1 40 0 100

i23 0.2 10. 0 20

i4 0.3 30 0 60

i5 0.4 20 0 40

Case P(ij) t

ij

on tij

off Dij

i23 0.2 10 0 20

i5 0.4 20 0 40

i4 0.3 30 0 60

i1 0.1 40 0 100

Case P(ij) t

ij

on tij

off Dij

i5 0.4 20 0 40

i4 0.3 30 0 60

i1 0.1 40 0 100


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VERIFICATION:

Checks whether task gets completed as expected.

If yes, remove all other task case from the queueand operate at this frequency.

If No, remove that task case from the queue andrepeat this algorithm.

If queue is empty, operate at full speed.

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TGPM-ALL ALGORITHM:

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COMPLEXITY:

Checks test cases until appropriate test cases areselected.

If no: of test cases are very large and no test casegives correct frequency, then after examining all thetest case task has to be completed at full speed.

This will increase the complexity with out anybenefit.

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TGPM-N ALGORITHM.


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Pre processing steps & k=0

Queue

Compute f*

All constraintsmet ?

Remove all test casesFrom queue.

Execute task at f*

Start

stop

Remove that testcases from

queue,k=k+1

Is queueempty ?

Execute task at full

speed.

Yes

Yes

No

No

Yes

NoIs k=N?

TGPM-NFLOW CHART:


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This algorithm keeps track of the number of failedtest case attempts for task T.

If it meets the predefined value N, it will discardremaining test cases for the task.

Execute the task at full speed until completion.

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TGPM-N ALGORITHM

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PERFORMANCE COMPARISON;

EFFECTS OF Poff,C AND ti*off

Effects of these parameters are similar on allDVFS-based power management schemes.

As (poff

/pon

(f)) increases, off-chip componentsconsume relatively more energy.

Increased switching capacitance (C) and off-chipworkload reduce energy-efficient frequencies.

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EFFECTS OF TEST CASE SIZE ON ENERGYCONSUMPTION.

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TGPM-ALL slowly deteriorates as the number oftest cases and failed test cases increases.


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EFFECTS OF SLACKS ON ENERGYCONSUMPTION.

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TGPM-ALL and BEST have very similar sensitivity toavailable slacks.


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EFFECTS OF TEST CASE SIZE ONEFFICINCENCY.

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TGPM-1 ensures shorter completion of tasks andefficient frequency assignment by switching to fullspeed after the most probable test case fails to hold.


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CONCLUSION:

TGPM algorithm is introduced to increaseperformance while keeping energy consumptionlow

There are two versions of this algorithm TGPM-ALLand TGPM-N

Can save up to 60% of CPU power by using thisalgorithm.

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REFERENCES:

i. Edward Y. Y. Kan , W. K. Chan and T. H. Tse.Leveraging Performance and Power Savings forEmbedded Systems using Multiple TargetDeadlines, Quality Software (QSIC), 2010 10th

International Conference, IEEE.ii. T. K. Tan , A. Raghunathan , and N. K. Jha.

Embedded Operating System Energy Analysisand Macro-modeling, IEEE.

iii. S. Boyd and L. Vandenberghe. Convex

Optimization. Cambridge University Press,Cambridge, 2004.

iv. http://www.stanford.edu/class/ee364b/lectures/trunc_newton_slides.pdf 21
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5562736http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5562736http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5562736http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5562736

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Leveraging Performance and Power Savings for Embedded Systems