LED12 Intermediate Cardfile System - Hitachi Rail STS...known as Ansaldo STS, and Union Switch & Signal Inc. (hereinafter STS). This document has been furnished to you on the following

SM 9759 1000 Technology Drive, Pittsburgh, PA 15219 645 Russell Street, Batesburg, SC 29006

Microlok II LED12 Intermediate Cardfile System

STS Part No. N180030xx

N180031xx


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 i

Proprietary Notice This document and its contents are the property of Hitachi Rail STS, formerly known as Ansaldo STS, and Union Switch & Signal Inc. (hereinafter STS). This document has been furnished to you on the following conditions: no right or license under any patents or any other proprietary right in respect of this document or its content is given or waived in supplying this document. This document and its contents are not to be used or treated in any manner inconsistent with the rights of STS, or to its detriment, and are not to be copied, reproduced, disclosed to others, or transferred without the prior written consent of STS.

Important Notice STS constantly strives to improve our products and keep our customers apprised of changes in technology. Following the recommendations contained in the attached service manual will provide our customers with optimum operational reliability. The data contained herein purports solely to describe the product, and does not create any warranties. Within the scope of the attached manual, it is impossible to take into account every eventuality that may arise with technical equipment in service. Please consult your local STS Account Executive in the event of any irregularities with our product. We expressly disclaim liability resulting from any improper handling or use of our equipment, even if these instructions contain no specific indication in this respect. We strongly recommend that only approved STS spare parts be used as replacements.


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 ii

Revision History REV. DATE NATURE OF REVISION

Original February 2008 Initial Issue

1 March 2019 Hitachi Rail STS Branding


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 iii

Table of Contents

1 Introduction ................................................................................................................... 1-1 1.1 Scope ......................................................................................................................................................1-1 1.2 References ..............................................................................................................................................1-1

1.2.1 STS Supporting Documentation ..............................................................................................................1-1 1.3 Safety ......................................................................................................................................................1-2 2 Description .................................................................................................................... 2-1 2.1 Specifications ..........................................................................................................................................2-4

2.1.1 Electrical ..................................................................................................................................................2-4 2.1.2 Mechanical ..............................................................................................................................................2-4

3 System Components Functional Description ............................................................. 3-1 3.1 Board Addressing ....................................................................................................................................3-1 3.2 VCOR ......................................................................................................................................................3-1 3.3 LED12 PCB (Slots 1 and 3) .....................................................................................................................3-2 3.4 IN8.OUT8 Mixed Vital I/O PCB (Slots 5 and 9) .......................................................................................3-9 3.5 OUT8.ISO Vital Output PCB (Slot 7) .....................................................................................................3-11 3.6 Power Supply/Conditional Power Supply (CPS) (Slot 10) .....................................................................3-12 3.7 CPU (Slot 12) ........................................................................................................................................3-12 3.8 Coded Track I/O (Slot 14) .....................................................................................................................3-14

3.8.1 MICROTRAX Coded Track PCB (Slot 14) ............................................................................................3-14 3.8.2 ECode Track PCB (Slot 14) ..................................................................................................................3-16

3.9 Communications Links ..........................................................................................................................3-18 3.9.1 Serial Communication Link (J13 - J14) .................................................................................................3-18 3.9.2 Ethernet Communication Link ...............................................................................................................3-18

3.10 PCB Description ....................................................................................................................................3-18 3.10.1 LED12 PCB...................................................................................................................................3-19 3.10.2 Power Supply/Conditional Power Supply (CPS) ...........................................................................3-21 3.10.3 IN8.OUT8 Mixed Vital I/O PCB .....................................................................................................3-23 3.10.4 OUT8.ISO Vital Output PCB .........................................................................................................3-25 3.10.5 CPU ..............................................................................................................................................3-27 3.10.6 MICROTRAX Coded Track PCB ..................................................................................................3-30 3.10.7 ECode Track PCB ........................................................................................................................3-32


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 iv

4 Configuring of the Network Interface Adapter ............................................................ 4-1 4.1 Selecting the Ethernet Cable ...................................................................................................................4-1 4.2 Configuring Internet Explorer to Access the NIA Configuration Screens ................................................4-1

4.2.1 22BChecking Internet Explorer ...............................................................................................................4-1 4.2.2 Deleting Saved Temporary Internet Files ................................................................................................4-5

4.3 15BConnecting NIA to a PC for Configuration ........................................................................................4-7 4.4 16BAccessing the NIA Configuration Page .............................................................................................4-8 4.5 17BConfiguring the NIA ...........................................................................................................................4-9 4.6 18BNIA Configuration Options 3B .........................................................................................................4-14

4.6.1 24BChanging Network Settings .............................................................................................................4-14 4.7 19BUploading new NIA Firmware .........................................................................................................4-14 4.8 20BIdentifying IP Addresses of Digi-based Devices on a Network .......................................................4-16 4.9 21BErasing the Existing Configuration File ...........................................................................................4-18 4.10 Troubleshooting .....................................................................................................................................4-20 5 RAIL Team and Technical Support .............................................................................. 5-1


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 v

List of Figures

Figure 2–1 - Typical Full Configuration of an LED12 Intermediate Cardfile System ..........................................2-2 Figure 2–2 - LED12 Intermediate Cardfile (Standard Wall-Mount Configuration – w/o PCBs) .........................2-5 Figure 3–1 - LED12 Intermediate Cardfile System Motherboard .......................................................................3-1 Figure 3–2 - LED12 Intermediate Cardfile System Standard Internal VCOR Wiring .........................................3-3 Figure 3–3 - Battery Wiring for Isolated LED12 Power ......................................................................................3-4 Figure 3–4 - LED12 Output Wiring without Regulator Sharing ...........................................................................3-6 Figure 3–5 - LED12 Output Wiring with Regulator Sharing ................................................................................3-7 Figure 3–6 - LED12 Output Wiring with Regulator Sharing and Failover-to-Red ...............................................3-8 Figure 3–7 - IN8.OUT8T Slots No. 5 and No. 9 .................................................................................................3-9 Figure 3–8 - IN8.OUT8 Vital Output PCB Output Block Diagram ....................................................................3-10 Figure 3–9 - OUT8.ISO Slot No. 7....................................................................................................................3-11 Figure 3–10 - Complete Track Transmit and Receive Cycle Waveform (typical) ............................................3-15 Figure 3–11 - LED12 PCB Front Panel ............................................................................................................3-20 Figure 3–12 - Power Supply PCB Front Panel .................................................................................................3-22 Figure 3–13 - IN8.OUT8 PCB Front Panel .......................................................................................................3-24 Figure 3-14 - Out8.ISO Board Front Panel .......................................................................................................3-26 Figure 3–15 - CPU PCB Front Panel ................................................................................................................3-29 Figure 3–16 - MicroTrax Coded Track PCB Front Panel Track I/O PCB .........................................................3-31 Figure 3–17 - ECode Track PCB Front Panel ..................................................................................................3-34 Figure 4-1 - Accessing the Internet Options on Internet Explorer Version 6. .....................................................4-2 Figure 4-2 - Connections Tab on the Internet Options Box ................................................................................4-3 Figure 4-3 - LAN Settings Pop-Up Box ...............................................................................................................4-4 Figure 4-4 - Proxy Settings Pop-Up Box ............................................................................................................4-5 Figure 4-5 - Internet Explorer Internet Options Dialog Box ................................................................................4-6 Figure 4-6 - Delete Files Confirmation Dialog Box .............................................................................................4-6 Figure 4-7 - Low or No Connectivity Mode Balloon Message.............................................................................4-7 Figure 4-8 - NIA Login Dialog .............................................................................................................................4-8 Figure 4-9 - NIA Configuration Home Page .......................................................................................................4-9 Figure 4-10 - NIA Advanced Tools Page ..........................................................................................................4-10 Figure 4-11 - NIA Flash0/Directory Page .........................................................................................................4-11 Figure 4-12 - File Upload Page ........................................................................................................................4-12 Figure 4-13 - FLASH0/Directory Page ..............................................................................................................4-12 Figure 4-14 - Back Button in Web Browser on FLASH0/Directory Page ..........................................................4-13


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 vi

Figure 4-15 - Advanced Tools Page .................................................................................................................4-13 Figure 4-16 - Digi Module Front View Showing Yellow and Green LEDs .........................................................4-14 Figure 4-17 - GENERAL Section of the niacfg.ini File ......................................................................................4-14 Figure 4-18 - Command Line Shell Window.....................................................................................................4-15 Figure 4-19 - Digi Connect ME Tech Support Information Page ......................................................................4-17 Figure 4-20 - Utilities Specific to Your Operating System ................................................................................4-18 Figure 4-21 - Erases Flash Function Password Dialog Box .............................................................................4-19 Figure 4-22 - Erase Flash Function Confirmation Page ...................................................................................4-19

List of Tables Table 2-1 - LED12 Cardfile and Plug-In Components .......................................................................................2-3 Table 3-1 - Output Grouping...............................................................................................................................3-5 Table 3-2 - Power Supply PCB Specifications .................................................................................................3-12 Table 3-3 - Connector Data for TRACK I/O PCBs ...........................................................................................3-14 Table 3-4 - MicroTrax Track PCB Specifications .............................................................................................3-14 Table 3-5 - COM Port #3 J13/J14 Connector Pin-Outs ....................................................................................3-18 Table 3-6 - LED12 PCB Indications ..................................................................................................................3-19 Table 3-7 - Power Supply/CPS Indicators ........................................................................................................3-21 Table 3-8 - IN8.OUT8 PCB Indicators ..............................................................................................................3-23 Table 3-9 - IN8.OUT8 Board Specifications .....................................................................................................3-23 Table 3-10 - Vital Isolated Output PCB Indicators ............................................................................................3-25 Table 3-11 - OUT8.ISO Output Specifications .................................................................................................3-25 Table 3-12 - CPU Controls and Indicators .......................................................................................................3-27 Table 3-13 - MicroTrax Coded Track PCB Indicators ......................................................................................3-30 Table 3-14 - ECode Track PCB Indicators .......................................................................................................3-32


Copyright 2019 2019 SM 9759, Rev. 1, March 2019 1-1

1 Introduction

The MicrolokII LED12 Intermediate Cardfile System is a simplified Microlok II system. To eliminate external Input/Output (I/O) cables used in Microlok II system, the Printed Circuit Board (PCB) top rear connector now plugs into a motherboard-mounted mating connector. The motherboard carries all wiring from this connector to cage clamp terminals on the top portion of the motherboard (see Figure 2–1). I/O wires connect directly to these connectors.

Address jumpers for the LED12 and Track boards (the I/O board's addresses are preset) are located on the motherboard. Jumpers are also located on the motherboard that allow for inputs to the LED12 boards to be shorted together to support Constant Current Regulator sharing between LED signal outputs without the use of additional external wiring. The Electrically Erasable Programmable Read Only Memory (EEPROM) that stores system configuration is also located on the motherboard. The LED12 Intermediate Cardfile System motherboard also supports Ethernet-based communication through a connector at the top of the card file.

The Vital Cut-Off Relay (VCOR) is housed within the cardfile eliminating the need for external wiring and shelf or rack space for this relay. The system uses a relay as the VCOR. Refer to Table 2-1 for cardfile part numbers that correspond to the VCOR relay in use.

The LED12 Intermediate Cardfile System is for use with a nominal 12VDC supply only.

1.1 Scope

This manual describes the LED12 Intermediate Cardfile System and the PCBs in the card.

1.2 References

1.2.1 STS Supporting Documentation

PN-150B DC Plug-In Relay SM-4551

MicroTrax Coded Track Circuit SM-6470B

Microlok II System Description SM-6800A

Microlok II Hardware Installation SM-6800B

Microlok II System Startup, Troubleshooting, and Maintenance

SM-6800C

MicrolokII is a registered trademark of Union Switch and Signal (STS).



Microlok II System Application Logic Programming Guide

SM-6800D

Microlok II -ECode and I-Lok SM-6800E


SM-6800J

Microlok II OUT8.ISO Board and Enhancements for ECode and MICROTRAX

SM-6800L

Microlok II LED Signal System with LED12 Card

SM-6800N

1.3 Safety

Read and thoroughly understand this manual before attempting any of the procedures listed. Pay particular attention to:

WARNING and

CAUTION

statements that appear throughout this manual. Warning statements indicate conditions that could cause physical harm, serious injury, or loss of life. Caution statements indicate conditions that could cause damage to equipment.

Always observe standard precautions familiar to trained electrical technicians. Always adhere to all safety regulations stipulated by the railroad.



2 Description

This system design uses existing Microlok II Printed Circuit Boards (PCBs). It is used for MICROTRAX or ECode coded track circuits in applications where a plug-in system with set I/O and LED signaling is desirable.

The top rear PCB connectors and custom cables (used in Microlok II cardfile wiring) are replaced by the LED12 Intermediate Cardfile System motherboard. These connections are brought, via the motherboard, to front accessible WAGO connectors. These plug-in input/output connectors and a VCOR integral to the cardfile make the unit easier to install and replace. Systems are available for use with either a STS or ALSTOM style Vital Cut-Off Relay (VCOR).

The system supports the Microlok II software, including the generic system software (executive) and the Development System (compiler, reverse compiler, comparison tool, and maintenance tool). No software changes are required for this system.

Figure 2–1 shows a fully populated cardfile and Table 2-1 presents a description of the various components in the cardfile. Only the CPU and the Power Supply cards are required to make the system work. The other boards are based on customer application needs.

I/O to the PCBs are brought via the motherboard to WAGO connectors located at the top of the motherboard (See Figure 2–1).



US&S

0000

ABCDE

ON LINE

VPP ON

RESET

1234

ADJUST

ACTION

UP

DOWN

ACCEPT

REJECT

MENU

DOWN

UP

L R

68332CPU

RS-232DTEN17061301

POWER SUPPLY

5V ON

VCOR

OUT8.ISO

ON

OFF

POWERON

TRACK I/OSLOT #14

A+

A-

B+

B-

PIN 2 - TXDPIN 3 - RXDPIN 4 - RTSPIN 5 - CTSPIN 7 - COMPIN 8 - DCDPIN 15 - TXCLKPIN 17 - RXCLK

FUSE10A

BATT (-)TERM #5

BATT (-)TERM #4

BATT (+)TERM #3

BATT (+)TERM

ISS-PC

#1

BATT (+)TERM #2

5KP

16A

5678

TRACK

N451910-0701

+

VALID MESSAGERECEIVED

-TRACK SIGNALS

RECEIVE

MASTER

+


-TRACK SIGNALS

RECEIVE

SLAVE

Figure 2–1 - Typical Full Configuration of an LED12 Intermediate Cardfile System



Table 2-1 - LED12 Cardfile and Plug-In Components

Name Cardfile Slot No. Part No. Basic Functions

Cardfile NA N18003001 STS VCOR without Ethernet Communications

Cardfile NA N18003002 STS VCOR with Ethernet Communications

Cardfile NA N18003101 ALSTOM VCOR without Ethernet Communications

Cardfile NA N18003102 ALSTOM VCOR with Ethernet Communications

VCOR NA

N322500-701 (STS PN-150B) relay

A62-0125 (ALSTOM Type B1 Biased DC,

500 ohm relay

This is a vital relay used to remove battery power to the outputs, lamp or relay loads, when a critical fault has been detected.

Ethernet Communications

Module NA N17006202

Serial-to-Ethernet converter configured for use with the LED12 Intermediate Cardfile System.

LED12 Board 1 and 3 N17066101 Each board Controls 12 STS Colorlight LED Signals.

IN8.OUT8 Boards 5 and 9 N17061601(12V)

Provides same I/O functions as standard vital output PCB and vital input PCB on one board.

For vital output - it controls standard ± vital outputs.

For vital input – It receives standard ± vital inputs. (In Slot No. 5 the inputs are isolated from each other, and in Slot No. 9 they are not).

OUT8.ISO Board 7 N17065801 (12V) Includes 8 standard ± vital isolated outputs.

Power Supply PCB

10 N16661203

Regulates and protects external power input, conditions and converts the battery input voltage to the various voltage levels required for cardfile circuitry operation and energizes the VCOR relay under the control of the Central Processor Unit (CPU) board.

Microlok II Enhanced Power Supply with Front Panel:

N16661203 Power Supply PCB.

CPU PCB 12 N17061301

Provides system vital controlling logic, vital I/O management, external serial communications, application logic execution, internal and external diagnostics, event logging, and a user programming and diagnostics interface.



Name Cardfile Slot No. Part No. Basic Functions

Track Boards (MICROTRAX) 14 N451910-0701

Provides train detection in mainline AC coded track circuits. (Versions for non-cab applications and cab applications are at various frequencies.)

ECode Track Board 14 N17063901 Provides train detection in mainline DC coded track

circuits.

Fuse NA J071153 10 amp, 32volt fuse for the cardfile.

Network Interface Adapter NA N17006202 Provides the Ethernet connection for the Cardfile

2.1 Specifications

2.1.1 Electrical

Input Power System Battery from 9.8 to 16.2VDC, fuse protected (10A) (minimum voltage required for system start is 11.2VDC)

Power Connection There are five AAR terminals on the top panel of the cardfile for power connections.

2.1.2 Mechanical

The-following mechanical specifications are applicable to the LED12 Intermediate Cardfile System cardfile:

Dimensions 19"W x 16.76"H x 11.09"D

Material Stainless steel

Weight 30 pounds with a minimum card complement. Mounting The cardfile (Figure 2–2) is supplied with wall mounting ears

permanently attached to the cardfile rear. Optional mounting kits are available for rack (front) mounting (Part Number X18000802) or shelf (bottom) mounting (Part Number X180025021).



Figure 2–2 - LED12 Intermediate Cardfile

(Standard Wall-Mount Configuration – w/o PCBs)





3 System Components Functional Description

3.1 Board Addressing

Board addressing is user adjustable for the LED12 boards and the Track I/O board via jumpers located on the motherboard next to the respective PCB rear top connectors (See Figure 3–1). The CPU and Power Supply PCBs do not have addresses. The addressing for the IN8.OUT8 and OUT8.ISO PCBs is set in the motherboard traces and cannot be modified. They must be entered into the application program as the first three boards in the system (Refer to Section 3.4).

AARTERMINAL

STRIP

ADDRESSSELECT

JUMPERSADDRESSSELECTJUMPERS

EEPROM

J101 J1 J2 J3 J4 J5 J6 J100 J7 J8 J9 J10 J13

J14

J15

REGULATORSHARINGJUMPERS

Figure 3–1 - LED12 Intermediate Cardfile System Motherboard

3.2 VCOR

The Vital Cut-Off Relay (VCOR) is used by the LED12 Intermediate Cardfile System to control power to all vital outputs (See Figure 3–2). The CPU board controls this fail-safe



function. The CPU sends a steady 250Hz check signal to the CPS (on the Power Supply PCB), which uses it to generate the power for the relay coil. Under this control of the CPU board the VCOR switches power to all cardfile vital output circuits. The STS PN-150B vital biased relay incorporates a 400 ohm coil, and 6FB contacts consisting of low voltage silver-to-silver fronts and silver-to-silver backs.

Either a STS PN-150B relay or a ALSTOM A62-0125 relay may be used as the system VCOR. The cardfile part number is determined by the VCOR chosen for the system (See Table 2-1).

For a detailed description and information concerning the STS VCOR see the STS Relay Manual SM-4551.

3.3 LED12 PCB (Slots 1 and 3)

The LED12 Intermediate Cardfile System supports two LED12 PCBs (Slot Nos. 1 and 3) for the control of up to 24 aspects.

This LED12 PCB in combination with the Constant Current Regulator(s) enables the LED12 Intermediate Cardfile System CPU to directly operate STS Colorlight LED Signals. (Refer to Microlok II Service Manual SM-6800N for detailed information on the functionality and additional application information for the LED12 PCB and the STS LED Signal System.)

As shipped from the factory there are three straps provided on the AAR terminal block to distribute system battery to feed to the regulators (See Figure 3–2). The regulator and LED12 power can be isolated from the system power. To drive the aspects with an isolated source, remove the straps between Terminals 2 and 3 and between 4 and 5 (See Figure 3–3) leave the strap between Terminals 1 and 2. Connect the positive side of the isolated battery to Terminals 1 and the negative side to Terminal 5.



Cardfile VCORRelay Contacts

Term #1

Term #2

Term #3

Term #4

Term #5

CardfileAAR Terminal

Strip

NC

NC

NC

NC

NC

To J101 pins # 1 & 2

To J101 pins # 3 & 4

To J101 pins # 6 & 7

To pins # 7 & 8

To Vital Output B12

N12

PowerSupply

PCB

To J

J

1

1

0

0

1

1

pins # 11-14N12

To System B12

BVCOR 1

BVCOR 2

BVCOR 3

BVCOR 4

SystemBattery

Strap

Strap

Figure 3–2 - LED12 Intermediate Cardfile System Standard Internal VCOR Wiring



Term #1

Term #2

Term #3

Term #4

Term #5

CardfileAAR Terminal

StripNo Straps

To LED Signal Battery Common

System Battery

LED12 Isolated Battery

Figure 3–3 - Battery Wiring for Isolated LED12 Power

The cardfile motherboard includes jumpers that allow for the Constant Current Regulators (CCR) to be shared between multiple outputs without the use of additional external wiring. Note that CCRs can only be shared between outputs that will never be on at the same time. The motherboard allows for the grouping of three outputs per regulator, as shown in Table 3-1.



Table 3-1 - Output Grouping

LED 12 Board

Signal Outputs Jumper Jumper

Position 0 Jumper

Position 1

Board No. 1 (Slot 1)

1-3 SW7 IN2 is not shared IN2 is shared with IN1

SW8 IN3 is not shared IN3 is shared with IN1







Board No. 2 (Slot 3)









See Figure 3–4, Figure 3–5, and Figure 3–6 for typical output wiring. These figures only show LED12 Board No. 1 (Slot1: J1, J2, SW7-SW14), but the information is the same for LED12 Board No. 2 (Slot 3: J3, J4, SW15-SW22). The battery connections on J101 are for use with both of the LED12 boards.

• Figure 3–4 illustrates how to install three signals, each using their own regulator.

• Figure 3–5 illustrates how to install three signals that share one regulator. Note the position of jumpers SW7 and SW8.

• Figure 3–6 illustrates how to install three signals that share one regulator with failover-to-red. Note the position of jumpers SW7 and SW8 and the use of the external vital relay contacts to support the failover.

NOTE The failover to red function necessitates the addition of an external relay wiring as per Figure 3–6.



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BAT

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BAT

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BAT

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B12

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IN2

IN3

IN4

IN5

IN6

IN7

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IN9

IN10

IN11

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Figure 3–4 - LED12 Output Wiring without Regulator Sharing



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Figure 3–5 - LED12 Output Wiring with Regulator Sharing



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Figure 3–6 - LED12 Output Wiring with Regulator Sharing and Failover-to-Red



3.4 IN8.OUT8 Mixed Vital I/O PCB (Slots 5 and 9)

The two mixed vital I/O boards provide up to eight isolated inputs and eight non-isolated outputs. The eight isolated (+, –) individual vital inputs can be used for inputs such as switch machine correspondence (bipolar inputs require a relay interface) or OS track circuit occupancy.

In slot #5, The eight negative (–) inputs on the PCB have their own isolated floating N12 (individually isolated from system ground and all the other inputs). Note that because of the input isolation slot #5 has three Wago connectors (J5, J6, and J100) versus the two connectors for slot #9 (J9 and J10). Refer to Figure 3–7 for a depiction of these slots.

In slot #9, All eight negative (–) inputs on the PCB share a common floating N12 (isolated from system ground).

8IN8OUTSLOT #5

J6

IN1-

IN2-

IN3-

IN4-

IN5-

IN6-

IN7-

IN8-

IN1+

IN2+

IN3+

IN4+

IN5+

IN6+

IN7+

IN8+

J5

OUT1+

OUT1-

OUT2+

OUT2-

OUT3+

OUT3-

OUT4+

OUT4-

OUT5+

OUT5-

OUT6+

OUT6-

OUT7+

OUT7-

OUT8+

OUT8-

J100 J9 J10

8IN8OUTSLOT #9

OUT1+

OUT1-

OUT2+

OUT2-

OUT3+

OUT3-

OUT4+

OUT4-

OUT5+

OUT5-

OUT6+

OUT6-

OUT7+

OUT7-

OUT8+

OUT8-

IN1+

IN1-

IN2+

IN2-

IN3+

IN3-

IN4+

IN4-

IN5+

IN5-

IN6+

IN6-

IN7+

IN7-

IN8+

IN8-

SLOT 5 SLOT 9

Figure 3–7 - IN8.OUT8T Slots No. 5 and No. 9



All eight outputs share a common B12. The vital outputs are switched through a software controlled high-side switch (Refer to Figure 3–8 for a block diagram of the output).

WARNING The return of this output (from the relay) must be brought back to the appropriate negative return of the PCB. For example, output #1 of the PCB in Slot #5 runs from OUT1+ (on J100) to the output relay and then returns to OUT1– (on J100).

VCORRelay

House B12

ControlledExternalRelay

+-

OUT-connection on

J4, 6, 8, 10, or 12

Output“X”

AnalogGround

CPU Control

Polyswitch-ProtectedOutput “Contact”High-Side Switch

IN8.OUT8 PCB (12V)

InternalCardfileWiring

InternalCardfileWiring

CardfileInternal

Figure 3–8 - IN8.OUT8 Vital Output PCB Output Block Diagram



3.5 OUT8.ISO Vital Output PCB (Slot 7)

The LED12 Intermediate Cardfile includes a slot (Slot 7) for the use of an OUT8.ISO board. The board provides eight isolated outputs that are accessible at WAGO connectors J7 and J8 (Figure 3–9).

OUT8.ISOSLOT #7

J8

OUT1-

OUT2-

OUT3-

OUT4-

OUT5-

OUT6-

OUT7-

OUT8-

OUT1+

OUT2+

OUT3+

OUT4+

OUT5+

OUT6+

OUT7+

OUT8+

J7 Figure 3–9 - OUT8.ISO Slot No. 7

The vital isolated output PCB provides eight vital isolated outputs for double break control of relays and BiPolar relays. Each output provides a + and a – connection that is isolated from the house battery and other outputs.

The outputs are jumper selectable (JP1 – JP8) to drive normal vital relays or outputs can be combined to drive BiPolar relays.

Always verify that jumpers JP1 – JP8 are in the correct position before installation and applying power.

Output voltage is dependent on two factors, battery voltage and load resistance.



3.6 Power Supply/Conditional Power Supply (CPS) (Slot 10)

The power supply plugs into Slot No. 10 of the cardfile. Specifications for the power supply are shown in Table 3-2.

Table 3-2 - Power Supply PCB Specifications

Input Power PCB Section Output Power

9.8 – 32VDC* Enhanced Power Supply N16661203

5VDC at 5 amps – 12VDC at 2 amps + 12VDC at 1 amp

* LED12 Intermediate Cardfile System operates only at 12VDC

The Power Supply/CPS board serves a vital role in the fail-safe design of the LED12 Intermediate Cardfile System.

The power supply board performs these functions: • Conditional Power Supply (CPS) on the board generates the VCOR voltage (–9VDC to –

14VDC) to energize the VCOR relay in response to the 250Hz signal from the CPU.

• Produces regulated ±12V and +5V cardfile power from system battery.

Cardfile power is distributed to all system printed circuit boards through the motherboard to the 96-pin PCB connector.

The +12V output of the power supply board is not used as a source for any vital or non-vital outputs. External battery power (switched through the VCOR contacts) is used for this purpose.

Current draw on the battery is determined by the application configuration, (number of signals, cab signal carrier frequency, etc.).

3.7 CPU (Slot 12)

The CPU board contains the central controlling logic and diagnostic monitoring for the LED12 Intermediate Cardfile System. It plugs into Slot 12 of the cardfile.

The CPU performs the following functions: • Controls power to vital outputs through the cardfile power supply and an external VCOR

relay (fail-safe function).

• Generates a steady 250Hz check signal that is sent to the power supply board as long as the diagnostic checks performed continuously by the CPU detect no internal or external system faults.



• Failure of a diagnostic check results in the removal of the check signal to the power supply board CPS. This causes the CPS to remove the hold voltage from the VCOR 400Ω relay coil, resulting in the removal of power to all vital system outputs.

• Monitors external indications from vital input boards.

• Processes vital external indications and executing logic defined in the application software.

• Drives vital output boards as required by the application logic.

• Monitors and controls the serial communication port (COM 3).

• Monitors and controls the serial communication port (COM 4).

• Tests individual vital input and output channels for faults (in parallel with control of these channels) and responds to detected faults.

• Monitors system internal operation for faults and responds to detected faults.

• Records system faults and routine events in user-accessible memory.

• Responding to CPU board front panel switch inputs and operating the associated displays.

• Interacts with a laptop Personal Computer (PC) during system diagnostic operations, application logic programming, and executive software upgrading.

• The executive and application software is stored in four flash EPROMs that provide up to eight megabytes of memory. Flash EPROMs permit direct handling of the software using a laptop PC connected to the CPU board front panel serial port connector.

• Jumpers are provided on the board to lock or unlock the flash EPROMs for programming and to select the required programming voltage.

• Two independent banks (128 Kbytes total) of fast static Random Access Memory (RAM) (SRAM) [Static Random Access Memory] are provided on the CPU board for processing vital data. Events and errors are stored in up to four 256 Kbyte banks of low power SRAM. Error/event memory is maintained by a capacitor backup that provides up to four hours of short-term RAM protection.

• The CPU is also designed to store RAM-type data in one or two Personal Computer Memory Card International Association (PCMCIA) cards, using a board-mounted cardholder.

• Two alphanumeric displays on the CPU board provide menus allowing the display of information without having to connect a laptop PC. The two menus are the Reset and On-Line menus.



3.8 Coded Track I/O (Slot 14)

The LED12 Intermediate Cardfile System supports one Track I/O boards. Dependent on the application a MICROTRAX or ECode track board can be used in Slot 14 to provide the track circuit interface.

WAGO style connectors (J15 – See Figure 3–1) are used for the I/O connection. They are cage clamp termination, plug coupled with finger latches and coding keying fingers. See Table 3-3 for connector information.

Table 3-3 - Connector Data for TRACK I/O PCBs

Description WAGO Part Number Color "J" Numbers

J15 - Female Connector, 5 Poles 231-305/037-000 Orange J709146-1588

J15 - Header, 5 Poles 231-335/001-000 Orange J709146-1589

Coding Fingers 231-129 Gray J709146-1609

3.8.1 MICROTRAX Coded Track PCB (Slot 14)

The coded track circuit PCBs interface the Microlok II system to the mainline coded track circuits (with and without cab signals). The specifications for these boards is shown in Table 3-4.

Table 3-4 - MicroTrax Track PCB Specifications

STS Part No. Track Circuit Application

Track Circuit Operating

Power N451910-0701 General non-cab and 100Hz cab signal 9.8 to 16.2VDC

N451910-7601 Required for 40Hz cab signal 9.8 to 16.2VDC



The track code signal format is AC and is connected to the rails through a Track Interface Panel consisting of a transformer and a low impedance inductor. The MICROTRAX track code is bipolar, consisting of a pattern of positive and negative pulses. Each contains an equal number of short positive and short negative pulses, and an equal number of long positive and long negative pulses. The master sends a message very six seconds. The code message begins and ends with a 167 msec guard pulse and consists of pulses either 167



msec or 333 msec in duration with an amplitude of 2Vp-p. This code format allows for 23 possible codes of which 22 codes are available for user applications (Figure 3–10).

Two of the user codes are intended for non-vital purposes, such as train occupancy or tumble down. Twenty of the user codes are vital and are available for any purpose. The remaining reserved code is used to establish communication, referred to as Link-Up.

The coded track circuit is based upon a "handshake" type superiority protocol and the overall system track coding format must be designed for this feature. The track interface module mounted in the MICROTRAX unit is capable of operating one "master" and one "slave" portion of two separate track circuits. On the MICROTRAX Track board, track connections are designated "Master" and "Slave" and "+" and "–." Either side of the insulated rail joints can be designated Master or Slave; however, after one end of a track circuit is designated Master or Slave, the other end must be given the opposite designation.

TRANSMIT

GUARD

RECEIVE

2 SEC.

6 SEC.

2.0 V

Figure 3–10 - Complete Track Transmit and Receive Cycle Waveform (typical)

When establishing rail polarities, two rules must be observed: • Polarity must be staggered or alternated across a set of insulated joints. For example, if

the north rail is positive on the left side of the joints, the north rail must be negative on the right side of the joints.

• The rail must have the same polarity at both ends of the same circuit.

Because the coding format is low frequency AC, track circuit lengths in the range of 22,000 feet @ 3 ohms ballast/1000 feet can be attained.



The track code signal connects to the rails through a Track Interface Panel consisting of a transformer and a low impedance inductor. There are four different types of single-track interface panels that provide inductance levels ranging from 10 to 40 mH. The 10 mH panel offers about 10 ohms impedance at 150Hz and proportionately more impedance at higher frequencies. This makes the MicroTrax system compatible with highway crossing motion and predictor equipment without need of external blocking units. The 15 mH Track Interface Panel is designed for maximum compatibility with 86Hz crossing predictors and should be used where there is 60Hz noise interference.

NOTE Do not use wide-band joint couplers and do not use wide-band shunts as joint couplers.

For areas where there is 60Hz interference, a Termination Capacitor Printed Circuit Board (N16401801) may be mounted on the interface panel and is connected across the "line" terminals of the unit for filtering purposes.

3.8.2 ECode Track PCB (Slot 14)

The ECode track interface panel carries all coded track communications between the Microlok II system cardfile and the rails. The circuitry associated with the interface panel minimizes interference from other signals on the rails. The STS part number for the ECode track interface panel is N17600101.

Panel components include a series connected inductor, a replaceable surge protection board with 6.0 volt transzorbs, two fuses, and a series 0.25 ohm resistor that can be shorted out. These components are mounted on a 1/8 inch thick printed circuit board that is made to be rack mounted. External wiring to the track is made using two-way AAR terminal blocks. Wiring to the cardfile is made through a seven-way plug connector with cage clamp technology.

For cab signal applications, a 10 mH inductor (J702288) must be wired in series with the positive track terminal of the track interface panel. This will block the 100Hz cab signal from entering the ECode receiver.

The ECode coded track circuit option is compatible with all versions of Electro Code. ECode consists of two elements: a track PCB and a track interface panel. The ECode Track PCB interfaces with the LED12 Intermediate Cardfile System 's CPU, where the functions of track messaging and train detection are performed. Both the track PCB and the interface panel are dual units to handle two independent track circuits. The interface panel is designed for compatibility with highway crossing audio overlay equipment and provides secondary surge protection. It is functionally and mechanically equivalent to the Electro Code 5® (EC5) track interface panel – TIP-2. ECode operates at a fixed receiver sensitivity

Electro Code Electro Code 4 ® (EC4) and Electro Code 5 ® (EC5) are registered trademarks of GE Transportation Systems Global Signaling.



of 0.5 amperes and circuits are adjusted at the transmitter via 10 selected output voltages ranging from 1.0 to 2.5 volts.

The ECode Track PCB is linked to both the CPU board and the track interface panel. The CPU extracts information from the ECode Track PCB to determine track occupancy and track messages. The interface panel terminates on the track and is also connected to the ECode Track PCB.

ECode is compatible with the Electro Code® family of products.



3.9 Communications Links

3.9.1 Serial Communication Link (J13 - J14)

The LED12 Intermediate Cardfile System uses one communications link that can be daisy-chained to other units. COM Port No. 3 of the PCB connects via the motherboard to two, parallel-wired, 25-pin "D" male connectors (J13 and J14) located at the top right area of the motherboard (See Figure 2–1). The port can be used as an RS-232/423 communications link. See Table 3-5 for COM Port No. 3 Connector Pin-Outs.

Table 3-5 - COM Port #3 J13/J14 Connector Pin-Outs

Pin Number Signal

2 TXD (Transmit Data)

3 RXD (Receive Data)

4 RTS (Request to Send)

5 CTS (Clear To Send)

7 SYSTEM COMMON (N12)

8 DCD (Data Carrier Detect)

15 TXCLK (Transmit Clock)

17 RXCLK (Receive Clock)

3.9.2 Ethernet Communication Link

The LED12 Intermediate Cardfile System includes Ethernet communication capabilities on the motherboard accessible through COM4 on the CPU and an Ethernet jack located on the top of the cardfile. Note that only the 02 versions of the cardfile include the Ethernet capability. The 01 versions of the cardfile do not include Ethernet but if desired they can be updated at a later date by field-upgrading the cardfile to include the Network Interface Adapter (N17006202). This board is mounted on standoffs on the rear of the motherboard and communicates to the CPU though connectors J102 and J103.

Detailed information on configuring the Ethernet communication link can be found in Section 4.

3.10 PCB Description

Detailed descriptions for the Microlok II PCBs can be obtained from the Microlok II Service Manuals SM 6800A, B, C, D, E, J, L, and N. This section presents information on the PCBs unique to the LED12 Intermediate Cardfile System concerning these boards.



3.10.1 LED12 PCB

Table 3-6 lists the LED PCB indicators which are shown in Figure 3–11.

Table 3-6 - LED12 PCB Indications Item No..

(Figure 3–11) Label Indicator Purpose

1 1 – 12 LEDs (Yellow) Monitors outputs 1 through 12. When lit, indicates respective LED output is on.

2 Signal Fault LED (Red) Monitors signal faults. When lit, indicates signal output has

faulted.

NV PB

Note A flashing indicator denotes a burned out signal lamp.



1

LED12

2

3

4

5

6

7

8

9

10

11

12

SIGNALFAULT

NV. PB

1

2

Figure 3–11 - LED12 PCB Front Panel



3.10.2 Power Supply/Conditional Power Supply (CPS)

The front panel of the power supply is shown in Figure 3–12 and the indicators are listed in Table 3-7.

Table 3-7 - Power Supply/CPS Indicators

Item No. (Figure 3–12) Label Indicator Purpose

1 5V ON LED (Green) When lit, indicates 5V operating power on to other cardfile PCBs.

2 VCOR LED (Green) When lit, indicates conditional power on to VCOR relay (CPU diagnostics normal).



1

2

Figure 3–12 - Power Supply PCB Front Panel



3.10.3 IN8.OUT8 Mixed Vital I/O PCB

Indicators on the mixed vital I/O boards are listed in Table 3-8 and shown in Figure 3–13. Specifications for the boards are shown in Table 3-9.

Table 3-8 - IN8.OUT8 PCB Indicators


1 OUT1 - OUT8

LEDs (Yellow)

Monitor state of vital outputs 1 through 8. When lit, indicates respective output is turned on.

2 IN1 - IN8 LEDs (Green)

Monitor state of vital inputs 1 through 8. When lit, indicates respective input is turned on.

Table 3-9 - IN8.OUT8 Board Specifications

Output Specifications

STS Part No.

Voltage VBATT

Range

Load Resistance Range

Max. OFF Voltage

Min. ON Voltage

N17061601 12V 50 Ω - ∞ 0.75V VBATT - 1V

Input Specifications

STS Part No.

Nom. Input Voltage

Min. Voltage to Ensure ON State

Voltage to Ensure OFF

State

Max. Sustained Input Voltage

N17061601 12V 9.5V 7.0V or less 34V



IN 1

IN 2

IN 3

IN 4

IN 5

IN 6

IN 7

IN 8

OUT 1

OUT 2

OUT 3

OUT 4

OUT 5

OUT 6

OUT 7

OUT 8

1

2

IN8.OUT8

Figure 3–13 - IN8.OUT8 PCB Front Panel



3.10.4 OUT8.ISO Vital Output PCB

Indicators on the OUT8.ISO vital output board are listed in Table 3-10 and shown in Figure 3-14. Specifications for the boards are shown in Table 3-11.

Table 3-10 - Vital Isolated Output PCB Indicators

Item No. (Figure 3-14) Label Device Purpose

1 OUT1 - OUT8 LEDs (Yellow) Monitor state of vital outputs 1 through 8. When lit,

indicates respective output is turned On.

Table 3-11 - OUT8.ISO Output Specifications

Output Specifications STS

Part No.

Voltage VBATT

Range

Load Resistance

Range

Max. OFF Voltage

Min. ON Voltage

N17065801 12V 50 Ω - ∞ 0.75V ≈11.50V

N17065801 12V 400 Ω - ∞ 0.75V ≈12.50V

N17065802 24V 100 Ω -∞∞ 1.5V ≈23V

N17065802 24V 800 Ω - ∞ 1.5V ≈24V

NOTE Pairs of LEDs will flash briefly in sequence (top to bottom) during operation as the board performs the output tests.



OUT8.ISO

OUT1

OUT7

OUT6

OUT5

OUT4

OUT3

OUT8

OUT21

Figure 3-14 - Out8.ISO Board Front Panel



3.10.5 CPU

Table 3-12 shows the various controls and indicators on the front panel of the CPU and Figure 3–15 is an illustration of the CPU front panel.

Table 3-12 - CPU Controls and Indicators

Item No. (Figure 3–15) Label Device or

Indicator Purpose

1, 2 (none)

Two, four-character alphanumeric displays

Top display is Red

Bottom display is Green

On-site configuration programming menus and options.

Normal operating display is:

• The upper four-character display will continuously scroll the phrase STS MICROLOK II.

• The lower four-character display will continuously scroll the application name.

3 A, B, C, D, E LEDs (Yellow)

Select serial port with CPU front panel switches (9, 10, 11, &12) via the on-line serial test menu

A – Selected serial link is transmitting data.

B – Selected serial link has received a valid message.

C – Selected serial link has recognized the address in a received message.

D – Selected serial link is receiving a DCD signal.

E – Selected serial link has detected a receiver error.

4 1, 2, 3, 4, 5, 6, 7, 8 LEDs (Red) User-defined in application software.

5 ON LINE LED (Green) Lit indicates normal system operation (successful diagnostics).

If out: reset system.




Indicator Purpose

6 VPP ON

(Voltage Input Flash Programming)

LED (Yellow)

When lit, indicates FLASH +5V or +12V programming voltage enabled (via CPU board jumper).

Lit only during programming on CPUs without PCMCIA card installed.

Lit continually on CPUs with PCMCIA card installed.

7 RESET LED (Red) When lit, indicates that the system is in reset mode.

Normal operation = Off

8 RESET Momentary pushbutton When pressed, resets the CPU.

Also used to place the CPU in the reset mode.

9 MENU L/R Three-position (spring return-to-center) toggle switch

Used to search main program menu items shown on displays.

10 MENU UP/DOWN Three-position (spring return-to-center) toggle switch

Used to select main program menu items shown on displays.

11 ADJUST UP/DOWN Three-position (spring return-to-center) toggle switch

Used to cycle through configuration values shown on displays.

12 ACTION ACCEPT/ REJECT

Three-position (spring return-to-center) toggle switch

Executes or cancels menu items shown on displays.

13 RS-232 DTE

Diagnostic Link Connector

DB9, RS-232 connector (DTE)

Used for connection to PC laptop computer for system monitoring/diagnosis



UP

1

4

8

11

12

13

10

9

765

3

2

Figure 3–15 - CPU PCB Front Panel



3.10.6 MICROTRAX Coded Track PCB

Table 3-13 shows the various controls and indicators on the front panel of the MicroTrax Coded Track PCB and Figure 3–16 is an illustration of the MicroTrax Coded Track PCB front panel.

Refer to Service Manual SM-6470B for maintenance and monitoring procedures.

Table 3-13 - MicroTrax Coded Track PCB Indicators


1 TRACK SIGNALS + (MASTER) LED (Red)

When flashing, indicates Master track circuit "+" code pulse (alternating with − LED).

When dark, no Master track circuit activity.

2 TRACK SIGNALS − (MASTER) LED (Red)

When flashing, indicates Master track circuit "-" code pulse (alternating with + LED).

When dark, no Master track circuit activity.

3 RECEIVE (MASTER) LED (Red)

When lit, indicates code received from Slave end of track circuit.

When dark, indicates code transmission to Slave end of track circuit.

4 VALID MESSAGE

RECEIVED (MASTER)

LED (Red)

When lit, indicates valid message received from Slave end of track circuit.

When dark, indicates Master end track circuit message not accepted (track circuit shunted or in remove-shunt mode).

5 TRACK SIGNALS + (SLAVE) LED (Red)

When flashing, indicates Slave track circuit "+" code pulse (alternating with − LED).

When dark, no Slave track circuit activity.

6 TRACK SIGNALS − (SLAVE) LED (Red)

When flashing, indicates Slave track circuit "-" code pulse (alternating with + LED).

When dark, no Slave track circuit activity.

7 RECEIVE (SLAVE) LED (Red)

When lit, indicates code received from Master end of track circuit.

When dark, indicates code transmission to Master end of track circuit.

8 VALID MESSAGE

RECEIVED (SLAVE)

LED (Red)

When lit, indicates valid message received from Master end of track circuit.

When dark, indicates Slave end track circuit message not accepted (track circuit shunted or in remove-shunt mode).



TRACK

N451910-0701

+


-TRACK SIGNALS

RECEIVE

MASTER

+


-TRACK SIGNALS

RECEIVE

SLAVE

1

2

3

4

5

6

78

Figure 3–16 - MicroTrax Coded Track PCB Front Panel Track I/O PCB



3.10.7 ECode Track PCB

Table 3-14 shows the various controls and indicators on the front panel of the ECode Track PCB and Figure 3–17 is an illustration of the ECode Track front panel. Configuration details for the ECode Track board can be found in Service Manual SM-6800E.

Table 3-14 - ECode Track PCB Indicators


Indicator Purpose

1 PUSH TO SELECT

DISPLAY MODE

Momentary pushbutton

switch

Push once to display the transmitted and received codes for tracks A and B.

Push twice to display the Received Current.

Push three times to display the Transmit Voltage.

Push four times to display the Transmit Current.

Push five times to return to the scrolling menu.

2

TRACK CODE LED (Red) When lit, the transmitted and received codes will be displayed on the CPU board.

REC CURRENT LED (Red) When lit, the receiver current will be displayed on the CPU board. Range from 0.0 to 3.6 amps in 0.1 amp increments.

XMIT VOLTAGE LED (Red) When lit, the transmit voltage will be displayed on the CPU board. Range from 1.0 to 2.5 volts, dependent on rotary switch position.

XMIT CURRENT LED (Red) When lit, the transmit current will be displayed on the CPU board. Range from 0.0 to 6.0 amps in 0.1 amp increments.

3 TRACK A, RECEIVER LED (Green)

When lit, indicates that the received current is greater than 0.5 amps. Flashing LED represents the received code.

4 TRACK A, TRANSMITTER LED (Red)

When lit, indicates that the transmitter is turned on and applying a DC signal to the track. Flashing LED represents the transmitted code.

5 TRACK A

TRANSMIT LEVEL ADJUST

10 position rotary switch

Sets the transmitter output voltage, dependent on track circuit length. Refer to adjustment table.

6 TRACK A XMIT switch

Three-position toggle switch

NORMAL position: Board configured for normal track circuit operation.

STEADY position: Steady DC energy applied to Track A at a level of 1.0 volt for troubleshooting.

OFF position: Transmitter A is turned off and receiver A is turned on steady for troubleshooting.




Indicator Purpose

7 TRACK B RECEIVER LED (Green)

When lit, indicates that the received current is greater than 0.5 amps. Flashing LED represents the received code.

8 TRACK B TRANSMITTER LED (Red)

When lit, indicates that the transmitter is turned on and applying a DC signal to the track. Flashing LED represents the transmitted code.

9 TRACK B

TRANSMIT LEVEL ADJUST

10-position rotary switch

Sets the transmitter output voltage, dependent on track circuit length. Refer to adjustment table.

10 TRACK B XMIT switch

Three-position toggle switch

NORMAL position: Board configured for normal track circuit operation.

STEADY position: Steady DC energy applied to Track B at a level of 1.0 volt for troubleshooting.

OFF position: Transmitter B is turned off and receiver B is turned on steady for troubleshooting.



PUSH BUTTON SWITCH

RED LEDs

TOGGLE SWITCH(3 POSITION)

GREEN LED

RED LEDROTARY SWITCH

(10 POSITION)

TOGGLE SWITCH(3 POSITION)

GREEN LEDRED LEDROTARY SWITCH

(10 POSITION)

TYPICAL CPU BOARDDISPLAY OF A

TRANSMITTED CODEAND A RECEIVED CODE

1

2

345

6

789

10

PUSH TOSELECTDISPLAY MODE

TRACK CODE

REC. CURRENT

XMIT CURRENT

DISPLAY ONCPU BOARD

RECEIVER

TRANSMITTER

TRANSMITLEVEL ADJUST

STEADY

OFF

NORMAL

RECEIVER

TRANSMITTERTRANSMITLEVEL ADJUST

STEADY

OFF

NORMAL

ECode TRACK

TRACK A

TRACK B

XMIT VOLTAGE

R = CODE RECEIVEDT = CODE TRANSMITTED

CODE 5 M

XMIT

XMIT

B5 M7RAT 3 M

6

42

8

0

6

42

8

0

Figure 3–17 - ECode Track PCB Front Panel





4 Configuring of the Network Interface Adapter

This section describes the procedure to configure the Network Interface Adapter (NIA).

4.1 Selecting the Ethernet Cable The Ethernet port is a standard eight-pin RJ45 connector which uses any of the widely available Category 5 (CAT5) or better cable (standard off-the-shelf cable). An Ethernet crossover cable is required to connect the NIA directly to a PC and a standard Ethernet cable is used to connect the NIA to the network.

4.2 Configuring Internet Explorer to Access the NIA Configuration Screens

To be able to use Internet Explorer to access the configuration functions of the NIA, you may need to do one or both of the following: • Specify the IP address range used by the NIA in Internet Explorer's Settings

• Delete the Temporary Internet Files saved by Internet Explorer

This section describes each of these procedures.

4.2.1 22BChecking Internet Explorer

You may need to configure your Internet Explorer settings to allow the browser to access the IP address range used by the NIA. The address range is specified by 169.254.*. To check Internet Explorer and to configure it, if necessary, do the following:

1. In the Internet Explorer Tools option click on Internet Options (Figure 4-1).



Figure 4-1 - Accessing the Internet Options on Internet Explorer Version 6.

2. In the Internet Options pop up box, click on the Connections tab. (See Figure 4-2). 3. In the Connections tab, click on the LAN Settings button.



Figure 4-2 - Connections Tab on the Internet Options Box



4. The LAN Settings pop-up box will open (Figure 4-3). If the “Use a proxy server for your LAN” is unchecked, leave it unchecked, and skip Steps 5 and 6. If the box is checked, proceed with Steps 5 and 6.

5. Click on the Advanced button to open the Proxy Settings pop-up box.

Figure 4-3 - LAN Settings Pop-Up Box



6. In the Proxy Settings pop-up (Figure 4-4), type 169.254.* in the Exceptions text box. 7. Click OK on all open pop-up boxes to close them. Internet is now ready to access the

NIA.

Figure 4-4 - Proxy Settings Pop-Up Box

4.2.2 Deleting Saved Temporary Internet Files To ensure the PC is working with the latest version of software it is necessary to delete any files which Internet Explorer (IE) may have saved from earlier installations. Delete these saved files using the following procedure. These temporary files can be deleted without causing any problems. 1. Start Internet Explorer.

2. Select Tools > Internet Options (Figure 4-1). The system will display the Internet Options dialog box.



3. Select the General tab (Figure 4-5).

Figure 4-5 - Internet Explorer Internet Options Dialog Box

4. Click on Delete Files button in the Temporary Internet files area. In response the system will display a confirmation box asking if you want to delete the temporary Internet files (Figure 4-6).

Figure 4-6 - Delete Files Confirmation Dialog Box



5. Click OK. The PC will then delete the temporary Internet files.

6. Click OK to close the Internet Options dialog box.

4.3 15BConnecting NIA to a PC for Configuration

You access the NIA configuration screen just as you would access a web site using a PC and Internet Explorer.

During the initial installation of the NIA, you must access the unit's configuration screens directly through its Ethernet port or through a hub or network switch that has no other unconfigured NIAs connected to it. This is because all new NIAs are set to the same IP address at the factory. If more than one device on a given network has the same IP address, none of those devices will be accessible.

Once the NIA is configured to communicate with the network, subsequent access and reconfiguring can be done from any PC connected to the network.

The Ethernet port of the NIA is set to IP address 169.254.1.10 at the factory. To use the Ethernet port in a network, you must set the IP address to a unique value using the following procedure.

1. Connect the PC to the NIA either directly with an Ethernet crossover cable, or through

an Ethernet hub or switch using a standard Ethernet cable. 2. To configure the PC to communicate with the NIA, wait for the PC to go check its local

area connections. A message will appear (Figure 4-7) that indicates the PC is in a limited connectivity mode. At this point you can access the NIA configuration page and set its IP address (Sections 4.4 and 4.5).

Figure 4-7 - Low or No Connectivity Mode Balloon Message

NOTE Be sure Internet Explorer’s Proxy settings allow for accessing the 169.254.* address range. See Section X4.1X for the procedure.



4.4 16BAccessing the NIA Configuration Page If the NIA unit is already functioning and connected to the network, you can access its configuration page from a PC anywhere on the network. See Section X4.8X for instructions on downloading a utility that can help you find the existing IP addresses of the NIA units on the network. From the NIA configuration page you can view current network settings and access links to functions for reconfiguring the unit. Use the following procedure to access the NIA configuration page. 1. Using Internet Explorer, type the IP address, 169.254.1.10, into the address box of the

browser and press the Enter key on your keyboard. Before granting you access to the configuration home page, the system will prompt you for a user name and password (Figure 4-8).

Figure 4-8 - NIA Login Dialog



2. Enter advanced for the user name, and objctl for the password. The system will display the NIA configuration page (Figure 4-9).

Figure 4-9 - NIA Configuration Home Page

In addition to a link to the Advanced Tools page, the NIA configuration page displays the part number and software version of the NIA, the MAC address, IP address, Subnet Mask, and Gateway address. The Mode is also displayed. Currently, only Peer Routing Mode is supported. For information on configuring the NIA using the Advanced Tools page, see Section X4.5X.

4.5 17BConfiguring the NIA All of the NIA configuration settings are maintained in the niacfg.ini file that resides in memory in the NIA. Configuring the NIA involves making changes to the niacfg.ini file. The following procedure takes you through the process of making changes to the niacfg.ini file. Using this procedure, you will: • Access the file residing on the NIA with Internet Explorer

• Download the file to your local PC

• Edit the file using a text editor

• Upload the edited file to the NIA memory

• Reboot the NIA



NOTE Before proceeding with this procedure, delete Internet Explorer's saved temporary Internet files. See Section X4.2.2X for the procedure.

1. Access the NIA configuration page. See Section 4.4 for the procedure. 2. On the NIA configuration page, click on the Network Adapter Advanced Options link

(Figure 4-9). The system displays the Advanced Tools page (Figure 4-10).

Figure 4-10 - NIA Advanced Tools Page



3. Click on the Flash0 directory link. One or more files will appear on the screen as shown

in Figure 4-11.

Figure 4-11 - NIA Flash0/Directory Page

4. Click on the niacfg.ini file to open it for editing. The system will download the file to the PC and open it with the PC’s text editor.

5. Edit the settings in the niacfg.ini file. In the initial configuration of the NIA, you must specify a unique IP address for the unit in this configuration file. You may also specify any or all of the additional configuration options in this file. The configuration options are described in Section 4.6 .

6. When you have finished editing the niacfg.ini file, save it to a specific location on the PC, such as the Desktop, and note the location. You will need to find this file again in the Upload process. At this point you can close the text editor. This will return you to the NIA Flash0/directory page (Figure 4-11).

7. Upload the revised niacfg.ini file to the NIA as follows: a. Return to the Advanced Tools page (Figure 4-10) by clicking on the Back button on

your web browser as shown in Figure 4-14.

b. Click the UPLOAD link to open the File Upload page (Figure 4-12).

c. Make sure “Select a directory” is set to FLASH0/. Click on the Browse . . button and select the niacfg.ini file that you just edited and saved. Click on the Upload button to upload the file.



Figure 4-12 - File Upload Page

d. While the file is uploading, the screen won’t change. When it is finished, the system displays the FLASH0 file list as shown in XFigure 4-13X.

Figure 4-13 - FLASH0/Directory Page 8. Return to the Advanced Tools page by clicking on the Back button on your web browser

as shown in Figure 4-14.



Figure 4-14 - Back Button in Web Browser on FLASH0/Directory Page

9. Reset the NIA by clicking on the Reboot Digi button (Figure 4-15.) (Digi is the name of the electronic device in the NIA which stores the configuration files and includes the Ethernet connection, the Digi EPROM chip, and two LED indicators as shown in Figure 4-16.)

Figure 4-15 - Advanced Tools Page

10. The green LED on the Ethernet connection on the front of the NIA will come on while it is booting. When it has booted up, the green LED will go out, and the yellow Ethernet LED will turn off for a brief moment. A few seconds after the yellow LED comes on again, the NIA is fully running. After the NIA has been rebooted, it will use the new settings, including the IP address you specified in the edited niacfg.ini file.



YELLOW LED (LINK STATUS)

GREEN LED(NETWORK ACTIVITY/DIAGNOSTIC)

Figure 4-16 - Digi Module Front View Showing Yellow and Green LEDs

4.6 18BNIA Configuration Options 3B

4.6.1 24BChanging Network Settings You may need to change network settings in addition to the IP address, such as the netmask and gateway. These settings are in the [GENERAL] section niacfg.ini file, as shown in XFigure 4-17X. This is the same section as the IP address. To access these settings see Section X4.5X for the procedure.

NOTE Changes to the configuration file should be made only with information supplied by the networking or IT personnel.

[GENERAL] IP=192.168.1.10 NETMASK=255.255.0.0 GATEWAY=192.168.1.1 DHCP is not supported.

Figure 4-17 - GENERAL Section of the niacfg.ini File

4.7 19BUploading new NIA Firmware The design of the NIA includes a Digi-Connect ME (Micro Embedded) device server. The server, a file system, and user data are maintained on a flash EPROM that is part of the device server. From time to time, upgrades to the firmware, the manufacturer's software that implements the device server and file system, are made available by the manufacturer (Digi International). These upgrades typically include minor bug fixes and enhancements of features. This section describes how to obtain and install a firmware upgrade from the manufacture.



CAUTION

There is no way to recover if the firmware is corrupted. To obtain and install the latest firmware image from the manufacturer, do the following:

1. Download the updated firmware from the Digi International website (www.digi.com) to a

location on your PC, such as the root directory (C:\). Remember this location to use later.

2. Open a command line shell in Windows® by selecting Start>All Programs>Accessories>Command Line Shell.

The system displays the command line shell as shown in Figure 4-18.

Figure 4-18 - Command Line Shell Window 3. Using the cd command, change the directory to the one where you downloaded the

firmware in Step 1. If you saved your new firmware file to the root directory, type the following on the command line and press the Enter key.

cd C:\ 4. Establish an ftp connection to the Digi typing the ftp command in the command shell and pressing the Enter key.

C:\>ftp 169.254.1.10

The system will prompt you for a username, as follows: User name:

5. Type (none) after the prompt for your username as follows and press the Enter key: User name: (none) The system will prompt you for a password, as follows: password:

6. Type (none) after the prompt for your password as follows and press the Enter key: password: (none)



NOTE Be sure to include the parentheses with the word none.

The system will indicate that you have established an ftp connection with the following prompt:

ftp>

7. Start ftp binary transfer mode by typing the bin command after the ftp prompt and pressing the Enter key as follows:

ftp>bin

8. Upload the firmware by typing put and the file name, and pressing the Enter key as follows:

ftp> put image.bin While the file is uploading to the NIA, the prompt will disappear. When the upload process is

complete, the ftp> prompt will return as follows: ftp>

9. When the ftp> prompt returns, end the ftp connection by typing quit and pressing the Enter key as follows:

ftp>quit 10. The NIA unit will program itself and reboot in approximately 10 seconds. The green LED

on the Digi module (Ethernet Connector) (Figure 4-16) will come on while it is booting. When it has booted up, the green LED will go out, and the yellow Ethernet LED will turn off for a brief moment. A few seconds after the yellow LED comes on again, the NIA is fully running.

When uploading a new firmware or a new configuration file, the NIA may reboot itself

again. After the first boot, the NIA reads the new niacfg.ini file and stores the IP information into its config area. When it boots the second time, it uses the new IP address from the config area.

4.8 20BIdentifying IP Addresses of Digi-based Devices on a Network A utility program is available from Digi to identify the IP addresses and other information for Digi-based devices on the network. This section describes how to download that utility. If it should become necessary to acquire the IP address of an Ethernet port that is not known, you can use the Digi Discovery Utility to determine the port’s IP address. This utility can be downloaded using the following procedure: 1. Using a web browser, go to www.digi.com. 2. Click on the SUPPORT tab, and select “Diagnostics, Utilities and MIBs” from the pull-

down menu. 3. From the “Select Your Product for Support” pull-down menu, choose “Digi Connect ME”

and click SUBMIT.



The system displays the Digi Connect ME support page, part of which is shown in Figure 4-19 .

Figure 4-19 - Digi Connect ME Tech Support Information Page 4. Click on the Diagnostics, Utilities and MIBs link. A list of available utilities and a combo box for selecting OS-specific utilities displays on

the web page. 5. From the “OS Specific Diagnostics, Utilities, and MIBs” combo-box, select the operating

system of your workstation, (for example Microsoft Windows XP). The system displays the utilities specific to your operating system (Figure 4-20).



Figure 4-20 - Utilities Specific to Your Operating System 6. Download the executable utility, “Device Discovery Utility for Windows” by right-clicking

on the link in the list and selecting “Save Target As …” In the file box, browse to or create a directory in which to save the utility and note that

location for future use. (No installation is necessary, so no Start Menu item or Desktop icon is created. To run it, you will need to browse to the location of the file and double click on it.)

After downloading, the utility is ready to use.

4.9 21BErasing the Existing Configuration File If the file system on the NIA is not working, you may wish to completely erase the configuration file (niacfg.ini) from the embedded file system using the following procedure. 1. Make sure you have a known-good or factory-default-settings configuration file on hand

to upload after deleting the existing configuration file or rebooting the NIA. See Section 4.5 for information on downloading an existing configuration file or Section 4.6 for a listing of the factory-default-settings configuration file. The factory niacfg.ini file is on the CD that was shipped with the unit.

2. Access the NIA Configuration Home Page. See Section 4.4 for the procedure.



3. Click on the Network Adapter Advanced Options link (Figure 4-9). 4. On the Advanced Tools page, click on the Erase link (Figure 4-10).The system displays

a password box (Figure 4-21).

Figure 4-21 - Erases Flash Function Password Dialog Box 5. Type in erase for both the user name and password and click OK. The system will display the confirmation screen shown in Figure 4-22:

Figure 4-22 - Erase Flash Function Confirmation Page 6. First, try to correct the problem by deleting the configuration file. If that works, upload a

new configuration file. (See Section 4.5 .)



If deleting the configuration file does not correct the problem click the Erase Flash button.

The system will delete the configuration file (if it is not already deleted) and then reboot the NIA, thereby erasing the settings in Flash memory. After the NIA reboots, you can upload a new configuration file.

4.10 Troubleshooting The NIA is a simple and highly reliable unit which, when properly configured, should operate normally with no operator intervention. However, if a problem develops, or if a newly installed unit is not functioning normally, use the following strategies to help identify the problem: • Keep a secure backup copy of the configuration file. Use either the factory

configuration file (on the original CD shipped with the unit) or a customized version that you know works.

• Delete and replace the existing configuration file with a known-good or factory-default-settings configuration file. (See Section X4.9X.)

• Confirm that there is not another unconfigured NIA unit on the same switch or hub and that there is no other device with the same IP address.

• Confirm that the NIA is turned on, the power source is operating normally, and that power is being delivered to the connection point.

• Check the power cable connections and reseat the connectors if necessary.

• Check the serial cable connections and reseat the connectors if necessary.

• If you are able to access the Advanced Tools page (XFigure 4-15X) of the unit, click on Peer Routing Statistics. This will show statistics between the NIA and the Microlok II (serial data) for the Peer Routing. When the serial communication is working normally, the only statistics shown should be messages read from COM. If the BIT_RATE (the baud rate) is incorrect, additional statistics will be accumulated.



5 RAIL Team and Technical Support

The Rapid Action Information Link (RAIL) team was created in 1996 to serve the technical needs of current and potential STS customers. Convenient 24-hour access and a rapid resolution to customer problems are the trademarks of this organization. The RAIL team, which is staffed primarily by STS product and application engineers, is ready to assist and resolve any technical issues concerning the Microlok II system or any other STS product.

Any questions regarding the contents of this service manual should be directed to the RAIL team by telephone at 1-800-652-7276 or through Internet E-mail at [email protected].

mailto:[email protected]



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