CENG 311Computer Architecture

Lecture 1

Introduction to Computer Architecture

Asst. Prof. Tolga Ayav, Ph.D.

Department of Computer Engineeringİzmir Institute of Technology

Computer Design

Instruction Set Design

° Machine Language

° Compiler View

° "Computer Architecture"

° "Instruction Set Processor"

"Building Architect"

Computer Hardware Design

° Machine Implementation\

° Logic Designer's View

° "Processor Architecture"

° "Computer Organization"

“Construction Engineer”

Few people design computers! Very few design instruction sets!Many people design computer components.Very many people are concerned with computer function, in detail.

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The Big PictureWhat is inside a computer?How does it execute my program?

?

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The Big Picture• The Five Classic Components of a Computer

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I/O Bus

Memory Bus

Processor

Cache

MainMemory

DiskController

Disk Disk

GraphicsController

NetworkInterface

Graphics Network

interrupts

System Organization

I/O Bridge

Core Chip Set

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What is Computer Architecture?

• Coordination of levels of abstraction

I/O systemCPU

Compiler

OperatingSystem

Application

Digital DesignCircuit Design

• Under a set of rapidly changing Forces

Instruction SetArchitecture, Memory, I/O

Firmware

Memory

Software

Hardware

Interface BetweenHW and SW

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Levels of RepresentationHigh Level Language

Program

Assembly Language Program

Machine Language Program

Control Signal Specification

Compiler

Assembler

Machine Interpretation

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

lw $15, 0($2)

lw $16, 4($2)

sw $16, 0($2)sw $15, 4($2)

0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111

32

ALUctr

Clk

busW

RegWr

32

32

busA

32busB

5 5 5

Rw Ra Rb32 32-bitRegisters

Rs

Rt

Don’t Care(Rt)

RdRegDst

Extender

Mux

Mux

3216

imm16

ALUSrc

ExtOp

Mux

MemtoReg

Clk

Data InWrEn

32

Adr

DataMemory

32

AL

U

MemWr

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Compiler-Assembler

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Translation hierarchy for C

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Basic Elements

Functional Levels:•◙ Application Layer•◙ System Software•◙ Hardware Layer

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MIPS Assembly

move $t0, $t1add $t0, $zero, $t1sll $t1, $a1, 2 (reg $t1=k*4)lw $t0=4($t1) (reg $t0=v[k+1])...

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EPROM as a Programmable Logic Device

• ROMs are required for applications in which large amount of information needs to be stored in a nonvolatile manner. (Storage for microprocessor programs, fixed table of data, etc.) Another common application of the ROM is for the systematic realization of complex combinational circuits.

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FPGA Design

A field-programmable gate array is a semiconductor device containing programmable logic components called "logic blocks", and programmable interconnects. Logic blocks can be programmed to perform the function of basic logic gates such as AND, and XOR, or more complex combinational functions such as decoders or simple mathematical functions. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory.

A classic FPGA logic block consists of a 4-input lookup table (LUT), and a flip-flop:

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Soft Processors

A soft microprocessor (also called softcore microprocessor or a soft processor) is a microprocessor core that can be wholly implemented using logic synthesis. It can be implemented via different semiconductor devices containing programmable logic (e.g., FPGA, CPLD).

Notable soft microprocessors include:

MicroBlazeNios II

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μPabs

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Implementation in VHDL

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Running the CPU

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Pipelining

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