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Spring 08, Jan 15 ELEC 7770: Advanced VLSI Design (Agrawal) 1

ELEC 7770

Advanced VLSI DesignSpring 2007

Introduction

Vishwani D. Agrawal

James J. Danaher Professor

ECE Department, Auburn University

Auburn, AL 36849

[email protected]

http://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Fall08/course.html
mailto:[email protected]://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Fall08/course.htmlhttp://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Fall08/course.htmlmailto:[email protected]


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Related Course: VLSI Design

ELEC 5770/6770: Review of MOS transistor

fundamentals, CMOS logic circuits; VLSI

fabrication and design rules; clocking strategies

and sequential design; performance estimation;memories and programmable arrays; standard

cell design methodologies; computer aided

design (CAD) tools.


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Related Course: Computer-Aided

Design of Digital Circuits

ELEC 5250/6250: Hardware components of

multiprocessor systems including processor,

interconnection, memory, and control

architectures; Software elements of parallelprocessing including inter-processor

communication, task partitioning, task mapping

and scheduling, load balancing, programming

languages, and parallel algorithms.


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Related Course: Low-Power Design of

Electronic Circuits

ELEC 5270/6270: Design of digital circuits and

systems for reduced power consumption, power

analysis algorithms, low-power MOS

technologies, low-power design architectures forFPGA, memory and microprocessor, reduction

of power in testing of circuits.


5/15


Related Course: VLSI Testing

ELEC 7250: Introduction to VLSI testing, test

process and automatic test equipment, test

economics and product quality, fault modeling,

logic and fault simulation, testability measures,combinational and sequential circuit test

generation, memory test, analog test, delay test,

IDDQ test, design for testability, built-in self-test,

boundary scan, analog test bus, system test andcore test.


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Related Course: Digital System Design

ELEC 4200: Hierarchical, modular design of

digital systems; computer-aided digital system

modeling, simulation, analysis, and synthesis;

design implementation with programmable logicdevices and field programmable gate arrays.


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This Course: Advanced VLSI Design

ELEC 7770:Review of CMOS logic circuits;

impact of fabrication issues on design; high

speed switching circuits; high performance

memory structures; advanced clockingstrategies and clock distribution; performance

optimization; deep submicron design issues;

ASIC design flow: logic synthesis, placement

and routing; design verification; low powerdesign.


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Course Objectives and Evaluation

Objectives: Learn and participate in the process of modern VLSI

design, verification, and test.

Develop an understanding for the advanced design

concepts in modern VLSI technologies. Evaluation:

Project (35%)

Homeworks, three or four (30%)

Final exam (35%)

Original Schedule: May 1, 2008, Broun 306, 7:009:30PM

Rescheduled: Take-home, assigned Apr. 26, 2008, dueMay 1, 2008.


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Course Outline

Nanotechnology: Present and future advances.

Projectsolve a design problem

Advanced Topics Technology trends and Moores law

Testing and design for testability

Energy efficiency

Signal integrity

Soft errors, fault-tolerant design

Verification, equivalence checking, binary decision diagrams

Advanced methods for design optimization

Linear programming

Retiming


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Reference Books

J. M. Rabaey, A. Chandrakasan, and B. Nikoli, DigitalIntegrated Circuits, A Design Perspective, SecondEdition, Prentice-Hall, 2003.

M. J. S. Smith,Application-Specific Integrated Circuits,

Addison-Wesley, 1997. N. H. E. Weste and D. Harris, CMOS VLSI Design, A

Circuits and Systems Perspective, Third Edition,Addison-Wesley, 2005.

W. Wolf, Modern VLSI Design, System-on-Chip Design,Third Edition, Prentice-Hall, 2002.


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Reference Books (Cont.)

M. L. Bushnell and V. D. Agrawal, Essentials of

Electronic Testing for Digital, Memory and Mixed-Signal

VLSI Circuits, Springer, 2000.

K. B. Schaub and J. Kelly, Production Testing of RF and

System-on-a-Chip Devices for Wireless

Communications, Boston: Artech House, 2004.

N. Maheshwari and S. S. Sapatnekar, Timing Analysis

and Optimization of Sequential Circuits, Springer, 1999.

G. De Micheli, Synthesis and Optimization of Digital

Circuits, New York: McGraw-Hill, 1994.


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Project

Focus on a design problem: Synthesis

Verification

Test

Power

Timing Computer-aided algorithm

Examine literature

Provide a solution methodology

Work out an example

Write a report

Give a class presentation


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VLSI Realization Process

Determine requirements

Write specifications

Design synthesis and Verification

FabricationManufacturing test

Chips to customer

Customers need

Test development

Design

Manufacture


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VLSI Design & Test Seminar Series

Must attend, starting January 23, 2008

http://www.eng.auburn.edu/~vagrawal/COURSE/

E7950_Spr08/D&TSeminar.html

Every Wednesday, Broun 235, 4PM
http://www.eng.auburn.edu/~vagrawal/COURSE/E7950_Spr08/D&TSeminar.htmlhttp://www.eng.auburn.edu/~vagrawal/COURSE/E7950_Spr08/D&TSeminar.htmlhttp://www.eng.auburn.edu/~vagrawal/COURSE/E7950_Spr08/D&TSeminar.htmlhttp://www.eng.auburn.edu/~vagrawal/COURSE/E7950_Spr08/D&TSeminar.html

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