LC75833E, LC75833W, LC75833JE 1/3 Duty General-Purpose LCD ...file.elecfans.com/web1/M00/0E/A7/pIYBAFocaqSASB6bAAfU9A0Ltm… · Input high-level voltage VIH CE, CL, DI, INH 0.8 VDD

© Semiconductor Components Industries, LLC, 2013 1 Publication Order Number : December 2013 - Rev. 0 LC75833E_W_JE/D

www.onsemi.com

ORDERING INFORMATION See detailed ordering and shipping information on page 23 of this data sheet.

* Computer Control Bus (CCB) is an ON Semiconductor’s original bus format andthe bus addresses are controlled by ON Semiconductor.

LC75833E, LC75833W, LC75833JE

1/3 Duty General-Purpose LCD Driver

Overview

The LC75833E, LC75833W, and LC75833JE are 1/3-duty general-purpose LCD display drivers that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75833E and LC75833W can drive an LCD with up to 105 segments directly, the LC75833JE can drive an LCD with up to 93 segments directly. The LC75833E and LC75833W and LC75833JE can also control up to 8 general-purpose output ports. Since the LC75833E, LC75833W, and LC75833JE use separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.

Features

Supports both 1/3 duty 1/2 bias and 1/3 duty 1/3 bias LCD drive under serialdata control

LC75833E, LC75833W: up to 105 segments LC75833JE: up to 93 segments (without the S12, S23, S24, S35 segment output pins from the LC75833E, LC75833W)

Serial data input supports CCB* format communication with the systemcontroller

Serial data control of the power-saving mode based backup function and allthe segments forced off function

Serial data control of switching between the segment output port and thegeneral-purpose output port functions

High generality, since display data is displayed directly without decoderintervention

Independent VLCD for the LCD driver block (VLCD can be set to any voltagein the range 2.7 to 6.0 volts, regardless of the logic block power-supplyvoltage.)

The INH pin can force the display to the off state

RC oscillator circuit

PQFP48 14x14 / QIP48E [LC75833E]

SPQFP48 7x7 / SQFP48 [LC75833W]

PQFP44 10x10 / QIP44M [LC75833JE]

SpecificationsAbsolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Note: The LC75833JE does not have the S12, S23, S24, S35 output pins.

Allowable Operating Ranges at Ta = –40 to +85°C, VSS= 0 V

Page 2

LC75833E, 75833W, 75833JE

Parameter Symbol Conditions Ratings Unit

Maximum supply voltageVDD max VDD –0.3 to +7.0 V

VLCD max VLCD –0.3 to +7.0 V

VIN 1 CE, CL, DI, INH –0.3 to +7.0 V

Input voltage VIN 2 OSC –0.3 to VDD + 0.3 V

VIN 3 VLCD 1, VLCD 2 –0.3 to VLCD + 0.3 V

Output voltageVOUT 1 OSC –0.3 to VDD + 0.3 V

VOUT 2 S1 to S35, COM1 to COM3, P1 to P8 –0.3 to VLCD + 0.3 V

IOUT 1 S1 to S35 300 µA

Output current IOUT 2 COM1 to COM3 3 mA

IOUT 3 P1 to P8 5 mA

Allowable power dissipation Pd max Ta = 85°C 150 mW

Operating temperature Topr –40 to +85 °C

Storage temperature Tstg –55 to +125 °C

Parameter Symbol ConditionsRatings

Unitmin typ max

Supply voltageVDD VDD 2.7 6.0 V

VLCD VLCD 2.7 6.0 V

Input voltageVLCD1 VLCD1 2/3 VLCD VLCD V

VLCD2 VLCD2 1/3 VLCD VLCD V

Input high-level voltage VIH CE, CL, DI, INH 0.8 VDD 6.0 V

Input low-level voltage VIL CE, CL, DI, INH 0 0.2 VDD V

Recommended external resistance ROSC OSC 39 kΩ

Recommended external capacitance COSC OSC 1000 pF

Guaranteed oscillation range fOSC OSC 19 38 76 kHz

Data setup time tds CL, DI: Figure 2 160 ns

Data hold time tdh CL, DI: Figure 2 160 ns

CE wait time tcp CE, CL: Figure 2 160 ns

CE setup time tcs CE, CL: Figure 2 160 ns

CE hold time tch CE, CL: Figure 2 160 ns

High-level clock pulse width tøH CL: Figure 2 160 ns

Low-level clock pulse width tøL CL: Figure 2 160 ns

Rise time tr CE, CL, DI: Figure 2 160 ns

Fall time tf CE, CL, DI: Figure 2 160 ns

INH switching time tc INH, CE: Figure 3 10 µs

Page 3

LC75833E, 75833W, 75833JE

Electrical Characteristics for the Allowable Operating Ranges

Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.)

The LC75833JE does not have the S12, S23, S24, S35 output pins.

Parameter Symbol ConditionsRatings

Unitmin typ max

Hysteresis width VH CE, CL, DI, INH 0.1 VDD V

Input high level current IIH CE, CL, DI, INH; VI = 6.0 V 5.0 µA

Input low level current IIL CE, CL, DI, INH; VI = 0 V –5.0 µA

VOH 1 S1 to S35; IO = –20 µA VLCD – 0.9 V

Output high-level voltage VOH 2 COM1 to COM3; IO = –100 µA VLCD – 0.9 V

VOH 3 P1 to P8; IO = –1 mA VLCD – 0.9 V

VOL 1 S1 to S35; IO = 20 µA 0.9 V

Output low-level voltage VOL 2 COM1 to COM3; IO = 100 µA 0.9 V

VOL 3 P1 to P8; IO = 1 mA 0.9 V

VMID 1 COM1 to COM3; 1/2 bias, 1/2 VLCD – 0.9 1/2 VLCD + 0.9 VIO = ±100 µA

VMID 2 S1 to S35; 1/3 bias, 2/3 VLCD – 0.9 2/3 VLCD + 0.9 VIO = ±20 µA

Output middle-level voltage*1 VMID 3 S1 to S35; 1/3 bias, 1/3 VLCD – 0.9 1/3 VLCD + 0.9 VIO = ±20 µA



Oscillator frequency fOSC OSC; ROSC = 39 kΩ COSC = 1000 pF 30.4 38 45.6 kHz

IDD 1 VDD; power saving mode 5 µA

IDD 2 VDD; VDD = 6.0 V, output open, fosc = 38 k Hz 250 500 µA

ILCD 1 VLCD; power saving mode 5 µA

Current drain ILCD 2 VLCD; VLCD = 6.0 V, output open 100 200 µA1/2 bias, fosc = 38 k Hz

ILCD 3 VLCD; VLCD = 6.0 V, output open 60 120 µA1/3 bias, fosc = 38 k Hz

2. When CL is stopped at the high level

Figure 2

Page 4

LC75833E, 75833W, 75833JE

VLCD1

VLCD2

VLCD

VSS

A06550

To the common segments driver

Except these resistors

s

tøH tøL

tr tf

tds tdh

tcp tcs tch

VIL

VIH

VIH

VIH

VIL

VIL

50%CL

CE

DI

A06551

VIH

tøL tøH

tf tr

tds tdh

tcp tcs tch

VIL

VIH

VIH

VIL

VIL

50%CL

CE

DI

A06552

Figure 1

1. When CL is stopped at the low level

Pin Assignments

Block Diagram


Page 5

LC75833E, 75833W, 75833JE

COM2 37COM3

VDDVLCD

VLCD1VLCD2

VSSOSCINHCECLDI 48

S24S23S22S21S20S19S18S17S16S15S14S1313

24

P1/

S1

1 12

P2/

S2

P3/

S3

P4/

S4

P5/

S5

P6/

S6

P7/

S7

P8/

S8

S9

S10

S11

S12

S25

2536

S26

S27

S28

S29

S30

S31

S32

S33

S34

S35

CO

M1

LC75833ELC75833W

A06549

34COM3VDD

VLCDVLCD1VLCD2

VSSOSCINHCECLDI 44

S25S22S21S20S19S18S17S16S15S14S1312

22

P1/

S1

1 11

P2/

S2

P3/

S3

P4/

S4

P5/

S5

P6/

S6

P7/

S7

P8/

S8

S9

S10

S11

2333

S26

S27

S28

S29

S30

S31

S32

S33

S34

CO

M1

CO

M2

LC75833JE

A06582

Commondriver

Address detector

Clockgenerator

Segment driver & latch

Shift register

INH

OSC

VDD

VLCD

VLCD1

VLCD2

VSS

DI

CL

CE

CO

M3

CO

M2

CO

M1

S35

S34

S9

S8/

P8

S2/

P2

S1/

P1

A06553

Pin Functions


Page 6

LC75833E, 75833W, 75833JE

CE: Chip enableCL: Synchronization clockDI: Transfer data

H

—

S1/P1 toS8/P8

S9 to S35

Pin

1 to 8

9 to 35

LC75833E,75833W

LC75833JE

1 to 8

9 to 31— O Open

Segment outputs for displaying the display data transferred by serial datainput. The pins S1/P1 to S8/P8 can be used as general-purpose output portswhen so set up by the control data.

COM1 COM2COM3

363738

323334

— O OpenCommon driver outputs. The frame frequency fO is given by: fO = (fOSC/384) Hz.

OSC 44 40

CECLDI

464748

424344

Serial data transfer inputs. Thesepins are connected to the controlmicroprocessor.

— I/O VDD

I GND

Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitorto this pin.

VLCD1 41 37 — I OpenUsed to apply the LCD drive 2/3-bias voltage externally. This pin must beconnected to VLCD2 when 1/2-bias drive is used.

VLCD2 42 38 — I OpenUsed to apply the LCD drive 1/3-bias voltage externally. This pin must beconnected to VLCD1 when 1/2-bias drive is used.

VDD 39 35 — — —Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V.

VLCD 40 36 — — —LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V.

VSS 43 39 — — —Ground pin. Connect to ground.

INH 45 41 L I GND

Display off control input•INH = low (VSS): Off

S1/P1 to S8/P8 = Low(These pins are forcibly set to the segment output port function and fixed at the VSS level.) S9 to S35 = Low (VSS), COM1 to COM3 = Low (VSS)

•INH = high (VDD): OnNote that serial data transfers can be performed when the display is forced off by this pin.

Active I/OHandling

when unusedFunctions

Pin No.

Serial Data Transfer Format

1. When CL is stopped at the low level

Note: DD ... Direction data

Page 7

LC75833E, 75833W, 75833JE

D32D3D2D101000110

A3A2A1A0B3B2B1B0

D33 D34 D35 D36 0 0 0 P0 P1 P2 P3 DR SC BU 0 0

CCB address 8 bits

Display data 36 bits

Control data 10 bits

DD2 bits

CE

CL

DI

D68D39D38D3701000110

A3A2A1A0B3B2B1B0

D69 D70 D71 D72 0 0 0 0 0 0 0 0 0 0 0 1

CCB address 8 bits


Fixed data 10 bits

DD2 bits

D104D75D74D7301000110

A3A2A1A0B3B2B1B0

D105 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

CCB address 8 bits


Fixed data 13 bits

DD2 bits

A06554

2. When CL is stopped at the high level

Note: DD ... Direction data

• CCB address...............46H• D1 to D105.................Display data (At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105

must be set to 0.• P0 to P3 ......................Segment output port/general-purpose output port switching control data• DR ..............................1/2-bias drive or 1/3-bias drive switching control data• SC...............................Segments on/off control data• BU ..............................Normal mode/power-saving mode control data

Page 8

LC75833E, 75833W, 75833JE

D32D3D2D101000110

A3A2A1A0B3B2B1B0

D33 D34 D35 D36 0 0 0 P0 P1 P2 P3 DR SC BU 0 0

CCB address 8 bits


Control data 10 bits

DD2 bits

CE

CL

DI

D68D39D38D3701000110

A3A2A1A0B3B2B1B0

D69 D70 D71 D72 0 0 0 0 0 0 0 0 0 0 0 1

CCB address 8 bits


Fixed data 10 bits

DD2 bits

D104D75D74D7301000110

A3A2A1A0B3B2B1B0

D105 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

CCB address 8 bits


Fixed data 13 bits

DD2 bits

A06555

Serial Data Transfer Examples

• At the LC75833E and LC75833W when 73 or more segments are used, at the LC75833JE when 64 or more segmentsare used.144 bits of serial data must be sent.

Note: At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105 must be set to 0.

• At the LC75833E and LC75833W when used with less than 73 segments, at the LC75833JE when used with less than64 segments.Transfer either 48 bits or 96 bits of serial data depending on the number of segments used. However, the serial datashown in the figure below (the display data D1 to D36 and the control data) must be sent.

Note: At the LC75833JE, the display data D34 to D36 must be set to 0.

Control Data Functions

1. P0 to P3: Segment output port/general-purpose output port switching control data.These control data bits switch the S1/P1 to S8/P8 output pins between their segment output port and general-purposeoutput port functions.

Note: Sn (n = 1 to 8): Segment output portsPn (n = 1 to 8): General-purpose output ports

Page 9

LC75833E, 75833W, 75833JE

Control data Output pin states

P0 P1 P2 P3 S1/P1 S2/P2 S3/P3 S4/P4 S5/P5 S6/P6 S7/P7 S8/P8

0 0 0 0 S1 S2 S3 S4 S5 S6 S7 S8

0 0 0 1 P1 S2 S3 S4 S5 S6 S7 S8

0 0 1 0 P1 P2 S3 S4 S5 S6 S7 S8

0 0 1 1 P1 P2 P3 S4 S5 S6 S7 S8

0 1 0 0 P1 P2 P3 P4 S5 S6 S7 S8

0 1 0 1 P1 P2 P3 P4 P5 S6 S7 S8

0 1 1 0 P1 P2 P3 P4 P5 P6 S7 S8

0 1 1 1 P1 P2 P3 P4 P5 P6 P7 S8

1 0 0 0 P1 P2 P3 P4 P5 P6 P7 P8

D1 D2 D3 D31 D32 D330 1 1 0 0 0 1 0

B0 B1 B2 B3 A0 A1 A2 A3

D34 D35 D36 0 0 0 P0 P1 P2 P3 DR SC BU 0 0

8 bits 48 bits

D37 D38 D39 D67 D68 D690 1 1 0 0 0 1 0

B0 B1 B2 B3 A0 A1 A2 A3

D70 D71 D72 0 0 0 0 0 0 0 0 0 0 0 1

D73 D74 D75 D103 D104 D1050 1 1 0 0 0 1 0

B0 B1 B2 B3 A0 A1 A2 A3

0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

A06556

D1 D2 D3 D31 D32 D330 1 1 0 0 0 1 0

B0 B1 B2 B3 A0 A1 A2 A3

D34 D35 D36 0 0 0 P0 P1 P2 P3 DR SC BU 0 0

8 bits 48 bits

A06557

Also note that when the general-purpose output port function is selected, the output pins and the display data willhave the correspondences listed in the tables below.

For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level(VLCD) when the display data D10 is 1, and will output a low level (VSS) when D10 is 0.

2. DR: 1/2-bias drive or 1/3-bias drive switching control dataThis control data bit selects either 1/2-bias drive or 1/3-bias drive.

3. SC: Segments on/off control dataThis control data bit controls the on/off state of the segments.

However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputtingsegment off waveforms from the segment output pins.

4. BU: Normal mode/power-saving mode control dataThis control data bit selects either normal mode or power-saving mode.

Page 10

LC75833E, 75833W, 75833JE

DR Drive type

0 1/3-bias drive

1 1/2-bias drive

SC Display state

0 On

1 Off

BU Mode

0 Normal mode

Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the1 S1/P1 to S8/P8 output pins that are set to be general-purpose output ports by the control data P0 to P3 can be used as general-

purpose output ports.)

Output pin Corresponding display data

S1/P1 D1

S2/P2 D4

S3/P3 D7

S4/P4 D10

Output pin Corresponding display data

S5/P5 D13

S6/P6 D16

S7/P7 D19

S8/P8 D22

Display Data to Segment Output Pin Correspondence

Note: This applies to the case where the S1/P1 to S8/P8 output pins are set to be segment output ports.

The LC75833JE do not have the S12, S23, S24, S35 output pins.

For example, the table below lists the segment output states for the S11 output pin.

Page 11

LC75833E, 75833W, 75833JE

Segment COM1 COM2 COM3output pin

S1/P1 D1 D2 D3

S2/P2 D4 D5 D6

S3/P3 D7 D8 D9

S4/P4 D10 D11 D12

S5/P5 D13 D14 D15

S6/P6 D16 D17 D18

S7/P7 D19 D20 D21

S8/P8 D22 D23 D24

S9 D25 D26 D27

S10 D28 D29 D30

S11 D31 D32 D33

S12 D34 D35 D36

S13 D37 D38 D39

S14 D40 D41 D42

S15 D43 D44 D45

S16 D46 D47 D48

S17 D49 D50 D51

S18 D52 D53 D54

Segment COM1 COM2 COM3output pin

S19 D55 D56 D57

S20 D58 D59 D60

S21 D61 D62 D63

S22 D64 D65 D66

S23 D67 D68 D69

S24 D70 D71 D72

S25 D73 D74 D75

S26 D76 D77 D78

S27 D79 D80 D81

S28 D82 D83 D84

S29 D85 D86 D87

S30 D88 D89 D90

S31 D91 D92 D93

S32 D94 D95 D96

S33 D97 D98 D99

S34 D100 D101 D102

S35 D103 D104 D105

Display dataSegment output pin (S11) state

D31 D32 D33

0 0 0 The LCD segments corresponding to COM1 to COM3 are off.

0 0 1 The LCD segments corresponding to COM3 is on.


0 1 1 The LCD segments corresponding to COM2 and COM3 are on.




1 1 1 The LCD segments corresponding to COM1 to COM3 are on.

1/3-Duty 1/2-Bias Drive Technique

Page 12

LC75833E, 75833W, 75833JE

1/3-Duty 1/2-Bias Waveforms

fosc384 [Hz]

COM1

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

VLCD

VLCD1, VLCD2

0 V

COM2

COM3

A06558

LCD driver output when all LCDsegments corresponding to COM1,COM2, and COM3 are turned off.

LCD driver output when only LCDsegments corresponding toCOM1 are on (lit).

LCD driver output when only LCDsegments corresponding toCOM2 are on.

LCD driver output when LCDsegments corresponding toCOM1 and COM2 are on.




LCD driver output when all LCDsegments corresponding to COM1,COM2, and COM3 are on.

fosc384 [Hz]

COM1

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

VLCDVLCD1VLCD20 V

COM2

COM3

1/3-Duty 1/3-Bias Technique

Page 13

LC75833E, 75833W, 75833JE

LCD driver output when all LCDsegments corresponding to COM1,COM2, and COM3 are turned off.

LCD driver output when only LCDsegments corresponding toCOM1 are on (lit).






LCD driver output when all LCDsegments corresponding to COM1,COM2, and COM3 are on.

1/3-Duty 1/3-Bias Waveforms

A06559

The INH pin and Display Control

Since the LSI internal data (the display data and the control data) is undefined when power is first applied, applicationsshould set the INH pin low at the same time as power is applied to turn off the display (LC75833E, LC75833W: Thissets the S1/P1 to S8/P8, S9 to S35, and COM1 to COM3 to the VSS level. LC75833JE: This sets the S1/P1 to S8/P8, S9to S11, S13 to S22, S25 to S34, and COM1 to COM3 to the VSS level.) and during this period send serial data from thecontroller. The controller should then set the INH pin high after the data transfer has completed. This procedure preventsmeaningless displays at power on. (See Figure 3.)

Notes on the Power On/Off Sequences

Applications should observe the following sequence when turning the LC75833E, LC75833W, and LC75833JE poweron and off.

• At power on: Logic block power supply (VDD) on → LCD driver block power supply (VLCD) on• At power off: LCD driver block power supply (VLCD) off → Logic block power supply (VDD) off

However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and offat the same time.

Figure 3

Notes on Controller Transfer of Display Data

Since the LC75833E, LC75833W, and LC75833JE accept display data divided into three separate transfer operations,we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observabledegradation of display quality.

Page 14

LC75833E, 75833W, 75833JE

VDD

VLCD

INH

CE

D1 to D36P0 to P3Internal data

Internal data

Internal data

DR, SC, BU

(D37 to D72)

(D73 to D105)

t 1 t 2t 3

VILtc

VILDisplay and control data transfer

Undefined

Undefined

Undefined

Defined

Defined

Defined

Undefined

Undefined

Undefined

A06560Note: At the LC75833JE, the display data D34 to D36, D67 to D72, D103 to D105 must be set to 0.

Note:t1 ≥ 0t2 > 0t3 ≥ 0 (t2 > t3)tc ... 10 µs min

Sample Application Circuit 1

1/2 Bias (for use with normal size panels)• LC75833E, LC75833W

Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications

connect the OSC pin with a capacitor in the range 220 to 2200pF.

• LC75833JE

Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF.

Page 15

LC75833E, 75833W, 75833JE

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI

COM1COM2COM3P1/S1P2/S2

P8/S8S9

S33S34S35

+3 V

+5 V

C ≥ 0.047 µF

From thecontroller

OSC

*2

(P1)(P2)

(P8)

General-purposeoutput ports

Used for functionssuch as backlightcontrol

A06561

LCD

pan

el (

up to

105

seg

men

ts)

C

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S10S11S13

S22S25

S34

+3 V

+5 V

From thecontroller

OSC

*2

(P1)(P2)

(P8)

General-purposeoutput portsUsed for functionssuch as backlightcontrol

LCD

pan

el (

up to

93

segm

ents

)

A06583

C ≥ 0.047 µFC


1/2 Bias (for use with large panels)• LC75833E, LC75833W

Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applicationsconnect the OSC pin with a capacitor in the range 220 to 2200pF.

• LC75833JE


Page 16

LC75833E, 75833W, 75833JE

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S33S34S35

+3 V

+5 V

From thecontroller

OSC

*2

(P1)(P2)

(P8)


A06562

LCD

pan

el (

up to

105

seg

men

ts)

C ≥ 0.047 µF10kΩ ≥ R ≥ 1kΩ C R

R

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S10S11S13

S22S25

S34

OSC

*2

(P1)(P2)

(P8)



A06584

+3 V

+5 V

From thecontroller LC

D p

anel

(up

to 9

3 se

gmen

ts)

C ≥ 0.047 µF10kΩ ≥ R ≥ 1kΩ C R

R


1/3 Bias (for use with normal size panels)• LC75833E, LC75833W

Note: *2 When a capacitor except the recommended external capacitance (COSC = 1000 pF) is connected the OSC pin, we recommend that applicationsconnect the OSC pin with a capacitor in the range 220 to 2200pF.

• LC75833JE


Page 17

LC75833E, 75833W, 75833JE

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S33S34S35

+3 V

+5 V

C ≥ 0.047 µF

From thecontroller

OSC

*2

(P1)(P2)

(P8)


A06562

CC

LCD

pan

el (

up to

105

seg

men

ts)

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S10S11S13

S22S25

S34

OSC

*2

(P1)(P2)

(P8)



A06584

+3 V

+5 V

C ≥ 0.047 µF

From thecontroller

CC

LCD

pan

el (

up to

93

segm

ents

)


1/3 Bias (for use with large panels)• LC75833E, LC75833W


Page 18

LC75833E, 75833W, 75833JE

VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S33S34S35

OSC

*2

(P1)(P2)

(P8)


A06563

LCD

pan

el (

up to

105

seg

men

ts)

+3 V

+5 V

From thecontroller

C ≥ 0.047 µF10 kΩ ≥ R ≥ 1 kΩ

C C

R

R

R

Page 19

LC75833E, 75833W, 75833JE

• LC75833JE


VDD

VSS

VLCD

VLCD1

VLCD2

INHCECLDI


P8/S8S9

S10S11S13

S22S25

S34

+3 V

+5 V

From thecontroller

OSC

*2

(P1)(P2)

(P8)


LCD

pan

el (

up to

93

segm

ents

)

A06585

C ≥ 0.047 µF10 kΩ ≥ R ≥ 1 kΩ

C C

R

R

R

LC75833E, LC75833W, LC75833JE

www.onsemi.com 20

PACKAGE DIMENSIONS unit : mm

[LC75833E]

PQFP48 14x14 / QIP48ECASE 122BLISSUE A

XXXXX = Specific Device CodeY = YearM = MonthDDD = Additional Traceability Data

GENERICMARKING DIAGRAM*

*This information is generic. Please refer todevice data sheet for actual part marking.

XXXXXXXXYMDDD

14.00.1

1 2

1.0

(1.5)0.15

14.00

.1

17.20

.2

17.20.2

48

0.35

0.10

3.0

MA

X

(2.7

)0.

10.

1

0 to 10

0.15

0.8

0.2

(Unit: mm)

16.30

16.3

0

0.501.00

1.30

SOLDERING FOOTPRINT*

NOTE: The measurements are not to guarantee but for reference only.

*For additional information on our Pb-Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.

LC75833E, LC75833W, LC75833JE

www.onsemi.com 21

PACKAGE DIMENSIONS unit : mm

[LC75833W]

SPQFP48 7x7 / SQFP48CASE 131AJISSUE A


GENERICMARKING DIAGRAM*


XXXXXXXXYMDDD

XXXXX = Specific Device CodeY = YearDD = Additional Traceability Data

XXXXXXXXYDD

7.00.1

1 20.5

(0.75)0.10

7.0

0.1

9.0

0.2

9.00.2

48

0.18

0.10

1.7

MA

X

(1.5

)0.

10.

1

0 to 10

0.5

0.2

0.150.05

(Unit: mm)

8.40

8.40

0.280.50

1.00




LC75833E, LC75833W, LC75833JE

www.onsemi.com 22

PACKAGE DIMENSIONS unit : mm [LC75833JE]

PQFP44 10x10 / QIP44MCASE 122BKISSUE A


GENERIC MARKING DIAGRAM*


XXXXXXXXYMDDD

XXXXX = Specific Device CodeY = YearDD = Additional Traceability Data

XXXXXXXXYDD

10.0

1 20.8

(1.0)0.15

13.20.2

44

0.3510

.0

13.20

.2

0.10

2.8

MA

X

(2.5

)0.

1 0.

1

0 to 10

0.2

1.0

0.2

(Unit: mm)

12.10

12.1

0

0.520.80

1.50




LC75833E, LC75833W, LC75833JE

www.onsemi.com 23

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiariesin the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and otherintellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ONSemiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation orguarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application oruse of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer isresponsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements orstandards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ONSemiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under itspatent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life supportsystems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended forimplantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shallindemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, andexpenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended orunauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is anEqual Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

ORDERING INFORMATION Device Package Shipping (Qty / Packing)

LC75833E-E PQFP48 14x14 / QIP48E

(Pb-Free) 300 / Tray Foam

LC75833EHS-E PQFP48 14x14 / QIP48E


LC75833W-E SQFP48 7x7 / SQFP48

(Pb-Free) 1250 / Tray JEDEC

LC75833W-TBM-E SQFP48 7x7 / SQFP48

(Pb-Free) 1000 / Tape & Reel

LC75833WHS-E SQFP48 7x7 / SQFP48

(Pb-Free) 1250 / Tray JEDEC

LC75833JE-E PQFP44 10x10 / QIP44M


† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF

Documents

LC75833E, LC75833W, LC75833JE 1/3 Duty General-Purpose LCD ...file.elecfans.com/web1/M00/0E/A7/pIYBAFocaqSASB6bAAfU9A0Ltm… · Input high-level voltage VIH CE, CL, DI, INH 0.8 VDD