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LBM: A Low-power Buffer Management Policy for Heterogeneous Storage in Mobile Consumer Devices Hyojung Kang Department of Computer Science, Ewha University, Seoul, Korea Department of Computer Science, Ewha University, Seoul, Korea Junseok Park Semiconductor Business, Samsung Electronics Co., Ltd., Gyeonggi-do, Korea Hyokyung Bahn IEEE Transactions on Consumer Electronics, 2010

LBM: A Low-power Buffer Management Policy for ... · LBM: A Low-power Buffer Management Policy for Heterogeneous Storage in Mobile Consumer Devices Hyojung Kang Department of Computer

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LBM: A Low-power Buffer Management Policy

for Heterogeneous Storage in Mobile Consumer Devices

Hyojung Kang Department of Computer Science, Ewha University, Seoul, Korea

Department of Computer Science, Ewha University, Seoul, Korea

Junseok Park Semiconductor Business, Samsung Electronics Co., Ltd., Gyeonggi-do, Korea

Hyokyung Bahn

IEEE Transactions on Consumer Electronics, 2010

Outline

• Introduction

• Related Works

• Proposed Scheme

• Performance Evaluation

• Conclusions

Introduction (1/2) • desirable properties of NAND flash memory

– Small size

– Lightweight

– Shock resistance

– Low-power consumption

• Using mobile disk and NAND flash memory together as secondary storage is an alternative solution to provide large storage capacity with reasonable cost

Introduction (2/2)

• LBM (Low-power Buffer Management) considers

– Different energy consumption rate of each storage device

– I/O operation type (read and write)

– The reference potential of blocks in terms of both recency and frequency

• 1

Related Works • Two architectures

– use flash memory as a nonvolatile cache of disks, making the spin-down time of disk longer

– equally uses both mobile disk and flash memory as secondary storage

• Two different ways of buffer management in heterogeneous storage architecture

– to partition the buffer cache space to different storage devices, and then each partitioned space is managed separately

– to use the buffer cache space as a pool and does not partition the cache space for each storage device

Hard Disk

Hard Disk

flash memory

flash memory

when Hit

when Miss (set C_SEQ=1, C_RAND=3 )

miss count = miss count =

LRU LRU MRU MRU

SEQ

DAC (Device-Aware Cache replacement )scheme

LRU LRU MRU MRU

2 1 1 3 2 2 1 2 3 1

2 1 1 3 2 2 1 2 3 1

1 1

RAN SEQ

RAN

0 0

3

RAN

2 2

1

4

1

2 2

2

5

after every W references, adjusting partitions..

delta = 2 – 1 = 1

Proposed Scheme (1/6) • Aim to design a buffer management policy specially

focusing on the minimization of power consumption

– Device power-consumption

– Operation type

• In NAND flash, servicing a write requires about eight times larger cost than servicing a read

– Reference potential

• Power consumption can be reduced when blocks in the buffer hit

• Estimate the re-reference likelihood of buffered blocks

Proposed Scheme (2/6) • Estimate the re-reference likelihood of a buffered

blocked based on previous reference behaviors – Assume that a block referenced recently or frequently in

the past is likely to be re-referenced soon

• Extend the CRF (combined recenecy/frequency) concept of the LRFU policy – Distinguish read and write references in contributing to

CRF in order to consider the asymmetric read/write cost of flash memory

Proposed Scheme (3/6) • weight function F(δ) = μδ (0<μ<1)

– δ: the time span from the reference in the past to the current time

– Ex.

• @time tc

CRF(i) = r(i) F(δ1)+r(i) F(δ2)+w(i) F(δ3)

– δ1 = tc – t1, δ2 = tc – t2, δ3 = tc – t3

– considering both recency and frequency

0.9

0.91

0.92

0.93

0.94

0.95

0.96

0.97

0.98

0.99

1

0 20 40 60 80 100

F(δ)

δ

time

: write

: read

A A B C A C D

1 2 4 5 7 9 10

Block i A

CRF( i ) 0.9

t = 2 t = 3

A

10.8

R*0.9^2+W*0.9 = 10.8 t = 5

A

7.94

B

0.9

R*0.9^4+W*0.9^3 = 7.9461

C

0

t = 7 R*0.9^6+W*0.9^5+R*0.9^0 = 6.436341

A

6.43

B

0.72

C

0.81

t = 10 R*0.9^9+W*0.9^7+R*0.9^3 = 5.898

A

5.89

B

0.53

C

1.49

• weight function F(δ) = μδ (0<μ<1)

– in this example, set u = 0.9, R=1, W=10

• Value(i) = Weightdv(i) * CRF(i) – Weightdv denotes the basic power consumption of the device needed to

access block i

– block from disk is given more weight

– replace the smallest-value block

cache is full, need to evict a block

Proposed Scheme (5/6) • the applicability of a buffer management policy depends heavily on the

time and space efficiency

• in LBM policy, computing the Value of each block requires all of the past reference times

– impractical as space overhead for maintaining this information

• LBM does not need to maintain the full reference history of a block

• Value of non-referenced block i can be computed directly from a recently computed Value

• the relative ordering of the non-referenced blocks in the buffer cache does not changed

• maintained by a min heap data structure where the time complexity of all operations on this DS is O(log n)

Performance Evaluation (1/4) • Trace-driven simulations with

– MTRON MSD-SATA3035-064 flash SSD

– Hitachi Travelstar 5K100 mobile disk

Performance Evaluation (2/4) • Three file I/O traces collected by executing various

applications on the FreeBSD

• Files are allocated to flash memory and mobile disk by the ratio of 2:8

• μ is set to 0.999 by empirical analysis

Performance Evaluation (3/4) • Traces 1 and 2 contain significant number of frequently referenced blocks with long

reference interval, LBM outperform LRU and LRFU • Trace 2 and 3, LRFU sometimes performs worse than LRU, LRFU may cache blocks from less

expensive storage in terms of power consumptions if the blocks have larger CRF values

Performance Evaluation (4/4) • LBM performs worse than LRU and LRFU in some cases • weights of LBM are mainly set to reduce power consumption rather than I/O time

Conclusions • Propose a new buffer cache management policy for

heterogeneous storage

– Aim at reducing power consumption

– By considering different energy-consumption rate of each device and I/O type, the reference potential of blocks (recency & frequency)

– Reduces power consumption by 18% on average and up to 58.9%, and also improves the total I/O time

• Future Work

– Using volatile RAM as buffer cache may not guarantee the consistency of file system

• Use nonvolatile memory to cache dirty blocks